Pileus Git - ~andy/linux/blob - drivers/gpu/drm/nouveau/nvc0_fence.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <core/object.h>
  26 #include <core/client.h>
  27 #include <core/class.h>
  28
  29 #include <engine/fifo.h>
  30
  31 #include "nouveau_drm.h"
  32 #include "nouveau_dma.h"
  33 #include "nouveau_fence.h"
  34
  35 #include "nv50_display.h"
  36
  37 struct nvc0_fence_priv {
  38         struct nouveau_fence_priv base;
  39         struct nouveau_bo *bo;
  40         u32 *suspend;
  41 };
  42
  43 struct nvc0_fence_chan {
  44         struct nouveau_fence_chan base;
  45         struct nouveau_vma vma;
  46         struct nouveau_vma dispc_vma[4];
  47 };
  48
  49 u64
  50 nvc0_fence_crtc(struct nouveau_channel *chan, int crtc)
  51 {
  52         struct nvc0_fence_chan *fctx = chan->fence;
  53         return fctx->dispc_vma[crtc].offset;
  54 }
  55
  56 static int
  57 nvc0_fence_emit(struct nouveau_fence *fence)
  58 {
  59         struct nouveau_channel *chan = fence->channel;
  60         struct nvc0_fence_chan *fctx = chan->fence;
  61         struct nouveau_fifo_chan *fifo = (void *)chan->object;
  62         u64 addr = fctx->vma.offset + fifo->chid * 16;
  63         int ret;
  64
  65         ret = RING_SPACE(chan, 5);
  66         if (ret == 0) {
  67                 BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  68                 OUT_RING  (chan, upper_32_bits(addr));
  69                 OUT_RING  (chan, lower_32_bits(addr));
  70                 OUT_RING  (chan, fence->sequence);
  71                 OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);
  72                 FIRE_RING (chan);
  73         }
  74
  75         return ret;
  76 }
  77
  78 static int
  79 nvc0_fence_sync(struct nouveau_fence *fence,
  80                 struct nouveau_channel *prev, struct nouveau_channel *chan)
  81 {
  82         struct nvc0_fence_chan *fctx = chan->fence;
  83         struct nouveau_fifo_chan *fifo = (void *)prev->object;
  84         u64 addr = fctx->vma.offset + fifo->chid * 16;
  85         int ret;
  86
  87         ret = RING_SPACE(chan, 5);
  88         if (ret == 0) {
  89                 BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
  90                 OUT_RING  (chan, upper_32_bits(addr));
  91                 OUT_RING  (chan, lower_32_bits(addr));
  92                 OUT_RING  (chan, fence->sequence);
  93                 OUT_RING  (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL |
  94                                  NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD);
  95                 FIRE_RING (chan);
  96         }
  97
  98         return ret;
  99 }
 100
 101 static u32
 102 nvc0_fence_read(struct nouveau_channel *chan)
 103 {
 104         struct nouveau_fifo_chan *fifo = (void *)chan->object;
 105         struct nvc0_fence_priv *priv = chan->drm->fence;
 106         return nouveau_bo_rd32(priv->bo, fifo->chid * 16/4);
 107 }
 108
 109 static void
 110 nvc0_fence_context_del(struct nouveau_channel *chan)
 111 {
 112         struct drm_device *dev = chan->drm->dev;
 113         struct nvc0_fence_priv *priv = chan->drm->fence;
 114         struct nvc0_fence_chan *fctx = chan->fence;
 115         int i;
 116
 117         if (nv_device(chan->drm->device)->card_type >= NV_D0) {
 118                 for (i = 0; i < dev->mode_config.num_crtc; i++) {
 119                         struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);
 120                         nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
 121                 }
 122         } else
 123         if (nv_device(chan->drm->device)->card_type >= NV_50) {
 124                 for (i = 0; i < dev->mode_config.num_crtc; i++) {
 125                         struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i);
 126                         nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
 127                 }
 128         }
 129
 130         nouveau_bo_vma_del(priv->bo, &fctx->vma);
 131         nouveau_fence_context_del(&fctx->base);
 132         chan->fence = NULL;
 133         kfree(fctx);
 134 }
 135
 136 static int
 137 nvc0_fence_context_new(struct nouveau_channel *chan)
 138 {
 139         struct nouveau_fifo_chan *fifo = (void *)chan->object;
 140         struct nouveau_client *client = nouveau_client(fifo);
 141         struct nvc0_fence_priv *priv = chan->drm->fence;
 142         struct nvc0_fence_chan *fctx;
 143         int ret, i;
 144
 145         fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
 146         if (!fctx)
 147                 return -ENOMEM;
 148
 149         nouveau_fence_context_new(&fctx->base);
 150
 151         ret = nouveau_bo_vma_add(priv->bo, client->vm, &fctx->vma);
 152         if (ret)
 153                 nvc0_fence_context_del(chan);
 154
 155         /* map display semaphore buffers into channel's vm */
 156         for (i = 0; !ret && i < chan->drm->dev->mode_config.num_crtc; i++) {
 157                 struct nouveau_bo *bo;
 158                 if (nv_device(chan->drm->device)->card_type >= NV_D0)
 159                         bo = nvd0_display_crtc_sema(chan->drm->dev, i);
 160                 else
 161                         bo = nv50_display_crtc_sema(chan->drm->dev, i);
 162
 163                 ret = nouveau_bo_vma_add(bo, client->vm, &fctx->dispc_vma[i]);
 164         }
 165
 166         nouveau_bo_wr32(priv->bo, fifo->chid * 16/4, 0x00000000);
 167         return ret;
 168 }
 169
 170 static bool
 171 nvc0_fence_suspend(struct nouveau_drm *drm)
 172 {
 173         struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
 174         struct nvc0_fence_priv *priv = drm->fence;
 175         int i;
 176
 177         priv->suspend = vmalloc((pfifo->max + 1) * sizeof(u32));
 178         if (priv->suspend) {
 179                 for (i = 0; i <= pfifo->max; i++)
 180                         priv->suspend[i] = nouveau_bo_rd32(priv->bo, i);
 181         }
 182
 183         return priv->suspend != NULL;
 184 }
 185
 186 static void
 187 nvc0_fence_resume(struct nouveau_drm *drm)
 188 {
 189         struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
 190         struct nvc0_fence_priv *priv = drm->fence;
 191         int i;
 192
 193         if (priv->suspend) {
 194                 for (i = 0; i <= pfifo->max; i++)
 195                         nouveau_bo_wr32(priv->bo, i, priv->suspend[i]);
 196                 vfree(priv->suspend);
 197                 priv->suspend = NULL;
 198         }
 199 }
 200
 201 static void
 202 nvc0_fence_destroy(struct nouveau_drm *drm)
 203 {
 204         struct nvc0_fence_priv *priv = drm->fence;
 205         nouveau_bo_unmap(priv->bo);
 206         nouveau_bo_ref(NULL, &priv->bo);
 207         drm->fence = NULL;
 208         kfree(priv);
 209 }
 210
 211 int
 212 nvc0_fence_create(struct nouveau_drm *drm)
 213 {
 214         struct nouveau_fifo *pfifo = nouveau_fifo(drm->device);
 215         struct nvc0_fence_priv *priv;
 216         int ret;
 217
 218         priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
 219         if (!priv)
 220                 return -ENOMEM;
 221
 222         priv->base.dtor = nvc0_fence_destroy;
 223         priv->base.suspend = nvc0_fence_suspend;
 224         priv->base.resume = nvc0_fence_resume;
 225         priv->base.context_new = nvc0_fence_context_new;
 226         priv->base.context_del = nvc0_fence_context_del;
 227         priv->base.emit = nvc0_fence_emit;
 228         priv->base.sync = nvc0_fence_sync;
 229         priv->base.read = nvc0_fence_read;
 230
 231         ret = nouveau_bo_new(drm->dev, 16 * (pfifo->max + 1), 0,
 232                              TTM_PL_FLAG_VRAM, 0, 0, NULL, &priv->bo);
 233         if (ret == 0) {
 234                 ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);
 235                 if (ret == 0)
 236                         ret = nouveau_bo_map(priv->bo);
 237                 if (ret)
 238                         nouveau_bo_ref(NULL, &priv->bo);
 239         }
 240
 241         if (ret)
 242                 nvc0_fence_destroy(drm);
 243         return ret;
 244 }