Pileus Git - ~andy/linux/blob - drivers/gpu/drm/nouveau/nv04_tv.c

   1 /*
   2  * Copyright (C) 2009 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "drmP.h"
  28 #include "nouveau_drv.h"
  29 #include "nouveau_encoder.h"
  30 #include "nouveau_connector.h"
  31 #include "nouveau_crtc.h"
  32 #include "nouveau_hw.h"
  33 #include "drm_crtc_helper.h"
  34
  35 #include "i2c/ch7006.h"
  36
  37 static struct i2c_board_info nv04_tv_encoder_info[] = {
  38         {
  39                 I2C_BOARD_INFO("ch7006", 0x75),
  40                 .platform_data = &(struct ch7006_encoder_params) {
  41                         CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER,
  42                         0, 0, 0,
  43                         CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED,
  44                         CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC
  45                 }
  46         },
  47         { }
  48 };
  49
  50 int nv04_tv_identify(struct drm_device *dev, int i2c_index)
  51 {
  52         return nouveau_i2c_identify(dev, "TV encoder", nv04_tv_encoder_info,
  53                                     NULL, i2c_index);
  54 }
  55
  56
  57 #define PLLSEL_TV_CRTC1_MASK                            \
  58         (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1          \
  59          | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1)
  60 #define PLLSEL_TV_CRTC2_MASK                            \
  61         (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2          \
  62          | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2)
  63
  64 static void nv04_tv_dpms(struct drm_encoder *encoder, int mode)
  65 {
  66         struct drm_device *dev = encoder->dev;
  67         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  68         struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
  69         uint8_t crtc1A;
  70
  71         NV_INFO(dev, "Setting dpms mode %d on TV encoder (output %d)\n",
  72                 mode, nv_encoder->dcb->index);
  73
  74         state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
  75
  76         if (mode == DRM_MODE_DPMS_ON) {
  77                 int head = nouveau_crtc(encoder->crtc)->index;
  78                 crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
  79
  80                 state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
  81                                         PLLSEL_TV_CRTC1_MASK;
  82
  83                 /* Inhibit hsync */
  84                 crtc1A |= 0x80;
  85
  86                 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
  87         }
  88
  89         NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
  90
  91         get_slave_funcs(encoder)->dpms(encoder, mode);
  92 }
  93
  94 static void nv04_tv_bind(struct drm_device *dev, int head, bool bind)
  95 {
  96         struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head];
  97
  98         state->tv_setup = 0;
  99
 100         if (bind)
 101                 state->CRTC[NV_CIO_CRE_49] |= 0x10;
 102         else
 103                 state->CRTC[NV_CIO_CRE_49] &= ~0x10;
 104
 105         NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
 106                        state->CRTC[NV_CIO_CRE_LCD__INDEX]);
 107         NVWriteVgaCrtc(dev, head, NV_CIO_CRE_49,
 108                        state->CRTC[NV_CIO_CRE_49]);
 109         NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP,
 110                       state->tv_setup);
 111 }
 112
 113 static void nv04_tv_prepare(struct drm_encoder *encoder)
 114 {
 115         struct drm_device *dev = encoder->dev;
 116         int head = nouveau_crtc(encoder->crtc)->index;
 117         struct drm_encoder_helper_funcs *helper = encoder->helper_private;
 118
 119         helper->dpms(encoder, DRM_MODE_DPMS_OFF);
 120
 121         nv04_dfp_disable(dev, head);
 122
 123         if (nv_two_heads(dev))
 124                 nv04_tv_bind(dev, head ^ 1, false);
 125
 126         nv04_tv_bind(dev, head, true);
 127 }
 128
 129 static void nv04_tv_mode_set(struct drm_encoder *encoder,
 130                              struct drm_display_mode *mode,
 131                              struct drm_display_mode *adjusted_mode)
 132 {
 133         struct drm_device *dev = encoder->dev;
 134         struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
 135         struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
 136
 137         regp->tv_htotal = adjusted_mode->htotal;
 138         regp->tv_vtotal = adjusted_mode->vtotal;
 139
 140         /* These delay the TV signals with respect to the VGA port,
 141          * they might be useful if we ever allow a CRTC to drive
 142          * multiple outputs.
 143          */
 144         regp->tv_hskew = 1;
 145         regp->tv_hsync_delay = 1;
 146         regp->tv_hsync_delay2 = 64;
 147         regp->tv_vskew = 1;
 148         regp->tv_vsync_delay = 1;
 149
 150         get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode);
 151 }
 152
 153 static void nv04_tv_commit(struct drm_encoder *encoder)
 154 {
 155         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 156         struct drm_device *dev = encoder->dev;
 157         struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
 158         struct drm_encoder_helper_funcs *helper = encoder->helper_private;
 159
 160         helper->dpms(encoder, DRM_MODE_DPMS_ON);
 161
 162         NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
 163                       drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index,
 164                       '@' + ffs(nv_encoder->dcb->or));
 165 }
 166
 167 static void nv04_tv_destroy(struct drm_encoder *encoder)
 168 {
 169         get_slave_funcs(encoder)->destroy(encoder);
 170         drm_encoder_cleanup(encoder);
 171
 172         kfree(encoder->helper_private);
 173         kfree(nouveau_encoder(encoder));
 174 }
 175
 176 static const struct drm_encoder_funcs nv04_tv_funcs = {
 177         .destroy = nv04_tv_destroy,
 178 };
 179
 180 int
 181 nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry)
 182 {
 183         struct nouveau_encoder *nv_encoder;
 184         struct drm_encoder *encoder;
 185         struct drm_device *dev = connector->dev;
 186         struct drm_encoder_helper_funcs *hfuncs;
 187         struct drm_encoder_slave_funcs *sfuncs;
 188         struct nouveau_i2c_port *i2c =
 189                 nouveau_i2c_find(dev, entry->i2c_index);
 190         int type, ret;
 191
 192         /* Ensure that we can talk to this encoder */
 193         type = nv04_tv_identify(dev, entry->i2c_index);
 194         if (type < 0)
 195                 return type;
 196
 197         /* Allocate the necessary memory */
 198         nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
 199         if (!nv_encoder)
 200                 return -ENOMEM;
 201
 202         hfuncs = kzalloc(sizeof(*hfuncs), GFP_KERNEL);
 203         if (!hfuncs) {
 204                 ret = -ENOMEM;
 205                 goto fail_free;
 206         }
 207
 208         /* Initialize the common members */
 209         encoder = to_drm_encoder(nv_encoder);
 210
 211         drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC);
 212         drm_encoder_helper_add(encoder, hfuncs);
 213
 214         encoder->possible_crtcs = entry->heads;
 215         encoder->possible_clones = 0;
 216         nv_encoder->dcb = entry;
 217         nv_encoder->or = ffs(entry->or) - 1;
 218
 219         /* Run the slave-specific initialization */
 220         ret = drm_i2c_encoder_init(dev, to_encoder_slave(encoder),
 221                                    nouveau_i2c_adapter(i2c), &nv04_tv_encoder_info[type]);
 222         if (ret < 0)
 223                 goto fail_cleanup;
 224
 225         /* Fill the function pointers */
 226         sfuncs = get_slave_funcs(encoder);
 227
 228         *hfuncs = (struct drm_encoder_helper_funcs) {
 229                 .dpms = nv04_tv_dpms,
 230                 .save = sfuncs->save,
 231                 .restore = sfuncs->restore,
 232                 .mode_fixup = sfuncs->mode_fixup,
 233                 .prepare = nv04_tv_prepare,
 234                 .commit = nv04_tv_commit,
 235                 .mode_set = nv04_tv_mode_set,
 236                 .detect = sfuncs->detect,
 237         };
 238
 239         /* Attach it to the specified connector. */
 240         sfuncs->create_resources(encoder, connector);
 241         drm_mode_connector_attach_encoder(connector, encoder);
 242
 243         return 0;
 244
 245 fail_cleanup:
 246         drm_encoder_cleanup(encoder);
 247         kfree(hfuncs);
 248 fail_free:
 249         kfree(nv_encoder);
 250         return ret;
 251 }