Pileus Git - ~andy/linux/blob - drivers/gpu/drm/nouveau/nv04_display.c

   1 /*
   2  * Copyright 2009 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Author: Ben Skeggs
  23  */
  24
  25 #include "drmP.h"
  26 #include "drm.h"
  27 #include "drm_crtc_helper.h"
  28
  29 #include "nouveau_drv.h"
  30 #include "nouveau_fb.h"
  31 #include "nouveau_hw.h"
  32 #include "nouveau_encoder.h"
  33 #include "nouveau_connector.h"
  34
  35 static void nv04_vblank_crtc0_isr(struct drm_device *);
  36 static void nv04_vblank_crtc1_isr(struct drm_device *);
  37
  38 static void
  39 nv04_display_store_initial_head_owner(struct drm_device *dev)
  40 {
  41         struct drm_nouveau_private *dev_priv = dev->dev_private;
  42
  43         if (dev_priv->chipset != 0x11) {
  44                 dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
  45                 return;
  46         }
  47
  48         /* reading CR44 is broken on nv11, so we attempt to infer it */
  49         if (nvReadMC(dev, NV_PBUS_DEBUG_1) & (1 << 28)) /* heads tied, restore both */
  50                 dev_priv->crtc_owner = 0x4;
  51         else {
  52                 uint8_t slaved_on_A, slaved_on_B;
  53                 bool tvA = false;
  54                 bool tvB = false;
  55
  56                 slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) &
  57                                                                         0x80;
  58                 if (slaved_on_B)
  59                         tvB = !(NVReadVgaCrtc(dev, 1, NV_CIO_CRE_LCD__INDEX) &
  60                                         MASK(NV_CIO_CRE_LCD_LCD_SELECT));
  61
  62                 slaved_on_A = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX) &
  63                                                                         0x80;
  64                 if (slaved_on_A)
  65                         tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) &
  66                                         MASK(NV_CIO_CRE_LCD_LCD_SELECT));
  67
  68                 if (slaved_on_A && !tvA)
  69                         dev_priv->crtc_owner = 0x0;
  70                 else if (slaved_on_B && !tvB)
  71                         dev_priv->crtc_owner = 0x3;
  72                 else if (slaved_on_A)
  73                         dev_priv->crtc_owner = 0x0;
  74                 else if (slaved_on_B)
  75                         dev_priv->crtc_owner = 0x3;
  76                 else
  77                         dev_priv->crtc_owner = 0x0;
  78         }
  79 }
  80
  81 int
  82 nv04_display_early_init(struct drm_device *dev)
  83 {
  84         /* Make the I2C buses accessible. */
  85         if (!nv_gf4_disp_arch(dev)) {
  86                 uint32_t pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE);
  87
  88                 if (!(pmc_enable & 1))
  89                         nv_wr32(dev, NV03_PMC_ENABLE, pmc_enable | 1);
  90         }
  91
  92         /* Unlock the VGA CRTCs. */
  93         NVLockVgaCrtcs(dev, false);
  94
  95         /* Make sure the CRTCs aren't in slaved mode. */
  96         if (nv_two_heads(dev)) {
  97                 nv04_display_store_initial_head_owner(dev);
  98                 NVSetOwner(dev, 0);
  99         }
 100
 101         /* ensure vblank interrupts are off, they can't be enabled until
 102          * drm_vblank has been initialised
 103          */
 104         NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);
 105         if (nv_two_heads(dev))
 106                 NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);
 107
 108         return 0;
 109 }
 110
 111 void
 112 nv04_display_late_takedown(struct drm_device *dev)
 113 {
 114         struct drm_nouveau_private *dev_priv = dev->dev_private;
 115
 116         if (nv_two_heads(dev))
 117                 NVSetOwner(dev, dev_priv->crtc_owner);
 118
 119         NVLockVgaCrtcs(dev, true);
 120 }
 121
 122 int
 123 nv04_display_create(struct drm_device *dev)
 124 {
 125         struct drm_nouveau_private *dev_priv = dev->dev_private;
 126         struct dcb_table *dcb = &dev_priv->vbios.dcb;
 127         struct drm_connector *connector, *ct;
 128         struct drm_encoder *encoder;
 129         struct drm_crtc *crtc;
 130         int i, ret;
 131
 132         NV_DEBUG_KMS(dev, "\n");
 133
 134         nouveau_hw_save_vga_fonts(dev, 1);
 135
 136         nv04_crtc_create(dev, 0);
 137         if (nv_two_heads(dev))
 138                 nv04_crtc_create(dev, 1);
 139
 140         for (i = 0; i < dcb->entries; i++) {
 141                 struct dcb_entry *dcbent = &dcb->entry[i];
 142
 143                 connector = nouveau_connector_create(dev, dcbent->connector);
 144                 if (IS_ERR(connector))
 145                         continue;
 146
 147                 switch (dcbent->type) {
 148                 case OUTPUT_ANALOG:
 149                         ret = nv04_dac_create(connector, dcbent);
 150                         break;
 151                 case OUTPUT_LVDS:
 152                 case OUTPUT_TMDS:
 153                         ret = nv04_dfp_create(connector, dcbent);
 154                         break;
 155                 case OUTPUT_TV:
 156                         if (dcbent->location == DCB_LOC_ON_CHIP)
 157                                 ret = nv17_tv_create(connector, dcbent);
 158                         else
 159                                 ret = nv04_tv_create(connector, dcbent);
 160                         break;
 161                 default:
 162                         NV_WARN(dev, "DCB type %d not known\n", dcbent->type);
 163                         continue;
 164                 }
 165
 166                 if (ret)
 167                         continue;
 168         }
 169
 170         list_for_each_entry_safe(connector, ct,
 171                                  &dev->mode_config.connector_list, head) {
 172                 if (!connector->encoder_ids[0]) {
 173                         NV_WARN(dev, "%s has no encoders, removing\n",
 174                                 drm_get_connector_name(connector));
 175                         connector->funcs->destroy(connector);
 176                 }
 177         }
 178
 179         /* Save previous state */
 180         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
 181                 crtc->funcs->save(crtc);
 182
 183         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 184                 struct drm_encoder_helper_funcs *func = encoder->helper_private;
 185
 186                 func->save(encoder);
 187         }
 188
 189         nouveau_irq_register(dev, 24, nv04_vblank_crtc0_isr);
 190         nouveau_irq_register(dev, 25, nv04_vblank_crtc1_isr);
 191         return 0;
 192 }
 193
 194 void
 195 nv04_display_destroy(struct drm_device *dev)
 196 {
 197         struct drm_encoder *encoder;
 198         struct drm_crtc *crtc;
 199
 200         NV_DEBUG_KMS(dev, "\n");
 201
 202         nouveau_irq_unregister(dev, 24);
 203         nouveau_irq_unregister(dev, 25);
 204
 205         /* Turn every CRTC off. */
 206         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 207                 struct drm_mode_set modeset = {
 208                         .crtc = crtc,
 209                 };
 210
 211                 crtc->funcs->set_config(&modeset);
 212         }
 213
 214         /* Restore state */
 215         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 216                 struct drm_encoder_helper_funcs *func = encoder->helper_private;
 217
 218                 func->restore(encoder);
 219         }
 220
 221         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
 222                 crtc->funcs->restore(crtc);
 223
 224         nouveau_hw_save_vga_fonts(dev, 0);
 225 }
 226
 227 int
 228 nv04_display_init(struct drm_device *dev)
 229 {
 230         struct drm_encoder *encoder;
 231         struct drm_crtc *crtc;
 232
 233         /* meh.. modeset apparently doesn't setup all the regs and depends
 234          * on pre-existing state, for now load the state of the card *before*
 235          * nouveau was loaded, and then do a modeset.
 236          *
 237          * best thing to do probably is to make save/restore routines not
 238          * save/restore "pre-load" state, but more general so we can save
 239          * on suspend too.
 240          */
 241         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 242                 struct drm_encoder_helper_funcs *func = encoder->helper_private;
 243
 244                 func->restore(encoder);
 245         }
 246
 247         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
 248                 crtc->funcs->restore(crtc);
 249
 250         return 0;
 251 }
 252
 253 void
 254 nv04_display_fini(struct drm_device *dev)
 255 {
 256         /* disable vblank interrupts */
 257         NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);
 258         if (nv_two_heads(dev))
 259                 NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);
 260 }
 261
 262 static void
 263 nv04_vblank_crtc0_isr(struct drm_device *dev)
 264 {
 265         nv_wr32(dev, NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK);
 266         drm_handle_vblank(dev, 0);
 267 }
 268
 269 static void
 270 nv04_vblank_crtc1_isr(struct drm_device *dev)
 271 {
 272         nv_wr32(dev, NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK);
 273         drm_handle_vblank(dev, 1);
 274 }