Pileus Git - ~andy/linux/blob - drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include "drmP.h"
  31 #include "ttm/ttm_page_alloc.h"
  32
  33 #include "nouveau_drm.h"
  34 #include "nouveau_drv.h"
  35 #include "nouveau_dma.h"
  36 #include "nouveau_mm.h"
  37 #include "nouveau_vm.h"
  38
  39 #include <linux/log2.h>
  40 #include <linux/slab.h>
  41
  42 static void
  43 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
  44 {
  45         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
  46         struct drm_device *dev = dev_priv->dev;
  47         struct nouveau_bo *nvbo = nouveau_bo(bo);
  48
  49         if (unlikely(nvbo->gem))
  50                 DRM_ERROR("bo %p still attached to GEM object\n", bo);
  51
  52         nv10_mem_put_tile_region(dev, nvbo->tile, NULL);
  53         kfree(nvbo);
  54 }
  55
  56 static void
  57 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
  58                        int *align, int *size)
  59 {
  60         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
  61
  62         if (dev_priv->card_type < NV_50) {
  63                 if (nvbo->tile_mode) {
  64                         if (dev_priv->chipset >= 0x40) {
  65                                 *align = 65536;
  66                                 *size = roundup(*size, 64 * nvbo->tile_mode);
  67
  68                         } else if (dev_priv->chipset >= 0x30) {
  69                                 *align = 32768;
  70                                 *size = roundup(*size, 64 * nvbo->tile_mode);
  71
  72                         } else if (dev_priv->chipset >= 0x20) {
  73                                 *align = 16384;
  74                                 *size = roundup(*size, 64 * nvbo->tile_mode);
  75
  76                         } else if (dev_priv->chipset >= 0x10) {
  77                                 *align = 16384;
  78                                 *size = roundup(*size, 32 * nvbo->tile_mode);
  79                         }
  80                 }
  81         } else {
  82                 *size = roundup(*size, (1 << nvbo->page_shift));
  83                 *align = max((1 <<  nvbo->page_shift), *align);
  84         }
  85
  86         *size = roundup(*size, PAGE_SIZE);
  87 }
  88
  89 int
  90 nouveau_bo_new(struct drm_device *dev, int size, int align,
  91                uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
  92                struct nouveau_bo **pnvbo)
  93 {
  94         struct drm_nouveau_private *dev_priv = dev->dev_private;
  95         struct nouveau_bo *nvbo;
  96         int ret;
  97
  98         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
  99         if (!nvbo)
 100                 return -ENOMEM;
 101         INIT_LIST_HEAD(&nvbo->head);
 102         INIT_LIST_HEAD(&nvbo->entry);
 103         INIT_LIST_HEAD(&nvbo->vma_list);
 104         nvbo->tile_mode = tile_mode;
 105         nvbo->tile_flags = tile_flags;
 106         nvbo->bo.bdev = &dev_priv->ttm.bdev;
 107
 108         nvbo->page_shift = 12;
 109         if (dev_priv->bar1_vm) {
 110                 if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
 111                         nvbo->page_shift = dev_priv->bar1_vm->lpg_shift;
 112         }
 113
 114         nouveau_bo_fixup_align(nvbo, flags, &align, &size);
 115         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 116         nouveau_bo_placement_set(nvbo, flags, 0);
 117
 118         ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
 119                           ttm_bo_type_device, &nvbo->placement,
 120                           align >> PAGE_SHIFT, 0, false, NULL, size,
 121                           nouveau_bo_del_ttm);
 122         if (ret) {
 123                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 124                 return ret;
 125         }
 126
 127         *pnvbo = nvbo;
 128         return 0;
 129 }
 130
 131 static void
 132 set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags)
 133 {
 134         *n = 0;
 135
 136         if (type & TTM_PL_FLAG_VRAM)
 137                 pl[(*n)++] = TTM_PL_FLAG_VRAM | flags;
 138         if (type & TTM_PL_FLAG_TT)
 139                 pl[(*n)++] = TTM_PL_FLAG_TT | flags;
 140         if (type & TTM_PL_FLAG_SYSTEM)
 141                 pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags;
 142 }
 143
 144 static void
 145 set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
 146 {
 147         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
 148         int vram_pages = dev_priv->vram_size >> PAGE_SHIFT;
 149
 150         if (dev_priv->card_type == NV_10 &&
 151             nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) &&
 152             nvbo->bo.mem.num_pages < vram_pages / 2) {
 153                 /*
 154                  * Make sure that the color and depth buffers are handled
 155                  * by independent memory controller units. Up to a 9x
 156                  * speed up when alpha-blending and depth-test are enabled
 157                  * at the same time.
 158                  */
 159                 if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) {
 160                         nvbo->placement.fpfn = vram_pages / 2;
 161                         nvbo->placement.lpfn = ~0;
 162                 } else {
 163                         nvbo->placement.fpfn = 0;
 164                         nvbo->placement.lpfn = vram_pages / 2;
 165                 }
 166         }
 167 }
 168
 169 void
 170 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
 171 {
 172         struct ttm_placement *pl = &nvbo->placement;
 173         uint32_t flags = TTM_PL_MASK_CACHING |
 174                 (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);
 175
 176         pl->placement = nvbo->placements;
 177         set_placement_list(nvbo->placements, &pl->num_placement,
 178                            type, flags);
 179
 180         pl->busy_placement = nvbo->busy_placements;
 181         set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
 182                            type | busy, flags);
 183
 184         set_placement_range(nvbo, type);
 185 }
 186
 187 int
 188 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
 189 {
 190         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
 191         struct ttm_buffer_object *bo = &nvbo->bo;
 192         int ret;
 193
 194         if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
 195                 NV_ERROR(nouveau_bdev(bo->bdev)->dev,
 196                          "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
 197                          1 << bo->mem.mem_type, memtype);
 198                 return -EINVAL;
 199         }
 200
 201         if (nvbo->pin_refcnt++)
 202                 return 0;
 203
 204         ret = ttm_bo_reserve(bo, false, false, false, 0);
 205         if (ret)
 206                 goto out;
 207
 208         nouveau_bo_placement_set(nvbo, memtype, 0);
 209
 210         ret = nouveau_bo_validate(nvbo, false, false, false);
 211         if (ret == 0) {
 212                 switch (bo->mem.mem_type) {
 213                 case TTM_PL_VRAM:
 214                         dev_priv->fb_aper_free -= bo->mem.size;
 215                         break;
 216                 case TTM_PL_TT:
 217                         dev_priv->gart_info.aper_free -= bo->mem.size;
 218                         break;
 219                 default:
 220                         break;
 221                 }
 222         }
 223         ttm_bo_unreserve(bo);
 224 out:
 225         if (unlikely(ret))
 226                 nvbo->pin_refcnt--;
 227         return ret;
 228 }
 229
 230 int
 231 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 232 {
 233         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
 234         struct ttm_buffer_object *bo = &nvbo->bo;
 235         int ret;
 236
 237         if (--nvbo->pin_refcnt)
 238                 return 0;
 239
 240         ret = ttm_bo_reserve(bo, false, false, false, 0);
 241         if (ret)
 242                 return ret;
 243
 244         nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
 245
 246         ret = nouveau_bo_validate(nvbo, false, false, false);
 247         if (ret == 0) {
 248                 switch (bo->mem.mem_type) {
 249                 case TTM_PL_VRAM:
 250                         dev_priv->fb_aper_free += bo->mem.size;
 251                         break;
 252                 case TTM_PL_TT:
 253                         dev_priv->gart_info.aper_free += bo->mem.size;
 254                         break;
 255                 default:
 256                         break;
 257                 }
 258         }
 259
 260         ttm_bo_unreserve(bo);
 261         return ret;
 262 }
 263
 264 int
 265 nouveau_bo_map(struct nouveau_bo *nvbo)
 266 {
 267         int ret;
 268
 269         ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
 270         if (ret)
 271                 return ret;
 272
 273         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 274         ttm_bo_unreserve(&nvbo->bo);
 275         return ret;
 276 }
 277
 278 void
 279 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 280 {
 281         if (nvbo)
 282                 ttm_bo_kunmap(&nvbo->kmap);
 283 }
 284
 285 int
 286 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 287                     bool no_wait_reserve, bool no_wait_gpu)
 288 {
 289         int ret;
 290
 291         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, interruptible,
 292                               no_wait_reserve, no_wait_gpu);
 293         if (ret)
 294                 return ret;
 295
 296         return 0;
 297 }
 298
 299 u16
 300 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index)
 301 {
 302         bool is_iomem;
 303         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 304         mem = &mem[index];
 305         if (is_iomem)
 306                 return ioread16_native((void __force __iomem *)mem);
 307         else
 308                 return *mem;
 309 }
 310
 311 void
 312 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 313 {
 314         bool is_iomem;
 315         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 316         mem = &mem[index];
 317         if (is_iomem)
 318                 iowrite16_native(val, (void __force __iomem *)mem);
 319         else
 320                 *mem = val;
 321 }
 322
 323 u32
 324 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 325 {
 326         bool is_iomem;
 327         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 328         mem = &mem[index];
 329         if (is_iomem)
 330                 return ioread32_native((void __force __iomem *)mem);
 331         else
 332                 return *mem;
 333 }
 334
 335 void
 336 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 337 {
 338         bool is_iomem;
 339         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 340         mem = &mem[index];
 341         if (is_iomem)
 342                 iowrite32_native(val, (void __force __iomem *)mem);
 343         else
 344                 *mem = val;
 345 }
 346
 347 static struct ttm_tt *
 348 nouveau_ttm_tt_create(struct ttm_bo_device *bdev,
 349                       unsigned long size, uint32_t page_flags,
 350                       struct page *dummy_read_page)
 351 {
 352         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 353         struct drm_device *dev = dev_priv->dev;
 354
 355         switch (dev_priv->gart_info.type) {
 356 #if __OS_HAS_AGP
 357         case NOUVEAU_GART_AGP:
 358                 return ttm_agp_tt_create(bdev, dev->agp->bridge,
 359                                          size, page_flags, dummy_read_page);
 360 #endif
 361         case NOUVEAU_GART_PDMA:
 362         case NOUVEAU_GART_HW:
 363                 return nouveau_sgdma_create_ttm(bdev, size, page_flags,
 364                                                 dummy_read_page);
 365         default:
 366                 NV_ERROR(dev, "Unknown GART type %d\n",
 367                          dev_priv->gart_info.type);
 368                 break;
 369         }
 370
 371         return NULL;
 372 }
 373
 374 static int
 375 nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 376 {
 377         /* We'll do this from user space. */
 378         return 0;
 379 }
 380
 381 static int
 382 nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 383                          struct ttm_mem_type_manager *man)
 384 {
 385         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 386         struct drm_device *dev = dev_priv->dev;
 387
 388         switch (type) {
 389         case TTM_PL_SYSTEM:
 390                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 391                 man->available_caching = TTM_PL_MASK_CACHING;
 392                 man->default_caching = TTM_PL_FLAG_CACHED;
 393                 break;
 394         case TTM_PL_VRAM:
 395                 if (dev_priv->card_type >= NV_50) {
 396                         man->func = &nouveau_vram_manager;
 397                         man->io_reserve_fastpath = false;
 398                         man->use_io_reserve_lru = true;
 399                 } else {
 400                         man->func = &ttm_bo_manager_func;
 401                 }
 402                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 403                              TTM_MEMTYPE_FLAG_MAPPABLE;
 404                 man->available_caching = TTM_PL_FLAG_UNCACHED |
 405                                          TTM_PL_FLAG_WC;
 406                 man->default_caching = TTM_PL_FLAG_WC;
 407                 break;
 408         case TTM_PL_TT:
 409                 if (dev_priv->card_type >= NV_50)
 410                         man->func = &nouveau_gart_manager;
 411                 else
 412                         man->func = &ttm_bo_manager_func;
 413                 switch (dev_priv->gart_info.type) {
 414                 case NOUVEAU_GART_AGP:
 415                         man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 416                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 417                                 TTM_PL_FLAG_WC;
 418                         man->default_caching = TTM_PL_FLAG_WC;
 419                         break;
 420                 case NOUVEAU_GART_PDMA:
 421                 case NOUVEAU_GART_HW:
 422                         man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
 423                                      TTM_MEMTYPE_FLAG_CMA;
 424                         man->available_caching = TTM_PL_MASK_CACHING;
 425                         man->default_caching = TTM_PL_FLAG_CACHED;
 426                         break;
 427                 default:
 428                         NV_ERROR(dev, "Unknown GART type: %d\n",
 429                                  dev_priv->gart_info.type);
 430                         return -EINVAL;
 431                 }
 432                 break;
 433         default:
 434                 NV_ERROR(dev, "Unsupported memory type %u\n", (unsigned)type);
 435                 return -EINVAL;
 436         }
 437         return 0;
 438 }
 439
 440 static void
 441 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 442 {
 443         struct nouveau_bo *nvbo = nouveau_bo(bo);
 444
 445         switch (bo->mem.mem_type) {
 446         case TTM_PL_VRAM:
 447                 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
 448                                          TTM_PL_FLAG_SYSTEM);
 449                 break;
 450         default:
 451                 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
 452                 break;
 453         }
 454
 455         *pl = nvbo->placement;
 456 }
 457
 458
 459 /* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
 460  * TTM_PL_{VRAM,TT} directly.
 461  */
 462
 463 static int
 464 nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
 465                               struct nouveau_bo *nvbo, bool evict,
 466                               bool no_wait_reserve, bool no_wait_gpu,
 467                               struct ttm_mem_reg *new_mem)
 468 {
 469         struct nouveau_fence *fence = NULL;
 470         int ret;
 471
 472         ret = nouveau_fence_new(chan, &fence, true);
 473         if (ret)
 474                 return ret;
 475
 476         ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL, evict,
 477                                         no_wait_reserve, no_wait_gpu, new_mem);
 478         nouveau_fence_unref(&fence);
 479         return ret;
 480 }
 481
 482 static int
 483 nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
 484                   struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
 485 {
 486         struct nouveau_mem *node = old_mem->mm_node;
 487         u64 src_offset = node->vma[0].offset;
 488         u64 dst_offset = node->vma[1].offset;
 489         u32 page_count = new_mem->num_pages;
 490         int ret;
 491
 492         page_count = new_mem->num_pages;
 493         while (page_count) {
 494                 int line_count = (page_count > 2047) ? 2047 : page_count;
 495
 496                 ret = RING_SPACE(chan, 12);
 497                 if (ret)
 498                         return ret;
 499
 500                 BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0238, 2);
 501                 OUT_RING  (chan, upper_32_bits(dst_offset));
 502                 OUT_RING  (chan, lower_32_bits(dst_offset));
 503                 BEGIN_NVC0(chan, 2, NvSubM2MF, 0x030c, 6);
 504                 OUT_RING  (chan, upper_32_bits(src_offset));
 505                 OUT_RING  (chan, lower_32_bits(src_offset));
 506                 OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
 507                 OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
 508                 OUT_RING  (chan, PAGE_SIZE); /* line_length */
 509                 OUT_RING  (chan, line_count);
 510                 BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0300, 1);
 511                 OUT_RING  (chan, 0x00100110);
 512
 513                 page_count -= line_count;
 514                 src_offset += (PAGE_SIZE * line_count);
 515                 dst_offset += (PAGE_SIZE * line_count);
 516         }
 517
 518         return 0;
 519 }
 520
 521 static int
 522 nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
 523                   struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
 524 {
 525         struct nouveau_mem *node = old_mem->mm_node;
 526         struct nouveau_bo *nvbo = nouveau_bo(bo);
 527         u64 length = (new_mem->num_pages << PAGE_SHIFT);
 528         u64 src_offset = node->vma[0].offset;
 529         u64 dst_offset = node->vma[1].offset;
 530         int ret;
 531
 532         while (length) {
 533                 u32 amount, stride, height;
 534
 535                 amount  = min(length, (u64)(4 * 1024 * 1024));
 536                 stride  = 16 * 4;
 537                 height  = amount / stride;
 538
 539                 if (new_mem->mem_type == TTM_PL_VRAM &&
 540                     nouveau_bo_tile_layout(nvbo)) {
 541                         ret = RING_SPACE(chan, 8);
 542                         if (ret)
 543                                 return ret;
 544
 545                         BEGIN_RING(chan, NvSubM2MF, 0x0200, 7);
 546                         OUT_RING  (chan, 0);
 547                         OUT_RING  (chan, 0);
 548                         OUT_RING  (chan, stride);
 549                         OUT_RING  (chan, height);
 550                         OUT_RING  (chan, 1);
 551                         OUT_RING  (chan, 0);
 552                         OUT_RING  (chan, 0);
 553                 } else {
 554                         ret = RING_SPACE(chan, 2);
 555                         if (ret)
 556                                 return ret;
 557
 558                         BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);
 559                         OUT_RING  (chan, 1);
 560                 }
 561                 if (old_mem->mem_type == TTM_PL_VRAM &&
 562                     nouveau_bo_tile_layout(nvbo)) {
 563                         ret = RING_SPACE(chan, 8);
 564                         if (ret)
 565                                 return ret;
 566
 567                         BEGIN_RING(chan, NvSubM2MF, 0x021c, 7);
 568                         OUT_RING  (chan, 0);
 569                         OUT_RING  (chan, 0);
 570                         OUT_RING  (chan, stride);
 571                         OUT_RING  (chan, height);
 572                         OUT_RING  (chan, 1);
 573                         OUT_RING  (chan, 0);
 574                         OUT_RING  (chan, 0);
 575                 } else {
 576                         ret = RING_SPACE(chan, 2);
 577                         if (ret)
 578                                 return ret;
 579
 580                         BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);
 581                         OUT_RING  (chan, 1);
 582                 }
 583
 584                 ret = RING_SPACE(chan, 14);
 585                 if (ret)
 586                         return ret;
 587
 588                 BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);
 589                 OUT_RING  (chan, upper_32_bits(src_offset));
 590                 OUT_RING  (chan, upper_32_bits(dst_offset));
 591                 BEGIN_RING(chan, NvSubM2MF, 0x030c, 8);
 592                 OUT_RING  (chan, lower_32_bits(src_offset));
 593                 OUT_RING  (chan, lower_32_bits(dst_offset));
 594                 OUT_RING  (chan, stride);
 595                 OUT_RING  (chan, stride);
 596                 OUT_RING  (chan, stride);
 597                 OUT_RING  (chan, height);
 598                 OUT_RING  (chan, 0x00000101);
 599                 OUT_RING  (chan, 0x00000000);
 600                 BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
 601                 OUT_RING  (chan, 0);
 602
 603                 length -= amount;
 604                 src_offset += amount;
 605                 dst_offset += amount;
 606         }
 607
 608         return 0;
 609 }
 610
 611 static inline uint32_t
 612 nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
 613                       struct nouveau_channel *chan, struct ttm_mem_reg *mem)
 614 {
 615         if (mem->mem_type == TTM_PL_TT)
 616                 return chan->gart_handle;
 617         return chan->vram_handle;
 618 }
 619
 620 static int
 621 nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
 622                   struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
 623 {
 624         u32 src_offset = old_mem->start << PAGE_SHIFT;
 625         u32 dst_offset = new_mem->start << PAGE_SHIFT;
 626         u32 page_count = new_mem->num_pages;
 627         int ret;
 628
 629         ret = RING_SPACE(chan, 3);
 630         if (ret)
 631                 return ret;
 632
 633         BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
 634         OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));
 635         OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));
 636
 637         page_count = new_mem->num_pages;
 638         while (page_count) {
 639                 int line_count = (page_count > 2047) ? 2047 : page_count;
 640
 641                 ret = RING_SPACE(chan, 11);
 642                 if (ret)
 643                         return ret;
 644
 645                 BEGIN_RING(chan, NvSubM2MF,
 646                                  NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
 647                 OUT_RING  (chan, src_offset);
 648                 OUT_RING  (chan, dst_offset);
 649                 OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
 650                 OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
 651                 OUT_RING  (chan, PAGE_SIZE); /* line_length */
 652                 OUT_RING  (chan, line_count);
 653                 OUT_RING  (chan, 0x00000101);
 654                 OUT_RING  (chan, 0x00000000);
 655                 BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
 656                 OUT_RING  (chan, 0);
 657
 658                 page_count -= line_count;
 659                 src_offset += (PAGE_SIZE * line_count);
 660                 dst_offset += (PAGE_SIZE * line_count);
 661         }
 662
 663         return 0;
 664 }
 665
 666 static int
 667 nouveau_vma_getmap(struct nouveau_channel *chan, struct nouveau_bo *nvbo,
 668                    struct ttm_mem_reg *mem, struct nouveau_vma *vma)
 669 {
 670         struct nouveau_mem *node = mem->mm_node;
 671         int ret;
 672
 673         ret = nouveau_vm_get(chan->vm, mem->num_pages << PAGE_SHIFT,
 674                              node->page_shift, NV_MEM_ACCESS_RO, vma);
 675         if (ret)
 676                 return ret;
 677
 678         if (mem->mem_type == TTM_PL_VRAM)
 679                 nouveau_vm_map(vma, node);
 680         else
 681                 nouveau_vm_map_sg(vma, 0, mem->num_pages << PAGE_SHIFT,
 682                                   node, node->pages);
 683
 684         return 0;
 685 }
 686
 687 static int
 688 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
 689                      bool no_wait_reserve, bool no_wait_gpu,
 690                      struct ttm_mem_reg *new_mem)
 691 {
 692         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 693         struct nouveau_bo *nvbo = nouveau_bo(bo);
 694         struct ttm_mem_reg *old_mem = &bo->mem;
 695         struct nouveau_channel *chan;
 696         int ret;
 697
 698         chan = nvbo->channel;
 699         if (!chan) {
 700                 chan = dev_priv->channel;
 701                 mutex_lock_nested(&chan->mutex, NOUVEAU_KCHANNEL_MUTEX);
 702         }
 703
 704         /* create temporary vmas for the transfer and attach them to the
 705          * old nouveau_mem node, these will get cleaned up after ttm has
 706          * destroyed the ttm_mem_reg
 707          */
 708         if (dev_priv->card_type >= NV_50) {
 709                 struct nouveau_mem *node = old_mem->mm_node;
 710
 711                 ret = nouveau_vma_getmap(chan, nvbo, old_mem, &node->vma[0]);
 712                 if (ret)
 713                         goto out;
 714
 715                 ret = nouveau_vma_getmap(chan, nvbo, new_mem, &node->vma[1]);
 716                 if (ret)
 717                         goto out;
 718         }
 719
 720         if (dev_priv->card_type < NV_50)
 721                 ret = nv04_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
 722         else
 723         if (dev_priv->card_type < NV_C0)
 724                 ret = nv50_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
 725         else
 726                 ret = nvc0_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
 727         if (ret == 0) {
 728                 ret = nouveau_bo_move_accel_cleanup(chan, nvbo, evict,
 729                                                     no_wait_reserve,
 730                                                     no_wait_gpu, new_mem);
 731         }
 732
 733 out:
 734         if (chan == dev_priv->channel)
 735                 mutex_unlock(&chan->mutex);
 736         return ret;
 737 }
 738
 739 static int
 740 nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
 741                       bool no_wait_reserve, bool no_wait_gpu,
 742                       struct ttm_mem_reg *new_mem)
 743 {
 744         u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
 745         struct ttm_placement placement;
 746         struct ttm_mem_reg tmp_mem;
 747         int ret;
 748
 749         placement.fpfn = placement.lpfn = 0;
 750         placement.num_placement = placement.num_busy_placement = 1;
 751         placement.placement = placement.busy_placement = &placement_memtype;
 752
 753         tmp_mem = *new_mem;
 754         tmp_mem.mm_node = NULL;
 755         ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu);
 756         if (ret)
 757                 return ret;
 758
 759         ret = ttm_tt_bind(bo->ttm, &tmp_mem);
 760         if (ret)
 761                 goto out;
 762
 763         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, &tmp_mem);
 764         if (ret)
 765                 goto out;
 766
 767         ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem);
 768 out:
 769         ttm_bo_mem_put(bo, &tmp_mem);
 770         return ret;
 771 }
 772
 773 static int
 774 nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
 775                       bool no_wait_reserve, bool no_wait_gpu,
 776                       struct ttm_mem_reg *new_mem)
 777 {
 778         u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
 779         struct ttm_placement placement;
 780         struct ttm_mem_reg tmp_mem;
 781         int ret;
 782
 783         placement.fpfn = placement.lpfn = 0;
 784         placement.num_placement = placement.num_busy_placement = 1;
 785         placement.placement = placement.busy_placement = &placement_memtype;
 786
 787         tmp_mem = *new_mem;
 788         tmp_mem.mm_node = NULL;
 789         ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu);
 790         if (ret)
 791                 return ret;
 792
 793         ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem);
 794         if (ret)
 795                 goto out;
 796
 797         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, new_mem);
 798         if (ret)
 799                 goto out;
 800
 801 out:
 802         ttm_bo_mem_put(bo, &tmp_mem);
 803         return ret;
 804 }
 805
 806 static void
 807 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)
 808 {
 809         struct nouveau_mem *node = new_mem->mm_node;
 810         struct nouveau_bo *nvbo = nouveau_bo(bo);
 811         struct nouveau_vma *vma;
 812
 813         list_for_each_entry(vma, &nvbo->vma_list, head) {
 814                 if (new_mem->mem_type == TTM_PL_VRAM) {
 815                         nouveau_vm_map(vma, new_mem->mm_node);
 816                 } else
 817                 if (new_mem->mem_type == TTM_PL_TT &&
 818                     nvbo->page_shift == vma->vm->spg_shift) {
 819                         nouveau_vm_map_sg(vma, 0, new_mem->
 820                                           num_pages << PAGE_SHIFT,
 821                                           node, node->pages);
 822                 } else {
 823                         nouveau_vm_unmap(vma);
 824                 }
 825         }
 826 }
 827
 828 static int
 829 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
 830                    struct nouveau_tile_reg **new_tile)
 831 {
 832         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 833         struct drm_device *dev = dev_priv->dev;
 834         struct nouveau_bo *nvbo = nouveau_bo(bo);
 835         u64 offset = new_mem->start << PAGE_SHIFT;
 836
 837         *new_tile = NULL;
 838         if (new_mem->mem_type != TTM_PL_VRAM)
 839                 return 0;
 840
 841         if (dev_priv->card_type >= NV_10) {
 842                 *new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size,
 843                                                 nvbo->tile_mode,
 844                                                 nvbo->tile_flags);
 845         }
 846
 847         return 0;
 848 }
 849
 850 static void
 851 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
 852                       struct nouveau_tile_reg *new_tile,
 853                       struct nouveau_tile_reg **old_tile)
 854 {
 855         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 856         struct drm_device *dev = dev_priv->dev;
 857
 858         nv10_mem_put_tile_region(dev, *old_tile, bo->sync_obj);
 859         *old_tile = new_tile;
 860 }
 861
 862 static int
 863 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
 864                 bool no_wait_reserve, bool no_wait_gpu,
 865                 struct ttm_mem_reg *new_mem)
 866 {
 867         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 868         struct nouveau_bo *nvbo = nouveau_bo(bo);
 869         struct ttm_mem_reg *old_mem = &bo->mem;
 870         struct nouveau_tile_reg *new_tile = NULL;
 871         int ret = 0;
 872
 873         if (dev_priv->card_type < NV_50) {
 874                 ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
 875                 if (ret)
 876                         return ret;
 877         }
 878
 879         /* Fake bo copy. */
 880         if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
 881                 BUG_ON(bo->mem.mm_node != NULL);
 882                 bo->mem = *new_mem;
 883                 new_mem->mm_node = NULL;
 884                 goto out;
 885         }
 886
 887         /* Software copy if the card isn't up and running yet. */
 888         if (!dev_priv->channel) {
 889                 ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
 890                 goto out;
 891         }
 892
 893         /* Hardware assisted copy. */
 894         if (new_mem->mem_type == TTM_PL_SYSTEM)
 895                 ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
 896         else if (old_mem->mem_type == TTM_PL_SYSTEM)
 897                 ret = nouveau_bo_move_flips(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
 898         else
 899                 ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
 900
 901         if (!ret)
 902                 goto out;
 903
 904         /* Fallback to software copy. */
 905         ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
 906
 907 out:
 908         if (dev_priv->card_type < NV_50) {
 909                 if (ret)
 910                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
 911                 else
 912                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
 913         }
 914
 915         return ret;
 916 }
 917
 918 static int
 919 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 920 {
 921         return 0;
 922 }
 923
 924 static int
 925 nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 926 {
 927         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 928         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 929         struct drm_device *dev = dev_priv->dev;
 930         int ret;
 931
 932         mem->bus.addr = NULL;
 933         mem->bus.offset = 0;
 934         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 935         mem->bus.base = 0;
 936         mem->bus.is_iomem = false;
 937         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 938                 return -EINVAL;
 939         switch (mem->mem_type) {
 940         case TTM_PL_SYSTEM:
 941                 /* System memory */
 942                 return 0;
 943         case TTM_PL_TT:
 944 #if __OS_HAS_AGP
 945                 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
 946                         mem->bus.offset = mem->start << PAGE_SHIFT;
 947                         mem->bus.base = dev_priv->gart_info.aper_base;
 948                         mem->bus.is_iomem = true;
 949                 }
 950 #endif
 951                 break;
 952         case TTM_PL_VRAM:
 953         {
 954                 struct nouveau_mem *node = mem->mm_node;
 955                 u8 page_shift;
 956
 957                 if (!dev_priv->bar1_vm) {
 958                         mem->bus.offset = mem->start << PAGE_SHIFT;
 959                         mem->bus.base = pci_resource_start(dev->pdev, 1);
 960                         mem->bus.is_iomem = true;
 961                         break;
 962                 }
 963
 964                 if (dev_priv->card_type >= NV_C0)
 965                         page_shift = node->page_shift;
 966                 else
 967                         page_shift = 12;
 968
 969                 ret = nouveau_vm_get(dev_priv->bar1_vm, mem->bus.size,
 970                                      page_shift, NV_MEM_ACCESS_RW,
 971                                      &node->bar_vma);
 972                 if (ret)
 973                         return ret;
 974
 975                 nouveau_vm_map(&node->bar_vma, node);
 976                 if (ret) {
 977                         nouveau_vm_put(&node->bar_vma);
 978                         return ret;
 979                 }
 980
 981                 mem->bus.offset = node->bar_vma.offset;
 982                 if (dev_priv->card_type == NV_50) /*XXX*/
 983                         mem->bus.offset -= 0x0020000000ULL;
 984                 mem->bus.base = pci_resource_start(dev->pdev, 1);
 985                 mem->bus.is_iomem = true;
 986         }
 987                 break;
 988         default:
 989                 return -EINVAL;
 990         }
 991         return 0;
 992 }
 993
 994 static void
 995 nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 996 {
 997         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 998         struct nouveau_mem *node = mem->mm_node;
 999
1000         if (!dev_priv->bar1_vm || mem->mem_type != TTM_PL_VRAM)
1001                 return;
1002
1003         if (!node->bar_vma.node)
1004                 return;
1005
1006         nouveau_vm_unmap(&node->bar_vma);
1007         nouveau_vm_put(&node->bar_vma);
1008 }
1009
1010 static int
1011 nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1012 {
1013         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
1014         struct nouveau_bo *nvbo = nouveau_bo(bo);
1015
1016         /* as long as the bo isn't in vram, and isn't tiled, we've got
1017          * nothing to do here.
1018          */
1019         if (bo->mem.mem_type != TTM_PL_VRAM) {
1020                 if (dev_priv->card_type < NV_50 ||
1021                     !nouveau_bo_tile_layout(nvbo))
1022                         return 0;
1023         }
1024
1025         /* make sure bo is in mappable vram */
1026         if (bo->mem.start + bo->mem.num_pages < dev_priv->fb_mappable_pages)
1027                 return 0;
1028
1029
1030         nvbo->placement.fpfn = 0;
1031         nvbo->placement.lpfn = dev_priv->fb_mappable_pages;
1032         nouveau_bo_placement_set(nvbo, TTM_PL_VRAM, 0);
1033         return nouveau_bo_validate(nvbo, false, true, false);
1034 }
1035
1036 void
1037 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
1038 {
1039         struct nouveau_fence *old_fence;
1040
1041         if (likely(fence))
1042                 nouveau_fence_ref(fence);
1043
1044         spin_lock(&nvbo->bo.bdev->fence_lock);
1045         old_fence = nvbo->bo.sync_obj;
1046         nvbo->bo.sync_obj = fence;
1047         spin_unlock(&nvbo->bo.bdev->fence_lock);
1048
1049         nouveau_fence_unref(&old_fence);
1050 }
1051
1052 struct ttm_bo_driver nouveau_bo_driver = {
1053         .ttm_tt_create = &nouveau_ttm_tt_create,
1054         .ttm_tt_populate = &ttm_pool_populate,
1055         .ttm_tt_unpopulate = &ttm_pool_unpopulate,
1056         .invalidate_caches = nouveau_bo_invalidate_caches,
1057         .init_mem_type = nouveau_bo_init_mem_type,
1058         .evict_flags = nouveau_bo_evict_flags,
1059         .move_notify = nouveau_bo_move_ntfy,
1060         .move = nouveau_bo_move,
1061         .verify_access = nouveau_bo_verify_access,
1062         .sync_obj_signaled = __nouveau_fence_signalled,
1063         .sync_obj_wait = __nouveau_fence_wait,
1064         .sync_obj_flush = __nouveau_fence_flush,
1065         .sync_obj_unref = __nouveau_fence_unref,
1066         .sync_obj_ref = __nouveau_fence_ref,
1067         .fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
1068         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1069         .io_mem_free = &nouveau_ttm_io_mem_free,
1070 };
1071
1072 struct nouveau_vma *
1073 nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm)
1074 {
1075         struct nouveau_vma *vma;
1076         list_for_each_entry(vma, &nvbo->vma_list, head) {
1077                 if (vma->vm == vm)
1078                         return vma;
1079         }
1080
1081         return NULL;
1082 }
1083
1084 int
1085 nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
1086                    struct nouveau_vma *vma)
1087 {
1088         const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
1089         struct nouveau_mem *node = nvbo->bo.mem.mm_node;
1090         int ret;
1091
1092         ret = nouveau_vm_get(vm, size, nvbo->page_shift,
1093                              NV_MEM_ACCESS_RW, vma);
1094         if (ret)
1095                 return ret;
1096
1097         if (nvbo->bo.mem.mem_type == TTM_PL_VRAM)
1098                 nouveau_vm_map(vma, nvbo->bo.mem.mm_node);
1099         else
1100         if (nvbo->bo.mem.mem_type == TTM_PL_TT)
1101                 nouveau_vm_map_sg(vma, 0, size, node, node->pages);
1102
1103         list_add_tail(&vma->head, &nvbo->vma_list);
1104         vma->refcount = 1;
1105         return 0;
1106 }
1107
1108 void
1109 nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
1110 {
1111         if (vma->node) {
1112                 if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM) {
1113                         spin_lock(&nvbo->bo.bdev->fence_lock);
1114                         ttm_bo_wait(&nvbo->bo, false, false, false);
1115                         spin_unlock(&nvbo->bo.bdev->fence_lock);
1116                         nouveau_vm_unmap(vma);
1117                 }
1118
1119                 nouveau_vm_put(vma);
1120                 list_del(&vma->head);
1121         }
1122 }