2 * Copyright 2012 Nouveau Community
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Martin Peres <martin.peres@labri.fr>
26 #include <subdev/bus.h>
28 struct nv50_bus_priv {
29 struct nouveau_bus base;
33 nv50_bus_intr(struct nouveau_subdev *subdev)
35 struct nouveau_bus *pbus = nouveau_bus(subdev);
36 u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140);
38 if (stat & 0x00000008) {
39 u32 addr = nv_rd32(pbus, 0x009084);
40 u32 data = nv_rd32(pbus, 0x009088);
42 nv_error(pbus, "MMIO %s of 0x%08x FAULT at 0x%06x\n",
43 (addr & 0x00000002) ? "write" : "read", data,
47 nv_wr32(pbus, 0x001100, 0x00000008);
50 if (stat & 0x00010000) {
51 subdev = nouveau_subdev(pbus, NVDEV_SUBDEV_THERM);
52 if (subdev && subdev->intr)
55 nv_wr32(pbus, 0x001100, 0x00010000);
59 nv_error(pbus, "unknown intr 0x%08x\n", stat);
60 nv_mask(pbus, 0x001140, stat, 0);
65 nv50_bus_init(struct nouveau_object *object)
67 struct nv50_bus_priv *priv = (void *)object;
70 ret = nouveau_bus_init(&priv->base);
74 nv_wr32(priv, 0x001100, 0xffffffff);
75 nv_wr32(priv, 0x001140, 0x00010008);
80 nv50_bus_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
81 struct nouveau_oclass *oclass, void *data, u32 size,
82 struct nouveau_object **pobject)
84 struct nv50_bus_priv *priv;
87 ret = nouveau_bus_create(parent, engine, oclass, &priv);
88 *pobject = nv_object(priv);
92 nv_subdev(priv)->intr = nv50_bus_intr;
98 .handle = NV_SUBDEV(BUS, 0x50),
99 .ofuncs = &(struct nouveau_ofuncs) {
100 .ctor = nv50_bus_ctor,
101 .dtor = _nouveau_bus_dtor,
102 .init = nv50_bus_init,
103 .fini = _nouveau_bus_fini,