Pileus Git - ~andy/linux/blob - drivers/gpu/drm/msm/mdp4/mdp4_plane.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "mdp4_kms.h"
  19
  20
  21 struct mdp4_plane {
  22         struct drm_plane base;
  23         const char *name;
  24
  25         enum mpd4_pipe pipe;
  26
  27         uint32_t nformats;
  28         uint32_t formats[32];
  29
  30         bool enabled;
  31 };
  32 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
  33
  34 static struct mdp4_kms *get_kms(struct drm_plane *plane)
  35 {
  36         struct msm_drm_private *priv = plane->dev->dev_private;
  37         return to_mdp4_kms(priv->kms);
  38 }
  39
  40 static int mdp4_plane_update(struct drm_plane *plane,
  41                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
  42                 int crtc_x, int crtc_y,
  43                 unsigned int crtc_w, unsigned int crtc_h,
  44                 uint32_t src_x, uint32_t src_y,
  45                 uint32_t src_w, uint32_t src_h)
  46 {
  47         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
  48
  49         mdp4_plane->enabled = true;
  50
  51         if (plane->fb)
  52                 drm_framebuffer_unreference(plane->fb);
  53
  54         drm_framebuffer_reference(fb);
  55
  56         return mdp4_plane_mode_set(plane, crtc, fb,
  57                         crtc_x, crtc_y, crtc_w, crtc_h,
  58                         src_x, src_y, src_w, src_h);
  59 }
  60
  61 static int mdp4_plane_disable(struct drm_plane *plane)
  62 {
  63         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
  64         DBG("%s: TODO", mdp4_plane->name); // XXX
  65         return 0;
  66 }
  67
  68 static void mdp4_plane_destroy(struct drm_plane *plane)
  69 {
  70         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
  71
  72         mdp4_plane_disable(plane);
  73         drm_plane_cleanup(plane);
  74
  75         kfree(mdp4_plane);
  76 }
  77
  78 /* helper to install properties which are common to planes and crtcs */
  79 void mdp4_plane_install_properties(struct drm_plane *plane,
  80                 struct drm_mode_object *obj)
  81 {
  82         // XXX
  83 }
  84
  85 int mdp4_plane_set_property(struct drm_plane *plane,
  86                 struct drm_property *property, uint64_t val)
  87 {
  88         // XXX
  89         return -EINVAL;
  90 }
  91
  92 static const struct drm_plane_funcs mdp4_plane_funcs = {
  93                 .update_plane = mdp4_plane_update,
  94                 .disable_plane = mdp4_plane_disable,
  95                 .destroy = mdp4_plane_destroy,
  96                 .set_property = mdp4_plane_set_property,
  97 };
  98
  99 void mdp4_plane_set_scanout(struct drm_plane *plane,
 100                 struct drm_framebuffer *fb)
 101 {
 102         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 103         struct mdp4_kms *mdp4_kms = get_kms(plane);
 104         enum mpd4_pipe pipe = mdp4_plane->pipe;
 105         uint32_t iova;
 106
 107         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
 108                         MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
 109                         MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
 110
 111         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
 112                         MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
 113                         MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
 114
 115         msm_gem_get_iova(msm_framebuffer_bo(fb, 0), mdp4_kms->id, &iova);
 116         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe), iova);
 117
 118         plane->fb = fb;
 119 }
 120
 121 #define MDP4_VG_PHASE_STEP_DEFAULT      0x20000000
 122
 123 int mdp4_plane_mode_set(struct drm_plane *plane,
 124                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
 125                 int crtc_x, int crtc_y,
 126                 unsigned int crtc_w, unsigned int crtc_h,
 127                 uint32_t src_x, uint32_t src_y,
 128                 uint32_t src_w, uint32_t src_h)
 129 {
 130         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 131         struct mdp4_kms *mdp4_kms = get_kms(plane);
 132         enum mpd4_pipe pipe = mdp4_plane->pipe;
 133         const struct mdp4_format *format;
 134         uint32_t op_mode = 0;
 135         uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
 136         uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
 137
 138         /* src values are in Q16 fixed point, convert to integer: */
 139         src_x = src_x >> 16;
 140         src_y = src_y >> 16;
 141         src_w = src_w >> 16;
 142         src_h = src_h >> 16;
 143
 144         if (src_w != crtc_w) {
 145                 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
 146                 /* TODO calc phasex_step */
 147         }
 148
 149         if (src_h != crtc_h) {
 150                 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
 151                 /* TODO calc phasey_step */
 152         }
 153
 154         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
 155                         MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
 156                         MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
 157
 158         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
 159                         MDP4_PIPE_SRC_XY_X(src_x) |
 160                         MDP4_PIPE_SRC_XY_Y(src_y));
 161
 162         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
 163                         MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
 164                         MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
 165
 166         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
 167                         MDP4_PIPE_SRC_XY_X(crtc_x) |
 168                         MDP4_PIPE_SRC_XY_Y(crtc_y));
 169
 170         mdp4_plane_set_scanout(plane, fb);
 171
 172         format = to_mdp4_format(msm_framebuffer_format(fb));
 173
 174         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
 175                         MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
 176                         MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
 177                         MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
 178                         MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
 179                         COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
 180                         MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
 181                         MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
 182                         COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
 183
 184         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
 185                         MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
 186                         MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
 187                         MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
 188                         MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
 189
 190         mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
 191         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
 192         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
 193
 194         plane->crtc = crtc;
 195
 196         return 0;
 197 }
 198
 199 static const char *pipe_names[] = {
 200                 "VG1", "VG2",
 201                 "RGB1", "RGB2", "RGB3",
 202                 "VG3", "VG4",
 203 };
 204
 205 enum mpd4_pipe mdp4_plane_pipe(struct drm_plane *plane)
 206 {
 207         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 208         return mdp4_plane->pipe;
 209 }
 210
 211 /* initialize plane */
 212 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
 213                 enum mpd4_pipe pipe_id, bool private_plane)
 214 {
 215         struct msm_drm_private *priv = dev->dev_private;
 216         struct drm_plane *plane = NULL;
 217         struct mdp4_plane *mdp4_plane;
 218         int ret;
 219
 220         mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
 221         if (!mdp4_plane) {
 222                 ret = -ENOMEM;
 223                 goto fail;
 224         }
 225
 226         plane = &mdp4_plane->base;
 227
 228         mdp4_plane->pipe = pipe_id;
 229         mdp4_plane->name = pipe_names[pipe_id];
 230
 231         drm_plane_init(dev, plane, (1 << priv->num_crtcs) - 1, &mdp4_plane_funcs,
 232                         mdp4_plane->formats, mdp4_plane->nformats, private_plane);
 233
 234         mdp4_plane_install_properties(plane, &plane->base);
 235
 236         return plane;
 237
 238 fail:
 239         if (plane)
 240                 mdp4_plane_destroy(plane);
 241
 242         return ERR_PTR(ret);
 243 }