Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds_priv {
  45         int fitting_mode;
  46         u32 pfit_control;
  47         u32 pfit_pgm_ratios;
  48 };
  49
  50 /**
  51  * Sets the backlight level.
  52  *
  53  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  54  */
  55 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  56 {
  57         struct drm_i915_private *dev_priv = dev->dev_private;
  58         u32 blc_pwm_ctl, reg;
  59
  60         if (HAS_PCH_SPLIT(dev))
  61                 reg = BLC_PWM_CPU_CTL;
  62         else
  63                 reg = BLC_PWM_CTL;
  64
  65         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  66         I915_WRITE(reg, (blc_pwm_ctl |
  67                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  68 }
  69
  70 /**
  71  * Returns the maximum level of the backlight duty cycle field.
  72  */
  73 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  74 {
  75         struct drm_i915_private *dev_priv = dev->dev_private;
  76         u32 reg;
  77
  78         if (HAS_PCH_SPLIT(dev))
  79                 reg = BLC_PWM_PCH_CTL2;
  80         else
  81                 reg = BLC_PWM_CTL;
  82
  83         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  84                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  85 }
  86
  87 /**
  88  * Sets the power state for the panel.
  89  */
  90 static void intel_lvds_set_power(struct drm_device *dev, bool on)
  91 {
  92         struct drm_i915_private *dev_priv = dev->dev_private;
  93         u32 pp_status, ctl_reg, status_reg, lvds_reg;
  94
  95         if (HAS_PCH_SPLIT(dev)) {
  96                 ctl_reg = PCH_PP_CONTROL;
  97                 status_reg = PCH_PP_STATUS;
  98                 lvds_reg = PCH_LVDS;
  99         } else {
 100                 ctl_reg = PP_CONTROL;
 101                 status_reg = PP_STATUS;
 102                 lvds_reg = LVDS;
 103         }
 104
 105         if (on) {
 106                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
 107                 POSTING_READ(lvds_reg);
 108
 109                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
 110                            POWER_TARGET_ON);
 111                 do {
 112                         pp_status = I915_READ(status_reg);
 113                 } while ((pp_status & PP_ON) == 0);
 114
 115                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
 116         } else {
 117                 intel_lvds_set_backlight(dev, 0);
 118
 119                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
 120                            ~POWER_TARGET_ON);
 121                 do {
 122                         pp_status = I915_READ(status_reg);
 123                 } while (pp_status & PP_ON);
 124
 125                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 126                 POSTING_READ(lvds_reg);
 127         }
 128 }
 129
 130 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 131 {
 132         struct drm_device *dev = encoder->dev;
 133
 134         if (mode == DRM_MODE_DPMS_ON)
 135                 intel_lvds_set_power(dev, true);
 136         else
 137                 intel_lvds_set_power(dev, false);
 138
 139         /* XXX: We never power down the LVDS pairs. */
 140 }
 141
 142 static int intel_lvds_mode_valid(struct drm_connector *connector,
 143                                  struct drm_display_mode *mode)
 144 {
 145         struct drm_device *dev = connector->dev;
 146         struct drm_i915_private *dev_priv = dev->dev_private;
 147         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 148
 149         if (fixed_mode) {
 150                 if (mode->hdisplay > fixed_mode->hdisplay)
 151                         return MODE_PANEL;
 152                 if (mode->vdisplay > fixed_mode->vdisplay)
 153                         return MODE_PANEL;
 154         }
 155
 156         return MODE_OK;
 157 }
 158
 159 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 160                                   struct drm_display_mode *mode,
 161                                   struct drm_display_mode *adjusted_mode)
 162 {
 163         /*
 164          * float point operation is not supported . So the PANEL_RATIO_FACTOR
 165          * is defined, which can avoid the float point computation when
 166          * calculating the panel ratio.
 167          */
 168 #define PANEL_RATIO_FACTOR 8192
 169         struct drm_device *dev = encoder->dev;
 170         struct drm_i915_private *dev_priv = dev->dev_private;
 171         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 172         struct drm_encoder *tmp_encoder;
 173         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 174         struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
 175         u32 pfit_control = 0, pfit_pgm_ratios = 0;
 176         int left_border = 0, right_border = 0, top_border = 0;
 177         int bottom_border = 0;
 178         bool border = 0;
 179         int panel_ratio, desired_ratio, vert_scale, horiz_scale;
 180         int horiz_ratio, vert_ratio;
 181         u32 hsync_width, vsync_width;
 182         u32 hblank_width, vblank_width;
 183         u32 hsync_pos, vsync_pos;
 184
 185         /* Should never happen!! */
 186         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 187                 DRM_ERROR("Can't support LVDS on pipe A\n");
 188                 return false;
 189         }
 190
 191         /* Should never happen!! */
 192         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 193                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 194                         DRM_ERROR("Can't enable LVDS and another "
 195                                "encoder on the same pipe\n");
 196                         return false;
 197                 }
 198         }
 199         /* If we don't have a panel mode, there is nothing we can do */
 200         if (dev_priv->panel_fixed_mode == NULL)
 201                 return true;
 202         /*
 203          * We have timings from the BIOS for the panel, put them in
 204          * to the adjusted mode.  The CRTC will be set up for this mode,
 205          * with the panel scaling set up to source from the H/VDisplay
 206          * of the original mode.
 207          */
 208         adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
 209         adjusted_mode->hsync_start =
 210                 dev_priv->panel_fixed_mode->hsync_start;
 211         adjusted_mode->hsync_end =
 212                 dev_priv->panel_fixed_mode->hsync_end;
 213         adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
 214         adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
 215         adjusted_mode->vsync_start =
 216                 dev_priv->panel_fixed_mode->vsync_start;
 217         adjusted_mode->vsync_end =
 218                 dev_priv->panel_fixed_mode->vsync_end;
 219         adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
 220         adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
 221         drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 222
 223         /* Make sure pre-965s set dither correctly */
 224         if (!IS_I965G(dev)) {
 225                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 226                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 227         }
 228
 229         /* Native modes don't need fitting */
 230         if (adjusted_mode->hdisplay == mode->hdisplay &&
 231                         adjusted_mode->vdisplay == mode->vdisplay) {
 232                 pfit_pgm_ratios = 0;
 233                 border = 0;
 234                 goto out;
 235         }
 236
 237         /* full screen scale for now */
 238         if (HAS_PCH_SPLIT(dev))
 239                 goto out;
 240
 241         /* 965+ wants fuzzy fitting */
 242         if (IS_I965G(dev))
 243                 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 244                                         PFIT_FILTER_FUZZY;
 245
 246         hsync_width = adjusted_mode->crtc_hsync_end -
 247                                         adjusted_mode->crtc_hsync_start;
 248         vsync_width = adjusted_mode->crtc_vsync_end -
 249                                         adjusted_mode->crtc_vsync_start;
 250         hblank_width = adjusted_mode->crtc_hblank_end -
 251                                         adjusted_mode->crtc_hblank_start;
 252         vblank_width = adjusted_mode->crtc_vblank_end -
 253                                         adjusted_mode->crtc_vblank_start;
 254         /*
 255          * Deal with panel fitting options. Figure out how to stretch the
 256          * image based on its aspect ratio & the current panel fitting mode.
 257          */
 258         panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
 259                                 adjusted_mode->vdisplay;
 260         desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
 261                                 mode->vdisplay;
 262         /*
 263          * Enable automatic panel scaling for non-native modes so that they fill
 264          * the screen.  Should be enabled before the pipe is enabled, according
 265          * to register description and PRM.
 266          * Change the value here to see the borders for debugging
 267          */
 268         if (!HAS_PCH_SPLIT(dev)) {
 269                 I915_WRITE(BCLRPAT_A, 0);
 270                 I915_WRITE(BCLRPAT_B, 0);
 271         }
 272
 273         switch (lvds_priv->fitting_mode) {
 274         case DRM_MODE_SCALE_CENTER:
 275                 /*
 276                  * For centered modes, we have to calculate border widths &
 277                  * heights and modify the values programmed into the CRTC.
 278                  */
 279                 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
 280                 right_border = left_border;
 281                 if (mode->hdisplay & 1)
 282                         right_border++;
 283                 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
 284                 bottom_border = top_border;
 285                 if (mode->vdisplay & 1)
 286                         bottom_border++;
 287                 /* Set active & border values */
 288                 adjusted_mode->crtc_hdisplay = mode->hdisplay;
 289                 /* Keep the boder be even */
 290                 if (right_border & 1)
 291                         right_border++;
 292                 /* use the border directly instead of border minuse one */
 293                 adjusted_mode->crtc_hblank_start = mode->hdisplay +
 294                                                 right_border;
 295                 /* keep the blank width constant */
 296                 adjusted_mode->crtc_hblank_end =
 297                         adjusted_mode->crtc_hblank_start + hblank_width;
 298                 /* get the hsync pos relative to hblank start */
 299                 hsync_pos = (hblank_width - hsync_width) / 2;
 300                 /* keep the hsync pos be even */
 301                 if (hsync_pos & 1)
 302                         hsync_pos++;
 303                 adjusted_mode->crtc_hsync_start =
 304                                 adjusted_mode->crtc_hblank_start + hsync_pos;
 305                 /* keep the hsync width constant */
 306                 adjusted_mode->crtc_hsync_end =
 307                                 adjusted_mode->crtc_hsync_start + hsync_width;
 308                 adjusted_mode->crtc_vdisplay = mode->vdisplay;
 309                 /* use the border instead of border minus one */
 310                 adjusted_mode->crtc_vblank_start = mode->vdisplay +
 311                                                 bottom_border;
 312                 /* keep the vblank width constant */
 313                 adjusted_mode->crtc_vblank_end =
 314                                 adjusted_mode->crtc_vblank_start + vblank_width;
 315                 /* get the vsync start postion relative to vblank start */
 316                 vsync_pos = (vblank_width - vsync_width) / 2;
 317                 adjusted_mode->crtc_vsync_start =
 318                                 adjusted_mode->crtc_vblank_start + vsync_pos;
 319                 /* keep the vsync width constant */
 320                 adjusted_mode->crtc_vsync_end =
 321                                 adjusted_mode->crtc_vsync_start + vsync_width;
 322                 border = 1;
 323                 break;
 324         case DRM_MODE_SCALE_ASPECT:
 325                 /* Scale but preserve the spect ratio */
 326                 pfit_control |= PFIT_ENABLE;
 327                 if (IS_I965G(dev)) {
 328                         /* 965+ is easy, it does everything in hw */
 329                         if (panel_ratio > desired_ratio)
 330                                 pfit_control |= PFIT_SCALING_PILLAR;
 331                         else if (panel_ratio < desired_ratio)
 332                                 pfit_control |= PFIT_SCALING_LETTER;
 333                         else
 334                                 pfit_control |= PFIT_SCALING_AUTO;
 335                 } else {
 336                         /*
 337                          * For earlier chips we have to calculate the scaling
 338                          * ratio by hand and program it into the
 339                          * PFIT_PGM_RATIO register
 340                          */
 341                         u32 horiz_bits, vert_bits, bits = 12;
 342                         horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
 343                                                 adjusted_mode->hdisplay;
 344                         vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
 345                                                 adjusted_mode->vdisplay;
 346                         horiz_scale = adjusted_mode->hdisplay *
 347                                         PANEL_RATIO_FACTOR / mode->hdisplay;
 348                         vert_scale = adjusted_mode->vdisplay *
 349                                         PANEL_RATIO_FACTOR / mode->vdisplay;
 350
 351                         /* retain aspect ratio */
 352                         if (panel_ratio > desired_ratio) { /* Pillar */
 353                                 u32 scaled_width;
 354                                 scaled_width = mode->hdisplay * vert_scale /
 355                                                 PANEL_RATIO_FACTOR;
 356                                 horiz_ratio = vert_ratio;
 357                                 pfit_control |= (VERT_AUTO_SCALE |
 358                                                  VERT_INTERP_BILINEAR |
 359                                                  HORIZ_INTERP_BILINEAR);
 360                                 /* Pillar will have left/right borders */
 361                                 left_border = (adjusted_mode->hdisplay -
 362                                                 scaled_width) / 2;
 363                                 right_border = left_border;
 364                                 if (mode->hdisplay & 1) /* odd resolutions */
 365                                         right_border++;
 366                                 /* keep the border be even */
 367                                 if (right_border & 1)
 368                                         right_border++;
 369                                 adjusted_mode->crtc_hdisplay = scaled_width;
 370                                 /* use border instead of border minus one */
 371                                 adjusted_mode->crtc_hblank_start =
 372                                         scaled_width + right_border;
 373                                 /* keep the hblank width constant */
 374                                 adjusted_mode->crtc_hblank_end =
 375                                         adjusted_mode->crtc_hblank_start +
 376                                                         hblank_width;
 377                                 /*
 378                                  * get the hsync start pos relative to
 379                                  * hblank start
 380                                  */
 381                                 hsync_pos = (hblank_width - hsync_width) / 2;
 382                                 /* keep the hsync_pos be even */
 383                                 if (hsync_pos & 1)
 384                                         hsync_pos++;
 385                                 adjusted_mode->crtc_hsync_start =
 386                                         adjusted_mode->crtc_hblank_start +
 387                                                         hsync_pos;
 388                                 /* keept hsync width constant */
 389                                 adjusted_mode->crtc_hsync_end =
 390                                         adjusted_mode->crtc_hsync_start +
 391                                                         hsync_width;
 392                                 border = 1;
 393                         } else if (panel_ratio < desired_ratio) { /* letter */
 394                                 u32 scaled_height = mode->vdisplay *
 395                                         horiz_scale / PANEL_RATIO_FACTOR;
 396                                 vert_ratio = horiz_ratio;
 397                                 pfit_control |= (HORIZ_AUTO_SCALE |
 398                                                  VERT_INTERP_BILINEAR |
 399                                                  HORIZ_INTERP_BILINEAR);
 400                                 /* Letterbox will have top/bottom border */
 401                                 top_border = (adjusted_mode->vdisplay -
 402                                         scaled_height) / 2;
 403                                 bottom_border = top_border;
 404                                 if (mode->vdisplay & 1)
 405                                         bottom_border++;
 406                                 adjusted_mode->crtc_vdisplay = scaled_height;
 407                                 /* use border instead of border minus one */
 408                                 adjusted_mode->crtc_vblank_start =
 409                                         scaled_height + bottom_border;
 410                                 /* keep the vblank width constant */
 411                                 adjusted_mode->crtc_vblank_end =
 412                                         adjusted_mode->crtc_vblank_start +
 413                                                         vblank_width;
 414                                 /*
 415                                  * get the vsync start pos relative to
 416                                  * vblank start
 417                                  */
 418                                 vsync_pos = (vblank_width - vsync_width) / 2;
 419                                 adjusted_mode->crtc_vsync_start =
 420                                         adjusted_mode->crtc_vblank_start +
 421                                                         vsync_pos;
 422                                 /* keep the vsync width constant */
 423                                 adjusted_mode->crtc_vsync_end =
 424                                         adjusted_mode->crtc_vsync_start +
 425                                                         vsync_width;
 426                                 border = 1;
 427                         } else {
 428                         /* Aspects match, Let hw scale both directions */
 429                                 pfit_control |= (VERT_AUTO_SCALE |
 430                                                  HORIZ_AUTO_SCALE |
 431                                                  VERT_INTERP_BILINEAR |
 432                                                  HORIZ_INTERP_BILINEAR);
 433                         }
 434                         horiz_bits = (1 << bits) * horiz_ratio /
 435                                         PANEL_RATIO_FACTOR;
 436                         vert_bits = (1 << bits) * vert_ratio /
 437                                         PANEL_RATIO_FACTOR;
 438                         pfit_pgm_ratios =
 439                                 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
 440                                                 PFIT_VERT_SCALE_MASK) |
 441                                 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
 442                                                 PFIT_HORIZ_SCALE_MASK);
 443                 }
 444                 break;
 445
 446         case DRM_MODE_SCALE_FULLSCREEN:
 447                 /*
 448                  * Full scaling, even if it changes the aspect ratio.
 449                  * Fortunately this is all done for us in hw.
 450                  */
 451                 pfit_control |= PFIT_ENABLE;
 452                 if (IS_I965G(dev))
 453                         pfit_control |= PFIT_SCALING_AUTO;
 454                 else
 455                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 456                                          VERT_INTERP_BILINEAR |
 457                                          HORIZ_INTERP_BILINEAR);
 458                 break;
 459         default:
 460                 break;
 461         }
 462
 463 out:
 464         lvds_priv->pfit_control = pfit_control;
 465         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
 466         /*
 467          * When there exists the border, it means that the LVDS_BORDR
 468          * should be enabled.
 469          */
 470         if (border)
 471                 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
 472         else
 473                 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
 474         /*
 475          * XXX: It would be nice to support lower refresh rates on the
 476          * panels to reduce power consumption, and perhaps match the
 477          * user's requested refresh rate.
 478          */
 479
 480         return true;
 481 }
 482
 483 static void intel_lvds_prepare(struct drm_encoder *encoder)
 484 {
 485         struct drm_device *dev = encoder->dev;
 486         struct drm_i915_private *dev_priv = dev->dev_private;
 487         u32 reg;
 488
 489         if (HAS_PCH_SPLIT(dev))
 490                 reg = BLC_PWM_CPU_CTL;
 491         else
 492                 reg = BLC_PWM_CTL;
 493
 494         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
 495         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 496                                        BACKLIGHT_DUTY_CYCLE_MASK);
 497
 498         intel_lvds_set_power(dev, false);
 499 }
 500
 501 static void intel_lvds_commit( struct drm_encoder *encoder)
 502 {
 503         struct drm_device *dev = encoder->dev;
 504         struct drm_i915_private *dev_priv = dev->dev_private;
 505
 506         if (dev_priv->backlight_duty_cycle == 0)
 507                 dev_priv->backlight_duty_cycle =
 508                         intel_lvds_get_max_backlight(dev);
 509
 510         intel_lvds_set_power(dev, true);
 511 }
 512
 513 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 514                                 struct drm_display_mode *mode,
 515                                 struct drm_display_mode *adjusted_mode)
 516 {
 517         struct drm_device *dev = encoder->dev;
 518         struct drm_i915_private *dev_priv = dev->dev_private;
 519         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 520         struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
 521
 522         /*
 523          * The LVDS pin pair will already have been turned on in the
 524          * intel_crtc_mode_set since it has a large impact on the DPLL
 525          * settings.
 526          */
 527
 528         if (HAS_PCH_SPLIT(dev))
 529                 return;
 530
 531         /*
 532          * Enable automatic panel scaling so that non-native modes fill the
 533          * screen.  Should be enabled before the pipe is enabled, according to
 534          * register description and PRM.
 535          */
 536         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
 537         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
 538 }
 539
 540 /**
 541  * Detect the LVDS connection.
 542  *
 543  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 544  * connected and closed means disconnected.  We also send hotplug events as
 545  * needed, using lid status notification from the input layer.
 546  */
 547 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 548 {
 549         struct drm_device *dev = connector->dev;
 550         enum drm_connector_status status = connector_status_connected;
 551
 552         /* ACPI lid methods were generally unreliable in this generation, so
 553          * don't even bother.
 554          */
 555         if (IS_GEN2(dev) || IS_GEN3(dev))
 556                 return connector_status_connected;
 557
 558         return status;
 559 }
 560
 561 /**
 562  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 563  */
 564 static int intel_lvds_get_modes(struct drm_connector *connector)
 565 {
 566         struct drm_device *dev = connector->dev;
 567         struct drm_encoder *encoder = intel_attached_encoder(connector);
 568         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 569         struct drm_i915_private *dev_priv = dev->dev_private;
 570         int ret = 0;
 571
 572         if (dev_priv->lvds_edid_good) {
 573                 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
 574
 575                 if (ret)
 576                         return ret;
 577         }
 578
 579         /* Didn't get an EDID, so
 580          * Set wide sync ranges so we get all modes
 581          * handed to valid_mode for checking
 582          */
 583         connector->display_info.min_vfreq = 0;
 584         connector->display_info.max_vfreq = 200;
 585         connector->display_info.min_hfreq = 0;
 586         connector->display_info.max_hfreq = 200;
 587
 588         if (dev_priv->panel_fixed_mode != NULL) {
 589                 struct drm_display_mode *mode;
 590
 591                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 592                 drm_mode_probed_add(connector, mode);
 593
 594                 return 1;
 595         }
 596
 597         return 0;
 598 }
 599
 600 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 601 {
 602         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 603         return 1;
 604 }
 605
 606 /* The GPU hangs up on these systems if modeset is performed on LID open */
 607 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 608         {
 609                 .callback = intel_no_modeset_on_lid_dmi_callback,
 610                 .ident = "Toshiba Tecra A11",
 611                 .matches = {
 612                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 613                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 614                 },
 615         },
 616
 617         { }     /* terminating entry */
 618 };
 619
 620 /*
 621  * Lid events. Note the use of 'modeset_on_lid':
 622  *  - we set it on lid close, and reset it on open
 623  *  - we use it as a "only once" bit (ie we ignore
 624  *    duplicate events where it was already properly
 625  *    set/reset)
 626  *  - the suspend/resume paths will also set it to
 627  *    zero, since they restore the mode ("lid open").
 628  */
 629 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 630                             void *unused)
 631 {
 632         struct drm_i915_private *dev_priv =
 633                 container_of(nb, struct drm_i915_private, lid_notifier);
 634         struct drm_device *dev = dev_priv->dev;
 635         struct drm_connector *connector = dev_priv->int_lvds_connector;
 636
 637         /*
 638          * check and update the status of LVDS connector after receiving
 639          * the LID nofication event.
 640          */
 641         if (connector)
 642                 connector->status = connector->funcs->detect(connector);
 643         /* Don't force modeset on machines where it causes a GPU lockup */
 644         if (dmi_check_system(intel_no_modeset_on_lid))
 645                 return NOTIFY_OK;
 646         if (!acpi_lid_open()) {
 647                 dev_priv->modeset_on_lid = 1;
 648                 return NOTIFY_OK;
 649         }
 650
 651         if (!dev_priv->modeset_on_lid)
 652                 return NOTIFY_OK;
 653
 654         dev_priv->modeset_on_lid = 0;
 655
 656         mutex_lock(&dev->mode_config.mutex);
 657         drm_helper_resume_force_mode(dev);
 658         mutex_unlock(&dev->mode_config.mutex);
 659
 660         return NOTIFY_OK;
 661 }
 662
 663 /**
 664  * intel_lvds_destroy - unregister and free LVDS structures
 665  * @connector: connector to free
 666  *
 667  * Unregister the DDC bus for this connector then free the driver private
 668  * structure.
 669  */
 670 static void intel_lvds_destroy(struct drm_connector *connector)
 671 {
 672         struct drm_device *dev = connector->dev;
 673         struct drm_i915_private *dev_priv = dev->dev_private;
 674
 675         if (dev_priv->lid_notifier.notifier_call)
 676                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 677         drm_sysfs_connector_remove(connector);
 678         drm_connector_cleanup(connector);
 679         kfree(connector);
 680 }
 681
 682 static int intel_lvds_set_property(struct drm_connector *connector,
 683                                    struct drm_property *property,
 684                                    uint64_t value)
 685 {
 686         struct drm_device *dev = connector->dev;
 687
 688         if (property == dev->mode_config.scaling_mode_property &&
 689                                 connector->encoder) {
 690                 struct drm_crtc *crtc = connector->encoder->crtc;
 691                 struct drm_encoder *encoder = connector->encoder;
 692                 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 693                 struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv;
 694
 695                 if (value == DRM_MODE_SCALE_NONE) {
 696                         DRM_DEBUG_KMS("no scaling not supported\n");
 697                         return 0;
 698                 }
 699                 if (lvds_priv->fitting_mode == value) {
 700                         /* the LVDS scaling property is not changed */
 701                         return 0;
 702                 }
 703                 lvds_priv->fitting_mode = value;
 704                 if (crtc && crtc->enabled) {
 705                         /*
 706                          * If the CRTC is enabled, the display will be changed
 707                          * according to the new panel fitting mode.
 708                          */
 709                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 710                                 crtc->x, crtc->y, crtc->fb);
 711                 }
 712         }
 713
 714         return 0;
 715 }
 716
 717 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 718         .dpms = intel_lvds_dpms,
 719         .mode_fixup = intel_lvds_mode_fixup,
 720         .prepare = intel_lvds_prepare,
 721         .mode_set = intel_lvds_mode_set,
 722         .commit = intel_lvds_commit,
 723 };
 724
 725 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 726         .get_modes = intel_lvds_get_modes,
 727         .mode_valid = intel_lvds_mode_valid,
 728         .best_encoder = intel_attached_encoder,
 729 };
 730
 731 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 732         .dpms = drm_helper_connector_dpms,
 733         .detect = intel_lvds_detect,
 734         .fill_modes = drm_helper_probe_single_connector_modes,
 735         .set_property = intel_lvds_set_property,
 736         .destroy = intel_lvds_destroy,
 737 };
 738
 739
 740 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
 741 {
 742         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 743
 744         if (intel_encoder->ddc_bus)
 745                 intel_i2c_destroy(intel_encoder->ddc_bus);
 746         drm_encoder_cleanup(encoder);
 747         kfree(intel_encoder);
 748 }
 749
 750 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 751         .destroy = intel_lvds_enc_destroy,
 752 };
 753
 754 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 755 {
 756         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 757         return 1;
 758 }
 759
 760 /* These systems claim to have LVDS, but really don't */
 761 static const struct dmi_system_id intel_no_lvds[] = {
 762         {
 763                 .callback = intel_no_lvds_dmi_callback,
 764                 .ident = "Apple Mac Mini (Core series)",
 765                 .matches = {
 766                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 767                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 768                 },
 769         },
 770         {
 771                 .callback = intel_no_lvds_dmi_callback,
 772                 .ident = "Apple Mac Mini (Core 2 series)",
 773                 .matches = {
 774                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 775                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 776                 },
 777         },
 778         {
 779                 .callback = intel_no_lvds_dmi_callback,
 780                 .ident = "MSI IM-945GSE-A",
 781                 .matches = {
 782                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 783                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 784                 },
 785         },
 786         {
 787                 .callback = intel_no_lvds_dmi_callback,
 788                 .ident = "Dell Studio Hybrid",
 789                 .matches = {
 790                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 791                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 792                 },
 793         },
 794         {
 795                 .callback = intel_no_lvds_dmi_callback,
 796                 .ident = "AOpen Mini PC",
 797                 .matches = {
 798                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 799                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 800                 },
 801         },
 802         {
 803                 .callback = intel_no_lvds_dmi_callback,
 804                 .ident = "AOpen Mini PC MP915",
 805                 .matches = {
 806                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 807                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 808                 },
 809         },
 810         {
 811                 .callback = intel_no_lvds_dmi_callback,
 812                 .ident = "Aopen i945GTt-VFA",
 813                 .matches = {
 814                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 815                 },
 816         },
 817         {
 818                 .callback = intel_no_lvds_dmi_callback,
 819                 .ident = "Clientron U800",
 820                 .matches = {
 821                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 822                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 823                 },
 824         },
 825
 826         { }     /* terminating entry */
 827 };
 828
 829 /**
 830  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 831  * @dev: drm device
 832  * @connector: LVDS connector
 833  *
 834  * Find the reduced downclock for LVDS in EDID.
 835  */
 836 static void intel_find_lvds_downclock(struct drm_device *dev,
 837                                 struct drm_connector *connector)
 838 {
 839         struct drm_i915_private *dev_priv = dev->dev_private;
 840         struct drm_display_mode *scan, *panel_fixed_mode;
 841         int temp_downclock;
 842
 843         panel_fixed_mode = dev_priv->panel_fixed_mode;
 844         temp_downclock = panel_fixed_mode->clock;
 845
 846         mutex_lock(&dev->mode_config.mutex);
 847         list_for_each_entry(scan, &connector->probed_modes, head) {
 848                 /*
 849                  * If one mode has the same resolution with the fixed_panel
 850                  * mode while they have the different refresh rate, it means
 851                  * that the reduced downclock is found for the LVDS. In such
 852                  * case we can set the different FPx0/1 to dynamically select
 853                  * between low and high frequency.
 854                  */
 855                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
 856                         scan->hsync_start == panel_fixed_mode->hsync_start &&
 857                         scan->hsync_end == panel_fixed_mode->hsync_end &&
 858                         scan->htotal == panel_fixed_mode->htotal &&
 859                         scan->vdisplay == panel_fixed_mode->vdisplay &&
 860                         scan->vsync_start == panel_fixed_mode->vsync_start &&
 861                         scan->vsync_end == panel_fixed_mode->vsync_end &&
 862                         scan->vtotal == panel_fixed_mode->vtotal) {
 863                         if (scan->clock < temp_downclock) {
 864                                 /*
 865                                  * The downclock is already found. But we
 866                                  * expect to find the lower downclock.
 867                                  */
 868                                 temp_downclock = scan->clock;
 869                         }
 870                 }
 871         }
 872         mutex_unlock(&dev->mode_config.mutex);
 873         if (temp_downclock < panel_fixed_mode->clock &&
 874             i915_lvds_downclock) {
 875                 /* We found the downclock for LVDS. */
 876                 dev_priv->lvds_downclock_avail = 1;
 877                 dev_priv->lvds_downclock = temp_downclock;
 878                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 879                                 "Normal clock %dKhz, downclock %dKhz\n",
 880                                 panel_fixed_mode->clock, temp_downclock);
 881         }
 882         return;
 883 }
 884
 885 /*
 886  * Enumerate the child dev array parsed from VBT to check whether
 887  * the LVDS is present.
 888  * If it is present, return 1.
 889  * If it is not present, return false.
 890  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 891  * Note: The addin_offset should also be checked for LVDS panel.
 892  * Only when it is non-zero, it is assumed that it is present.
 893  */
 894 static int lvds_is_present_in_vbt(struct drm_device *dev)
 895 {
 896         struct drm_i915_private *dev_priv = dev->dev_private;
 897         struct child_device_config *p_child;
 898         int i, ret;
 899
 900         if (!dev_priv->child_dev_num)
 901                 return 1;
 902
 903         ret = 0;
 904         for (i = 0; i < dev_priv->child_dev_num; i++) {
 905                 p_child = dev_priv->child_dev + i;
 906                 /*
 907                  * If the device type is not LFP, continue.
 908                  * If the device type is 0x22, it is also regarded as LFP.
 909                  */
 910                 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
 911                         p_child->device_type != DEVICE_TYPE_LFP)
 912                         continue;
 913
 914                 /* The addin_offset should be checked. Only when it is
 915                  * non-zero, it is regarded as present.
 916                  */
 917                 if (p_child->addin_offset) {
 918                         ret = 1;
 919                         break;
 920                 }
 921         }
 922         return ret;
 923 }
 924
 925 /**
 926  * intel_lvds_init - setup LVDS connectors on this device
 927  * @dev: drm device
 928  *
 929  * Create the connector, register the LVDS DDC bus, and try to figure out what
 930  * modes we can display on the LVDS panel (if present).
 931  */
 932 void intel_lvds_init(struct drm_device *dev)
 933 {
 934         struct drm_i915_private *dev_priv = dev->dev_private;
 935         struct intel_encoder *intel_encoder;
 936         struct intel_connector *intel_connector;
 937         struct drm_connector *connector;
 938         struct drm_encoder *encoder;
 939         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 940         struct drm_crtc *crtc;
 941         struct intel_lvds_priv *lvds_priv;
 942         u32 lvds;
 943         int pipe, gpio = GPIOC;
 944
 945         /* Skip init on machines we know falsely report LVDS */
 946         if (dmi_check_system(intel_no_lvds))
 947                 return;
 948
 949         if (!lvds_is_present_in_vbt(dev)) {
 950                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 951                 return;
 952         }
 953
 954         if (HAS_PCH_SPLIT(dev)) {
 955                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 956                         return;
 957                 if (dev_priv->edp_support) {
 958                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 959                         return;
 960                 }
 961                 gpio = PCH_GPIOC;
 962         }
 963
 964         intel_encoder = kzalloc(sizeof(struct intel_encoder) +
 965                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
 966         if (!intel_encoder) {
 967                 return;
 968         }
 969
 970         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 971         if (!intel_connector) {
 972                 kfree(intel_encoder);
 973                 return;
 974         }
 975
 976         connector = &intel_connector->base;
 977         encoder = &intel_encoder->enc;
 978         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 979                            DRM_MODE_CONNECTOR_LVDS);
 980
 981         drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs,
 982                          DRM_MODE_ENCODER_LVDS);
 983
 984         drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc);
 985         intel_encoder->type = INTEL_OUTPUT_LVDS;
 986
 987         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 988         intel_encoder->crtc_mask = (1 << 1);
 989         if (IS_I965G(dev))
 990                 intel_encoder->crtc_mask |= (1 << 0);
 991         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 992         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 993         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 994         connector->interlace_allowed = false;
 995         connector->doublescan_allowed = false;
 996
 997         lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1);
 998         intel_encoder->dev_priv = lvds_priv;
 999         /* create the scaling mode property */
1000         drm_mode_create_scaling_mode_property(dev);
1001         /*
1002          * the initial panel fitting mode will be FULL_SCREEN.
1003          */
1004
1005         drm_connector_attach_property(&intel_connector->base,
1006                                       dev->mode_config.scaling_mode_property,
1007                                       DRM_MODE_SCALE_ASPECT);
1008         lvds_priv->fitting_mode = DRM_MODE_SCALE_ASPECT;
1009         /*
1010          * LVDS discovery:
1011          * 1) check for EDID on DDC
1012          * 2) check for VBT data
1013          * 3) check to see if LVDS is already on
1014          *    if none of the above, no panel
1015          * 4) make sure lid is open
1016          *    if closed, act like it's not there for now
1017          */
1018
1019         /* Set up the DDC bus. */
1020         intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1021         if (!intel_encoder->ddc_bus) {
1022                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1023                            "failed.\n");
1024                 goto failed;
1025         }
1026
1027         /*
1028          * Attempt to get the fixed panel mode from DDC.  Assume that the
1029          * preferred mode is the right one.
1030          */
1031         dev_priv->lvds_edid_good = true;
1032
1033         if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
1034                 dev_priv->lvds_edid_good = false;
1035
1036         list_for_each_entry(scan, &connector->probed_modes, head) {
1037                 mutex_lock(&dev->mode_config.mutex);
1038                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1039                         dev_priv->panel_fixed_mode =
1040                                 drm_mode_duplicate(dev, scan);
1041                         mutex_unlock(&dev->mode_config.mutex);
1042                         intel_find_lvds_downclock(dev, connector);
1043                         goto out;
1044                 }
1045                 mutex_unlock(&dev->mode_config.mutex);
1046         }
1047
1048         /* Failed to get EDID, what about VBT? */
1049         if (dev_priv->lfp_lvds_vbt_mode) {
1050                 mutex_lock(&dev->mode_config.mutex);
1051                 dev_priv->panel_fixed_mode =
1052                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1053                 mutex_unlock(&dev->mode_config.mutex);
1054                 if (dev_priv->panel_fixed_mode) {
1055                         dev_priv->panel_fixed_mode->type |=
1056                                 DRM_MODE_TYPE_PREFERRED;
1057                         goto out;
1058                 }
1059         }
1060
1061         /*
1062          * If we didn't get EDID, try checking if the panel is already turned
1063          * on.  If so, assume that whatever is currently programmed is the
1064          * correct mode.
1065          */
1066
1067         /* Ironlake: FIXME if still fail, not try pipe mode now */
1068         if (HAS_PCH_SPLIT(dev))
1069                 goto failed;
1070
1071         lvds = I915_READ(LVDS);
1072         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1073         crtc = intel_get_crtc_from_pipe(dev, pipe);
1074
1075         if (crtc && (lvds & LVDS_PORT_EN)) {
1076                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1077                 if (dev_priv->panel_fixed_mode) {
1078                         dev_priv->panel_fixed_mode->type |=
1079                                 DRM_MODE_TYPE_PREFERRED;
1080                         goto out;
1081                 }
1082         }
1083
1084         /* If we still don't have a mode after all that, give up. */
1085         if (!dev_priv->panel_fixed_mode)
1086                 goto failed;
1087
1088 out:
1089         if (HAS_PCH_SPLIT(dev)) {
1090                 u32 pwm;
1091                 /* make sure PWM is enabled */
1092                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1093                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1094                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1095
1096                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1097                 pwm |= PWM_PCH_ENABLE;
1098                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1099         }
1100         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1101         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1102                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1103                 dev_priv->lid_notifier.notifier_call = NULL;
1104         }
1105         /* keep the LVDS connector */
1106         dev_priv->int_lvds_connector = connector;
1107         drm_sysfs_connector_add(connector);
1108         return;
1109
1110 failed:
1111         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1112         if (intel_encoder->ddc_bus)
1113                 intel_i2c_destroy(intel_encoder->ddc_bus);
1114         drm_connector_cleanup(connector);
1115         drm_encoder_cleanup(encoder);
1116         kfree(intel_encoder);
1117         kfree(intel_connector);
1118 }