2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector *connector;
51 bool force_hotplug_required;
55 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
57 return container_of(intel_attached_encoder(connector),
58 struct intel_crt, base);
61 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
63 return container_of(encoder, struct intel_crt, base);
66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
69 struct drm_device *dev = encoder->base.dev;
70 struct drm_i915_private *dev_priv = dev->dev_private;
71 struct intel_crt *crt = intel_encoder_to_crt(encoder);
74 tmp = I915_READ(crt->adpa_reg);
76 if (!(tmp & ADPA_DAC_ENABLE))
80 *pipe = PORT_TO_PIPE_CPT(tmp);
82 *pipe = PORT_TO_PIPE(tmp);
87 /* Note: The caller is required to filter out dpms modes not supported by the
89 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
91 struct drm_device *dev = encoder->base.dev;
92 struct drm_i915_private *dev_priv = dev->dev_private;
93 struct intel_crt *crt = intel_encoder_to_crt(encoder);
96 temp = I915_READ(crt->adpa_reg);
97 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
98 temp &= ~ADPA_DAC_ENABLE;
101 case DRM_MODE_DPMS_ON:
102 temp |= ADPA_DAC_ENABLE;
104 case DRM_MODE_DPMS_STANDBY:
105 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
107 case DRM_MODE_DPMS_SUSPEND:
108 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
110 case DRM_MODE_DPMS_OFF:
111 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
115 I915_WRITE(crt->adpa_reg, temp);
118 static void intel_disable_crt(struct intel_encoder *encoder)
120 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
123 static void intel_enable_crt(struct intel_encoder *encoder)
125 struct intel_crt *crt = intel_encoder_to_crt(encoder);
127 intel_crt_set_dpms(encoder, crt->connector->base.dpms);
131 static void intel_crt_dpms(struct drm_connector *connector, int mode)
133 struct drm_device *dev = connector->dev;
134 struct intel_encoder *encoder = intel_attached_encoder(connector);
135 struct drm_crtc *crtc;
138 /* PCH platforms and VLV only support on/off. */
139 if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
140 mode = DRM_MODE_DPMS_OFF;
142 if (mode == connector->dpms)
145 old_dpms = connector->dpms;
146 connector->dpms = mode;
148 /* Only need to change hw state when actually enabled */
149 crtc = encoder->base.crtc;
151 encoder->connectors_active = false;
155 /* We need the pipe to run for anything but OFF. */
156 if (mode == DRM_MODE_DPMS_OFF)
157 encoder->connectors_active = false;
159 encoder->connectors_active = true;
161 if (mode < old_dpms) {
162 /* From off to on, enable the pipe first. */
163 intel_crtc_update_dpms(crtc);
165 intel_crt_set_dpms(encoder, mode);
167 intel_crt_set_dpms(encoder, mode);
169 intel_crtc_update_dpms(crtc);
172 intel_modeset_check_state(connector->dev);
175 static int intel_crt_mode_valid(struct drm_connector *connector,
176 struct drm_display_mode *mode)
178 struct drm_device *dev = connector->dev;
181 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
182 return MODE_NO_DBLESCAN;
184 if (mode->clock < 25000)
185 return MODE_CLOCK_LOW;
191 if (mode->clock > max_clock)
192 return MODE_CLOCK_HIGH;
194 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
195 if (HAS_PCH_LPT(dev) &&
196 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
197 return MODE_CLOCK_HIGH;
202 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
203 const struct drm_display_mode *mode,
204 struct drm_display_mode *adjusted_mode)
209 static void intel_crt_mode_set(struct drm_encoder *encoder,
210 struct drm_display_mode *mode,
211 struct drm_display_mode *adjusted_mode)
214 struct drm_device *dev = encoder->dev;
215 struct drm_crtc *crtc = encoder->crtc;
216 struct intel_crt *crt =
217 intel_encoder_to_crt(to_intel_encoder(encoder));
218 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
219 struct drm_i915_private *dev_priv = dev->dev_private;
222 if (HAS_PCH_SPLIT(dev))
223 adpa = ADPA_HOTPLUG_BITS;
227 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
228 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
229 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
230 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
232 /* For CPT allow 3 pipe config, for others just use A or B */
233 if (HAS_PCH_LPT(dev))
234 ; /* Those bits don't exist here */
235 else if (HAS_PCH_CPT(dev))
236 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
237 else if (intel_crtc->pipe == 0)
238 adpa |= ADPA_PIPE_A_SELECT;
240 adpa |= ADPA_PIPE_B_SELECT;
242 if (!HAS_PCH_SPLIT(dev))
243 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
245 I915_WRITE(crt->adpa_reg, adpa);
248 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
250 struct drm_device *dev = connector->dev;
251 struct intel_crt *crt = intel_attached_crt(connector);
252 struct drm_i915_private *dev_priv = dev->dev_private;
256 /* The first time through, trigger an explicit detection cycle */
257 if (crt->force_hotplug_required) {
258 bool turn_off_dac = HAS_PCH_SPLIT(dev);
261 crt->force_hotplug_required = 0;
263 save_adpa = adpa = I915_READ(crt->adpa_reg);
264 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
266 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
268 adpa &= ~ADPA_DAC_ENABLE;
270 I915_WRITE(crt->adpa_reg, adpa);
272 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
274 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
277 I915_WRITE(crt->adpa_reg, save_adpa);
278 POSTING_READ(crt->adpa_reg);
282 /* Check the status to see if both blue and green are on now */
283 adpa = I915_READ(crt->adpa_reg);
284 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
288 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
293 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
295 struct drm_device *dev = connector->dev;
296 struct intel_crt *crt = intel_attached_crt(connector);
297 struct drm_i915_private *dev_priv = dev->dev_private;
302 save_adpa = adpa = I915_READ(crt->adpa_reg);
303 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
305 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
307 I915_WRITE(crt->adpa_reg, adpa);
309 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
311 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
312 I915_WRITE(crt->adpa_reg, save_adpa);
315 /* Check the status to see if both blue and green are on now */
316 adpa = I915_READ(crt->adpa_reg);
317 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
322 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
324 /* FIXME: debug force function and remove */
331 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
333 * Not for i915G/i915GM
335 * \return true if CRT is connected.
336 * \return false if CRT is disconnected.
338 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
340 struct drm_device *dev = connector->dev;
341 struct drm_i915_private *dev_priv = dev->dev_private;
342 u32 hotplug_en, orig, stat;
346 if (HAS_PCH_SPLIT(dev))
347 return intel_ironlake_crt_detect_hotplug(connector);
349 if (IS_VALLEYVIEW(dev))
350 return valleyview_crt_detect_hotplug(connector);
353 * On 4 series desktop, CRT detect sequence need to be done twice
354 * to get a reliable result.
357 if (IS_G4X(dev) && !IS_GM45(dev))
361 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
362 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
364 for (i = 0; i < tries ; i++) {
365 /* turn on the FORCE_DETECT */
366 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
367 /* wait for FORCE_DETECT to go off */
368 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
369 CRT_HOTPLUG_FORCE_DETECT) == 0,
371 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
374 stat = I915_READ(PORT_HOTPLUG_STAT);
375 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
378 /* clear the interrupt we just generated, if any */
379 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
381 /* and put the bits back */
382 I915_WRITE(PORT_HOTPLUG_EN, orig);
387 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
388 struct i2c_adapter *i2c)
392 edid = drm_get_edid(connector, i2c);
394 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
395 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
396 intel_gmbus_force_bit(i2c, true);
397 edid = drm_get_edid(connector, i2c);
398 intel_gmbus_force_bit(i2c, false);
404 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
405 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
406 struct i2c_adapter *adapter)
411 edid = intel_crt_get_edid(connector, adapter);
415 ret = intel_connector_update_modes(connector, edid);
421 static bool intel_crt_detect_ddc(struct drm_connector *connector)
423 struct intel_crt *crt = intel_attached_crt(connector);
424 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
426 struct i2c_adapter *i2c;
428 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
430 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
431 edid = intel_crt_get_edid(connector, i2c);
434 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
437 * This may be a DVI-I connector with a shared DDC
438 * link between analog and digital outputs, so we
439 * have to check the EDID input spec of the attached device.
442 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
446 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
448 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
456 static enum drm_connector_status
457 intel_crt_load_detect(struct intel_crt *crt)
459 struct drm_device *dev = crt->base.base.dev;
460 struct drm_i915_private *dev_priv = dev->dev_private;
461 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
462 uint32_t save_bclrpat;
463 uint32_t save_vtotal;
464 uint32_t vtotal, vactive;
466 uint32_t vblank, vblank_start, vblank_end;
468 uint32_t bclrpat_reg;
472 uint32_t pipeconf_reg;
473 uint32_t pipe_dsl_reg;
475 enum drm_connector_status status;
477 DRM_DEBUG_KMS("starting load-detect on CRT\n");
479 bclrpat_reg = BCLRPAT(pipe);
480 vtotal_reg = VTOTAL(pipe);
481 vblank_reg = VBLANK(pipe);
482 vsync_reg = VSYNC(pipe);
483 pipeconf_reg = PIPECONF(pipe);
484 pipe_dsl_reg = PIPEDSL(pipe);
486 save_bclrpat = I915_READ(bclrpat_reg);
487 save_vtotal = I915_READ(vtotal_reg);
488 vblank = I915_READ(vblank_reg);
490 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
491 vactive = (save_vtotal & 0x7ff) + 1;
493 vblank_start = (vblank & 0xfff) + 1;
494 vblank_end = ((vblank >> 16) & 0xfff) + 1;
496 /* Set the border color to purple. */
497 I915_WRITE(bclrpat_reg, 0x500050);
500 uint32_t pipeconf = I915_READ(pipeconf_reg);
501 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
502 POSTING_READ(pipeconf_reg);
503 /* Wait for next Vblank to substitue
504 * border color for Color info */
505 intel_wait_for_vblank(dev, pipe);
506 st00 = I915_READ8(VGA_MSR_WRITE);
507 status = ((st00 & (1 << 4)) != 0) ?
508 connector_status_connected :
509 connector_status_disconnected;
511 I915_WRITE(pipeconf_reg, pipeconf);
513 bool restore_vblank = false;
517 * If there isn't any border, add some.
518 * Yes, this will flicker
520 if (vblank_start <= vactive && vblank_end >= vtotal) {
521 uint32_t vsync = I915_READ(vsync_reg);
522 uint32_t vsync_start = (vsync & 0xffff) + 1;
524 vblank_start = vsync_start;
525 I915_WRITE(vblank_reg,
527 ((vblank_end - 1) << 16));
528 restore_vblank = true;
530 /* sample in the vertical border, selecting the larger one */
531 if (vblank_start - vactive >= vtotal - vblank_end)
532 vsample = (vblank_start + vactive) >> 1;
534 vsample = (vtotal + vblank_end) >> 1;
537 * Wait for the border to be displayed
539 while (I915_READ(pipe_dsl_reg) >= vactive)
541 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
544 * Watch ST00 for an entire scanline
550 /* Read the ST00 VGA status register */
551 st00 = I915_READ8(VGA_MSR_WRITE);
554 } while ((I915_READ(pipe_dsl_reg) == dsl));
556 /* restore vblank if necessary */
558 I915_WRITE(vblank_reg, vblank);
560 * If more than 3/4 of the scanline detected a monitor,
561 * then it is assumed to be present. This works even on i830,
562 * where there isn't any way to force the border color across
565 status = detect * 4 > count * 3 ?
566 connector_status_connected :
567 connector_status_disconnected;
570 /* Restore previous settings */
571 I915_WRITE(bclrpat_reg, save_bclrpat);
576 static enum drm_connector_status
577 intel_crt_detect(struct drm_connector *connector, bool force)
579 struct drm_device *dev = connector->dev;
580 struct intel_crt *crt = intel_attached_crt(connector);
581 enum drm_connector_status status;
582 struct intel_load_detect_pipe tmp;
584 if (I915_HAS_HOTPLUG(dev)) {
585 /* We can not rely on the HPD pin always being correctly wired
586 * up, for example many KVM do not pass it through, and so
587 * only trust an assertion that the monitor is connected.
589 if (intel_crt_detect_hotplug(connector)) {
590 DRM_DEBUG_KMS("CRT detected via hotplug\n");
591 return connector_status_connected;
593 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
596 if (intel_crt_detect_ddc(connector))
597 return connector_status_connected;
599 /* Load detection is broken on HPD capable machines. Whoever wants a
600 * broken monitor (without edid) to work behind a broken kvm (that fails
601 * to have the right resistors for HP detection) needs to fix this up.
602 * For now just bail out. */
603 if (I915_HAS_HOTPLUG(dev))
604 return connector_status_disconnected;
607 return connector->status;
609 /* for pre-945g platforms use load detect */
610 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
611 if (intel_crt_detect_ddc(connector))
612 status = connector_status_connected;
614 status = intel_crt_load_detect(crt);
615 intel_release_load_detect_pipe(connector, &tmp);
617 status = connector_status_unknown;
622 static void intel_crt_destroy(struct drm_connector *connector)
624 drm_sysfs_connector_remove(connector);
625 drm_connector_cleanup(connector);
629 static int intel_crt_get_modes(struct drm_connector *connector)
631 struct drm_device *dev = connector->dev;
632 struct drm_i915_private *dev_priv = dev->dev_private;
634 struct i2c_adapter *i2c;
636 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
637 ret = intel_crt_ddc_get_modes(connector, i2c);
638 if (ret || !IS_G4X(dev))
641 /* Try to probe digital port for output in DVI-I -> VGA mode. */
642 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
643 return intel_crt_ddc_get_modes(connector, i2c);
646 static int intel_crt_set_property(struct drm_connector *connector,
647 struct drm_property *property,
653 static void intel_crt_reset(struct drm_connector *connector)
655 struct drm_device *dev = connector->dev;
656 struct drm_i915_private *dev_priv = dev->dev_private;
657 struct intel_crt *crt = intel_attached_crt(connector);
659 if (HAS_PCH_SPLIT(dev)) {
662 adpa = I915_READ(crt->adpa_reg);
663 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
664 adpa |= ADPA_HOTPLUG_BITS;
665 I915_WRITE(crt->adpa_reg, adpa);
666 POSTING_READ(crt->adpa_reg);
668 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
669 crt->force_hotplug_required = 1;
675 * Routines for controlling stuff on the analog port
678 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
679 .mode_fixup = intel_crt_mode_fixup,
680 .mode_set = intel_crt_mode_set,
683 static const struct drm_connector_funcs intel_crt_connector_funcs = {
684 .reset = intel_crt_reset,
685 .dpms = intel_crt_dpms,
686 .detect = intel_crt_detect,
687 .fill_modes = drm_helper_probe_single_connector_modes,
688 .destroy = intel_crt_destroy,
689 .set_property = intel_crt_set_property,
692 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
693 .mode_valid = intel_crt_mode_valid,
694 .get_modes = intel_crt_get_modes,
695 .best_encoder = intel_best_encoder,
698 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
699 .destroy = intel_encoder_destroy,
702 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
704 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
708 static const struct dmi_system_id intel_no_crt[] = {
710 .callback = intel_no_crt_dmi_callback,
713 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
714 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
720 void intel_crt_init(struct drm_device *dev)
722 struct drm_connector *connector;
723 struct intel_crt *crt;
724 struct intel_connector *intel_connector;
725 struct drm_i915_private *dev_priv = dev->dev_private;
727 /* Skip machines without VGA that falsely report hotplug events */
728 if (dmi_check_system(intel_no_crt))
731 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
735 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
736 if (!intel_connector) {
741 connector = &intel_connector->base;
742 crt->connector = intel_connector;
743 drm_connector_init(dev, &intel_connector->base,
744 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
746 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
747 DRM_MODE_ENCODER_DAC);
749 intel_connector_attach_encoder(intel_connector, &crt->base);
751 crt->base.type = INTEL_OUTPUT_ANALOG;
752 crt->base.cloneable = true;
754 crt->base.crtc_mask = (1 << 0);
756 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
759 connector->interlace_allowed = 0;
761 connector->interlace_allowed = 1;
762 connector->doublescan_allowed = 0;
764 if (HAS_PCH_SPLIT(dev))
765 crt->adpa_reg = PCH_ADPA;
766 else if (IS_VALLEYVIEW(dev))
767 crt->adpa_reg = VLV_ADPA;
769 crt->adpa_reg = ADPA;
771 crt->base.disable = intel_disable_crt;
772 crt->base.enable = intel_enable_crt;
774 crt->base.get_hw_state = intel_ddi_get_hw_state;
776 crt->base.get_hw_state = intel_crt_get_hw_state;
777 intel_connector->get_hw_state = intel_connector_get_hw_state;
779 drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
780 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
782 drm_sysfs_connector_add(connector);
784 if (I915_HAS_HOTPLUG(dev))
785 connector->polled = DRM_CONNECTOR_POLL_HPD;
787 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
790 * Configure the automatic hotplug detection stuff
792 crt->force_hotplug_required = 0;
794 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
797 * TODO: find a proper way to discover whether we need to set the the
798 * polarity and link reversal bits or not, instead of relying on the
801 if (HAS_PCH_LPT(dev)) {
802 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
803 FDI_RX_LINK_REVERSAL_OVERRIDE;
805 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;