Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         bool force_hotplug_required;
  49         u32 adpa_reg;
  50 };
  51
  52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  53 {
  54         return container_of(intel_attached_encoder(connector),
  55                             struct intel_crt, base);
  56 }
  57
  58 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  59 {
  60         return container_of(encoder, struct intel_crt, base);
  61 }
  62
  63 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  64                                    enum pipe *pipe)
  65 {
  66         struct drm_device *dev = encoder->base.dev;
  67         struct drm_i915_private *dev_priv = dev->dev_private;
  68         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  69         u32 tmp;
  70
  71         tmp = I915_READ(crt->adpa_reg);
  72
  73         if (!(tmp & ADPA_DAC_ENABLE))
  74                 return false;
  75
  76         if (HAS_PCH_CPT(dev))
  77                 *pipe = PORT_TO_PIPE_CPT(tmp);
  78         else
  79                 *pipe = PORT_TO_PIPE(tmp);
  80
  81         return true;
  82 }
  83
  84 static void intel_disable_crt(struct intel_encoder *encoder)
  85 {
  86         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  87         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  88         u32 temp;
  89
  90         temp = I915_READ(crt->adpa_reg);
  91         temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  92         temp &= ~ADPA_DAC_ENABLE;
  93         I915_WRITE(crt->adpa_reg, temp);
  94 }
  95
  96 static void intel_enable_crt(struct intel_encoder *encoder)
  97 {
  98         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  99         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 100         u32 temp;
 101
 102         temp = I915_READ(crt->adpa_reg);
 103         temp |= ADPA_DAC_ENABLE;
 104         I915_WRITE(crt->adpa_reg, temp);
 105 }
 106
 107 /* Note: The caller is required to filter out dpms modes not supported by the
 108  * platform. */
 109 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 110 {
 111         struct drm_device *dev = encoder->base.dev;
 112         struct drm_i915_private *dev_priv = dev->dev_private;
 113         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 114         u32 temp;
 115
 116         temp = I915_READ(crt->adpa_reg);
 117         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 118         temp &= ~ADPA_DAC_ENABLE;
 119
 120         switch (mode) {
 121         case DRM_MODE_DPMS_ON:
 122                 temp |= ADPA_DAC_ENABLE;
 123                 break;
 124         case DRM_MODE_DPMS_STANDBY:
 125                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 126                 break;
 127         case DRM_MODE_DPMS_SUSPEND:
 128                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 129                 break;
 130         case DRM_MODE_DPMS_OFF:
 131                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 132                 break;
 133         }
 134
 135         I915_WRITE(crt->adpa_reg, temp);
 136 }
 137
 138 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 139 {
 140         struct drm_device *dev = connector->dev;
 141         struct intel_encoder *encoder = intel_attached_encoder(connector);
 142         struct drm_crtc *crtc;
 143         int old_dpms;
 144
 145         /* PCH platforms and VLV only support on/off. */
 146         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 147                 mode = DRM_MODE_DPMS_OFF;
 148
 149         if (mode == connector->dpms)
 150                 return;
 151
 152         old_dpms = connector->dpms;
 153         connector->dpms = mode;
 154
 155         /* Only need to change hw state when actually enabled */
 156         crtc = encoder->base.crtc;
 157         if (!crtc) {
 158                 encoder->connectors_active = false;
 159                 return;
 160         }
 161
 162         /* We need the pipe to run for anything but OFF. */
 163         if (mode == DRM_MODE_DPMS_OFF)
 164                 encoder->connectors_active = false;
 165         else
 166                 encoder->connectors_active = true;
 167
 168         if (mode < old_dpms) {
 169                 /* From off to on, enable the pipe first. */
 170                 intel_crtc_update_dpms(crtc);
 171
 172                 intel_crt_set_dpms(encoder, mode);
 173         } else {
 174                 intel_crt_set_dpms(encoder, mode);
 175
 176                 intel_crtc_update_dpms(crtc);
 177         }
 178
 179         intel_modeset_check_state(connector->dev);
 180 }
 181
 182 static int intel_crt_mode_valid(struct drm_connector *connector,
 183                                 struct drm_display_mode *mode)
 184 {
 185         struct drm_device *dev = connector->dev;
 186
 187         int max_clock = 0;
 188         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 189                 return MODE_NO_DBLESCAN;
 190
 191         if (mode->clock < 25000)
 192                 return MODE_CLOCK_LOW;
 193
 194         if (IS_GEN2(dev))
 195                 max_clock = 350000;
 196         else
 197                 max_clock = 400000;
 198         if (mode->clock > max_clock)
 199                 return MODE_CLOCK_HIGH;
 200
 201         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 202         if (HAS_PCH_LPT(dev) &&
 203             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 204                 return MODE_CLOCK_HIGH;
 205
 206         return MODE_OK;
 207 }
 208
 209 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 210                                      struct intel_crtc_config *pipe_config)
 211 {
 212         struct drm_device *dev = encoder->base.dev;
 213
 214         if (HAS_PCH_SPLIT(dev))
 215                 pipe_config->has_pch_encoder = true;
 216
 217         /* LPT FDI RX only supports 8bpc. */
 218         if (HAS_PCH_LPT(dev))
 219                 pipe_config->pipe_bpp = 24;
 220
 221         return true;
 222 }
 223
 224 static void intel_crt_mode_set(struct drm_encoder *encoder,
 225                                struct drm_display_mode *mode,
 226                                struct drm_display_mode *adjusted_mode)
 227 {
 228
 229         struct drm_device *dev = encoder->dev;
 230         struct drm_crtc *crtc = encoder->crtc;
 231         struct intel_crt *crt =
 232                 intel_encoder_to_crt(to_intel_encoder(encoder));
 233         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 234         struct drm_i915_private *dev_priv = dev->dev_private;
 235         u32 adpa;
 236
 237         if (HAS_PCH_SPLIT(dev))
 238                 adpa = ADPA_HOTPLUG_BITS;
 239         else
 240                 adpa = 0;
 241
 242         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 243                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 244         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 245                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 246
 247         /* For CPT allow 3 pipe config, for others just use A or B */
 248         if (HAS_PCH_LPT(dev))
 249                 ; /* Those bits don't exist here */
 250         else if (HAS_PCH_CPT(dev))
 251                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 252         else if (intel_crtc->pipe == 0)
 253                 adpa |= ADPA_PIPE_A_SELECT;
 254         else
 255                 adpa |= ADPA_PIPE_B_SELECT;
 256
 257         if (!HAS_PCH_SPLIT(dev))
 258                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 259
 260         I915_WRITE(crt->adpa_reg, adpa);
 261 }
 262
 263 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 264 {
 265         struct drm_device *dev = connector->dev;
 266         struct intel_crt *crt = intel_attached_crt(connector);
 267         struct drm_i915_private *dev_priv = dev->dev_private;
 268         u32 adpa;
 269         bool ret;
 270
 271         /* The first time through, trigger an explicit detection cycle */
 272         if (crt->force_hotplug_required) {
 273                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 274                 u32 save_adpa;
 275
 276                 crt->force_hotplug_required = 0;
 277
 278                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 279                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 280
 281                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 282                 if (turn_off_dac)
 283                         adpa &= ~ADPA_DAC_ENABLE;
 284
 285                 I915_WRITE(crt->adpa_reg, adpa);
 286
 287                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 288                              1000))
 289                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 290
 291                 if (turn_off_dac) {
 292                         I915_WRITE(crt->adpa_reg, save_adpa);
 293                         POSTING_READ(crt->adpa_reg);
 294                 }
 295         }
 296
 297         /* Check the status to see if both blue and green are on now */
 298         adpa = I915_READ(crt->adpa_reg);
 299         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 300                 ret = true;
 301         else
 302                 ret = false;
 303         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 304
 305         return ret;
 306 }
 307
 308 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 309 {
 310         struct drm_device *dev = connector->dev;
 311         struct intel_crt *crt = intel_attached_crt(connector);
 312         struct drm_i915_private *dev_priv = dev->dev_private;
 313         u32 adpa;
 314         bool ret;
 315         u32 save_adpa;
 316
 317         save_adpa = adpa = I915_READ(crt->adpa_reg);
 318         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 319
 320         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 321
 322         I915_WRITE(crt->adpa_reg, adpa);
 323
 324         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 325                      1000)) {
 326                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 327                 I915_WRITE(crt->adpa_reg, save_adpa);
 328         }
 329
 330         /* Check the status to see if both blue and green are on now */
 331         adpa = I915_READ(crt->adpa_reg);
 332         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 333                 ret = true;
 334         else
 335                 ret = false;
 336
 337         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 338
 339         /* FIXME: debug force function and remove */
 340         ret = true;
 341
 342         return ret;
 343 }
 344
 345 /**
 346  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 347  *
 348  * Not for i915G/i915GM
 349  *
 350  * \return true if CRT is connected.
 351  * \return false if CRT is disconnected.
 352  */
 353 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 354 {
 355         struct drm_device *dev = connector->dev;
 356         struct drm_i915_private *dev_priv = dev->dev_private;
 357         u32 hotplug_en, orig, stat;
 358         bool ret = false;
 359         int i, tries = 0;
 360
 361         if (HAS_PCH_SPLIT(dev))
 362                 return intel_ironlake_crt_detect_hotplug(connector);
 363
 364         if (IS_VALLEYVIEW(dev))
 365                 return valleyview_crt_detect_hotplug(connector);
 366
 367         /*
 368          * On 4 series desktop, CRT detect sequence need to be done twice
 369          * to get a reliable result.
 370          */
 371
 372         if (IS_G4X(dev) && !IS_GM45(dev))
 373                 tries = 2;
 374         else
 375                 tries = 1;
 376         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 377         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 378
 379         for (i = 0; i < tries ; i++) {
 380                 /* turn on the FORCE_DETECT */
 381                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 382                 /* wait for FORCE_DETECT to go off */
 383                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 384                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 385                              1000))
 386                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 387         }
 388
 389         stat = I915_READ(PORT_HOTPLUG_STAT);
 390         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 391                 ret = true;
 392
 393         /* clear the interrupt we just generated, if any */
 394         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 395
 396         /* and put the bits back */
 397         I915_WRITE(PORT_HOTPLUG_EN, orig);
 398
 399         return ret;
 400 }
 401
 402 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 403                                 struct i2c_adapter *i2c)
 404 {
 405         struct edid *edid;
 406
 407         edid = drm_get_edid(connector, i2c);
 408
 409         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 410                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 411                 intel_gmbus_force_bit(i2c, true);
 412                 edid = drm_get_edid(connector, i2c);
 413                 intel_gmbus_force_bit(i2c, false);
 414         }
 415
 416         return edid;
 417 }
 418
 419 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 420 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 421                                 struct i2c_adapter *adapter)
 422 {
 423         struct edid *edid;
 424         int ret;
 425
 426         edid = intel_crt_get_edid(connector, adapter);
 427         if (!edid)
 428                 return 0;
 429
 430         ret = intel_connector_update_modes(connector, edid);
 431         kfree(edid);
 432
 433         return ret;
 434 }
 435
 436 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 437 {
 438         struct intel_crt *crt = intel_attached_crt(connector);
 439         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 440         struct edid *edid;
 441         struct i2c_adapter *i2c;
 442
 443         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 444
 445         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 446         edid = intel_crt_get_edid(connector, i2c);
 447
 448         if (edid) {
 449                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 450
 451                 /*
 452                  * This may be a DVI-I connector with a shared DDC
 453                  * link between analog and digital outputs, so we
 454                  * have to check the EDID input spec of the attached device.
 455                  */
 456                 if (!is_digital) {
 457                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 458                         return true;
 459                 }
 460
 461                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 462         } else {
 463                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 464         }
 465
 466         kfree(edid);
 467
 468         return false;
 469 }
 470
 471 static enum drm_connector_status
 472 intel_crt_load_detect(struct intel_crt *crt)
 473 {
 474         struct drm_device *dev = crt->base.base.dev;
 475         struct drm_i915_private *dev_priv = dev->dev_private;
 476         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 477         uint32_t save_bclrpat;
 478         uint32_t save_vtotal;
 479         uint32_t vtotal, vactive;
 480         uint32_t vsample;
 481         uint32_t vblank, vblank_start, vblank_end;
 482         uint32_t dsl;
 483         uint32_t bclrpat_reg;
 484         uint32_t vtotal_reg;
 485         uint32_t vblank_reg;
 486         uint32_t vsync_reg;
 487         uint32_t pipeconf_reg;
 488         uint32_t pipe_dsl_reg;
 489         uint8_t st00;
 490         enum drm_connector_status status;
 491
 492         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 493
 494         bclrpat_reg = BCLRPAT(pipe);
 495         vtotal_reg = VTOTAL(pipe);
 496         vblank_reg = VBLANK(pipe);
 497         vsync_reg = VSYNC(pipe);
 498         pipeconf_reg = PIPECONF(pipe);
 499         pipe_dsl_reg = PIPEDSL(pipe);
 500
 501         save_bclrpat = I915_READ(bclrpat_reg);
 502         save_vtotal = I915_READ(vtotal_reg);
 503         vblank = I915_READ(vblank_reg);
 504
 505         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 506         vactive = (save_vtotal & 0x7ff) + 1;
 507
 508         vblank_start = (vblank & 0xfff) + 1;
 509         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 510
 511         /* Set the border color to purple. */
 512         I915_WRITE(bclrpat_reg, 0x500050);
 513
 514         if (!IS_GEN2(dev)) {
 515                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 516                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 517                 POSTING_READ(pipeconf_reg);
 518                 /* Wait for next Vblank to substitue
 519                  * border color for Color info */
 520                 intel_wait_for_vblank(dev, pipe);
 521                 st00 = I915_READ8(VGA_MSR_WRITE);
 522                 status = ((st00 & (1 << 4)) != 0) ?
 523                         connector_status_connected :
 524                         connector_status_disconnected;
 525
 526                 I915_WRITE(pipeconf_reg, pipeconf);
 527         } else {
 528                 bool restore_vblank = false;
 529                 int count, detect;
 530
 531                 /*
 532                 * If there isn't any border, add some.
 533                 * Yes, this will flicker
 534                 */
 535                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 536                         uint32_t vsync = I915_READ(vsync_reg);
 537                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 538
 539                         vblank_start = vsync_start;
 540                         I915_WRITE(vblank_reg,
 541                                    (vblank_start - 1) |
 542                                    ((vblank_end - 1) << 16));
 543                         restore_vblank = true;
 544                 }
 545                 /* sample in the vertical border, selecting the larger one */
 546                 if (vblank_start - vactive >= vtotal - vblank_end)
 547                         vsample = (vblank_start + vactive) >> 1;
 548                 else
 549                         vsample = (vtotal + vblank_end) >> 1;
 550
 551                 /*
 552                  * Wait for the border to be displayed
 553                  */
 554                 while (I915_READ(pipe_dsl_reg) >= vactive)
 555                         ;
 556                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 557                         ;
 558                 /*
 559                  * Watch ST00 for an entire scanline
 560                  */
 561                 detect = 0;
 562                 count = 0;
 563                 do {
 564                         count++;
 565                         /* Read the ST00 VGA status register */
 566                         st00 = I915_READ8(VGA_MSR_WRITE);
 567                         if (st00 & (1 << 4))
 568                                 detect++;
 569                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 570
 571                 /* restore vblank if necessary */
 572                 if (restore_vblank)
 573                         I915_WRITE(vblank_reg, vblank);
 574                 /*
 575                  * If more than 3/4 of the scanline detected a monitor,
 576                  * then it is assumed to be present. This works even on i830,
 577                  * where there isn't any way to force the border color across
 578                  * the screen
 579                  */
 580                 status = detect * 4 > count * 3 ?
 581                          connector_status_connected :
 582                          connector_status_disconnected;
 583         }
 584
 585         /* Restore previous settings */
 586         I915_WRITE(bclrpat_reg, save_bclrpat);
 587
 588         return status;
 589 }
 590
 591 static enum drm_connector_status
 592 intel_crt_detect(struct drm_connector *connector, bool force)
 593 {
 594         struct drm_device *dev = connector->dev;
 595         struct intel_crt *crt = intel_attached_crt(connector);
 596         enum drm_connector_status status;
 597         struct intel_load_detect_pipe tmp;
 598
 599         if (I915_HAS_HOTPLUG(dev)) {
 600                 /* We can not rely on the HPD pin always being correctly wired
 601                  * up, for example many KVM do not pass it through, and so
 602                  * only trust an assertion that the monitor is connected.
 603                  */
 604                 if (intel_crt_detect_hotplug(connector)) {
 605                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 606                         return connector_status_connected;
 607                 } else
 608                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 609         }
 610
 611         if (intel_crt_detect_ddc(connector))
 612                 return connector_status_connected;
 613
 614         /* Load detection is broken on HPD capable machines. Whoever wants a
 615          * broken monitor (without edid) to work behind a broken kvm (that fails
 616          * to have the right resistors for HP detection) needs to fix this up.
 617          * For now just bail out. */
 618         if (I915_HAS_HOTPLUG(dev))
 619                 return connector_status_disconnected;
 620
 621         if (!force)
 622                 return connector->status;
 623
 624         /* for pre-945g platforms use load detect */
 625         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 626                 if (intel_crt_detect_ddc(connector))
 627                         status = connector_status_connected;
 628                 else
 629                         status = intel_crt_load_detect(crt);
 630                 intel_release_load_detect_pipe(connector, &tmp);
 631         } else
 632                 status = connector_status_unknown;
 633
 634         return status;
 635 }
 636
 637 static void intel_crt_destroy(struct drm_connector *connector)
 638 {
 639         drm_sysfs_connector_remove(connector);
 640         drm_connector_cleanup(connector);
 641         kfree(connector);
 642 }
 643
 644 static int intel_crt_get_modes(struct drm_connector *connector)
 645 {
 646         struct drm_device *dev = connector->dev;
 647         struct drm_i915_private *dev_priv = dev->dev_private;
 648         int ret;
 649         struct i2c_adapter *i2c;
 650
 651         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 652         ret = intel_crt_ddc_get_modes(connector, i2c);
 653         if (ret || !IS_G4X(dev))
 654                 return ret;
 655
 656         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 657         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 658         return intel_crt_ddc_get_modes(connector, i2c);
 659 }
 660
 661 static int intel_crt_set_property(struct drm_connector *connector,
 662                                   struct drm_property *property,
 663                                   uint64_t value)
 664 {
 665         return 0;
 666 }
 667
 668 static void intel_crt_reset(struct drm_connector *connector)
 669 {
 670         struct drm_device *dev = connector->dev;
 671         struct drm_i915_private *dev_priv = dev->dev_private;
 672         struct intel_crt *crt = intel_attached_crt(connector);
 673
 674         if (HAS_PCH_SPLIT(dev)) {
 675                 u32 adpa;
 676
 677                 adpa = I915_READ(crt->adpa_reg);
 678                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 679                 adpa |= ADPA_HOTPLUG_BITS;
 680                 I915_WRITE(crt->adpa_reg, adpa);
 681                 POSTING_READ(crt->adpa_reg);
 682
 683                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 684                 crt->force_hotplug_required = 1;
 685         }
 686
 687 }
 688
 689 /*
 690  * Routines for controlling stuff on the analog port
 691  */
 692
 693 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 694         .mode_set = intel_crt_mode_set,
 695 };
 696
 697 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 698         .reset = intel_crt_reset,
 699         .dpms = intel_crt_dpms,
 700         .detect = intel_crt_detect,
 701         .fill_modes = drm_helper_probe_single_connector_modes,
 702         .destroy = intel_crt_destroy,
 703         .set_property = intel_crt_set_property,
 704 };
 705
 706 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 707         .mode_valid = intel_crt_mode_valid,
 708         .get_modes = intel_crt_get_modes,
 709         .best_encoder = intel_best_encoder,
 710 };
 711
 712 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 713         .destroy = intel_encoder_destroy,
 714 };
 715
 716 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 717 {
 718         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 719         return 1;
 720 }
 721
 722 static const struct dmi_system_id intel_no_crt[] = {
 723         {
 724                 .callback = intel_no_crt_dmi_callback,
 725                 .ident = "ACER ZGB",
 726                 .matches = {
 727                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 728                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 729                 },
 730         },
 731         { }
 732 };
 733
 734 void intel_crt_init(struct drm_device *dev)
 735 {
 736         struct drm_connector *connector;
 737         struct intel_crt *crt;
 738         struct intel_connector *intel_connector;
 739         struct drm_i915_private *dev_priv = dev->dev_private;
 740
 741         /* Skip machines without VGA that falsely report hotplug events */
 742         if (dmi_check_system(intel_no_crt))
 743                 return;
 744
 745         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 746         if (!crt)
 747                 return;
 748
 749         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 750         if (!intel_connector) {
 751                 kfree(crt);
 752                 return;
 753         }
 754
 755         connector = &intel_connector->base;
 756         drm_connector_init(dev, &intel_connector->base,
 757                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 758
 759         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 760                          DRM_MODE_ENCODER_DAC);
 761
 762         intel_connector_attach_encoder(intel_connector, &crt->base);
 763
 764         crt->base.type = INTEL_OUTPUT_ANALOG;
 765         crt->base.cloneable = true;
 766         if (IS_I830(dev))
 767                 crt->base.crtc_mask = (1 << 0);
 768         else
 769                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 770
 771         if (IS_GEN2(dev))
 772                 connector->interlace_allowed = 0;
 773         else
 774                 connector->interlace_allowed = 1;
 775         connector->doublescan_allowed = 0;
 776
 777         if (HAS_PCH_SPLIT(dev))
 778                 crt->adpa_reg = PCH_ADPA;
 779         else if (IS_VALLEYVIEW(dev))
 780                 crt->adpa_reg = VLV_ADPA;
 781         else
 782                 crt->adpa_reg = ADPA;
 783
 784         crt->base.compute_config = intel_crt_compute_config;
 785         crt->base.disable = intel_disable_crt;
 786         crt->base.enable = intel_enable_crt;
 787         if (I915_HAS_HOTPLUG(dev))
 788                 crt->base.hpd_pin = HPD_CRT;
 789         if (HAS_DDI(dev))
 790                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 791         else
 792                 crt->base.get_hw_state = intel_crt_get_hw_state;
 793         intel_connector->get_hw_state = intel_connector_get_hw_state;
 794
 795         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 796         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 797
 798         drm_sysfs_connector_add(connector);
 799
 800         if (!I915_HAS_HOTPLUG(dev))
 801                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 802
 803         /*
 804          * Configure the automatic hotplug detection stuff
 805          */
 806         crt->force_hotplug_required = 0;
 807
 808         /*
 809          * TODO: find a proper way to discover whether we need to set the the
 810          * polarity and link reversal bits or not, instead of relying on the
 811          * BIOS.
 812          */
 813         if (HAS_PCH_LPT(dev)) {
 814                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 815                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 816
 817                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 818         }
 819 }