2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
32 #include "drm_crtc_helper.h"
33 #include "intel_drv.h"
37 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
39 struct drm_device *dev = encoder->dev;
40 struct drm_i915_private *dev_priv = dev->dev_private;
43 if (HAS_PCH_SPLIT(dev))
48 temp = I915_READ(reg);
49 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
50 temp &= ~ADPA_DAC_ENABLE;
53 case DRM_MODE_DPMS_ON:
54 temp |= ADPA_DAC_ENABLE;
56 case DRM_MODE_DPMS_STANDBY:
57 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
59 case DRM_MODE_DPMS_SUSPEND:
60 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
62 case DRM_MODE_DPMS_OFF:
63 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
67 I915_WRITE(reg, temp);
70 static int intel_crt_mode_valid(struct drm_connector *connector,
71 struct drm_display_mode *mode)
73 struct drm_device *dev = connector->dev;
76 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
77 return MODE_NO_DBLESCAN;
79 if (mode->clock < 25000)
80 return MODE_CLOCK_LOW;
86 if (mode->clock > max_clock)
87 return MODE_CLOCK_HIGH;
92 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
93 struct drm_display_mode *mode,
94 struct drm_display_mode *adjusted_mode)
99 static void intel_crt_mode_set(struct drm_encoder *encoder,
100 struct drm_display_mode *mode,
101 struct drm_display_mode *adjusted_mode)
104 struct drm_device *dev = encoder->dev;
105 struct drm_crtc *crtc = encoder->crtc;
106 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
107 struct drm_i915_private *dev_priv = dev->dev_private;
112 if (intel_crtc->pipe == 0)
113 dpll_md_reg = DPLL_A_MD;
115 dpll_md_reg = DPLL_B_MD;
117 if (HAS_PCH_SPLIT(dev))
123 * Disable separate mode multiplier used when cloning SDVO to CRT
124 * XXX this needs to be adjusted when we really are cloning
126 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
127 dpll_md = I915_READ(dpll_md_reg);
128 I915_WRITE(dpll_md_reg,
129 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
133 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
134 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
135 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
136 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
138 if (intel_crtc->pipe == 0) {
139 if (HAS_PCH_CPT(dev))
140 adpa |= PORT_TRANS_A_SEL_CPT;
142 adpa |= ADPA_PIPE_A_SELECT;
143 if (!HAS_PCH_SPLIT(dev))
144 I915_WRITE(BCLRPAT_A, 0);
146 if (HAS_PCH_CPT(dev))
147 adpa |= PORT_TRANS_B_SEL_CPT;
149 adpa |= ADPA_PIPE_B_SELECT;
150 if (!HAS_PCH_SPLIT(dev))
151 I915_WRITE(BCLRPAT_B, 0);
154 I915_WRITE(adpa_reg, adpa);
157 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
159 struct drm_device *dev = connector->dev;
160 struct drm_i915_private *dev_priv = dev->dev_private;
163 bool turn_off_dac = false;
165 temp = adpa = I915_READ(PCH_ADPA);
167 if (HAS_PCH_SPLIT(dev))
170 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
172 adpa &= ~ADPA_DAC_ENABLE;
174 /* disable HPD first */
175 I915_WRITE(PCH_ADPA, adpa);
176 (void)I915_READ(PCH_ADPA);
178 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
179 ADPA_CRT_HOTPLUG_WARMUP_10MS |
180 ADPA_CRT_HOTPLUG_SAMPLE_4S |
181 ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
182 ADPA_CRT_HOTPLUG_VOLREF_325MV |
183 ADPA_CRT_HOTPLUG_ENABLE |
184 ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
186 DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
187 I915_WRITE(PCH_ADPA, adpa);
189 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
191 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
194 /* Make sure hotplug is enabled */
195 I915_WRITE(PCH_ADPA, temp | ADPA_CRT_HOTPLUG_ENABLE);
196 (void)I915_READ(PCH_ADPA);
199 /* Check the status to see if both blue and green are on now */
200 adpa = I915_READ(PCH_ADPA);
201 adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
202 if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
203 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
212 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
214 * Not for i915G/i915GM
216 * \return true if CRT is connected.
217 * \return false if CRT is disconnected.
219 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
221 struct drm_device *dev = connector->dev;
222 struct drm_i915_private *dev_priv = dev->dev_private;
223 u32 hotplug_en, orig, stat;
227 if (HAS_PCH_SPLIT(dev))
228 return intel_ironlake_crt_detect_hotplug(connector);
231 * On 4 series desktop, CRT detect sequence need to be done twice
232 * to get a reliable result.
235 if (IS_G4X(dev) && !IS_GM45(dev))
239 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
240 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
242 for (i = 0; i < tries ; i++) {
243 /* turn on the FORCE_DETECT */
244 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
245 /* wait for FORCE_DETECT to go off */
246 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
247 CRT_HOTPLUG_FORCE_DETECT) == 0,
249 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
252 stat = I915_READ(PORT_HOTPLUG_STAT);
253 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
256 /* clear the interrupt we just generated, if any */
257 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
259 /* and put the bits back */
260 I915_WRITE(PORT_HOTPLUG_EN, orig);
265 static bool intel_crt_ddc_probe(struct drm_i915_private *dev_priv, int ddc_bus)
268 struct i2c_msg msgs[] = {
276 /* DDC monitor detect: Does it ACK a write to 0xA0? */
277 return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1;
280 static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
282 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
283 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
285 /* CRT should always be at 0, but check anyway */
286 if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
289 if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) {
290 DRM_DEBUG_KMS("CRT detected via DDC:0xa0\n");
294 if (intel_ddc_probe(intel_encoder, dev_priv->crt_ddc_pin)) {
295 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
302 static enum drm_connector_status
303 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
305 struct drm_encoder *encoder = &intel_encoder->base;
306 struct drm_device *dev = encoder->dev;
307 struct drm_i915_private *dev_priv = dev->dev_private;
308 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
309 uint32_t pipe = intel_crtc->pipe;
310 uint32_t save_bclrpat;
311 uint32_t save_vtotal;
312 uint32_t vtotal, vactive;
314 uint32_t vblank, vblank_start, vblank_end;
316 uint32_t bclrpat_reg;
320 uint32_t pipeconf_reg;
321 uint32_t pipe_dsl_reg;
323 enum drm_connector_status status;
325 DRM_DEBUG_KMS("starting load-detect on CRT\n");
328 bclrpat_reg = BCLRPAT_A;
329 vtotal_reg = VTOTAL_A;
330 vblank_reg = VBLANK_A;
332 pipeconf_reg = PIPEACONF;
333 pipe_dsl_reg = PIPEADSL;
335 bclrpat_reg = BCLRPAT_B;
336 vtotal_reg = VTOTAL_B;
337 vblank_reg = VBLANK_B;
339 pipeconf_reg = PIPEBCONF;
340 pipe_dsl_reg = PIPEBDSL;
343 save_bclrpat = I915_READ(bclrpat_reg);
344 save_vtotal = I915_READ(vtotal_reg);
345 vblank = I915_READ(vblank_reg);
347 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
348 vactive = (save_vtotal & 0x7ff) + 1;
350 vblank_start = (vblank & 0xfff) + 1;
351 vblank_end = ((vblank >> 16) & 0xfff) + 1;
353 /* Set the border color to purple. */
354 I915_WRITE(bclrpat_reg, 0x500050);
357 uint32_t pipeconf = I915_READ(pipeconf_reg);
358 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
359 POSTING_READ(pipeconf_reg);
360 /* Wait for next Vblank to substitue
361 * border color for Color info */
362 intel_wait_for_vblank(dev, pipe);
363 st00 = I915_READ8(VGA_MSR_WRITE);
364 status = ((st00 & (1 << 4)) != 0) ?
365 connector_status_connected :
366 connector_status_disconnected;
368 I915_WRITE(pipeconf_reg, pipeconf);
370 bool restore_vblank = false;
374 * If there isn't any border, add some.
375 * Yes, this will flicker
377 if (vblank_start <= vactive && vblank_end >= vtotal) {
378 uint32_t vsync = I915_READ(vsync_reg);
379 uint32_t vsync_start = (vsync & 0xffff) + 1;
381 vblank_start = vsync_start;
382 I915_WRITE(vblank_reg,
384 ((vblank_end - 1) << 16));
385 restore_vblank = true;
387 /* sample in the vertical border, selecting the larger one */
388 if (vblank_start - vactive >= vtotal - vblank_end)
389 vsample = (vblank_start + vactive) >> 1;
391 vsample = (vtotal + vblank_end) >> 1;
394 * Wait for the border to be displayed
396 while (I915_READ(pipe_dsl_reg) >= vactive)
398 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
401 * Watch ST00 for an entire scanline
407 /* Read the ST00 VGA status register */
408 st00 = I915_READ8(VGA_MSR_WRITE);
411 } while ((I915_READ(pipe_dsl_reg) == dsl));
413 /* restore vblank if necessary */
415 I915_WRITE(vblank_reg, vblank);
417 * If more than 3/4 of the scanline detected a monitor,
418 * then it is assumed to be present. This works even on i830,
419 * where there isn't any way to force the border color across
422 status = detect * 4 > count * 3 ?
423 connector_status_connected :
424 connector_status_disconnected;
427 /* Restore previous settings */
428 I915_WRITE(bclrpat_reg, save_bclrpat);
433 static enum drm_connector_status
434 intel_crt_detect(struct drm_connector *connector, bool force)
436 struct drm_device *dev = connector->dev;
437 struct intel_encoder *encoder = intel_attached_encoder(connector);
438 struct drm_crtc *crtc;
440 enum drm_connector_status status;
442 if (I915_HAS_HOTPLUG(dev)) {
443 if (intel_crt_detect_hotplug(connector)) {
444 DRM_DEBUG_KMS("CRT detected via hotplug\n");
445 return connector_status_connected;
447 return connector_status_disconnected;
450 if (intel_crt_detect_ddc(&encoder->base))
451 return connector_status_connected;
454 return connector->status;
456 /* for pre-945g platforms use load detect */
457 if (encoder->base.crtc && encoder->base.crtc->enabled) {
458 status = intel_crt_load_detect(encoder->base.crtc, encoder);
460 crtc = intel_get_load_detect_pipe(encoder, connector,
463 if (intel_crt_detect_ddc(&encoder->base))
464 status = connector_status_connected;
466 status = intel_crt_load_detect(crtc, encoder);
467 intel_release_load_detect_pipe(encoder,
468 connector, dpms_mode);
470 status = connector_status_unknown;
476 static void intel_crt_destroy(struct drm_connector *connector)
478 drm_sysfs_connector_remove(connector);
479 drm_connector_cleanup(connector);
483 static int intel_crt_get_modes(struct drm_connector *connector)
485 struct drm_device *dev = connector->dev;
486 struct drm_i915_private *dev_priv = dev->dev_private;
489 ret = intel_ddc_get_modes(connector,
490 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
491 if (ret || !IS_G4X(dev))
494 /* Try to probe digital port for output in DVI-I -> VGA mode. */
495 return intel_ddc_get_modes(connector,
496 &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
499 static int intel_crt_set_property(struct drm_connector *connector,
500 struct drm_property *property,
507 * Routines for controlling stuff on the analog port
510 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
511 .dpms = intel_crt_dpms,
512 .mode_fixup = intel_crt_mode_fixup,
513 .prepare = intel_encoder_prepare,
514 .commit = intel_encoder_commit,
515 .mode_set = intel_crt_mode_set,
518 static const struct drm_connector_funcs intel_crt_connector_funcs = {
519 .dpms = drm_helper_connector_dpms,
520 .detect = intel_crt_detect,
521 .fill_modes = drm_helper_probe_single_connector_modes,
522 .destroy = intel_crt_destroy,
523 .set_property = intel_crt_set_property,
526 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
527 .mode_valid = intel_crt_mode_valid,
528 .get_modes = intel_crt_get_modes,
529 .best_encoder = intel_best_encoder,
532 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
533 .destroy = intel_encoder_destroy,
536 void intel_crt_init(struct drm_device *dev)
538 struct drm_connector *connector;
539 struct intel_encoder *intel_encoder;
540 struct intel_connector *intel_connector;
541 struct drm_i915_private *dev_priv = dev->dev_private;
543 intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
547 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
548 if (!intel_connector) {
549 kfree(intel_encoder);
553 connector = &intel_connector->base;
554 drm_connector_init(dev, &intel_connector->base,
555 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
557 drm_encoder_init(dev, &intel_encoder->base, &intel_crt_enc_funcs,
558 DRM_MODE_ENCODER_DAC);
560 intel_connector_attach_encoder(intel_connector, intel_encoder);
562 intel_encoder->type = INTEL_OUTPUT_ANALOG;
563 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
564 (1 << INTEL_ANALOG_CLONE_BIT) |
565 (1 << INTEL_SDVO_LVDS_CLONE_BIT);
566 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
567 connector->interlace_allowed = 1;
568 connector->doublescan_allowed = 0;
570 drm_encoder_helper_add(&intel_encoder->base, &intel_crt_helper_funcs);
571 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
573 drm_sysfs_connector_add(connector);
575 if (I915_HAS_HOTPLUG(dev))
576 connector->polled = DRM_CONNECTOR_POLL_HPD;
578 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
580 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;