Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  56 {
  57         return container_of(intel_attached_encoder(connector),
  58                             struct intel_crt, base);
  59 }
  60
  61 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_crt, base);
  64 }
  65
  66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  67                                    enum pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  72         u32 tmp;
  73
  74         tmp = I915_READ(crt->adpa_reg);
  75
  76         if (!(tmp & ADPA_DAC_ENABLE))
  77                 return false;
  78
  79         if (HAS_PCH_CPT(dev))
  80                 *pipe = PORT_TO_PIPE_CPT(tmp);
  81         else
  82                 *pipe = PORT_TO_PIPE(tmp);
  83
  84         return true;
  85 }
  86
  87 /* Note: The caller is required to filter out dpms modes not supported by the
  88  * platform. */
  89 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
  90 {
  91         struct drm_device *dev = encoder->base.dev;
  92         struct drm_i915_private *dev_priv = dev->dev_private;
  93         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  94         u32 temp;
  95
  96         temp = I915_READ(crt->adpa_reg);
  97         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  98         temp &= ~ADPA_DAC_ENABLE;
  99
 100         switch (mode) {
 101         case DRM_MODE_DPMS_ON:
 102                 temp |= ADPA_DAC_ENABLE;
 103                 break;
 104         case DRM_MODE_DPMS_STANDBY:
 105                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 106                 break;
 107         case DRM_MODE_DPMS_SUSPEND:
 108                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 109                 break;
 110         case DRM_MODE_DPMS_OFF:
 111                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 112                 break;
 113         }
 114
 115         I915_WRITE(crt->adpa_reg, temp);
 116 }
 117
 118 static void intel_disable_crt(struct intel_encoder *encoder)
 119 {
 120         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 121 }
 122
 123 static void intel_enable_crt(struct intel_encoder *encoder)
 124 {
 125         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 126
 127         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 128 }
 129
 130
 131 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 132 {
 133         struct drm_device *dev = connector->dev;
 134         struct intel_encoder *encoder = intel_attached_encoder(connector);
 135         struct drm_crtc *crtc;
 136         int old_dpms;
 137
 138         /* PCH platforms and VLV only support on/off. */
 139         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 140                 mode = DRM_MODE_DPMS_OFF;
 141
 142         if (mode == connector->dpms)
 143                 return;
 144
 145         old_dpms = connector->dpms;
 146         connector->dpms = mode;
 147
 148         /* Only need to change hw state when actually enabled */
 149         crtc = encoder->base.crtc;
 150         if (!crtc) {
 151                 encoder->connectors_active = false;
 152                 return;
 153         }
 154
 155         /* We need the pipe to run for anything but OFF. */
 156         if (mode == DRM_MODE_DPMS_OFF)
 157                 encoder->connectors_active = false;
 158         else
 159                 encoder->connectors_active = true;
 160
 161         if (mode < old_dpms) {
 162                 /* From off to on, enable the pipe first. */
 163                 intel_crtc_update_dpms(crtc);
 164
 165                 intel_crt_set_dpms(encoder, mode);
 166         } else {
 167                 intel_crt_set_dpms(encoder, mode);
 168
 169                 intel_crtc_update_dpms(crtc);
 170         }
 171
 172         intel_modeset_check_state(connector->dev);
 173 }
 174
 175 static int intel_crt_mode_valid(struct drm_connector *connector,
 176                                 struct drm_display_mode *mode)
 177 {
 178         struct drm_device *dev = connector->dev;
 179
 180         int max_clock = 0;
 181         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 182                 return MODE_NO_DBLESCAN;
 183
 184         if (mode->clock < 25000)
 185                 return MODE_CLOCK_LOW;
 186
 187         if (IS_GEN2(dev))
 188                 max_clock = 350000;
 189         else
 190                 max_clock = 400000;
 191         if (mode->clock > max_clock)
 192                 return MODE_CLOCK_HIGH;
 193
 194         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 195         if (HAS_PCH_LPT(dev) &&
 196             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 197                 return MODE_CLOCK_HIGH;
 198
 199         return MODE_OK;
 200 }
 201
 202 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 203                                      struct intel_crtc_config *pipe_config)
 204 {
 205         struct drm_device *dev = encoder->base.dev;
 206
 207         if (HAS_PCH_SPLIT(dev))
 208                 pipe_config->has_pch_encoder = true;
 209
 210         /* LPT FDI RX only supports 8bpc. */
 211         if (HAS_PCH_LPT(dev))
 212                 pipe_config->pipe_bpp = 24;
 213
 214         return true;
 215 }
 216
 217 static void intel_crt_mode_set(struct drm_encoder *encoder,
 218                                struct drm_display_mode *mode,
 219                                struct drm_display_mode *adjusted_mode)
 220 {
 221
 222         struct drm_device *dev = encoder->dev;
 223         struct drm_crtc *crtc = encoder->crtc;
 224         struct intel_crt *crt =
 225                 intel_encoder_to_crt(to_intel_encoder(encoder));
 226         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 227         struct drm_i915_private *dev_priv = dev->dev_private;
 228         u32 adpa;
 229
 230         if (HAS_PCH_SPLIT(dev))
 231                 adpa = ADPA_HOTPLUG_BITS;
 232         else
 233                 adpa = 0;
 234
 235         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 236                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 237         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 238                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 239
 240         /* For CPT allow 3 pipe config, for others just use A or B */
 241         if (HAS_PCH_LPT(dev))
 242                 ; /* Those bits don't exist here */
 243         else if (HAS_PCH_CPT(dev))
 244                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 245         else if (intel_crtc->pipe == 0)
 246                 adpa |= ADPA_PIPE_A_SELECT;
 247         else
 248                 adpa |= ADPA_PIPE_B_SELECT;
 249
 250         if (!HAS_PCH_SPLIT(dev))
 251                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 252
 253         I915_WRITE(crt->adpa_reg, adpa);
 254 }
 255
 256 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 257 {
 258         struct drm_device *dev = connector->dev;
 259         struct intel_crt *crt = intel_attached_crt(connector);
 260         struct drm_i915_private *dev_priv = dev->dev_private;
 261         u32 adpa;
 262         bool ret;
 263
 264         /* The first time through, trigger an explicit detection cycle */
 265         if (crt->force_hotplug_required) {
 266                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 267                 u32 save_adpa;
 268
 269                 crt->force_hotplug_required = 0;
 270
 271                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 272                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 273
 274                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 275                 if (turn_off_dac)
 276                         adpa &= ~ADPA_DAC_ENABLE;
 277
 278                 I915_WRITE(crt->adpa_reg, adpa);
 279
 280                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 281                              1000))
 282                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 283
 284                 if (turn_off_dac) {
 285                         I915_WRITE(crt->adpa_reg, save_adpa);
 286                         POSTING_READ(crt->adpa_reg);
 287                 }
 288         }
 289
 290         /* Check the status to see if both blue and green are on now */
 291         adpa = I915_READ(crt->adpa_reg);
 292         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 293                 ret = true;
 294         else
 295                 ret = false;
 296         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 297
 298         return ret;
 299 }
 300
 301 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 302 {
 303         struct drm_device *dev = connector->dev;
 304         struct intel_crt *crt = intel_attached_crt(connector);
 305         struct drm_i915_private *dev_priv = dev->dev_private;
 306         u32 adpa;
 307         bool ret;
 308         u32 save_adpa;
 309
 310         save_adpa = adpa = I915_READ(crt->adpa_reg);
 311         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 312
 313         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 314
 315         I915_WRITE(crt->adpa_reg, adpa);
 316
 317         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 318                      1000)) {
 319                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 320                 I915_WRITE(crt->adpa_reg, save_adpa);
 321         }
 322
 323         /* Check the status to see if both blue and green are on now */
 324         adpa = I915_READ(crt->adpa_reg);
 325         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 326                 ret = true;
 327         else
 328                 ret = false;
 329
 330         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 331
 332         /* FIXME: debug force function and remove */
 333         ret = true;
 334
 335         return ret;
 336 }
 337
 338 /**
 339  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 340  *
 341  * Not for i915G/i915GM
 342  *
 343  * \return true if CRT is connected.
 344  * \return false if CRT is disconnected.
 345  */
 346 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 347 {
 348         struct drm_device *dev = connector->dev;
 349         struct drm_i915_private *dev_priv = dev->dev_private;
 350         u32 hotplug_en, orig, stat;
 351         bool ret = false;
 352         int i, tries = 0;
 353
 354         if (HAS_PCH_SPLIT(dev))
 355                 return intel_ironlake_crt_detect_hotplug(connector);
 356
 357         if (IS_VALLEYVIEW(dev))
 358                 return valleyview_crt_detect_hotplug(connector);
 359
 360         /*
 361          * On 4 series desktop, CRT detect sequence need to be done twice
 362          * to get a reliable result.
 363          */
 364
 365         if (IS_G4X(dev) && !IS_GM45(dev))
 366                 tries = 2;
 367         else
 368                 tries = 1;
 369         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 370         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 371
 372         for (i = 0; i < tries ; i++) {
 373                 /* turn on the FORCE_DETECT */
 374                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 375                 /* wait for FORCE_DETECT to go off */
 376                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 377                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 378                              1000))
 379                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 380         }
 381
 382         stat = I915_READ(PORT_HOTPLUG_STAT);
 383         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 384                 ret = true;
 385
 386         /* clear the interrupt we just generated, if any */
 387         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 388
 389         /* and put the bits back */
 390         I915_WRITE(PORT_HOTPLUG_EN, orig);
 391
 392         return ret;
 393 }
 394
 395 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 396                                 struct i2c_adapter *i2c)
 397 {
 398         struct edid *edid;
 399
 400         edid = drm_get_edid(connector, i2c);
 401
 402         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 403                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 404                 intel_gmbus_force_bit(i2c, true);
 405                 edid = drm_get_edid(connector, i2c);
 406                 intel_gmbus_force_bit(i2c, false);
 407         }
 408
 409         return edid;
 410 }
 411
 412 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 413 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 414                                 struct i2c_adapter *adapter)
 415 {
 416         struct edid *edid;
 417         int ret;
 418
 419         edid = intel_crt_get_edid(connector, adapter);
 420         if (!edid)
 421                 return 0;
 422
 423         ret = intel_connector_update_modes(connector, edid);
 424         kfree(edid);
 425
 426         return ret;
 427 }
 428
 429 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 430 {
 431         struct intel_crt *crt = intel_attached_crt(connector);
 432         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 433         struct edid *edid;
 434         struct i2c_adapter *i2c;
 435
 436         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 437
 438         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 439         edid = intel_crt_get_edid(connector, i2c);
 440
 441         if (edid) {
 442                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 443
 444                 /*
 445                  * This may be a DVI-I connector with a shared DDC
 446                  * link between analog and digital outputs, so we
 447                  * have to check the EDID input spec of the attached device.
 448                  */
 449                 if (!is_digital) {
 450                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 451                         return true;
 452                 }
 453
 454                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 455         } else {
 456                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 457         }
 458
 459         kfree(edid);
 460
 461         return false;
 462 }
 463
 464 static enum drm_connector_status
 465 intel_crt_load_detect(struct intel_crt *crt)
 466 {
 467         struct drm_device *dev = crt->base.base.dev;
 468         struct drm_i915_private *dev_priv = dev->dev_private;
 469         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 470         uint32_t save_bclrpat;
 471         uint32_t save_vtotal;
 472         uint32_t vtotal, vactive;
 473         uint32_t vsample;
 474         uint32_t vblank, vblank_start, vblank_end;
 475         uint32_t dsl;
 476         uint32_t bclrpat_reg;
 477         uint32_t vtotal_reg;
 478         uint32_t vblank_reg;
 479         uint32_t vsync_reg;
 480         uint32_t pipeconf_reg;
 481         uint32_t pipe_dsl_reg;
 482         uint8_t st00;
 483         enum drm_connector_status status;
 484
 485         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 486
 487         bclrpat_reg = BCLRPAT(pipe);
 488         vtotal_reg = VTOTAL(pipe);
 489         vblank_reg = VBLANK(pipe);
 490         vsync_reg = VSYNC(pipe);
 491         pipeconf_reg = PIPECONF(pipe);
 492         pipe_dsl_reg = PIPEDSL(pipe);
 493
 494         save_bclrpat = I915_READ(bclrpat_reg);
 495         save_vtotal = I915_READ(vtotal_reg);
 496         vblank = I915_READ(vblank_reg);
 497
 498         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 499         vactive = (save_vtotal & 0x7ff) + 1;
 500
 501         vblank_start = (vblank & 0xfff) + 1;
 502         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 503
 504         /* Set the border color to purple. */
 505         I915_WRITE(bclrpat_reg, 0x500050);
 506
 507         if (!IS_GEN2(dev)) {
 508                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 509                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 510                 POSTING_READ(pipeconf_reg);
 511                 /* Wait for next Vblank to substitue
 512                  * border color for Color info */
 513                 intel_wait_for_vblank(dev, pipe);
 514                 st00 = I915_READ8(VGA_MSR_WRITE);
 515                 status = ((st00 & (1 << 4)) != 0) ?
 516                         connector_status_connected :
 517                         connector_status_disconnected;
 518
 519                 I915_WRITE(pipeconf_reg, pipeconf);
 520         } else {
 521                 bool restore_vblank = false;
 522                 int count, detect;
 523
 524                 /*
 525                 * If there isn't any border, add some.
 526                 * Yes, this will flicker
 527                 */
 528                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 529                         uint32_t vsync = I915_READ(vsync_reg);
 530                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 531
 532                         vblank_start = vsync_start;
 533                         I915_WRITE(vblank_reg,
 534                                    (vblank_start - 1) |
 535                                    ((vblank_end - 1) << 16));
 536                         restore_vblank = true;
 537                 }
 538                 /* sample in the vertical border, selecting the larger one */
 539                 if (vblank_start - vactive >= vtotal - vblank_end)
 540                         vsample = (vblank_start + vactive) >> 1;
 541                 else
 542                         vsample = (vtotal + vblank_end) >> 1;
 543
 544                 /*
 545                  * Wait for the border to be displayed
 546                  */
 547                 while (I915_READ(pipe_dsl_reg) >= vactive)
 548                         ;
 549                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 550                         ;
 551                 /*
 552                  * Watch ST00 for an entire scanline
 553                  */
 554                 detect = 0;
 555                 count = 0;
 556                 do {
 557                         count++;
 558                         /* Read the ST00 VGA status register */
 559                         st00 = I915_READ8(VGA_MSR_WRITE);
 560                         if (st00 & (1 << 4))
 561                                 detect++;
 562                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 563
 564                 /* restore vblank if necessary */
 565                 if (restore_vblank)
 566                         I915_WRITE(vblank_reg, vblank);
 567                 /*
 568                  * If more than 3/4 of the scanline detected a monitor,
 569                  * then it is assumed to be present. This works even on i830,
 570                  * where there isn't any way to force the border color across
 571                  * the screen
 572                  */
 573                 status = detect * 4 > count * 3 ?
 574                          connector_status_connected :
 575                          connector_status_disconnected;
 576         }
 577
 578         /* Restore previous settings */
 579         I915_WRITE(bclrpat_reg, save_bclrpat);
 580
 581         return status;
 582 }
 583
 584 static enum drm_connector_status
 585 intel_crt_detect(struct drm_connector *connector, bool force)
 586 {
 587         struct drm_device *dev = connector->dev;
 588         struct intel_crt *crt = intel_attached_crt(connector);
 589         enum drm_connector_status status;
 590         struct intel_load_detect_pipe tmp;
 591
 592         if (I915_HAS_HOTPLUG(dev)) {
 593                 /* We can not rely on the HPD pin always being correctly wired
 594                  * up, for example many KVM do not pass it through, and so
 595                  * only trust an assertion that the monitor is connected.
 596                  */
 597                 if (intel_crt_detect_hotplug(connector)) {
 598                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 599                         return connector_status_connected;
 600                 } else
 601                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 602         }
 603
 604         if (intel_crt_detect_ddc(connector))
 605                 return connector_status_connected;
 606
 607         /* Load detection is broken on HPD capable machines. Whoever wants a
 608          * broken monitor (without edid) to work behind a broken kvm (that fails
 609          * to have the right resistors for HP detection) needs to fix this up.
 610          * For now just bail out. */
 611         if (I915_HAS_HOTPLUG(dev))
 612                 return connector_status_disconnected;
 613
 614         if (!force)
 615                 return connector->status;
 616
 617         /* for pre-945g platforms use load detect */
 618         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 619                 if (intel_crt_detect_ddc(connector))
 620                         status = connector_status_connected;
 621                 else
 622                         status = intel_crt_load_detect(crt);
 623                 intel_release_load_detect_pipe(connector, &tmp);
 624         } else
 625                 status = connector_status_unknown;
 626
 627         return status;
 628 }
 629
 630 static void intel_crt_destroy(struct drm_connector *connector)
 631 {
 632         drm_sysfs_connector_remove(connector);
 633         drm_connector_cleanup(connector);
 634         kfree(connector);
 635 }
 636
 637 static int intel_crt_get_modes(struct drm_connector *connector)
 638 {
 639         struct drm_device *dev = connector->dev;
 640         struct drm_i915_private *dev_priv = dev->dev_private;
 641         int ret;
 642         struct i2c_adapter *i2c;
 643
 644         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 645         ret = intel_crt_ddc_get_modes(connector, i2c);
 646         if (ret || !IS_G4X(dev))
 647                 return ret;
 648
 649         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 650         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 651         return intel_crt_ddc_get_modes(connector, i2c);
 652 }
 653
 654 static int intel_crt_set_property(struct drm_connector *connector,
 655                                   struct drm_property *property,
 656                                   uint64_t value)
 657 {
 658         return 0;
 659 }
 660
 661 static void intel_crt_reset(struct drm_connector *connector)
 662 {
 663         struct drm_device *dev = connector->dev;
 664         struct drm_i915_private *dev_priv = dev->dev_private;
 665         struct intel_crt *crt = intel_attached_crt(connector);
 666
 667         if (HAS_PCH_SPLIT(dev)) {
 668                 u32 adpa;
 669
 670                 adpa = I915_READ(crt->adpa_reg);
 671                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 672                 adpa |= ADPA_HOTPLUG_BITS;
 673                 I915_WRITE(crt->adpa_reg, adpa);
 674                 POSTING_READ(crt->adpa_reg);
 675
 676                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 677                 crt->force_hotplug_required = 1;
 678         }
 679
 680 }
 681
 682 /*
 683  * Routines for controlling stuff on the analog port
 684  */
 685
 686 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 687         .mode_set = intel_crt_mode_set,
 688 };
 689
 690 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 691         .reset = intel_crt_reset,
 692         .dpms = intel_crt_dpms,
 693         .detect = intel_crt_detect,
 694         .fill_modes = drm_helper_probe_single_connector_modes,
 695         .destroy = intel_crt_destroy,
 696         .set_property = intel_crt_set_property,
 697 };
 698
 699 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 700         .mode_valid = intel_crt_mode_valid,
 701         .get_modes = intel_crt_get_modes,
 702         .best_encoder = intel_best_encoder,
 703 };
 704
 705 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 706         .destroy = intel_encoder_destroy,
 707 };
 708
 709 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 710 {
 711         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 712         return 1;
 713 }
 714
 715 static const struct dmi_system_id intel_no_crt[] = {
 716         {
 717                 .callback = intel_no_crt_dmi_callback,
 718                 .ident = "ACER ZGB",
 719                 .matches = {
 720                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 721                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 722                 },
 723         },
 724         { }
 725 };
 726
 727 void intel_crt_init(struct drm_device *dev)
 728 {
 729         struct drm_connector *connector;
 730         struct intel_crt *crt;
 731         struct intel_connector *intel_connector;
 732         struct drm_i915_private *dev_priv = dev->dev_private;
 733
 734         /* Skip machines without VGA that falsely report hotplug events */
 735         if (dmi_check_system(intel_no_crt))
 736                 return;
 737
 738         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 739         if (!crt)
 740                 return;
 741
 742         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 743         if (!intel_connector) {
 744                 kfree(crt);
 745                 return;
 746         }
 747
 748         connector = &intel_connector->base;
 749         crt->connector = intel_connector;
 750         drm_connector_init(dev, &intel_connector->base,
 751                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 752
 753         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 754                          DRM_MODE_ENCODER_DAC);
 755
 756         intel_connector_attach_encoder(intel_connector, &crt->base);
 757
 758         crt->base.type = INTEL_OUTPUT_ANALOG;
 759         crt->base.cloneable = true;
 760         if (IS_I830(dev))
 761                 crt->base.crtc_mask = (1 << 0);
 762         else
 763                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 764
 765         if (IS_GEN2(dev))
 766                 connector->interlace_allowed = 0;
 767         else
 768                 connector->interlace_allowed = 1;
 769         connector->doublescan_allowed = 0;
 770
 771         if (HAS_PCH_SPLIT(dev))
 772                 crt->adpa_reg = PCH_ADPA;
 773         else if (IS_VALLEYVIEW(dev))
 774                 crt->adpa_reg = VLV_ADPA;
 775         else
 776                 crt->adpa_reg = ADPA;
 777
 778         crt->base.compute_config = intel_crt_compute_config;
 779         crt->base.disable = intel_disable_crt;
 780         crt->base.enable = intel_enable_crt;
 781         if (I915_HAS_HOTPLUG(dev))
 782                 crt->base.hpd_pin = HPD_CRT;
 783         if (HAS_DDI(dev))
 784                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 785         else
 786                 crt->base.get_hw_state = intel_crt_get_hw_state;
 787         intel_connector->get_hw_state = intel_connector_get_hw_state;
 788
 789         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 790         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 791
 792         drm_sysfs_connector_add(connector);
 793
 794         if (!I915_HAS_HOTPLUG(dev))
 795                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 796
 797         /*
 798          * Configure the automatic hotplug detection stuff
 799          */
 800         crt->force_hotplug_required = 0;
 801
 802         /*
 803          * TODO: find a proper way to discover whether we need to set the the
 804          * polarity and link reversal bits or not, instead of relying on the
 805          * BIOS.
 806          */
 807         if (HAS_PCH_LPT(dev)) {
 808                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 809                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 810
 811                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 812         }
 813 }