Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  56 {
  57         return container_of(intel_attached_encoder(connector),
  58                             struct intel_crt, base);
  59 }
  60
  61 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_crt, base);
  64 }
  65
  66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  67                                    enum pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  72         u32 tmp;
  73
  74         tmp = I915_READ(crt->adpa_reg);
  75
  76         if (!(tmp & ADPA_DAC_ENABLE))
  77                 return false;
  78
  79         if (HAS_PCH_CPT(dev))
  80                 *pipe = PORT_TO_PIPE_CPT(tmp);
  81         else
  82                 *pipe = PORT_TO_PIPE(tmp);
  83
  84         return true;
  85 }
  86
  87 static void intel_crt_get_config(struct intel_encoder *encoder,
  88                                  struct intel_crtc_config *pipe_config)
  89 {
  90         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  91         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  92         u32 tmp, flags = 0;
  93
  94         tmp = I915_READ(crt->adpa_reg);
  95
  96         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
  97                 flags |= DRM_MODE_FLAG_PHSYNC;
  98         else
  99                 flags |= DRM_MODE_FLAG_NHSYNC;
 100
 101         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 102                 flags |= DRM_MODE_FLAG_PVSYNC;
 103         else
 104                 flags |= DRM_MODE_FLAG_NVSYNC;
 105
 106         pipe_config->adjusted_mode.flags |= flags;
 107 }
 108
 109 /* Note: The caller is required to filter out dpms modes not supported by the
 110  * platform. */
 111 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 112 {
 113         struct drm_device *dev = encoder->base.dev;
 114         struct drm_i915_private *dev_priv = dev->dev_private;
 115         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 116         u32 temp;
 117
 118         temp = I915_READ(crt->adpa_reg);
 119         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 120         temp &= ~ADPA_DAC_ENABLE;
 121
 122         switch (mode) {
 123         case DRM_MODE_DPMS_ON:
 124                 temp |= ADPA_DAC_ENABLE;
 125                 break;
 126         case DRM_MODE_DPMS_STANDBY:
 127                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 128                 break;
 129         case DRM_MODE_DPMS_SUSPEND:
 130                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 131                 break;
 132         case DRM_MODE_DPMS_OFF:
 133                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 134                 break;
 135         }
 136
 137         I915_WRITE(crt->adpa_reg, temp);
 138 }
 139
 140 static void intel_disable_crt(struct intel_encoder *encoder)
 141 {
 142         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 143 }
 144
 145 static void intel_enable_crt(struct intel_encoder *encoder)
 146 {
 147         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 148
 149         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 150 }
 151
 152
 153 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 154 {
 155         struct drm_device *dev = connector->dev;
 156         struct intel_encoder *encoder = intel_attached_encoder(connector);
 157         struct drm_crtc *crtc;
 158         int old_dpms;
 159
 160         /* PCH platforms and VLV only support on/off. */
 161         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 162                 mode = DRM_MODE_DPMS_OFF;
 163
 164         if (mode == connector->dpms)
 165                 return;
 166
 167         old_dpms = connector->dpms;
 168         connector->dpms = mode;
 169
 170         /* Only need to change hw state when actually enabled */
 171         crtc = encoder->base.crtc;
 172         if (!crtc) {
 173                 encoder->connectors_active = false;
 174                 return;
 175         }
 176
 177         /* We need the pipe to run for anything but OFF. */
 178         if (mode == DRM_MODE_DPMS_OFF)
 179                 encoder->connectors_active = false;
 180         else
 181                 encoder->connectors_active = true;
 182
 183         if (mode < old_dpms) {
 184                 /* From off to on, enable the pipe first. */
 185                 intel_crtc_update_dpms(crtc);
 186
 187                 intel_crt_set_dpms(encoder, mode);
 188         } else {
 189                 intel_crt_set_dpms(encoder, mode);
 190
 191                 intel_crtc_update_dpms(crtc);
 192         }
 193
 194         intel_modeset_check_state(connector->dev);
 195 }
 196
 197 static int intel_crt_mode_valid(struct drm_connector *connector,
 198                                 struct drm_display_mode *mode)
 199 {
 200         struct drm_device *dev = connector->dev;
 201
 202         int max_clock = 0;
 203         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 204                 return MODE_NO_DBLESCAN;
 205
 206         if (mode->clock < 25000)
 207                 return MODE_CLOCK_LOW;
 208
 209         if (IS_GEN2(dev))
 210                 max_clock = 350000;
 211         else
 212                 max_clock = 400000;
 213         if (mode->clock > max_clock)
 214                 return MODE_CLOCK_HIGH;
 215
 216         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 217         if (HAS_PCH_LPT(dev) &&
 218             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 219                 return MODE_CLOCK_HIGH;
 220
 221         return MODE_OK;
 222 }
 223
 224 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 225                                      struct intel_crtc_config *pipe_config)
 226 {
 227         struct drm_device *dev = encoder->base.dev;
 228
 229         if (HAS_PCH_SPLIT(dev))
 230                 pipe_config->has_pch_encoder = true;
 231
 232         /* LPT FDI RX only supports 8bpc. */
 233         if (HAS_PCH_LPT(dev))
 234                 pipe_config->pipe_bpp = 24;
 235
 236         return true;
 237 }
 238
 239 static void intel_crt_mode_set(struct drm_encoder *encoder,
 240                                struct drm_display_mode *mode,
 241                                struct drm_display_mode *adjusted_mode)
 242 {
 243
 244         struct drm_device *dev = encoder->dev;
 245         struct drm_crtc *crtc = encoder->crtc;
 246         struct intel_crt *crt =
 247                 intel_encoder_to_crt(to_intel_encoder(encoder));
 248         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 249         struct drm_i915_private *dev_priv = dev->dev_private;
 250         u32 adpa;
 251
 252         if (HAS_PCH_SPLIT(dev))
 253                 adpa = ADPA_HOTPLUG_BITS;
 254         else
 255                 adpa = 0;
 256
 257         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 258                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 259         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 260                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 261
 262         /* For CPT allow 3 pipe config, for others just use A or B */
 263         if (HAS_PCH_LPT(dev))
 264                 ; /* Those bits don't exist here */
 265         else if (HAS_PCH_CPT(dev))
 266                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 267         else if (intel_crtc->pipe == 0)
 268                 adpa |= ADPA_PIPE_A_SELECT;
 269         else
 270                 adpa |= ADPA_PIPE_B_SELECT;
 271
 272         if (!HAS_PCH_SPLIT(dev))
 273                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 274
 275         I915_WRITE(crt->adpa_reg, adpa);
 276 }
 277
 278 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 279 {
 280         struct drm_device *dev = connector->dev;
 281         struct intel_crt *crt = intel_attached_crt(connector);
 282         struct drm_i915_private *dev_priv = dev->dev_private;
 283         u32 adpa;
 284         bool ret;
 285
 286         /* The first time through, trigger an explicit detection cycle */
 287         if (crt->force_hotplug_required) {
 288                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 289                 u32 save_adpa;
 290
 291                 crt->force_hotplug_required = 0;
 292
 293                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 294                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 295
 296                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 297                 if (turn_off_dac)
 298                         adpa &= ~ADPA_DAC_ENABLE;
 299
 300                 I915_WRITE(crt->adpa_reg, adpa);
 301
 302                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 303                              1000))
 304                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 305
 306                 if (turn_off_dac) {
 307                         I915_WRITE(crt->adpa_reg, save_adpa);
 308                         POSTING_READ(crt->adpa_reg);
 309                 }
 310         }
 311
 312         /* Check the status to see if both blue and green are on now */
 313         adpa = I915_READ(crt->adpa_reg);
 314         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 315                 ret = true;
 316         else
 317                 ret = false;
 318         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 319
 320         return ret;
 321 }
 322
 323 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 324 {
 325         struct drm_device *dev = connector->dev;
 326         struct intel_crt *crt = intel_attached_crt(connector);
 327         struct drm_i915_private *dev_priv = dev->dev_private;
 328         u32 adpa;
 329         bool ret;
 330         u32 save_adpa;
 331
 332         save_adpa = adpa = I915_READ(crt->adpa_reg);
 333         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 334
 335         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 336
 337         I915_WRITE(crt->adpa_reg, adpa);
 338
 339         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 340                      1000)) {
 341                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 342                 I915_WRITE(crt->adpa_reg, save_adpa);
 343         }
 344
 345         /* Check the status to see if both blue and green are on now */
 346         adpa = I915_READ(crt->adpa_reg);
 347         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 348                 ret = true;
 349         else
 350                 ret = false;
 351
 352         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 353
 354         /* FIXME: debug force function and remove */
 355         ret = true;
 356
 357         return ret;
 358 }
 359
 360 /**
 361  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 362  *
 363  * Not for i915G/i915GM
 364  *
 365  * \return true if CRT is connected.
 366  * \return false if CRT is disconnected.
 367  */
 368 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 369 {
 370         struct drm_device *dev = connector->dev;
 371         struct drm_i915_private *dev_priv = dev->dev_private;
 372         u32 hotplug_en, orig, stat;
 373         bool ret = false;
 374         int i, tries = 0;
 375
 376         if (HAS_PCH_SPLIT(dev))
 377                 return intel_ironlake_crt_detect_hotplug(connector);
 378
 379         if (IS_VALLEYVIEW(dev))
 380                 return valleyview_crt_detect_hotplug(connector);
 381
 382         /*
 383          * On 4 series desktop, CRT detect sequence need to be done twice
 384          * to get a reliable result.
 385          */
 386
 387         if (IS_G4X(dev) && !IS_GM45(dev))
 388                 tries = 2;
 389         else
 390                 tries = 1;
 391         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 392         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 393
 394         for (i = 0; i < tries ; i++) {
 395                 /* turn on the FORCE_DETECT */
 396                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 397                 /* wait for FORCE_DETECT to go off */
 398                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 399                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 400                              1000))
 401                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 402         }
 403
 404         stat = I915_READ(PORT_HOTPLUG_STAT);
 405         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 406                 ret = true;
 407
 408         /* clear the interrupt we just generated, if any */
 409         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 410
 411         /* and put the bits back */
 412         I915_WRITE(PORT_HOTPLUG_EN, orig);
 413
 414         return ret;
 415 }
 416
 417 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 418                                 struct i2c_adapter *i2c)
 419 {
 420         struct edid *edid;
 421
 422         edid = drm_get_edid(connector, i2c);
 423
 424         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 425                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 426                 intel_gmbus_force_bit(i2c, true);
 427                 edid = drm_get_edid(connector, i2c);
 428                 intel_gmbus_force_bit(i2c, false);
 429         }
 430
 431         return edid;
 432 }
 433
 434 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 435 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 436                                 struct i2c_adapter *adapter)
 437 {
 438         struct edid *edid;
 439         int ret;
 440
 441         edid = intel_crt_get_edid(connector, adapter);
 442         if (!edid)
 443                 return 0;
 444
 445         ret = intel_connector_update_modes(connector, edid);
 446         kfree(edid);
 447
 448         return ret;
 449 }
 450
 451 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 452 {
 453         struct intel_crt *crt = intel_attached_crt(connector);
 454         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 455         struct edid *edid;
 456         struct i2c_adapter *i2c;
 457
 458         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 459
 460         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 461         edid = intel_crt_get_edid(connector, i2c);
 462
 463         if (edid) {
 464                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 465
 466                 /*
 467                  * This may be a DVI-I connector with a shared DDC
 468                  * link between analog and digital outputs, so we
 469                  * have to check the EDID input spec of the attached device.
 470                  */
 471                 if (!is_digital) {
 472                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 473                         return true;
 474                 }
 475
 476                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 477         } else {
 478                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 479         }
 480
 481         kfree(edid);
 482
 483         return false;
 484 }
 485
 486 static enum drm_connector_status
 487 intel_crt_load_detect(struct intel_crt *crt)
 488 {
 489         struct drm_device *dev = crt->base.base.dev;
 490         struct drm_i915_private *dev_priv = dev->dev_private;
 491         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 492         uint32_t save_bclrpat;
 493         uint32_t save_vtotal;
 494         uint32_t vtotal, vactive;
 495         uint32_t vsample;
 496         uint32_t vblank, vblank_start, vblank_end;
 497         uint32_t dsl;
 498         uint32_t bclrpat_reg;
 499         uint32_t vtotal_reg;
 500         uint32_t vblank_reg;
 501         uint32_t vsync_reg;
 502         uint32_t pipeconf_reg;
 503         uint32_t pipe_dsl_reg;
 504         uint8_t st00;
 505         enum drm_connector_status status;
 506
 507         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 508
 509         bclrpat_reg = BCLRPAT(pipe);
 510         vtotal_reg = VTOTAL(pipe);
 511         vblank_reg = VBLANK(pipe);
 512         vsync_reg = VSYNC(pipe);
 513         pipeconf_reg = PIPECONF(pipe);
 514         pipe_dsl_reg = PIPEDSL(pipe);
 515
 516         save_bclrpat = I915_READ(bclrpat_reg);
 517         save_vtotal = I915_READ(vtotal_reg);
 518         vblank = I915_READ(vblank_reg);
 519
 520         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 521         vactive = (save_vtotal & 0x7ff) + 1;
 522
 523         vblank_start = (vblank & 0xfff) + 1;
 524         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 525
 526         /* Set the border color to purple. */
 527         I915_WRITE(bclrpat_reg, 0x500050);
 528
 529         if (!IS_GEN2(dev)) {
 530                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 531                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 532                 POSTING_READ(pipeconf_reg);
 533                 /* Wait for next Vblank to substitue
 534                  * border color for Color info */
 535                 intel_wait_for_vblank(dev, pipe);
 536                 st00 = I915_READ8(VGA_MSR_WRITE);
 537                 status = ((st00 & (1 << 4)) != 0) ?
 538                         connector_status_connected :
 539                         connector_status_disconnected;
 540
 541                 I915_WRITE(pipeconf_reg, pipeconf);
 542         } else {
 543                 bool restore_vblank = false;
 544                 int count, detect;
 545
 546                 /*
 547                 * If there isn't any border, add some.
 548                 * Yes, this will flicker
 549                 */
 550                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 551                         uint32_t vsync = I915_READ(vsync_reg);
 552                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 553
 554                         vblank_start = vsync_start;
 555                         I915_WRITE(vblank_reg,
 556                                    (vblank_start - 1) |
 557                                    ((vblank_end - 1) << 16));
 558                         restore_vblank = true;
 559                 }
 560                 /* sample in the vertical border, selecting the larger one */
 561                 if (vblank_start - vactive >= vtotal - vblank_end)
 562                         vsample = (vblank_start + vactive) >> 1;
 563                 else
 564                         vsample = (vtotal + vblank_end) >> 1;
 565
 566                 /*
 567                  * Wait for the border to be displayed
 568                  */
 569                 while (I915_READ(pipe_dsl_reg) >= vactive)
 570                         ;
 571                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 572                         ;
 573                 /*
 574                  * Watch ST00 for an entire scanline
 575                  */
 576                 detect = 0;
 577                 count = 0;
 578                 do {
 579                         count++;
 580                         /* Read the ST00 VGA status register */
 581                         st00 = I915_READ8(VGA_MSR_WRITE);
 582                         if (st00 & (1 << 4))
 583                                 detect++;
 584                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 585
 586                 /* restore vblank if necessary */
 587                 if (restore_vblank)
 588                         I915_WRITE(vblank_reg, vblank);
 589                 /*
 590                  * If more than 3/4 of the scanline detected a monitor,
 591                  * then it is assumed to be present. This works even on i830,
 592                  * where there isn't any way to force the border color across
 593                  * the screen
 594                  */
 595                 status = detect * 4 > count * 3 ?
 596                          connector_status_connected :
 597                          connector_status_disconnected;
 598         }
 599
 600         /* Restore previous settings */
 601         I915_WRITE(bclrpat_reg, save_bclrpat);
 602
 603         return status;
 604 }
 605
 606 static enum drm_connector_status
 607 intel_crt_detect(struct drm_connector *connector, bool force)
 608 {
 609         struct drm_device *dev = connector->dev;
 610         struct intel_crt *crt = intel_attached_crt(connector);
 611         enum drm_connector_status status;
 612         struct intel_load_detect_pipe tmp;
 613
 614         if (I915_HAS_HOTPLUG(dev)) {
 615                 /* We can not rely on the HPD pin always being correctly wired
 616                  * up, for example many KVM do not pass it through, and so
 617                  * only trust an assertion that the monitor is connected.
 618                  */
 619                 if (intel_crt_detect_hotplug(connector)) {
 620                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 621                         return connector_status_connected;
 622                 } else
 623                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 624         }
 625
 626         if (intel_crt_detect_ddc(connector))
 627                 return connector_status_connected;
 628
 629         /* Load detection is broken on HPD capable machines. Whoever wants a
 630          * broken monitor (without edid) to work behind a broken kvm (that fails
 631          * to have the right resistors for HP detection) needs to fix this up.
 632          * For now just bail out. */
 633         if (I915_HAS_HOTPLUG(dev))
 634                 return connector_status_disconnected;
 635
 636         if (!force)
 637                 return connector->status;
 638
 639         /* for pre-945g platforms use load detect */
 640         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 641                 if (intel_crt_detect_ddc(connector))
 642                         status = connector_status_connected;
 643                 else
 644                         status = intel_crt_load_detect(crt);
 645                 intel_release_load_detect_pipe(connector, &tmp);
 646         } else
 647                 status = connector_status_unknown;
 648
 649         return status;
 650 }
 651
 652 static void intel_crt_destroy(struct drm_connector *connector)
 653 {
 654         drm_sysfs_connector_remove(connector);
 655         drm_connector_cleanup(connector);
 656         kfree(connector);
 657 }
 658
 659 static int intel_crt_get_modes(struct drm_connector *connector)
 660 {
 661         struct drm_device *dev = connector->dev;
 662         struct drm_i915_private *dev_priv = dev->dev_private;
 663         int ret;
 664         struct i2c_adapter *i2c;
 665
 666         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 667         ret = intel_crt_ddc_get_modes(connector, i2c);
 668         if (ret || !IS_G4X(dev))
 669                 return ret;
 670
 671         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 672         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 673         return intel_crt_ddc_get_modes(connector, i2c);
 674 }
 675
 676 static int intel_crt_set_property(struct drm_connector *connector,
 677                                   struct drm_property *property,
 678                                   uint64_t value)
 679 {
 680         return 0;
 681 }
 682
 683 static void intel_crt_reset(struct drm_connector *connector)
 684 {
 685         struct drm_device *dev = connector->dev;
 686         struct drm_i915_private *dev_priv = dev->dev_private;
 687         struct intel_crt *crt = intel_attached_crt(connector);
 688
 689         if (HAS_PCH_SPLIT(dev)) {
 690                 u32 adpa;
 691
 692                 adpa = I915_READ(crt->adpa_reg);
 693                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 694                 adpa |= ADPA_HOTPLUG_BITS;
 695                 I915_WRITE(crt->adpa_reg, adpa);
 696                 POSTING_READ(crt->adpa_reg);
 697
 698                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 699                 crt->force_hotplug_required = 1;
 700         }
 701
 702 }
 703
 704 /*
 705  * Routines for controlling stuff on the analog port
 706  */
 707
 708 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 709         .mode_set = intel_crt_mode_set,
 710 };
 711
 712 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 713         .reset = intel_crt_reset,
 714         .dpms = intel_crt_dpms,
 715         .detect = intel_crt_detect,
 716         .fill_modes = drm_helper_probe_single_connector_modes,
 717         .destroy = intel_crt_destroy,
 718         .set_property = intel_crt_set_property,
 719 };
 720
 721 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 722         .mode_valid = intel_crt_mode_valid,
 723         .get_modes = intel_crt_get_modes,
 724         .best_encoder = intel_best_encoder,
 725 };
 726
 727 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 728         .destroy = intel_encoder_destroy,
 729 };
 730
 731 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 732 {
 733         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 734         return 1;
 735 }
 736
 737 static const struct dmi_system_id intel_no_crt[] = {
 738         {
 739                 .callback = intel_no_crt_dmi_callback,
 740                 .ident = "ACER ZGB",
 741                 .matches = {
 742                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 743                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 744                 },
 745         },
 746         { }
 747 };
 748
 749 void intel_crt_init(struct drm_device *dev)
 750 {
 751         struct drm_connector *connector;
 752         struct intel_crt *crt;
 753         struct intel_connector *intel_connector;
 754         struct drm_i915_private *dev_priv = dev->dev_private;
 755
 756         /* Skip machines without VGA that falsely report hotplug events */
 757         if (dmi_check_system(intel_no_crt))
 758                 return;
 759
 760         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 761         if (!crt)
 762                 return;
 763
 764         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 765         if (!intel_connector) {
 766                 kfree(crt);
 767                 return;
 768         }
 769
 770         connector = &intel_connector->base;
 771         crt->connector = intel_connector;
 772         drm_connector_init(dev, &intel_connector->base,
 773                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 774
 775         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 776                          DRM_MODE_ENCODER_DAC);
 777
 778         intel_connector_attach_encoder(intel_connector, &crt->base);
 779
 780         crt->base.type = INTEL_OUTPUT_ANALOG;
 781         crt->base.cloneable = true;
 782         if (IS_I830(dev))
 783                 crt->base.crtc_mask = (1 << 0);
 784         else
 785                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 786
 787         if (IS_GEN2(dev))
 788                 connector->interlace_allowed = 0;
 789         else
 790                 connector->interlace_allowed = 1;
 791         connector->doublescan_allowed = 0;
 792
 793         if (HAS_PCH_SPLIT(dev))
 794                 crt->adpa_reg = PCH_ADPA;
 795         else if (IS_VALLEYVIEW(dev))
 796                 crt->adpa_reg = VLV_ADPA;
 797         else
 798                 crt->adpa_reg = ADPA;
 799
 800         crt->base.compute_config = intel_crt_compute_config;
 801         crt->base.disable = intel_disable_crt;
 802         crt->base.enable = intel_enable_crt;
 803         crt->base.get_config = intel_crt_get_config;
 804         if (I915_HAS_HOTPLUG(dev))
 805                 crt->base.hpd_pin = HPD_CRT;
 806         if (HAS_DDI(dev))
 807                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 808         else
 809                 crt->base.get_hw_state = intel_crt_get_hw_state;
 810         intel_connector->get_hw_state = intel_connector_get_hw_state;
 811
 812         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 813         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 814
 815         drm_sysfs_connector_add(connector);
 816
 817         if (!I915_HAS_HOTPLUG(dev))
 818                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 819
 820         /*
 821          * Configure the automatic hotplug detection stuff
 822          */
 823         crt->force_hotplug_required = 0;
 824
 825         /*
 826          * TODO: find a proper way to discover whether we need to set the the
 827          * polarity and link reversal bits or not, instead of relying on the
 828          * BIOS.
 829          */
 830         if (HAS_PCH_LPT(dev)) {
 831                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 832                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 833
 834                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 835         }
 836 }