Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/i915_gpu_error.c

   1 /*
   2  * Copyright (c) 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *    Mika Kuoppala <mika.kuoppala@intel.com>
  27  *
  28  */
  29
  30 #include <generated/utsrelease.h>
  31 #include "i915_drv.h"
  32
  33 static const char *yesno(int v)
  34 {
  35         return v ? "yes" : "no";
  36 }
  37
  38 static const char *ring_str(int ring)
  39 {
  40         switch (ring) {
  41         case RCS: return "render";
  42         case VCS: return "bsd";
  43         case BCS: return "blt";
  44         case VECS: return "vebox";
  45         default: return "";
  46         }
  47 }
  48
  49 static const char *pin_flag(int pinned)
  50 {
  51         if (pinned > 0)
  52                 return " P";
  53         else if (pinned < 0)
  54                 return " p";
  55         else
  56                 return "";
  57 }
  58
  59 static const char *tiling_flag(int tiling)
  60 {
  61         switch (tiling) {
  62         default:
  63         case I915_TILING_NONE: return "";
  64         case I915_TILING_X: return " X";
  65         case I915_TILING_Y: return " Y";
  66         }
  67 }
  68
  69 static const char *dirty_flag(int dirty)
  70 {
  71         return dirty ? " dirty" : "";
  72 }
  73
  74 static const char *purgeable_flag(int purgeable)
  75 {
  76         return purgeable ? " purgeable" : "";
  77 }
  78
  79 static bool __i915_error_ok(struct drm_i915_error_state_buf *e)
  80 {
  81
  82         if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
  83                 e->err = -ENOSPC;
  84                 return false;
  85         }
  86
  87         if (e->bytes == e->size - 1 || e->err)
  88                 return false;
  89
  90         return true;
  91 }
  92
  93 static bool __i915_error_seek(struct drm_i915_error_state_buf *e,
  94                               unsigned len)
  95 {
  96         if (e->pos + len <= e->start) {
  97                 e->pos += len;
  98                 return false;
  99         }
 100
 101         /* First vsnprintf needs to fit in its entirety for memmove */
 102         if (len >= e->size) {
 103                 e->err = -EIO;
 104                 return false;
 105         }
 106
 107         return true;
 108 }
 109
 110 static void __i915_error_advance(struct drm_i915_error_state_buf *e,
 111                                  unsigned len)
 112 {
 113         /* If this is first printf in this window, adjust it so that
 114          * start position matches start of the buffer
 115          */
 116
 117         if (e->pos < e->start) {
 118                 const size_t off = e->start - e->pos;
 119
 120                 /* Should not happen but be paranoid */
 121                 if (off > len || e->bytes) {
 122                         e->err = -EIO;
 123                         return;
 124                 }
 125
 126                 memmove(e->buf, e->buf + off, len - off);
 127                 e->bytes = len - off;
 128                 e->pos = e->start;
 129                 return;
 130         }
 131
 132         e->bytes += len;
 133         e->pos += len;
 134 }
 135
 136 static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
 137                                const char *f, va_list args)
 138 {
 139         unsigned len;
 140
 141         if (!__i915_error_ok(e))
 142                 return;
 143
 144         /* Seek the first printf which is hits start position */
 145         if (e->pos < e->start) {
 146                 va_list tmp;
 147
 148                 va_copy(tmp, args);
 149                 len = vsnprintf(NULL, 0, f, tmp);
 150                 va_end(tmp);
 151
 152                 if (!__i915_error_seek(e, len))
 153                         return;
 154         }
 155
 156         len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
 157         if (len >= e->size - e->bytes)
 158                 len = e->size - e->bytes - 1;
 159
 160         __i915_error_advance(e, len);
 161 }
 162
 163 static void i915_error_puts(struct drm_i915_error_state_buf *e,
 164                             const char *str)
 165 {
 166         unsigned len;
 167
 168         if (!__i915_error_ok(e))
 169                 return;
 170
 171         len = strlen(str);
 172
 173         /* Seek the first printf which is hits start position */
 174         if (e->pos < e->start) {
 175                 if (!__i915_error_seek(e, len))
 176                         return;
 177         }
 178
 179         if (len >= e->size - e->bytes)
 180                 len = e->size - e->bytes - 1;
 181         memcpy(e->buf + e->bytes, str, len);
 182
 183         __i915_error_advance(e, len);
 184 }
 185
 186 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 187 #define err_puts(e, s) i915_error_puts(e, s)
 188
 189 static void print_error_buffers(struct drm_i915_error_state_buf *m,
 190                                 const char *name,
 191                                 struct drm_i915_error_buffer *err,
 192                                 int count)
 193 {
 194         err_printf(m, "%s [%d]:\n", name, count);
 195
 196         while (count--) {
 197                 err_printf(m, "  %08x %8u %02x %02x %x %x",
 198                            err->gtt_offset,
 199                            err->size,
 200                            err->read_domains,
 201                            err->write_domain,
 202                            err->rseqno, err->wseqno);
 203                 err_puts(m, pin_flag(err->pinned));
 204                 err_puts(m, tiling_flag(err->tiling));
 205                 err_puts(m, dirty_flag(err->dirty));
 206                 err_puts(m, purgeable_flag(err->purgeable));
 207                 err_puts(m, err->ring != -1 ? " " : "");
 208                 err_puts(m, ring_str(err->ring));
 209                 err_puts(m, i915_cache_level_str(err->cache_level));
 210
 211                 if (err->name)
 212                         err_printf(m, " (name: %d)", err->name);
 213                 if (err->fence_reg != I915_FENCE_REG_NONE)
 214                         err_printf(m, " (fence: %d)", err->fence_reg);
 215
 216                 err_puts(m, "\n");
 217                 err++;
 218         }
 219 }
 220
 221 static const char *hangcheck_action_to_str(enum intel_ring_hangcheck_action a)
 222 {
 223         switch (a) {
 224         case HANGCHECK_IDLE:
 225                 return "idle";
 226         case HANGCHECK_WAIT:
 227                 return "wait";
 228         case HANGCHECK_ACTIVE:
 229                 return "active";
 230         case HANGCHECK_KICK:
 231                 return "kick";
 232         case HANGCHECK_HUNG:
 233                 return "hung";
 234         }
 235
 236         return "unknown";
 237 }
 238
 239 static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
 240                                   struct drm_device *dev,
 241                                   struct drm_i915_error_state *error,
 242                                   unsigned ring)
 243 {
 244         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 245         if (!error->ring[ring].valid)
 246                 return;
 247
 248         err_printf(m, "%s command stream:\n", ring_str(ring));
 249         err_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 250         err_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 251         err_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
 252         err_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 253         err_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 254         err_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 255         err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 256         if (INTEL_INFO(dev)->gen >= 4) {
 257                 err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr[ring]);
 258                 err_printf(m, "  BB_STATE: 0x%08x\n", error->bbstate[ring]);
 259                 err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 260         }
 261         err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 262         err_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 263         if (INTEL_INFO(dev)->gen >= 6) {
 264                 err_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 265                 err_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 266                 err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
 267                            error->semaphore_mboxes[ring][0],
 268                            error->semaphore_seqno[ring][0]);
 269                 err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
 270                            error->semaphore_mboxes[ring][1],
 271                            error->semaphore_seqno[ring][1]);
 272                 if (HAS_VEBOX(dev)) {
 273                         err_printf(m, "  SYNC_2: 0x%08x [last synced 0x%08x]\n",
 274                                    error->semaphore_mboxes[ring][2],
 275                                    error->semaphore_seqno[ring][2]);
 276                 }
 277         }
 278         err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 279         err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 280         err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 281         err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 282         err_printf(m, "  hangcheck: %s [%d]\n",
 283                    hangcheck_action_to_str(error->hangcheck_action[ring]),
 284                    error->hangcheck_score[ring]);
 285 }
 286
 287 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
 288 {
 289         va_list args;
 290
 291         va_start(args, f);
 292         i915_error_vprintf(e, f, args);
 293         va_end(args);
 294 }
 295
 296 int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 297                             const struct i915_error_state_file_priv *error_priv)
 298 {
 299         struct drm_device *dev = error_priv->dev;
 300         drm_i915_private_t *dev_priv = dev->dev_private;
 301         struct drm_i915_error_state *error = error_priv->error;
 302         int i, j, page, offset, elt;
 303
 304         if (!error) {
 305                 err_printf(m, "no error state collected\n");
 306                 goto out;
 307         }
 308
 309         err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 310                    error->time.tv_usec);
 311         err_printf(m, "Kernel: " UTS_RELEASE "\n");
 312         err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
 313         err_printf(m, "EIR: 0x%08x\n", error->eir);
 314         err_printf(m, "IER: 0x%08x\n", error->ier);
 315         err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 316         err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
 317         err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
 318         err_printf(m, "CCID: 0x%08x\n", error->ccid);
 319         err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings);
 320
 321         for (i = 0; i < dev_priv->num_fence_regs; i++)
 322                 err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 323
 324         for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
 325                 err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
 326                            error->extra_instdone[i]);
 327
 328         if (INTEL_INFO(dev)->gen >= 6) {
 329                 err_printf(m, "ERROR: 0x%08x\n", error->error);
 330                 err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 331         }
 332
 333         if (INTEL_INFO(dev)->gen == 7)
 334                 err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
 335
 336         for (i = 0; i < ARRAY_SIZE(error->ring); i++)
 337                 i915_ring_error_state(m, dev, error, i);
 338
 339         if (error->active_bo)
 340                 print_error_buffers(m, "Active",
 341                                     error->active_bo[0],
 342                                     error->active_bo_count[0]);
 343
 344         if (error->pinned_bo)
 345                 print_error_buffers(m, "Pinned",
 346                                     error->pinned_bo[0],
 347                                     error->pinned_bo_count[0]);
 348
 349         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 350                 struct drm_i915_error_object *obj;
 351
 352                 if ((obj = error->ring[i].batchbuffer)) {
 353                         err_printf(m, "%s --- gtt_offset = 0x%08x\n",
 354                                    dev_priv->ring[i].name,
 355                                    obj->gtt_offset);
 356                         offset = 0;
 357                         for (page = 0; page < obj->page_count; page++) {
 358                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 359                                         err_printf(m, "%08x :  %08x\n", offset,
 360                                                    obj->pages[page][elt]);
 361                                         offset += 4;
 362                                 }
 363                         }
 364                 }
 365
 366                 if (error->ring[i].num_requests) {
 367                         err_printf(m, "%s --- %d requests\n",
 368                                    dev_priv->ring[i].name,
 369                                    error->ring[i].num_requests);
 370                         for (j = 0; j < error->ring[i].num_requests; j++) {
 371                                 err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 372                                            error->ring[i].requests[j].seqno,
 373                                            error->ring[i].requests[j].jiffies,
 374                                            error->ring[i].requests[j].tail);
 375                         }
 376                 }
 377
 378                 if ((obj = error->ring[i].ringbuffer)) {
 379                         err_printf(m, "%s --- ringbuffer = 0x%08x\n",
 380                                    dev_priv->ring[i].name,
 381                                    obj->gtt_offset);
 382                         offset = 0;
 383                         for (page = 0; page < obj->page_count; page++) {
 384                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 385                                         err_printf(m, "%08x :  %08x\n",
 386                                                    offset,
 387                                                    obj->pages[page][elt]);
 388                                         offset += 4;
 389                                 }
 390                         }
 391                 }
 392
 393                 if ((obj = error->ring[i].ctx)) {
 394                         err_printf(m, "%s --- HW Context = 0x%08x\n",
 395                                    dev_priv->ring[i].name,
 396                                    obj->gtt_offset);
 397                         offset = 0;
 398                         for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
 399                                 err_printf(m, "[%04x] %08x %08x %08x %08x\n",
 400                                            offset,
 401                                            obj->pages[0][elt],
 402                                            obj->pages[0][elt+1],
 403                                            obj->pages[0][elt+2],
 404                                            obj->pages[0][elt+3]);
 405                                         offset += 16;
 406                         }
 407                 }
 408         }
 409
 410         if (error->overlay)
 411                 intel_overlay_print_error_state(m, error->overlay);
 412
 413         if (error->display)
 414                 intel_display_print_error_state(m, dev, error->display);
 415
 416 out:
 417         if (m->bytes == 0 && m->err)
 418                 return m->err;
 419
 420         return 0;
 421 }
 422
 423 int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf,
 424                               size_t count, loff_t pos)
 425 {
 426         memset(ebuf, 0, sizeof(*ebuf));
 427
 428         /* We need to have enough room to store any i915_error_state printf
 429          * so that we can move it to start position.
 430          */
 431         ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
 432         ebuf->buf = kmalloc(ebuf->size,
 433                                 GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
 434
 435         if (ebuf->buf == NULL) {
 436                 ebuf->size = PAGE_SIZE;
 437                 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
 438         }
 439
 440         if (ebuf->buf == NULL) {
 441                 ebuf->size = 128;
 442                 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
 443         }
 444
 445         if (ebuf->buf == NULL)
 446                 return -ENOMEM;
 447
 448         ebuf->start = pos;
 449
 450         return 0;
 451 }
 452
 453 static void i915_error_object_free(struct drm_i915_error_object *obj)
 454 {
 455         int page;
 456
 457         if (obj == NULL)
 458                 return;
 459
 460         for (page = 0; page < obj->page_count; page++)
 461                 kfree(obj->pages[page]);
 462
 463         kfree(obj);
 464 }
 465
 466 static void i915_error_state_free(struct kref *error_ref)
 467 {
 468         struct drm_i915_error_state *error = container_of(error_ref,
 469                                                           typeof(*error), ref);
 470         int i;
 471
 472         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 473                 i915_error_object_free(error->ring[i].batchbuffer);
 474                 i915_error_object_free(error->ring[i].ringbuffer);
 475                 i915_error_object_free(error->ring[i].ctx);
 476                 kfree(error->ring[i].requests);
 477         }
 478
 479         kfree(error->active_bo);
 480         kfree(error->overlay);
 481         kfree(error->display);
 482         kfree(error);
 483 }
 484
 485 static struct drm_i915_error_object *
 486 i915_error_object_create_sized(struct drm_i915_private *dev_priv,
 487                                struct drm_i915_gem_object *src,
 488                                const int num_pages)
 489 {
 490         struct drm_i915_error_object *dst;
 491         int i;
 492         u32 reloc_offset;
 493
 494         if (src == NULL || src->pages == NULL)
 495                 return NULL;
 496
 497         dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC);
 498         if (dst == NULL)
 499                 return NULL;
 500
 501         reloc_offset = dst->gtt_offset = i915_gem_obj_ggtt_offset(src);
 502         for (i = 0; i < num_pages; i++) {
 503                 unsigned long flags;
 504                 void *d;
 505
 506                 d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
 507                 if (d == NULL)
 508                         goto unwind;
 509
 510                 local_irq_save(flags);
 511                 if (reloc_offset < dev_priv->gtt.mappable_end &&
 512                     src->has_global_gtt_mapping) {
 513                         void __iomem *s;
 514
 515                         /* Simply ignore tiling or any overlapping fence.
 516                          * It's part of the error state, and this hopefully
 517                          * captures what the GPU read.
 518                          */
 519
 520                         s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 521                                                      reloc_offset);
 522                         memcpy_fromio(d, s, PAGE_SIZE);
 523                         io_mapping_unmap_atomic(s);
 524                 } else if (src->stolen) {
 525                         unsigned long offset;
 526
 527                         offset = dev_priv->mm.stolen_base;
 528                         offset += src->stolen->start;
 529                         offset += i << PAGE_SHIFT;
 530
 531                         memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE);
 532                 } else {
 533                         struct page *page;
 534                         void *s;
 535
 536                         page = i915_gem_object_get_page(src, i);
 537
 538                         drm_clflush_pages(&page, 1);
 539
 540                         s = kmap_atomic(page);
 541                         memcpy(d, s, PAGE_SIZE);
 542                         kunmap_atomic(s);
 543
 544                         drm_clflush_pages(&page, 1);
 545                 }
 546                 local_irq_restore(flags);
 547
 548                 dst->pages[i] = d;
 549
 550                 reloc_offset += PAGE_SIZE;
 551         }
 552         dst->page_count = num_pages;
 553
 554         return dst;
 555
 556 unwind:
 557         while (i--)
 558                 kfree(dst->pages[i]);
 559         kfree(dst);
 560         return NULL;
 561 }
 562 #define i915_error_object_create(dev_priv, src) \
 563         i915_error_object_create_sized((dev_priv), (src), \
 564                                        (src)->base.size>>PAGE_SHIFT)
 565
 566 static void capture_bo(struct drm_i915_error_buffer *err,
 567                        struct drm_i915_gem_object *obj)
 568 {
 569         err->size = obj->base.size;
 570         err->name = obj->base.name;
 571         err->rseqno = obj->last_read_seqno;
 572         err->wseqno = obj->last_write_seqno;
 573         err->gtt_offset = i915_gem_obj_ggtt_offset(obj);
 574         err->read_domains = obj->base.read_domains;
 575         err->write_domain = obj->base.write_domain;
 576         err->fence_reg = obj->fence_reg;
 577         err->pinned = 0;
 578         if (obj->pin_count > 0)
 579                 err->pinned = 1;
 580         if (obj->user_pin_count > 0)
 581                 err->pinned = -1;
 582         err->tiling = obj->tiling_mode;
 583         err->dirty = obj->dirty;
 584         err->purgeable = obj->madv != I915_MADV_WILLNEED;
 585         err->ring = obj->ring ? obj->ring->id : -1;
 586         err->cache_level = obj->cache_level;
 587 }
 588
 589 static u32 capture_active_bo(struct drm_i915_error_buffer *err,
 590                              int count, struct list_head *head)
 591 {
 592         struct i915_vma *vma;
 593         int i = 0;
 594
 595         list_for_each_entry(vma, head, mm_list) {
 596                 capture_bo(err++, vma->obj);
 597                 if (++i == count)
 598                         break;
 599         }
 600
 601         return i;
 602 }
 603
 604 static u32 capture_pinned_bo(struct drm_i915_error_buffer *err,
 605                              int count, struct list_head *head)
 606 {
 607         struct drm_i915_gem_object *obj;
 608         int i = 0;
 609
 610         list_for_each_entry(obj, head, global_list) {
 611                 if (obj->pin_count == 0)
 612                         continue;
 613
 614                 capture_bo(err++, obj);
 615                 if (++i == count)
 616                         break;
 617         }
 618
 619         return i;
 620 }
 621
 622 static void i915_gem_record_fences(struct drm_device *dev,
 623                                    struct drm_i915_error_state *error)
 624 {
 625         struct drm_i915_private *dev_priv = dev->dev_private;
 626         int i;
 627
 628         /* Fences */
 629         switch (INTEL_INFO(dev)->gen) {
 630         case 8:
 631         case 7:
 632         case 6:
 633                 for (i = 0; i < dev_priv->num_fence_regs; i++)
 634                         error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8));
 635                 break;
 636         case 5:
 637         case 4:
 638                 for (i = 0; i < 16; i++)
 639                         error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
 640                 break;
 641         case 3:
 642                 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
 643                         for (i = 0; i < 8; i++)
 644                                 error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
 645         case 2:
 646                 for (i = 0; i < 8; i++)
 647                         error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
 648                 break;
 649
 650         default:
 651                 BUG();
 652         }
 653 }
 654
 655 static struct drm_i915_error_object *
 656 i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
 657                              struct intel_ring_buffer *ring)
 658 {
 659         struct i915_address_space *vm;
 660         struct i915_vma *vma;
 661         struct drm_i915_gem_object *obj;
 662         u32 seqno;
 663
 664         if (!ring->get_seqno)
 665                 return NULL;
 666
 667         if (HAS_BROKEN_CS_TLB(dev_priv->dev)) {
 668                 u32 acthd = I915_READ(ACTHD);
 669
 670                 if (WARN_ON(ring->id != RCS))
 671                         return NULL;
 672
 673                 obj = ring->scratch.obj;
 674                 if (obj != NULL &&
 675                     acthd >= i915_gem_obj_ggtt_offset(obj) &&
 676                     acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size)
 677                         return i915_error_object_create(dev_priv, obj);
 678         }
 679
 680         seqno = ring->get_seqno(ring, false);
 681         list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
 682                 list_for_each_entry(vma, &vm->active_list, mm_list) {
 683                         obj = vma->obj;
 684                         if (obj->ring != ring)
 685                                 continue;
 686
 687                         if (i915_seqno_passed(seqno, obj->last_read_seqno))
 688                                 continue;
 689
 690                         if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0)
 691                                 continue;
 692
 693                         /* We need to copy these to an anonymous buffer as the simplest
 694                          * method to avoid being overwritten by userspace.
 695                          */
 696                         return i915_error_object_create(dev_priv, obj);
 697                 }
 698         }
 699
 700         return NULL;
 701 }
 702
 703 static void i915_record_ring_state(struct drm_device *dev,
 704                                    struct drm_i915_error_state *error,
 705                                    struct intel_ring_buffer *ring)
 706 {
 707         struct drm_i915_private *dev_priv = dev->dev_private;
 708
 709         if (INTEL_INFO(dev)->gen >= 6) {
 710                 error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50);
 711                 error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring));
 712                 error->semaphore_mboxes[ring->id][0]
 713                         = I915_READ(RING_SYNC_0(ring->mmio_base));
 714                 error->semaphore_mboxes[ring->id][1]
 715                         = I915_READ(RING_SYNC_1(ring->mmio_base));
 716                 error->semaphore_seqno[ring->id][0] = ring->sync_seqno[0];
 717                 error->semaphore_seqno[ring->id][1] = ring->sync_seqno[1];
 718         }
 719
 720         if (HAS_VEBOX(dev)) {
 721                 error->semaphore_mboxes[ring->id][2] =
 722                         I915_READ(RING_SYNC_2(ring->mmio_base));
 723                 error->semaphore_seqno[ring->id][2] = ring->sync_seqno[2];
 724         }
 725
 726         if (INTEL_INFO(dev)->gen >= 4) {
 727                 error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base));
 728                 error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base));
 729                 error->ipehr[ring->id] = I915_READ(RING_IPEHR(ring->mmio_base));
 730                 error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base));
 731                 error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base));
 732                 error->bbaddr[ring->id] = I915_READ(RING_BBADDR(ring->mmio_base));
 733                 if (INTEL_INFO(dev)->gen >= 8)
 734                         error->bbaddr[ring->id] |= (u64) I915_READ(RING_BBADDR_UDW(ring->mmio_base)) << 32;
 735                 error->bbstate[ring->id] = I915_READ(RING_BBSTATE(ring->mmio_base));
 736         } else {
 737                 error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX);
 738                 error->ipeir[ring->id] = I915_READ(IPEIR);
 739                 error->ipehr[ring->id] = I915_READ(IPEHR);
 740                 error->instdone[ring->id] = I915_READ(INSTDONE);
 741         }
 742
 743         error->waiting[ring->id] = waitqueue_active(&ring->irq_queue);
 744         error->instpm[ring->id] = I915_READ(RING_INSTPM(ring->mmio_base));
 745         error->seqno[ring->id] = ring->get_seqno(ring, false);
 746         error->acthd[ring->id] = intel_ring_get_active_head(ring);
 747         error->head[ring->id] = I915_READ_HEAD(ring);
 748         error->tail[ring->id] = I915_READ_TAIL(ring);
 749         error->ctl[ring->id] = I915_READ_CTL(ring);
 750
 751         error->cpu_ring_head[ring->id] = ring->head;
 752         error->cpu_ring_tail[ring->id] = ring->tail;
 753
 754         error->hangcheck_score[ring->id] = ring->hangcheck.score;
 755         error->hangcheck_action[ring->id] = ring->hangcheck.action;
 756 }
 757
 758
 759 static void i915_gem_record_active_context(struct intel_ring_buffer *ring,
 760                                            struct drm_i915_error_state *error,
 761                                            struct drm_i915_error_ring *ering)
 762 {
 763         struct drm_i915_private *dev_priv = ring->dev->dev_private;
 764         struct drm_i915_gem_object *obj;
 765
 766         /* Currently render ring is the only HW context user */
 767         if (ring->id != RCS || !error->ccid)
 768                 return;
 769
 770         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 771                 if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) {
 772                         ering->ctx = i915_error_object_create_sized(dev_priv,
 773                                                                     obj, 1);
 774                         break;
 775                 }
 776         }
 777 }
 778
 779 static void i915_gem_record_rings(struct drm_device *dev,
 780                                   struct drm_i915_error_state *error)
 781 {
 782         struct drm_i915_private *dev_priv = dev->dev_private;
 783         struct drm_i915_gem_request *request;
 784         int i, count;
 785
 786         for (i = 0; i < I915_NUM_RINGS; i++) {
 787                 struct intel_ring_buffer *ring = &dev_priv->ring[i];
 788
 789                 if (ring->dev == NULL)
 790                         continue;
 791
 792                 error->ring[i].valid = true;
 793
 794                 i915_record_ring_state(dev, error, ring);
 795
 796                 error->ring[i].batchbuffer =
 797                         i915_error_first_batchbuffer(dev_priv, ring);
 798
 799                 error->ring[i].ringbuffer =
 800                         i915_error_object_create(dev_priv, ring->obj);
 801
 802
 803                 i915_gem_record_active_context(ring, error, &error->ring[i]);
 804
 805                 count = 0;
 806                 list_for_each_entry(request, &ring->request_list, list)
 807                         count++;
 808
 809                 error->ring[i].num_requests = count;
 810                 error->ring[i].requests =
 811                         kcalloc(count, sizeof(*error->ring[i].requests),
 812                                 GFP_ATOMIC);
 813                 if (error->ring[i].requests == NULL) {
 814                         error->ring[i].num_requests = 0;
 815                         continue;
 816                 }
 817
 818                 count = 0;
 819                 list_for_each_entry(request, &ring->request_list, list) {
 820                         struct drm_i915_error_request *erq;
 821
 822                         erq = &error->ring[i].requests[count++];
 823                         erq->seqno = request->seqno;
 824                         erq->jiffies = request->emitted_jiffies;
 825                         erq->tail = request->tail;
 826                 }
 827         }
 828 }
 829
 830 /* FIXME: Since pin count/bound list is global, we duplicate what we capture per
 831  * VM.
 832  */
 833 static void i915_gem_capture_vm(struct drm_i915_private *dev_priv,
 834                                 struct drm_i915_error_state *error,
 835                                 struct i915_address_space *vm,
 836                                 const int ndx)
 837 {
 838         struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL;
 839         struct drm_i915_gem_object *obj;
 840         struct i915_vma *vma;
 841         int i;
 842
 843         i = 0;
 844         list_for_each_entry(vma, &vm->active_list, mm_list)
 845                 i++;
 846         error->active_bo_count[ndx] = i;
 847         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
 848                 if (obj->pin_count)
 849                         i++;
 850         error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx];
 851
 852         if (i) {
 853                 active_bo = kcalloc(i, sizeof(*active_bo), GFP_ATOMIC);
 854                 if (active_bo)
 855                         pinned_bo = active_bo + error->active_bo_count[ndx];
 856         }
 857
 858         if (active_bo)
 859                 error->active_bo_count[ndx] =
 860                         capture_active_bo(active_bo,
 861                                           error->active_bo_count[ndx],
 862                                           &vm->active_list);
 863
 864         if (pinned_bo)
 865                 error->pinned_bo_count[ndx] =
 866                         capture_pinned_bo(pinned_bo,
 867                                           error->pinned_bo_count[ndx],
 868                                           &dev_priv->mm.bound_list);
 869         error->active_bo[ndx] = active_bo;
 870         error->pinned_bo[ndx] = pinned_bo;
 871 }
 872
 873 static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
 874                                      struct drm_i915_error_state *error)
 875 {
 876         struct i915_address_space *vm;
 877         int cnt = 0, i = 0;
 878
 879         list_for_each_entry(vm, &dev_priv->vm_list, global_link)
 880                 cnt++;
 881
 882         if (WARN(cnt > 1, "Multiple VMs not yet supported\n"))
 883                 cnt = 1;
 884
 885         vm = &dev_priv->gtt.base;
 886
 887         error->active_bo = kcalloc(cnt, sizeof(*error->active_bo), GFP_ATOMIC);
 888         error->pinned_bo = kcalloc(cnt, sizeof(*error->pinned_bo), GFP_ATOMIC);
 889         error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count),
 890                                          GFP_ATOMIC);
 891         error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count),
 892                                          GFP_ATOMIC);
 893
 894         list_for_each_entry(vm, &dev_priv->vm_list, global_link)
 895                 i915_gem_capture_vm(dev_priv, error, vm, i++);
 896 }
 897
 898 /**
 899  * i915_capture_error_state - capture an error record for later analysis
 900  * @dev: drm device
 901  *
 902  * Should be called when an error is detected (either a hang or an error
 903  * interrupt) to capture error state from the time of the error.  Fills
 904  * out a structure which becomes available in debugfs for user level tools
 905  * to pick up.
 906  */
 907 void i915_capture_error_state(struct drm_device *dev)
 908 {
 909         struct drm_i915_private *dev_priv = dev->dev_private;
 910         struct drm_i915_error_state *error;
 911         unsigned long flags;
 912         int pipe;
 913
 914         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
 915         error = dev_priv->gpu_error.first_error;
 916         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
 917         if (error)
 918                 return;
 919
 920         /* Account for pipe specific data like PIPE*STAT */
 921         error = kzalloc(sizeof(*error), GFP_ATOMIC);
 922         if (!error) {
 923                 DRM_DEBUG_DRIVER("out of memory, not capturing error state\n");
 924                 return;
 925         }
 926
 927         DRM_INFO("GPU crash dump saved to /sys/class/drm/card%d/error\n",
 928                  dev->primary->index);
 929         DRM_INFO("GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.\n");
 930         DRM_INFO("Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel\n");
 931         DRM_INFO("drm/i915 developers can then reassign to the right component if it's not a kernel issue.\n");
 932         DRM_INFO("The gpu crash dump is required to analyze gpu hangs, so please always attach it.\n");
 933
 934         kref_init(&error->ref);
 935         error->eir = I915_READ(EIR);
 936         error->pgtbl_er = I915_READ(PGTBL_ER);
 937         if (HAS_HW_CONTEXTS(dev))
 938                 error->ccid = I915_READ(CCID);
 939
 940         if (HAS_PCH_SPLIT(dev))
 941                 error->ier = I915_READ(DEIER) | I915_READ(GTIER);
 942         else if (IS_VALLEYVIEW(dev))
 943                 error->ier = I915_READ(GTIER) | I915_READ(VLV_IER);
 944         else if (IS_GEN2(dev))
 945                 error->ier = I915_READ16(IER);
 946         else
 947                 error->ier = I915_READ(IER);
 948
 949         if (INTEL_INFO(dev)->gen >= 6)
 950                 error->derrmr = I915_READ(DERRMR);
 951
 952         if (IS_VALLEYVIEW(dev))
 953                 error->forcewake = I915_READ(FORCEWAKE_VLV);
 954         else if (INTEL_INFO(dev)->gen >= 7)
 955                 error->forcewake = I915_READ(FORCEWAKE_MT);
 956         else if (INTEL_INFO(dev)->gen == 6)
 957                 error->forcewake = I915_READ(FORCEWAKE);
 958
 959         if (!HAS_PCH_SPLIT(dev))
 960                 for_each_pipe(pipe)
 961                         error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
 962
 963         if (INTEL_INFO(dev)->gen >= 6) {
 964                 error->error = I915_READ(ERROR_GEN6);
 965                 error->done_reg = I915_READ(DONE_REG);
 966         }
 967
 968         if (INTEL_INFO(dev)->gen == 7)
 969                 error->err_int = I915_READ(GEN7_ERR_INT);
 970
 971         i915_get_extra_instdone(dev, error->extra_instdone);
 972
 973         i915_gem_capture_buffers(dev_priv, error);
 974         i915_gem_record_fences(dev, error);
 975         i915_gem_record_rings(dev, error);
 976
 977         do_gettimeofday(&error->time);
 978
 979         error->overlay = intel_overlay_capture_error_state(dev);
 980         error->display = intel_display_capture_error_state(dev);
 981
 982         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
 983         if (dev_priv->gpu_error.first_error == NULL) {
 984                 dev_priv->gpu_error.first_error = error;
 985                 error = NULL;
 986         }
 987         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
 988
 989         if (error)
 990                 i915_error_state_free(&error->ref);
 991 }
 992
 993 void i915_error_state_get(struct drm_device *dev,
 994                           struct i915_error_state_file_priv *error_priv)
 995 {
 996         struct drm_i915_private *dev_priv = dev->dev_private;
 997         unsigned long flags;
 998
 999         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1000         error_priv->error = dev_priv->gpu_error.first_error;
1001         if (error_priv->error)
1002                 kref_get(&error_priv->error->ref);
1003         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1004
1005 }
1006
1007 void i915_error_state_put(struct i915_error_state_file_priv *error_priv)
1008 {
1009         if (error_priv->error)
1010                 kref_put(&error_priv->error->ref, i915_error_state_free);
1011 }
1012
1013 void i915_destroy_error_state(struct drm_device *dev)
1014 {
1015         struct drm_i915_private *dev_priv = dev->dev_private;
1016         struct drm_i915_error_state *error;
1017         unsigned long flags;
1018
1019         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
1020         error = dev_priv->gpu_error.first_error;
1021         dev_priv->gpu_error.first_error = NULL;
1022         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
1023
1024         if (error)
1025                 kref_put(&error->ref, i915_error_state_free);
1026 }
1027
1028 const char *i915_cache_level_str(int type)
1029 {
1030         switch (type) {
1031         case I915_CACHE_NONE: return " uncached";
1032         case I915_CACHE_LLC: return " snooped or LLC";
1033         case I915_CACHE_L3_LLC: return " L3+LLC";
1034         case I915_CACHE_WT: return " WT";
1035         default: return "";
1036         }
1037 }
1038
1039 /* NB: please notice the memset */
1040 void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
1041 {
1042         struct drm_i915_private *dev_priv = dev->dev_private;
1043         memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG);
1044
1045         switch (INTEL_INFO(dev)->gen) {
1046         case 2:
1047         case 3:
1048                 instdone[0] = I915_READ(INSTDONE);
1049                 break;
1050         case 4:
1051         case 5:
1052         case 6:
1053                 instdone[0] = I915_READ(INSTDONE_I965);
1054                 instdone[1] = I915_READ(INSTDONE1);
1055                 break;
1056         default:
1057                 WARN_ONCE(1, "Unsupported platform\n");
1058         case 7:
1059         case 8:
1060                 instdone[0] = I915_READ(GEN7_INSTDONE_1);
1061                 instdone[1] = I915_READ(GEN7_SC_INSTDONE);
1062                 instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE);
1063                 instdone[3] = I915_READ(GEN7_ROW_INSTDONE);
1064                 break;
1065         }
1066 }