Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/i915_gem_execbuffer.c

   1 /*
   2  * Copyright © 2008,2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Chris Wilson <chris@chris-wilson.co.uk>
  26  *
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/i915_drm.h>
  31 #include "i915_drv.h"
  32 #include "i915_trace.h"
  33 #include "intel_drv.h"
  34 #include <linux/dma_remapping.h>
  35
  36 struct eb_vmas {
  37         struct list_head vmas;
  38         int and;
  39         union {
  40                 struct i915_vma *lut[0];
  41                 struct hlist_head buckets[0];
  42         };
  43 };
  44
  45 static struct eb_vmas *
  46 eb_create(struct drm_i915_gem_execbuffer2 *args, struct i915_address_space *vm)
  47 {
  48         struct eb_vmas *eb = NULL;
  49
  50         if (args->flags & I915_EXEC_HANDLE_LUT) {
  51                 unsigned size = args->buffer_count;
  52                 size *= sizeof(struct i915_vma *);
  53                 size += sizeof(struct eb_vmas);
  54                 eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
  55         }
  56
  57         if (eb == NULL) {
  58                 unsigned size = args->buffer_count;
  59                 unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
  60                 BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
  61                 while (count > 2*size)
  62                         count >>= 1;
  63                 eb = kzalloc(count*sizeof(struct hlist_head) +
  64                              sizeof(struct eb_vmas),
  65                              GFP_TEMPORARY);
  66                 if (eb == NULL)
  67                         return eb;
  68
  69                 eb->and = count - 1;
  70         } else
  71                 eb->and = -args->buffer_count;
  72
  73         INIT_LIST_HEAD(&eb->vmas);
  74         return eb;
  75 }
  76
  77 static void
  78 eb_reset(struct eb_vmas *eb)
  79 {
  80         if (eb->and >= 0)
  81                 memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
  82 }
  83
  84 static int
  85 eb_lookup_vmas(struct eb_vmas *eb,
  86                struct drm_i915_gem_exec_object2 *exec,
  87                const struct drm_i915_gem_execbuffer2 *args,
  88                struct i915_address_space *vm,
  89                struct drm_file *file)
  90 {
  91         struct drm_i915_gem_object *obj;
  92         struct list_head objects;
  93         int i, ret = 0;
  94
  95         INIT_LIST_HEAD(&objects);
  96         spin_lock(&file->table_lock);
  97         /* Grab a reference to the object and release the lock so we can lookup
  98          * or create the VMA without using GFP_ATOMIC */
  99         for (i = 0; i < args->buffer_count; i++) {
 100                 obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
 101                 if (obj == NULL) {
 102                         spin_unlock(&file->table_lock);
 103                         DRM_DEBUG("Invalid object handle %d at index %d\n",
 104                                    exec[i].handle, i);
 105                         ret = -ENOENT;
 106                         goto out;
 107                 }
 108
 109                 if (!list_empty(&obj->obj_exec_link)) {
 110                         spin_unlock(&file->table_lock);
 111                         DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
 112                                    obj, exec[i].handle, i);
 113                         ret = -EINVAL;
 114                         goto out;
 115                 }
 116
 117                 drm_gem_object_reference(&obj->base);
 118                 list_add_tail(&obj->obj_exec_link, &objects);
 119         }
 120         spin_unlock(&file->table_lock);
 121
 122         i = 0;
 123         list_for_each_entry(obj, &objects, obj_exec_link) {
 124                 struct i915_vma *vma;
 125
 126                 /*
 127                  * NOTE: We can leak any vmas created here when something fails
 128                  * later on. But that's no issue since vma_unbind can deal with
 129                  * vmas which are not actually bound. And since only
 130                  * lookup_or_create exists as an interface to get at the vma
 131                  * from the (obj, vm) we don't run the risk of creating
 132                  * duplicated vmas for the same vm.
 133                  */
 134                 vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
 135                 if (IS_ERR(vma)) {
 136                         DRM_DEBUG("Failed to lookup VMA\n");
 137                         ret = PTR_ERR(vma);
 138                         goto out;
 139                 }
 140
 141                 list_add_tail(&vma->exec_list, &eb->vmas);
 142
 143                 vma->exec_entry = &exec[i];
 144                 if (eb->and < 0) {
 145                         eb->lut[i] = vma;
 146                 } else {
 147                         uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
 148                         vma->exec_handle = handle;
 149                         hlist_add_head(&vma->exec_node,
 150                                        &eb->buckets[handle & eb->and]);
 151                 }
 152                 ++i;
 153         }
 154
 155
 156 out:
 157         while (!list_empty(&objects)) {
 158                 obj = list_first_entry(&objects,
 159                                        struct drm_i915_gem_object,
 160                                        obj_exec_link);
 161                 list_del_init(&obj->obj_exec_link);
 162                 if (ret)
 163                         drm_gem_object_unreference(&obj->base);
 164         }
 165         return ret;
 166 }
 167
 168 static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
 169 {
 170         if (eb->and < 0) {
 171                 if (handle >= -eb->and)
 172                         return NULL;
 173                 return eb->lut[handle];
 174         } else {
 175                 struct hlist_head *head;
 176                 struct hlist_node *node;
 177
 178                 head = &eb->buckets[handle & eb->and];
 179                 hlist_for_each(node, head) {
 180                         struct i915_vma *vma;
 181
 182                         vma = hlist_entry(node, struct i915_vma, exec_node);
 183                         if (vma->exec_handle == handle)
 184                                 return vma;
 185                 }
 186                 return NULL;
 187         }
 188 }
 189
 190 static void eb_destroy(struct eb_vmas *eb) {
 191         while (!list_empty(&eb->vmas)) {
 192                 struct i915_vma *vma;
 193
 194                 vma = list_first_entry(&eb->vmas,
 195                                        struct i915_vma,
 196                                        exec_list);
 197                 list_del_init(&vma->exec_list);
 198                 drm_gem_object_unreference(&vma->obj->base);
 199         }
 200         kfree(eb);
 201 }
 202
 203 static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
 204 {
 205         return (HAS_LLC(obj->base.dev) ||
 206                 obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
 207                 !obj->map_and_fenceable ||
 208                 obj->cache_level != I915_CACHE_NONE);
 209 }
 210
 211 static int
 212 relocate_entry_cpu(struct drm_i915_gem_object *obj,
 213                    struct drm_i915_gem_relocation_entry *reloc)
 214 {
 215         uint32_t page_offset = offset_in_page(reloc->offset);
 216         char *vaddr;
 217         int ret = -EINVAL;
 218
 219         ret = i915_gem_object_set_to_cpu_domain(obj, true);
 220         if (ret)
 221                 return ret;
 222
 223         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 224                                 reloc->offset >> PAGE_SHIFT));
 225         *(uint32_t *)(vaddr + page_offset) = reloc->delta;
 226         kunmap_atomic(vaddr);
 227
 228         return 0;
 229 }
 230
 231 static int
 232 relocate_entry_gtt(struct drm_i915_gem_object *obj,
 233                    struct drm_i915_gem_relocation_entry *reloc)
 234 {
 235         struct drm_device *dev = obj->base.dev;
 236         struct drm_i915_private *dev_priv = dev->dev_private;
 237         uint32_t __iomem *reloc_entry;
 238         void __iomem *reloc_page;
 239         int ret = -EINVAL;
 240
 241         ret = i915_gem_object_set_to_gtt_domain(obj, true);
 242         if (ret)
 243                 return ret;
 244
 245         ret = i915_gem_object_put_fence(obj);
 246         if (ret)
 247                 return ret;
 248
 249         /* Map the page containing the relocation we're going to perform.  */
 250         reloc->offset += i915_gem_obj_ggtt_offset(obj);
 251         reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 252                         reloc->offset & PAGE_MASK);
 253         reloc_entry = (uint32_t __iomem *)
 254                 (reloc_page + offset_in_page(reloc->offset));
 255         iowrite32(reloc->delta, reloc_entry);
 256         io_mapping_unmap_atomic(reloc_page);
 257
 258         return 0;
 259 }
 260
 261 static int
 262 i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 263                                    struct eb_vmas *eb,
 264                                    struct drm_i915_gem_relocation_entry *reloc,
 265                                    struct i915_address_space *vm)
 266 {
 267         struct drm_device *dev = obj->base.dev;
 268         struct drm_gem_object *target_obj;
 269         struct drm_i915_gem_object *target_i915_obj;
 270         struct i915_vma *target_vma;
 271         uint32_t target_offset;
 272         int ret = -EINVAL;
 273
 274         /* we've already hold a reference to all valid objects */
 275         target_vma = eb_get_vma(eb, reloc->target_handle);
 276         if (unlikely(target_vma == NULL))
 277                 return -ENOENT;
 278         target_i915_obj = target_vma->obj;
 279         target_obj = &target_vma->obj->base;
 280
 281         target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
 282
 283         /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
 284          * pipe_control writes because the gpu doesn't properly redirect them
 285          * through the ppgtt for non_secure batchbuffers. */
 286         if (unlikely(IS_GEN6(dev) &&
 287             reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
 288             !target_i915_obj->has_global_gtt_mapping)) {
 289                 i915_gem_gtt_bind_object(target_i915_obj,
 290                                          target_i915_obj->cache_level);
 291         }
 292
 293         /* Validate that the target is in a valid r/w GPU domain */
 294         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
 295                 DRM_DEBUG("reloc with multiple write domains: "
 296                           "obj %p target %d offset %d "
 297                           "read %08x write %08x",
 298                           obj, reloc->target_handle,
 299                           (int) reloc->offset,
 300                           reloc->read_domains,
 301                           reloc->write_domain);
 302                 return ret;
 303         }
 304         if (unlikely((reloc->write_domain | reloc->read_domains)
 305                      & ~I915_GEM_GPU_DOMAINS)) {
 306                 DRM_DEBUG("reloc with read/write non-GPU domains: "
 307                           "obj %p target %d offset %d "
 308                           "read %08x write %08x",
 309                           obj, reloc->target_handle,
 310                           (int) reloc->offset,
 311                           reloc->read_domains,
 312                           reloc->write_domain);
 313                 return ret;
 314         }
 315
 316         target_obj->pending_read_domains |= reloc->read_domains;
 317         target_obj->pending_write_domain |= reloc->write_domain;
 318
 319         /* If the relocation already has the right value in it, no
 320          * more work needs to be done.
 321          */
 322         if (target_offset == reloc->presumed_offset)
 323                 return 0;
 324
 325         /* Check that the relocation address is valid... */
 326         if (unlikely(reloc->offset > obj->base.size - 4)) {
 327                 DRM_DEBUG("Relocation beyond object bounds: "
 328                           "obj %p target %d offset %d size %d.\n",
 329                           obj, reloc->target_handle,
 330                           (int) reloc->offset,
 331                           (int) obj->base.size);
 332                 return ret;
 333         }
 334         if (unlikely(reloc->offset & 3)) {
 335                 DRM_DEBUG("Relocation not 4-byte aligned: "
 336                           "obj %p target %d offset %d.\n",
 337                           obj, reloc->target_handle,
 338                           (int) reloc->offset);
 339                 return ret;
 340         }
 341
 342         /* We can't wait for rendering with pagefaults disabled */
 343         if (obj->active && in_atomic())
 344                 return -EFAULT;
 345
 346         reloc->delta += target_offset;
 347         if (use_cpu_reloc(obj))
 348                 ret = relocate_entry_cpu(obj, reloc);
 349         else
 350                 ret = relocate_entry_gtt(obj, reloc);
 351
 352         if (ret)
 353                 return ret;
 354
 355         /* and update the user's relocation entry */
 356         reloc->presumed_offset = target_offset;
 357
 358         return 0;
 359 }
 360
 361 static int
 362 i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
 363                                  struct eb_vmas *eb)
 364 {
 365 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
 366         struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
 367         struct drm_i915_gem_relocation_entry __user *user_relocs;
 368         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 369         int remain, ret;
 370
 371         user_relocs = to_user_ptr(entry->relocs_ptr);
 372
 373         remain = entry->relocation_count;
 374         while (remain) {
 375                 struct drm_i915_gem_relocation_entry *r = stack_reloc;
 376                 int count = remain;
 377                 if (count > ARRAY_SIZE(stack_reloc))
 378                         count = ARRAY_SIZE(stack_reloc);
 379                 remain -= count;
 380
 381                 if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
 382                         return -EFAULT;
 383
 384                 do {
 385                         u64 offset = r->presumed_offset;
 386
 387                         ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r,
 388                                                                  vma->vm);
 389                         if (ret)
 390                                 return ret;
 391
 392                         if (r->presumed_offset != offset &&
 393                             __copy_to_user_inatomic(&user_relocs->presumed_offset,
 394                                                     &r->presumed_offset,
 395                                                     sizeof(r->presumed_offset))) {
 396                                 return -EFAULT;
 397                         }
 398
 399                         user_relocs++;
 400                         r++;
 401                 } while (--count);
 402         }
 403
 404         return 0;
 405 #undef N_RELOC
 406 }
 407
 408 static int
 409 i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
 410                                       struct eb_vmas *eb,
 411                                       struct drm_i915_gem_relocation_entry *relocs)
 412 {
 413         const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 414         int i, ret;
 415
 416         for (i = 0; i < entry->relocation_count; i++) {
 417                 ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i],
 418                                                          vma->vm);
 419                 if (ret)
 420                         return ret;
 421         }
 422
 423         return 0;
 424 }
 425
 426 static int
 427 i915_gem_execbuffer_relocate(struct eb_vmas *eb,
 428                              struct i915_address_space *vm)
 429 {
 430         struct i915_vma *vma;
 431         int ret = 0;
 432
 433         /* This is the fast path and we cannot handle a pagefault whilst
 434          * holding the struct mutex lest the user pass in the relocations
 435          * contained within a mmaped bo. For in such a case we, the page
 436          * fault handler would call i915_gem_fault() and we would try to
 437          * acquire the struct mutex again. Obviously this is bad and so
 438          * lockdep complains vehemently.
 439          */
 440         pagefault_disable();
 441         list_for_each_entry(vma, &eb->vmas, exec_list) {
 442                 ret = i915_gem_execbuffer_relocate_vma(vma, eb);
 443                 if (ret)
 444                         break;
 445         }
 446         pagefault_enable();
 447
 448         return ret;
 449 }
 450
 451 #define  __EXEC_OBJECT_HAS_PIN (1<<31)
 452 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
 453
 454 static int
 455 need_reloc_mappable(struct i915_vma *vma)
 456 {
 457         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 458         return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
 459                 i915_is_ggtt(vma->vm);
 460 }
 461
 462 static int
 463 i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
 464                                 struct intel_ring_buffer *ring,
 465                                 bool *need_reloc)
 466 {
 467         struct drm_i915_private *dev_priv = ring->dev->dev_private;
 468         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 469         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 470         bool need_fence, need_mappable;
 471         struct drm_i915_gem_object *obj = vma->obj;
 472         int ret;
 473
 474         need_fence =
 475                 has_fenced_gpu_access &&
 476                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 477                 obj->tiling_mode != I915_TILING_NONE;
 478         need_mappable = need_fence || need_reloc_mappable(vma);
 479
 480         ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
 481                                   false);
 482         if (ret)
 483                 return ret;
 484
 485         entry->flags |= __EXEC_OBJECT_HAS_PIN;
 486
 487         if (has_fenced_gpu_access) {
 488                 if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
 489                         ret = i915_gem_object_get_fence(obj);
 490                         if (ret)
 491                                 return ret;
 492
 493                         if (i915_gem_object_pin_fence(obj))
 494                                 entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 495
 496                         obj->pending_fenced_gpu_access = true;
 497                 }
 498         }
 499
 500         /* Ensure ppgtt mapping exists if needed */
 501         if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
 502                 i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
 503                                        obj, obj->cache_level);
 504
 505                 obj->has_aliasing_ppgtt_mapping = 1;
 506         }
 507
 508         if (entry->offset != vma->node.start) {
 509                 entry->offset = vma->node.start;
 510                 *need_reloc = true;
 511         }
 512
 513         if (entry->flags & EXEC_OBJECT_WRITE) {
 514                 obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
 515                 obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
 516         }
 517
 518         if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
 519             !obj->has_global_gtt_mapping)
 520                 i915_gem_gtt_bind_object(obj, obj->cache_level);
 521
 522         return 0;
 523 }
 524
 525 static void
 526 i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
 527 {
 528         struct drm_i915_gem_exec_object2 *entry;
 529         struct drm_i915_gem_object *obj = vma->obj;
 530
 531         if (!drm_mm_node_allocated(&vma->node))
 532                 return;
 533
 534         entry = vma->exec_entry;
 535
 536         if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
 537                 i915_gem_object_unpin_fence(obj);
 538
 539         if (entry->flags & __EXEC_OBJECT_HAS_PIN)
 540                 i915_gem_object_unpin(obj);
 541
 542         entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
 543 }
 544
 545 static int
 546 i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 547                             struct list_head *vmas,
 548                             bool *need_relocs)
 549 {
 550         struct drm_i915_gem_object *obj;
 551         struct i915_vma *vma;
 552         struct i915_address_space *vm;
 553         struct list_head ordered_vmas;
 554         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 555         int retry;
 556
 557         if (list_empty(vmas))
 558                 return 0;
 559
 560         vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
 561
 562         INIT_LIST_HEAD(&ordered_vmas);
 563         while (!list_empty(vmas)) {
 564                 struct drm_i915_gem_exec_object2 *entry;
 565                 bool need_fence, need_mappable;
 566
 567                 vma = list_first_entry(vmas, struct i915_vma, exec_list);
 568                 obj = vma->obj;
 569                 entry = vma->exec_entry;
 570
 571                 need_fence =
 572                         has_fenced_gpu_access &&
 573                         entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 574                         obj->tiling_mode != I915_TILING_NONE;
 575                 need_mappable = need_fence || need_reloc_mappable(vma);
 576
 577                 if (need_mappable)
 578                         list_move(&vma->exec_list, &ordered_vmas);
 579                 else
 580                         list_move_tail(&vma->exec_list, &ordered_vmas);
 581
 582                 obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
 583                 obj->base.pending_write_domain = 0;
 584                 obj->pending_fenced_gpu_access = false;
 585         }
 586         list_splice(&ordered_vmas, vmas);
 587
 588         /* Attempt to pin all of the buffers into the GTT.
 589          * This is done in 3 phases:
 590          *
 591          * 1a. Unbind all objects that do not match the GTT constraints for
 592          *     the execbuffer (fenceable, mappable, alignment etc).
 593          * 1b. Increment pin count for already bound objects.
 594          * 2.  Bind new objects.
 595          * 3.  Decrement pin count.
 596          *
 597          * This avoid unnecessary unbinding of later objects in order to make
 598          * room for the earlier objects *unless* we need to defragment.
 599          */
 600         retry = 0;
 601         do {
 602                 int ret = 0;
 603
 604                 /* Unbind any ill-fitting objects or pin. */
 605                 list_for_each_entry(vma, vmas, exec_list) {
 606                         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 607                         bool need_fence, need_mappable;
 608
 609                         obj = vma->obj;
 610
 611                         if (!drm_mm_node_allocated(&vma->node))
 612                                 continue;
 613
 614                         need_fence =
 615                                 has_fenced_gpu_access &&
 616                                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 617                                 obj->tiling_mode != I915_TILING_NONE;
 618                         need_mappable = need_fence || need_reloc_mappable(vma);
 619
 620                         WARN_ON((need_mappable || need_fence) &&
 621                                !i915_is_ggtt(vma->vm));
 622
 623                         if ((entry->alignment &&
 624                              vma->node.start & (entry->alignment - 1)) ||
 625                             (need_mappable && !obj->map_and_fenceable))
 626                                 ret = i915_vma_unbind(vma);
 627                         else
 628                                 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 629                         if (ret)
 630                                 goto err;
 631                 }
 632
 633                 /* Bind fresh objects */
 634                 list_for_each_entry(vma, vmas, exec_list) {
 635                         if (drm_mm_node_allocated(&vma->node))
 636                                 continue;
 637
 638                         ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 639                         if (ret)
 640                                 goto err;
 641                 }
 642
 643 err:            /* Decrement pin count for bound objects */
 644                 list_for_each_entry(vma, vmas, exec_list)
 645                         i915_gem_execbuffer_unreserve_vma(vma);
 646
 647                 if (ret != -ENOSPC || retry++)
 648                         return ret;
 649
 650                 ret = i915_gem_evict_vm(vm, true);
 651                 if (ret)
 652                         return ret;
 653         } while (1);
 654 }
 655
 656 static int
 657 i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
 658                                   struct drm_i915_gem_execbuffer2 *args,
 659                                   struct drm_file *file,
 660                                   struct intel_ring_buffer *ring,
 661                                   struct eb_vmas *eb,
 662                                   struct drm_i915_gem_exec_object2 *exec)
 663 {
 664         struct drm_i915_gem_relocation_entry *reloc;
 665         struct i915_address_space *vm;
 666         struct i915_vma *vma;
 667         bool need_relocs;
 668         int *reloc_offset;
 669         int i, total, ret;
 670         unsigned count = args->buffer_count;
 671
 672         if (WARN_ON(list_empty(&eb->vmas)))
 673                 return 0;
 674
 675         vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
 676
 677         /* We may process another execbuffer during the unlock... */
 678         while (!list_empty(&eb->vmas)) {
 679                 vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
 680                 list_del_init(&vma->exec_list);
 681                 drm_gem_object_unreference(&vma->obj->base);
 682         }
 683
 684         mutex_unlock(&dev->struct_mutex);
 685
 686         total = 0;
 687         for (i = 0; i < count; i++)
 688                 total += exec[i].relocation_count;
 689
 690         reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
 691         reloc = drm_malloc_ab(total, sizeof(*reloc));
 692         if (reloc == NULL || reloc_offset == NULL) {
 693                 drm_free_large(reloc);
 694                 drm_free_large(reloc_offset);
 695                 mutex_lock(&dev->struct_mutex);
 696                 return -ENOMEM;
 697         }
 698
 699         total = 0;
 700         for (i = 0; i < count; i++) {
 701                 struct drm_i915_gem_relocation_entry __user *user_relocs;
 702                 u64 invalid_offset = (u64)-1;
 703                 int j;
 704
 705                 user_relocs = to_user_ptr(exec[i].relocs_ptr);
 706
 707                 if (copy_from_user(reloc+total, user_relocs,
 708                                    exec[i].relocation_count * sizeof(*reloc))) {
 709                         ret = -EFAULT;
 710                         mutex_lock(&dev->struct_mutex);
 711                         goto err;
 712                 }
 713
 714                 /* As we do not update the known relocation offsets after
 715                  * relocating (due to the complexities in lock handling),
 716                  * we need to mark them as invalid now so that we force the
 717                  * relocation processing next time. Just in case the target
 718                  * object is evicted and then rebound into its old
 719                  * presumed_offset before the next execbuffer - if that
 720                  * happened we would make the mistake of assuming that the
 721                  * relocations were valid.
 722                  */
 723                 for (j = 0; j < exec[i].relocation_count; j++) {
 724                         if (copy_to_user(&user_relocs[j].presumed_offset,
 725                                          &invalid_offset,
 726                                          sizeof(invalid_offset))) {
 727                                 ret = -EFAULT;
 728                                 mutex_lock(&dev->struct_mutex);
 729                                 goto err;
 730                         }
 731                 }
 732
 733                 reloc_offset[i] = total;
 734                 total += exec[i].relocation_count;
 735         }
 736
 737         ret = i915_mutex_lock_interruptible(dev);
 738         if (ret) {
 739                 mutex_lock(&dev->struct_mutex);
 740                 goto err;
 741         }
 742
 743         /* reacquire the objects */
 744         eb_reset(eb);
 745         ret = eb_lookup_vmas(eb, exec, args, vm, file);
 746         if (ret)
 747                 goto err;
 748
 749         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
 750         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
 751         if (ret)
 752                 goto err;
 753
 754         list_for_each_entry(vma, &eb->vmas, exec_list) {
 755                 int offset = vma->exec_entry - exec;
 756                 ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
 757                                                             reloc + reloc_offset[offset]);
 758                 if (ret)
 759                         goto err;
 760         }
 761
 762         /* Leave the user relocations as are, this is the painfully slow path,
 763          * and we want to avoid the complication of dropping the lock whilst
 764          * having buffers reserved in the aperture and so causing spurious
 765          * ENOSPC for random operations.
 766          */
 767
 768 err:
 769         drm_free_large(reloc);
 770         drm_free_large(reloc_offset);
 771         return ret;
 772 }
 773
 774 static int
 775 i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
 776                                 struct list_head *vmas)
 777 {
 778         struct i915_vma *vma;
 779         uint32_t flush_domains = 0;
 780         bool flush_chipset = false;
 781         int ret;
 782
 783         list_for_each_entry(vma, vmas, exec_list) {
 784                 struct drm_i915_gem_object *obj = vma->obj;
 785                 ret = i915_gem_object_sync(obj, ring);
 786                 if (ret)
 787                         return ret;
 788
 789                 if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
 790                         flush_chipset |= i915_gem_clflush_object(obj, false);
 791
 792                 flush_domains |= obj->base.write_domain;
 793         }
 794
 795         if (flush_chipset)
 796                 i915_gem_chipset_flush(ring->dev);
 797
 798         if (flush_domains & I915_GEM_DOMAIN_GTT)
 799                 wmb();
 800
 801         /* Unconditionally invalidate gpu caches and ensure that we do flush
 802          * any residual writes from the previous batch.
 803          */
 804         return intel_ring_invalidate_all_caches(ring);
 805 }
 806
 807 static bool
 808 i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
 809 {
 810         if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
 811                 return false;
 812
 813         return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
 814 }
 815
 816 static int
 817 validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
 818                    int count)
 819 {
 820         int i;
 821         unsigned relocs_total = 0;
 822         unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
 823
 824         for (i = 0; i < count; i++) {
 825                 char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
 826                 int length; /* limited by fault_in_pages_readable() */
 827
 828                 if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
 829                         return -EINVAL;
 830
 831                 /* First check for malicious input causing overflow in
 832                  * the worst case where we need to allocate the entire
 833                  * relocation tree as a single array.
 834                  */
 835                 if (exec[i].relocation_count > relocs_max - relocs_total)
 836                         return -EINVAL;
 837                 relocs_total += exec[i].relocation_count;
 838
 839                 length = exec[i].relocation_count *
 840                         sizeof(struct drm_i915_gem_relocation_entry);
 841                 /*
 842                  * We must check that the entire relocation array is safe
 843                  * to read, but since we may need to update the presumed
 844                  * offsets during execution, check for full write access.
 845                  */
 846                 if (!access_ok(VERIFY_WRITE, ptr, length))
 847                         return -EFAULT;
 848
 849                 if (likely(!i915_prefault_disable)) {
 850                         if (fault_in_multipages_readable(ptr, length))
 851                                 return -EFAULT;
 852                 }
 853         }
 854
 855         return 0;
 856 }
 857
 858 static void
 859 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 860                                    struct intel_ring_buffer *ring)
 861 {
 862         struct i915_vma *vma;
 863
 864         list_for_each_entry(vma, vmas, exec_list) {
 865                 struct drm_i915_gem_object *obj = vma->obj;
 866                 u32 old_read = obj->base.read_domains;
 867                 u32 old_write = obj->base.write_domain;
 868
 869                 obj->base.write_domain = obj->base.pending_write_domain;
 870                 if (obj->base.write_domain == 0)
 871                         obj->base.pending_read_domains |= obj->base.read_domains;
 872                 obj->base.read_domains = obj->base.pending_read_domains;
 873                 obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 874
 875                 i915_vma_move_to_active(vma, ring);
 876                 if (obj->base.write_domain) {
 877                         obj->dirty = 1;
 878                         obj->last_write_seqno = intel_ring_get_seqno(ring);
 879                         if (obj->pin_count) /* check for potential scanout */
 880                                 intel_mark_fb_busy(obj, ring);
 881                 }
 882
 883                 trace_i915_gem_object_change_domain(obj, old_read, old_write);
 884         }
 885 }
 886
 887 static void
 888 i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 889                                     struct drm_file *file,
 890                                     struct intel_ring_buffer *ring,
 891                                     struct drm_i915_gem_object *obj)
 892 {
 893         /* Unconditionally force add_request to emit a full flush. */
 894         ring->gpu_caches_dirty = true;
 895
 896         /* Add a breadcrumb for the completion of the batch buffer */
 897         (void)__i915_add_request(ring, file, obj, NULL);
 898 }
 899
 900 static int
 901 i915_reset_gen7_sol_offsets(struct drm_device *dev,
 902                             struct intel_ring_buffer *ring)
 903 {
 904         drm_i915_private_t *dev_priv = dev->dev_private;
 905         int ret, i;
 906
 907         if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
 908                 return 0;
 909
 910         ret = intel_ring_begin(ring, 4 * 3);
 911         if (ret)
 912                 return ret;
 913
 914         for (i = 0; i < 4; i++) {
 915                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
 916                 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
 917                 intel_ring_emit(ring, 0);
 918         }
 919
 920         intel_ring_advance(ring);
 921
 922         return 0;
 923 }
 924
 925 static int
 926 i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 927                        struct drm_file *file,
 928                        struct drm_i915_gem_execbuffer2 *args,
 929                        struct drm_i915_gem_exec_object2 *exec,
 930                        struct i915_address_space *vm)
 931 {
 932         drm_i915_private_t *dev_priv = dev->dev_private;
 933         struct eb_vmas *eb;
 934         struct drm_i915_gem_object *batch_obj;
 935         struct drm_clip_rect *cliprects = NULL;
 936         struct intel_ring_buffer *ring;
 937         struct i915_ctx_hang_stats *hs;
 938         u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 939         u32 exec_start, exec_len;
 940         u32 mask, flags;
 941         int ret, mode, i;
 942         bool need_relocs;
 943
 944         if (!i915_gem_check_execbuffer(args))
 945                 return -EINVAL;
 946
 947         ret = validate_exec_list(exec, args->buffer_count);
 948         if (ret)
 949                 return ret;
 950
 951         flags = 0;
 952         if (args->flags & I915_EXEC_SECURE) {
 953                 if (!file->is_master || !capable(CAP_SYS_ADMIN))
 954                     return -EPERM;
 955
 956                 flags |= I915_DISPATCH_SECURE;
 957         }
 958         if (args->flags & I915_EXEC_IS_PINNED)
 959                 flags |= I915_DISPATCH_PINNED;
 960
 961         switch (args->flags & I915_EXEC_RING_MASK) {
 962         case I915_EXEC_DEFAULT:
 963         case I915_EXEC_RENDER:
 964                 ring = &dev_priv->ring[RCS];
 965                 break;
 966         case I915_EXEC_BSD:
 967                 ring = &dev_priv->ring[VCS];
 968                 if (ctx_id != DEFAULT_CONTEXT_ID) {
 969                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 970                                   ring->name);
 971                         return -EPERM;
 972                 }
 973                 break;
 974         case I915_EXEC_BLT:
 975                 ring = &dev_priv->ring[BCS];
 976                 if (ctx_id != DEFAULT_CONTEXT_ID) {
 977                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 978                                   ring->name);
 979                         return -EPERM;
 980                 }
 981                 break;
 982         case I915_EXEC_VEBOX:
 983                 ring = &dev_priv->ring[VECS];
 984                 if (ctx_id != DEFAULT_CONTEXT_ID) {
 985                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 986                                   ring->name);
 987                         return -EPERM;
 988                 }
 989                 break;
 990
 991         default:
 992                 DRM_DEBUG("execbuf with unknown ring: %d\n",
 993                           (int)(args->flags & I915_EXEC_RING_MASK));
 994                 return -EINVAL;
 995         }
 996         if (!intel_ring_initialized(ring)) {
 997                 DRM_DEBUG("execbuf with invalid ring: %d\n",
 998                           (int)(args->flags & I915_EXEC_RING_MASK));
 999                 return -EINVAL;
1000         }
1001
1002         mode = args->flags & I915_EXEC_CONSTANTS_MASK;
1003         mask = I915_EXEC_CONSTANTS_MASK;
1004         switch (mode) {
1005         case I915_EXEC_CONSTANTS_REL_GENERAL:
1006         case I915_EXEC_CONSTANTS_ABSOLUTE:
1007         case I915_EXEC_CONSTANTS_REL_SURFACE:
1008                 if (ring == &dev_priv->ring[RCS] &&
1009                     mode != dev_priv->relative_constants_mode) {
1010                         if (INTEL_INFO(dev)->gen < 4)
1011                                 return -EINVAL;
1012
1013                         if (INTEL_INFO(dev)->gen > 5 &&
1014                             mode == I915_EXEC_CONSTANTS_REL_SURFACE)
1015                                 return -EINVAL;
1016
1017                         /* The HW changed the meaning on this bit on gen6 */
1018                         if (INTEL_INFO(dev)->gen >= 6)
1019                                 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
1020                 }
1021                 break;
1022         default:
1023                 DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
1024                 return -EINVAL;
1025         }
1026
1027         if (args->buffer_count < 1) {
1028                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1029                 return -EINVAL;
1030         }
1031
1032         if (args->num_cliprects != 0) {
1033                 if (ring != &dev_priv->ring[RCS]) {
1034                         DRM_DEBUG("clip rectangles are only valid with the render ring\n");
1035                         return -EINVAL;
1036                 }
1037
1038                 if (INTEL_INFO(dev)->gen >= 5) {
1039                         DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
1040                         return -EINVAL;
1041                 }
1042
1043                 if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1044                         DRM_DEBUG("execbuf with %u cliprects\n",
1045                                   args->num_cliprects);
1046                         return -EINVAL;
1047                 }
1048
1049                 cliprects = kcalloc(args->num_cliprects,
1050                                     sizeof(*cliprects),
1051                                     GFP_KERNEL);
1052                 if (cliprects == NULL) {
1053                         ret = -ENOMEM;
1054                         goto pre_mutex_err;
1055                 }
1056
1057                 if (copy_from_user(cliprects,
1058                                    to_user_ptr(args->cliprects_ptr),
1059                                    sizeof(*cliprects)*args->num_cliprects)) {
1060                         ret = -EFAULT;
1061                         goto pre_mutex_err;
1062                 }
1063         }
1064
1065         ret = i915_mutex_lock_interruptible(dev);
1066         if (ret)
1067                 goto pre_mutex_err;
1068
1069         if (dev_priv->ums.mm_suspended) {
1070                 mutex_unlock(&dev->struct_mutex);
1071                 ret = -EBUSY;
1072                 goto pre_mutex_err;
1073         }
1074
1075         eb = eb_create(args, vm);
1076         if (eb == NULL) {
1077                 mutex_unlock(&dev->struct_mutex);
1078                 ret = -ENOMEM;
1079                 goto pre_mutex_err;
1080         }
1081
1082         /* Look up object handles */
1083         ret = eb_lookup_vmas(eb, exec, args, vm, file);
1084         if (ret)
1085                 goto err;
1086
1087         /* take note of the batch buffer before we might reorder the lists */
1088         batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
1089
1090         /* Move the objects en-masse into the GTT, evicting if necessary. */
1091         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1092         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
1093         if (ret)
1094                 goto err;
1095
1096         /* The objects are in their final locations, apply the relocations. */
1097         if (need_relocs)
1098                 ret = i915_gem_execbuffer_relocate(eb, vm);
1099         if (ret) {
1100                 if (ret == -EFAULT) {
1101                         ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
1102                                                                 eb, exec);
1103                         BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1104                 }
1105                 if (ret)
1106                         goto err;
1107         }
1108
1109         /* Set the pending read domains for the batch buffer to COMMAND */
1110         if (batch_obj->base.pending_write_domain) {
1111                 DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1112                 ret = -EINVAL;
1113                 goto err;
1114         }
1115         batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1116
1117         /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1118          * batch" bit. Hence we need to pin secure batches into the global gtt.
1119          * hsw should have this fixed, but let's be paranoid and do it
1120          * unconditionally for now. */
1121         if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1122                 i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1123
1124         ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
1125         if (ret)
1126                 goto err;
1127
1128         hs = i915_gem_context_get_hang_stats(dev, file, ctx_id);
1129         if (IS_ERR(hs)) {
1130                 ret = PTR_ERR(hs);
1131                 goto err;
1132         }
1133
1134         if (hs->banned) {
1135                 ret = -EIO;
1136                 goto err;
1137         }
1138
1139         ret = i915_switch_context(ring, file, ctx_id);
1140         if (ret)
1141                 goto err;
1142
1143         if (ring == &dev_priv->ring[RCS] &&
1144             mode != dev_priv->relative_constants_mode) {
1145                 ret = intel_ring_begin(ring, 4);
1146                 if (ret)
1147                                 goto err;
1148
1149                 intel_ring_emit(ring, MI_NOOP);
1150                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1151                 intel_ring_emit(ring, INSTPM);
1152                 intel_ring_emit(ring, mask << 16 | mode);
1153                 intel_ring_advance(ring);
1154
1155                 dev_priv->relative_constants_mode = mode;
1156         }
1157
1158         if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1159                 ret = i915_reset_gen7_sol_offsets(dev, ring);
1160                 if (ret)
1161                         goto err;
1162         }
1163
1164         exec_start = i915_gem_obj_offset(batch_obj, vm) +
1165                 args->batch_start_offset;
1166         exec_len = args->batch_len;
1167         if (cliprects) {
1168                 for (i = 0; i < args->num_cliprects; i++) {
1169                         ret = i915_emit_box(dev, &cliprects[i],
1170                                             args->DR1, args->DR4);
1171                         if (ret)
1172                                 goto err;
1173
1174                         ret = ring->dispatch_execbuffer(ring,
1175                                                         exec_start, exec_len,
1176                                                         flags);
1177                         if (ret)
1178                                 goto err;
1179                 }
1180         } else {
1181                 ret = ring->dispatch_execbuffer(ring,
1182                                                 exec_start, exec_len,
1183                                                 flags);
1184                 if (ret)
1185                         goto err;
1186         }
1187
1188         trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1189
1190         i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
1191         i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1192
1193 err:
1194         eb_destroy(eb);
1195
1196         mutex_unlock(&dev->struct_mutex);
1197
1198 pre_mutex_err:
1199         kfree(cliprects);
1200         return ret;
1201 }
1202
1203 /*
1204  * Legacy execbuffer just creates an exec2 list from the original exec object
1205  * list array and passes it to the real function.
1206  */
1207 int
1208 i915_gem_execbuffer(struct drm_device *dev, void *data,
1209                     struct drm_file *file)
1210 {
1211         struct drm_i915_private *dev_priv = dev->dev_private;
1212         struct drm_i915_gem_execbuffer *args = data;
1213         struct drm_i915_gem_execbuffer2 exec2;
1214         struct drm_i915_gem_exec_object *exec_list = NULL;
1215         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1216         int ret, i;
1217
1218         if (args->buffer_count < 1) {
1219                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1220                 return -EINVAL;
1221         }
1222
1223         /* Copy in the exec list from userland */
1224         exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1225         exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1226         if (exec_list == NULL || exec2_list == NULL) {
1227                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1228                           args->buffer_count);
1229                 drm_free_large(exec_list);
1230                 drm_free_large(exec2_list);
1231                 return -ENOMEM;
1232         }
1233         ret = copy_from_user(exec_list,
1234                              to_user_ptr(args->buffers_ptr),
1235                              sizeof(*exec_list) * args->buffer_count);
1236         if (ret != 0) {
1237                 DRM_DEBUG("copy %d exec entries failed %d\n",
1238                           args->buffer_count, ret);
1239                 drm_free_large(exec_list);
1240                 drm_free_large(exec2_list);
1241                 return -EFAULT;
1242         }
1243
1244         for (i = 0; i < args->buffer_count; i++) {
1245                 exec2_list[i].handle = exec_list[i].handle;
1246                 exec2_list[i].relocation_count = exec_list[i].relocation_count;
1247                 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1248                 exec2_list[i].alignment = exec_list[i].alignment;
1249                 exec2_list[i].offset = exec_list[i].offset;
1250                 if (INTEL_INFO(dev)->gen < 4)
1251                         exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1252                 else
1253                         exec2_list[i].flags = 0;
1254         }
1255
1256         exec2.buffers_ptr = args->buffers_ptr;
1257         exec2.buffer_count = args->buffer_count;
1258         exec2.batch_start_offset = args->batch_start_offset;
1259         exec2.batch_len = args->batch_len;
1260         exec2.DR1 = args->DR1;
1261         exec2.DR4 = args->DR4;
1262         exec2.num_cliprects = args->num_cliprects;
1263         exec2.cliprects_ptr = args->cliprects_ptr;
1264         exec2.flags = I915_EXEC_RENDER;
1265         i915_execbuffer2_set_context_id(exec2, 0);
1266
1267         ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
1268                                      &dev_priv->gtt.base);
1269         if (!ret) {
1270                 /* Copy the new buffer offsets back to the user's exec list. */
1271                 for (i = 0; i < args->buffer_count; i++)
1272                         exec_list[i].offset = exec2_list[i].offset;
1273                 /* ... and back out to userspace */
1274                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1275                                    exec_list,
1276                                    sizeof(*exec_list) * args->buffer_count);
1277                 if (ret) {
1278                         ret = -EFAULT;
1279                         DRM_DEBUG("failed to copy %d exec entries "
1280                                   "back to user (%d)\n",
1281                                   args->buffer_count, ret);
1282                 }
1283         }
1284
1285         drm_free_large(exec_list);
1286         drm_free_large(exec2_list);
1287         return ret;
1288 }
1289
1290 int
1291 i915_gem_execbuffer2(struct drm_device *dev, void *data,
1292                      struct drm_file *file)
1293 {
1294         struct drm_i915_private *dev_priv = dev->dev_private;
1295         struct drm_i915_gem_execbuffer2 *args = data;
1296         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1297         int ret;
1298
1299         if (args->buffer_count < 1 ||
1300             args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1301                 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1302                 return -EINVAL;
1303         }
1304
1305         exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1306                              GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
1307         if (exec2_list == NULL)
1308                 exec2_list = drm_malloc_ab(sizeof(*exec2_list),
1309                                            args->buffer_count);
1310         if (exec2_list == NULL) {
1311                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1312                           args->buffer_count);
1313                 return -ENOMEM;
1314         }
1315         ret = copy_from_user(exec2_list,
1316                              to_user_ptr(args->buffers_ptr),
1317                              sizeof(*exec2_list) * args->buffer_count);
1318         if (ret != 0) {
1319                 DRM_DEBUG("copy %d exec entries failed %d\n",
1320                           args->buffer_count, ret);
1321                 drm_free_large(exec2_list);
1322                 return -EFAULT;
1323         }
1324
1325         ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
1326                                      &dev_priv->gtt.base);
1327         if (!ret) {
1328                 /* Copy the new buffer offsets back to the user's exec list. */
1329                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1330                                    exec2_list,
1331                                    sizeof(*exec2_list) * args->buffer_count);
1332                 if (ret) {
1333                         ret = -EFAULT;
1334                         DRM_DEBUG("failed to copy %d exec entries "
1335                                   "back to user (%d)\n",
1336                                   args->buffer_count, ret);
1337                 }
1338         }
1339
1340         drm_free_large(exec2_list);
1341         return ret;
1342 }