Pileus Git - ~andy/linux/blob - drivers/gpu/drm/i915/i915_gem_execbuffer.c

   1 /*
   2  * Copyright © 2008,2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Chris Wilson <chris@chris-wilson.co.uk>
  26  *
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/i915_drm.h>
  31 #include "i915_drv.h"
  32 #include "i915_trace.h"
  33 #include "intel_drv.h"
  34 #include <linux/dma_remapping.h>
  35
  36 struct eb_vmas {
  37         struct list_head vmas;
  38         int and;
  39         union {
  40                 struct i915_vma *lut[0];
  41                 struct hlist_head buckets[0];
  42         };
  43 };
  44
  45 static struct eb_vmas *
  46 eb_create(struct drm_i915_gem_execbuffer2 *args, struct i915_address_space *vm)
  47 {
  48         struct eb_vmas *eb = NULL;
  49
  50         if (args->flags & I915_EXEC_HANDLE_LUT) {
  51                 int size = args->buffer_count;
  52                 size *= sizeof(struct i915_vma *);
  53                 size += sizeof(struct eb_vmas);
  54                 eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
  55         }
  56
  57         if (eb == NULL) {
  58                 int size = args->buffer_count;
  59                 int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
  60                 BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
  61                 while (count > 2*size)
  62                         count >>= 1;
  63                 eb = kzalloc(count*sizeof(struct hlist_head) +
  64                              sizeof(struct eb_vmas),
  65                              GFP_TEMPORARY);
  66                 if (eb == NULL)
  67                         return eb;
  68
  69                 eb->and = count - 1;
  70         } else
  71                 eb->and = -args->buffer_count;
  72
  73         INIT_LIST_HEAD(&eb->vmas);
  74         return eb;
  75 }
  76
  77 static void
  78 eb_reset(struct eb_vmas *eb)
  79 {
  80         if (eb->and >= 0)
  81                 memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
  82 }
  83
  84 static int
  85 eb_lookup_vmas(struct eb_vmas *eb,
  86                struct drm_i915_gem_exec_object2 *exec,
  87                const struct drm_i915_gem_execbuffer2 *args,
  88                struct i915_address_space *vm,
  89                struct drm_file *file)
  90 {
  91         struct drm_i915_gem_object *obj;
  92         struct list_head objects;
  93         int i, ret = 0;
  94
  95         INIT_LIST_HEAD(&objects);
  96         spin_lock(&file->table_lock);
  97         /* Grab a reference to the object and release the lock so we can lookup
  98          * or create the VMA without using GFP_ATOMIC */
  99         for (i = 0; i < args->buffer_count; i++) {
 100                 obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
 101                 if (obj == NULL) {
 102                         spin_unlock(&file->table_lock);
 103                         DRM_DEBUG("Invalid object handle %d at index %d\n",
 104                                    exec[i].handle, i);
 105                         ret = -ENOENT;
 106                         goto out;
 107                 }
 108
 109                 if (!list_empty(&obj->obj_exec_link)) {
 110                         spin_unlock(&file->table_lock);
 111                         DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
 112                                    obj, exec[i].handle, i);
 113                         ret = -EINVAL;
 114                         goto out;
 115                 }
 116
 117                 drm_gem_object_reference(&obj->base);
 118                 list_add_tail(&obj->obj_exec_link, &objects);
 119         }
 120         spin_unlock(&file->table_lock);
 121
 122         i = 0;
 123         list_for_each_entry(obj, &objects, obj_exec_link) {
 124                 struct i915_vma *vma;
 125
 126                 /*
 127                  * NOTE: We can leak any vmas created here when something fails
 128                  * later on. But that's no issue since vma_unbind can deal with
 129                  * vmas which are not actually bound. And since only
 130                  * lookup_or_create exists as an interface to get at the vma
 131                  * from the (obj, vm) we don't run the risk of creating
 132                  * duplicated vmas for the same vm.
 133                  */
 134                 vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
 135                 if (IS_ERR(vma)) {
 136                         DRM_DEBUG("Failed to lookup VMA\n");
 137                         ret = PTR_ERR(vma);
 138                         goto out;
 139                 }
 140
 141                 list_add_tail(&vma->exec_list, &eb->vmas);
 142
 143                 vma->exec_entry = &exec[i];
 144                 if (eb->and < 0) {
 145                         eb->lut[i] = vma;
 146                 } else {
 147                         uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
 148                         vma->exec_handle = handle;
 149                         hlist_add_head(&vma->exec_node,
 150                                        &eb->buckets[handle & eb->and]);
 151                 }
 152                 ++i;
 153         }
 154
 155
 156 out:
 157         while (!list_empty(&objects)) {
 158                 obj = list_first_entry(&objects,
 159                                        struct drm_i915_gem_object,
 160                                        obj_exec_link);
 161                 list_del_init(&obj->obj_exec_link);
 162                 if (ret)
 163                         drm_gem_object_unreference(&obj->base);
 164         }
 165         return ret;
 166 }
 167
 168 static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
 169 {
 170         if (eb->and < 0) {
 171                 if (handle >= -eb->and)
 172                         return NULL;
 173                 return eb->lut[handle];
 174         } else {
 175                 struct hlist_head *head;
 176                 struct hlist_node *node;
 177
 178                 head = &eb->buckets[handle & eb->and];
 179                 hlist_for_each(node, head) {
 180                         struct i915_vma *vma;
 181
 182                         vma = hlist_entry(node, struct i915_vma, exec_node);
 183                         if (vma->exec_handle == handle)
 184                                 return vma;
 185                 }
 186                 return NULL;
 187         }
 188 }
 189
 190 static void eb_destroy(struct eb_vmas *eb) {
 191         while (!list_empty(&eb->vmas)) {
 192                 struct i915_vma *vma;
 193
 194                 vma = list_first_entry(&eb->vmas,
 195                                        struct i915_vma,
 196                                        exec_list);
 197                 list_del_init(&vma->exec_list);
 198                 drm_gem_object_unreference(&vma->obj->base);
 199         }
 200         kfree(eb);
 201 }
 202
 203 static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
 204 {
 205         return (HAS_LLC(obj->base.dev) ||
 206                 obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
 207                 !obj->map_and_fenceable ||
 208                 obj->cache_level != I915_CACHE_NONE);
 209 }
 210
 211 static int
 212 relocate_entry_cpu(struct drm_i915_gem_object *obj,
 213                    struct drm_i915_gem_relocation_entry *reloc)
 214 {
 215         uint32_t page_offset = offset_in_page(reloc->offset);
 216         char *vaddr;
 217         int ret = -EINVAL;
 218
 219         ret = i915_gem_object_set_to_cpu_domain(obj, true);
 220         if (ret)
 221                 return ret;
 222
 223         vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 224                                 reloc->offset >> PAGE_SHIFT));
 225         *(uint32_t *)(vaddr + page_offset) = reloc->delta;
 226         kunmap_atomic(vaddr);
 227
 228         return 0;
 229 }
 230
 231 static int
 232 relocate_entry_gtt(struct drm_i915_gem_object *obj,
 233                    struct drm_i915_gem_relocation_entry *reloc)
 234 {
 235         struct drm_device *dev = obj->base.dev;
 236         struct drm_i915_private *dev_priv = dev->dev_private;
 237         uint32_t __iomem *reloc_entry;
 238         void __iomem *reloc_page;
 239         int ret = -EINVAL;
 240
 241         ret = i915_gem_object_set_to_gtt_domain(obj, true);
 242         if (ret)
 243                 return ret;
 244
 245         ret = i915_gem_object_put_fence(obj);
 246         if (ret)
 247                 return ret;
 248
 249         /* Map the page containing the relocation we're going to perform.  */
 250         reloc->offset += i915_gem_obj_ggtt_offset(obj);
 251         reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
 252                         reloc->offset & PAGE_MASK);
 253         reloc_entry = (uint32_t __iomem *)
 254                 (reloc_page + offset_in_page(reloc->offset));
 255         iowrite32(reloc->delta, reloc_entry);
 256         io_mapping_unmap_atomic(reloc_page);
 257
 258         return 0;
 259 }
 260
 261 static int
 262 i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 263                                    struct eb_vmas *eb,
 264                                    struct drm_i915_gem_relocation_entry *reloc,
 265                                    struct i915_address_space *vm)
 266 {
 267         struct drm_device *dev = obj->base.dev;
 268         struct drm_gem_object *target_obj;
 269         struct drm_i915_gem_object *target_i915_obj;
 270         struct i915_vma *target_vma;
 271         uint32_t target_offset;
 272         int ret = -EINVAL;
 273
 274         /* we've already hold a reference to all valid objects */
 275         target_vma = eb_get_vma(eb, reloc->target_handle);
 276         if (unlikely(target_vma == NULL))
 277                 return -ENOENT;
 278         target_i915_obj = target_vma->obj;
 279         target_obj = &target_vma->obj->base;
 280
 281         target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
 282
 283         /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
 284          * pipe_control writes because the gpu doesn't properly redirect them
 285          * through the ppgtt for non_secure batchbuffers. */
 286         if (unlikely(IS_GEN6(dev) &&
 287             reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
 288             !target_i915_obj->has_global_gtt_mapping)) {
 289                 i915_gem_gtt_bind_object(target_i915_obj,
 290                                          target_i915_obj->cache_level);
 291         }
 292
 293         /* Validate that the target is in a valid r/w GPU domain */
 294         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
 295                 DRM_DEBUG("reloc with multiple write domains: "
 296                           "obj %p target %d offset %d "
 297                           "read %08x write %08x",
 298                           obj, reloc->target_handle,
 299                           (int) reloc->offset,
 300                           reloc->read_domains,
 301                           reloc->write_domain);
 302                 return ret;
 303         }
 304         if (unlikely((reloc->write_domain | reloc->read_domains)
 305                      & ~I915_GEM_GPU_DOMAINS)) {
 306                 DRM_DEBUG("reloc with read/write non-GPU domains: "
 307                           "obj %p target %d offset %d "
 308                           "read %08x write %08x",
 309                           obj, reloc->target_handle,
 310                           (int) reloc->offset,
 311                           reloc->read_domains,
 312                           reloc->write_domain);
 313                 return ret;
 314         }
 315
 316         target_obj->pending_read_domains |= reloc->read_domains;
 317         target_obj->pending_write_domain |= reloc->write_domain;
 318
 319         /* If the relocation already has the right value in it, no
 320          * more work needs to be done.
 321          */
 322         if (target_offset == reloc->presumed_offset)
 323                 return 0;
 324
 325         /* Check that the relocation address is valid... */
 326         if (unlikely(reloc->offset > obj->base.size - 4)) {
 327                 DRM_DEBUG("Relocation beyond object bounds: "
 328                           "obj %p target %d offset %d size %d.\n",
 329                           obj, reloc->target_handle,
 330                           (int) reloc->offset,
 331                           (int) obj->base.size);
 332                 return ret;
 333         }
 334         if (unlikely(reloc->offset & 3)) {
 335                 DRM_DEBUG("Relocation not 4-byte aligned: "
 336                           "obj %p target %d offset %d.\n",
 337                           obj, reloc->target_handle,
 338                           (int) reloc->offset);
 339                 return ret;
 340         }
 341
 342         /* We can't wait for rendering with pagefaults disabled */
 343         if (obj->active && in_atomic())
 344                 return -EFAULT;
 345
 346         reloc->delta += target_offset;
 347         if (use_cpu_reloc(obj))
 348                 ret = relocate_entry_cpu(obj, reloc);
 349         else
 350                 ret = relocate_entry_gtt(obj, reloc);
 351
 352         if (ret)
 353                 return ret;
 354
 355         /* and update the user's relocation entry */
 356         reloc->presumed_offset = target_offset;
 357
 358         return 0;
 359 }
 360
 361 static int
 362 i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
 363                                  struct eb_vmas *eb)
 364 {
 365 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
 366         struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
 367         struct drm_i915_gem_relocation_entry __user *user_relocs;
 368         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 369         int remain, ret;
 370
 371         user_relocs = to_user_ptr(entry->relocs_ptr);
 372
 373         remain = entry->relocation_count;
 374         while (remain) {
 375                 struct drm_i915_gem_relocation_entry *r = stack_reloc;
 376                 int count = remain;
 377                 if (count > ARRAY_SIZE(stack_reloc))
 378                         count = ARRAY_SIZE(stack_reloc);
 379                 remain -= count;
 380
 381                 if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
 382                         return -EFAULT;
 383
 384                 do {
 385                         u64 offset = r->presumed_offset;
 386
 387                         ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r,
 388                                                                  vma->vm);
 389                         if (ret)
 390                                 return ret;
 391
 392                         if (r->presumed_offset != offset &&
 393                             __copy_to_user_inatomic(&user_relocs->presumed_offset,
 394                                                     &r->presumed_offset,
 395                                                     sizeof(r->presumed_offset))) {
 396                                 return -EFAULT;
 397                         }
 398
 399                         user_relocs++;
 400                         r++;
 401                 } while (--count);
 402         }
 403
 404         return 0;
 405 #undef N_RELOC
 406 }
 407
 408 static int
 409 i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
 410                                       struct eb_vmas *eb,
 411                                       struct drm_i915_gem_relocation_entry *relocs)
 412 {
 413         const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 414         int i, ret;
 415
 416         for (i = 0; i < entry->relocation_count; i++) {
 417                 ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i],
 418                                                          vma->vm);
 419                 if (ret)
 420                         return ret;
 421         }
 422
 423         return 0;
 424 }
 425
 426 static int
 427 i915_gem_execbuffer_relocate(struct eb_vmas *eb,
 428                              struct i915_address_space *vm)
 429 {
 430         struct i915_vma *vma;
 431         int ret = 0;
 432
 433         /* This is the fast path and we cannot handle a pagefault whilst
 434          * holding the struct mutex lest the user pass in the relocations
 435          * contained within a mmaped bo. For in such a case we, the page
 436          * fault handler would call i915_gem_fault() and we would try to
 437          * acquire the struct mutex again. Obviously this is bad and so
 438          * lockdep complains vehemently.
 439          */
 440         pagefault_disable();
 441         list_for_each_entry(vma, &eb->vmas, exec_list) {
 442                 ret = i915_gem_execbuffer_relocate_vma(vma, eb);
 443                 if (ret)
 444                         break;
 445         }
 446         pagefault_enable();
 447
 448         return ret;
 449 }
 450
 451 #define  __EXEC_OBJECT_HAS_PIN (1<<31)
 452 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
 453
 454 static int
 455 need_reloc_mappable(struct i915_vma *vma)
 456 {
 457         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 458         return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
 459                 i915_is_ggtt(vma->vm);
 460 }
 461
 462 static int
 463 i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
 464                                 struct intel_ring_buffer *ring,
 465                                 bool *need_reloc)
 466 {
 467         struct drm_i915_private *dev_priv = ring->dev->dev_private;
 468         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 469         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 470         bool need_fence, need_mappable;
 471         struct drm_i915_gem_object *obj = vma->obj;
 472         int ret;
 473
 474         need_fence =
 475                 has_fenced_gpu_access &&
 476                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 477                 obj->tiling_mode != I915_TILING_NONE;
 478         need_mappable = need_fence || need_reloc_mappable(vma);
 479
 480         ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
 481                                   false);
 482         if (ret)
 483                 return ret;
 484
 485         entry->flags |= __EXEC_OBJECT_HAS_PIN;
 486
 487         if (has_fenced_gpu_access) {
 488                 if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
 489                         ret = i915_gem_object_get_fence(obj);
 490                         if (ret)
 491                                 return ret;
 492
 493                         if (i915_gem_object_pin_fence(obj))
 494                                 entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 495
 496                         obj->pending_fenced_gpu_access = true;
 497                 }
 498         }
 499
 500         /* Ensure ppgtt mapping exists if needed */
 501         if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
 502                 i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
 503                                        obj, obj->cache_level);
 504
 505                 obj->has_aliasing_ppgtt_mapping = 1;
 506         }
 507
 508         if (entry->offset != vma->node.start) {
 509                 entry->offset = vma->node.start;
 510                 *need_reloc = true;
 511         }
 512
 513         if (entry->flags & EXEC_OBJECT_WRITE) {
 514                 obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER;
 515                 obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER;
 516         }
 517
 518         if (entry->flags & EXEC_OBJECT_NEEDS_GTT &&
 519             !obj->has_global_gtt_mapping)
 520                 i915_gem_gtt_bind_object(obj, obj->cache_level);
 521
 522         return 0;
 523 }
 524
 525 static void
 526 i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
 527 {
 528         struct drm_i915_gem_exec_object2 *entry;
 529         struct drm_i915_gem_object *obj = vma->obj;
 530
 531         if (!drm_mm_node_allocated(&vma->node))
 532                 return;
 533
 534         entry = vma->exec_entry;
 535
 536         if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
 537                 i915_gem_object_unpin_fence(obj);
 538
 539         if (entry->flags & __EXEC_OBJECT_HAS_PIN)
 540                 i915_gem_object_unpin(obj);
 541
 542         entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
 543 }
 544
 545 static int
 546 i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 547                             struct list_head *vmas,
 548                             bool *need_relocs)
 549 {
 550         struct drm_i915_gem_object *obj;
 551         struct i915_vma *vma;
 552         struct list_head ordered_vmas;
 553         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 554         int retry;
 555
 556         INIT_LIST_HEAD(&ordered_vmas);
 557         while (!list_empty(vmas)) {
 558                 struct drm_i915_gem_exec_object2 *entry;
 559                 bool need_fence, need_mappable;
 560
 561                 vma = list_first_entry(vmas, struct i915_vma, exec_list);
 562                 obj = vma->obj;
 563                 entry = vma->exec_entry;
 564
 565                 need_fence =
 566                         has_fenced_gpu_access &&
 567                         entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 568                         obj->tiling_mode != I915_TILING_NONE;
 569                 need_mappable = need_fence || need_reloc_mappable(vma);
 570
 571                 if (need_mappable)
 572                         list_move(&vma->exec_list, &ordered_vmas);
 573                 else
 574                         list_move_tail(&vma->exec_list, &ordered_vmas);
 575
 576                 obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
 577                 obj->base.pending_write_domain = 0;
 578                 obj->pending_fenced_gpu_access = false;
 579         }
 580         list_splice(&ordered_vmas, vmas);
 581
 582         /* Attempt to pin all of the buffers into the GTT.
 583          * This is done in 3 phases:
 584          *
 585          * 1a. Unbind all objects that do not match the GTT constraints for
 586          *     the execbuffer (fenceable, mappable, alignment etc).
 587          * 1b. Increment pin count for already bound objects.
 588          * 2.  Bind new objects.
 589          * 3.  Decrement pin count.
 590          *
 591          * This avoid unnecessary unbinding of later objects in order to make
 592          * room for the earlier objects *unless* we need to defragment.
 593          */
 594         retry = 0;
 595         do {
 596                 int ret = 0;
 597
 598                 /* Unbind any ill-fitting objects or pin. */
 599                 list_for_each_entry(vma, vmas, exec_list) {
 600                         struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
 601                         bool need_fence, need_mappable;
 602
 603                         obj = vma->obj;
 604
 605                         if (!drm_mm_node_allocated(&vma->node))
 606                                 continue;
 607
 608                         need_fence =
 609                                 has_fenced_gpu_access &&
 610                                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 611                                 obj->tiling_mode != I915_TILING_NONE;
 612                         need_mappable = need_fence || need_reloc_mappable(vma);
 613
 614                         WARN_ON((need_mappable || need_fence) &&
 615                                !i915_is_ggtt(vma->vm));
 616
 617                         if ((entry->alignment &&
 618                              vma->node.start & (entry->alignment - 1)) ||
 619                             (need_mappable && !obj->map_and_fenceable))
 620                                 ret = i915_vma_unbind(vma);
 621                         else
 622                                 ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 623                         if (ret)
 624                                 goto err;
 625                 }
 626
 627                 /* Bind fresh objects */
 628                 list_for_each_entry(vma, vmas, exec_list) {
 629                         if (drm_mm_node_allocated(&vma->node))
 630                                 continue;
 631
 632                         ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
 633                         if (ret)
 634                                 goto err;
 635                 }
 636
 637 err:            /* Decrement pin count for bound objects */
 638                 list_for_each_entry(vma, vmas, exec_list)
 639                         i915_gem_execbuffer_unreserve_vma(vma);
 640
 641                 if (ret != -ENOSPC || retry++)
 642                         return ret;
 643
 644                 ret = i915_gem_evict_everything(ring->dev);
 645                 if (ret)
 646                         return ret;
 647         } while (1);
 648 }
 649
 650 static int
 651 i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
 652                                   struct drm_i915_gem_execbuffer2 *args,
 653                                   struct drm_file *file,
 654                                   struct intel_ring_buffer *ring,
 655                                   struct eb_vmas *eb,
 656                                   struct drm_i915_gem_exec_object2 *exec)
 657 {
 658         struct drm_i915_gem_relocation_entry *reloc;
 659         struct i915_address_space *vm;
 660         struct i915_vma *vma;
 661         bool need_relocs;
 662         int *reloc_offset;
 663         int i, total, ret;
 664         int count = args->buffer_count;
 665
 666         if (WARN_ON(list_empty(&eb->vmas)))
 667                 return 0;
 668
 669         vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
 670
 671         /* We may process another execbuffer during the unlock... */
 672         while (!list_empty(&eb->vmas)) {
 673                 vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
 674                 list_del_init(&vma->exec_list);
 675                 drm_gem_object_unreference(&vma->obj->base);
 676         }
 677
 678         mutex_unlock(&dev->struct_mutex);
 679
 680         total = 0;
 681         for (i = 0; i < count; i++)
 682                 total += exec[i].relocation_count;
 683
 684         reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
 685         reloc = drm_malloc_ab(total, sizeof(*reloc));
 686         if (reloc == NULL || reloc_offset == NULL) {
 687                 drm_free_large(reloc);
 688                 drm_free_large(reloc_offset);
 689                 mutex_lock(&dev->struct_mutex);
 690                 return -ENOMEM;
 691         }
 692
 693         total = 0;
 694         for (i = 0; i < count; i++) {
 695                 struct drm_i915_gem_relocation_entry __user *user_relocs;
 696                 u64 invalid_offset = (u64)-1;
 697                 int j;
 698
 699                 user_relocs = to_user_ptr(exec[i].relocs_ptr);
 700
 701                 if (copy_from_user(reloc+total, user_relocs,
 702                                    exec[i].relocation_count * sizeof(*reloc))) {
 703                         ret = -EFAULT;
 704                         mutex_lock(&dev->struct_mutex);
 705                         goto err;
 706                 }
 707
 708                 /* As we do not update the known relocation offsets after
 709                  * relocating (due to the complexities in lock handling),
 710                  * we need to mark them as invalid now so that we force the
 711                  * relocation processing next time. Just in case the target
 712                  * object is evicted and then rebound into its old
 713                  * presumed_offset before the next execbuffer - if that
 714                  * happened we would make the mistake of assuming that the
 715                  * relocations were valid.
 716                  */
 717                 for (j = 0; j < exec[i].relocation_count; j++) {
 718                         if (copy_to_user(&user_relocs[j].presumed_offset,
 719                                          &invalid_offset,
 720                                          sizeof(invalid_offset))) {
 721                                 ret = -EFAULT;
 722                                 mutex_lock(&dev->struct_mutex);
 723                                 goto err;
 724                         }
 725                 }
 726
 727                 reloc_offset[i] = total;
 728                 total += exec[i].relocation_count;
 729         }
 730
 731         ret = i915_mutex_lock_interruptible(dev);
 732         if (ret) {
 733                 mutex_lock(&dev->struct_mutex);
 734                 goto err;
 735         }
 736
 737         /* reacquire the objects */
 738         eb_reset(eb);
 739         ret = eb_lookup_vmas(eb, exec, args, vm, file);
 740         if (ret)
 741                 goto err;
 742
 743         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
 744         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
 745         if (ret)
 746                 goto err;
 747
 748         list_for_each_entry(vma, &eb->vmas, exec_list) {
 749                 int offset = vma->exec_entry - exec;
 750                 ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
 751                                                             reloc + reloc_offset[offset]);
 752                 if (ret)
 753                         goto err;
 754         }
 755
 756         /* Leave the user relocations as are, this is the painfully slow path,
 757          * and we want to avoid the complication of dropping the lock whilst
 758          * having buffers reserved in the aperture and so causing spurious
 759          * ENOSPC for random operations.
 760          */
 761
 762 err:
 763         drm_free_large(reloc);
 764         drm_free_large(reloc_offset);
 765         return ret;
 766 }
 767
 768 static int
 769 i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
 770                                 struct list_head *vmas)
 771 {
 772         struct i915_vma *vma;
 773         uint32_t flush_domains = 0;
 774         bool flush_chipset = false;
 775         int ret;
 776
 777         list_for_each_entry(vma, vmas, exec_list) {
 778                 struct drm_i915_gem_object *obj = vma->obj;
 779                 ret = i915_gem_object_sync(obj, ring);
 780                 if (ret)
 781                         return ret;
 782
 783                 if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
 784                         flush_chipset |= i915_gem_clflush_object(obj, false);
 785
 786                 flush_domains |= obj->base.write_domain;
 787         }
 788
 789         if (flush_chipset)
 790                 i915_gem_chipset_flush(ring->dev);
 791
 792         if (flush_domains & I915_GEM_DOMAIN_GTT)
 793                 wmb();
 794
 795         /* Unconditionally invalidate gpu caches and ensure that we do flush
 796          * any residual writes from the previous batch.
 797          */
 798         return intel_ring_invalidate_all_caches(ring);
 799 }
 800
 801 static bool
 802 i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
 803 {
 804         if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS)
 805                 return false;
 806
 807         return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
 808 }
 809
 810 static int
 811 validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
 812                    int count)
 813 {
 814         int i;
 815         int relocs_total = 0;
 816         int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
 817
 818         for (i = 0; i < count; i++) {
 819                 char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
 820                 int length; /* limited by fault_in_pages_readable() */
 821
 822                 if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS)
 823                         return -EINVAL;
 824
 825                 /* First check for malicious input causing overflow in
 826                  * the worst case where we need to allocate the entire
 827                  * relocation tree as a single array.
 828                  */
 829                 if (exec[i].relocation_count > relocs_max - relocs_total)
 830                         return -EINVAL;
 831                 relocs_total += exec[i].relocation_count;
 832
 833                 length = exec[i].relocation_count *
 834                         sizeof(struct drm_i915_gem_relocation_entry);
 835                 /*
 836                  * We must check that the entire relocation array is safe
 837                  * to read, but since we may need to update the presumed
 838                  * offsets during execution, check for full write access.
 839                  */
 840                 if (!access_ok(VERIFY_WRITE, ptr, length))
 841                         return -EFAULT;
 842
 843                 if (likely(!i915_prefault_disable)) {
 844                         if (fault_in_multipages_readable(ptr, length))
 845                                 return -EFAULT;
 846                 }
 847         }
 848
 849         return 0;
 850 }
 851
 852 static void
 853 i915_gem_execbuffer_move_to_active(struct list_head *vmas,
 854                                    struct intel_ring_buffer *ring)
 855 {
 856         struct i915_vma *vma;
 857
 858         list_for_each_entry(vma, vmas, exec_list) {
 859                 struct drm_i915_gem_object *obj = vma->obj;
 860                 u32 old_read = obj->base.read_domains;
 861                 u32 old_write = obj->base.write_domain;
 862
 863                 obj->base.write_domain = obj->base.pending_write_domain;
 864                 if (obj->base.write_domain == 0)
 865                         obj->base.pending_read_domains |= obj->base.read_domains;
 866                 obj->base.read_domains = obj->base.pending_read_domains;
 867                 obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 868
 869                 list_move_tail(&vma->mm_list, &vma->vm->active_list);
 870                 i915_gem_object_move_to_active(obj, ring);
 871                 if (obj->base.write_domain) {
 872                         obj->dirty = 1;
 873                         obj->last_write_seqno = intel_ring_get_seqno(ring);
 874                         if (obj->pin_count) /* check for potential scanout */
 875                                 intel_mark_fb_busy(obj, ring);
 876                 }
 877
 878                 trace_i915_gem_object_change_domain(obj, old_read, old_write);
 879         }
 880 }
 881
 882 static void
 883 i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 884                                     struct drm_file *file,
 885                                     struct intel_ring_buffer *ring,
 886                                     struct drm_i915_gem_object *obj)
 887 {
 888         /* Unconditionally force add_request to emit a full flush. */
 889         ring->gpu_caches_dirty = true;
 890
 891         /* Add a breadcrumb for the completion of the batch buffer */
 892         (void)__i915_add_request(ring, file, obj, NULL);
 893 }
 894
 895 static int
 896 i915_reset_gen7_sol_offsets(struct drm_device *dev,
 897                             struct intel_ring_buffer *ring)
 898 {
 899         drm_i915_private_t *dev_priv = dev->dev_private;
 900         int ret, i;
 901
 902         if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
 903                 return 0;
 904
 905         ret = intel_ring_begin(ring, 4 * 3);
 906         if (ret)
 907                 return ret;
 908
 909         for (i = 0; i < 4; i++) {
 910                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
 911                 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
 912                 intel_ring_emit(ring, 0);
 913         }
 914
 915         intel_ring_advance(ring);
 916
 917         return 0;
 918 }
 919
 920 static int
 921 i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 922                        struct drm_file *file,
 923                        struct drm_i915_gem_execbuffer2 *args,
 924                        struct drm_i915_gem_exec_object2 *exec,
 925                        struct i915_address_space *vm)
 926 {
 927         drm_i915_private_t *dev_priv = dev->dev_private;
 928         struct eb_vmas *eb;
 929         struct drm_i915_gem_object *batch_obj;
 930         struct drm_clip_rect *cliprects = NULL;
 931         struct intel_ring_buffer *ring;
 932         u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 933         u32 exec_start, exec_len;
 934         u32 mask, flags;
 935         int ret, mode, i;
 936         bool need_relocs;
 937
 938         if (!i915_gem_check_execbuffer(args))
 939                 return -EINVAL;
 940
 941         ret = validate_exec_list(exec, args->buffer_count);
 942         if (ret)
 943                 return ret;
 944
 945         flags = 0;
 946         if (args->flags & I915_EXEC_SECURE) {
 947                 if (!file->is_master || !capable(CAP_SYS_ADMIN))
 948                     return -EPERM;
 949
 950                 flags |= I915_DISPATCH_SECURE;
 951         }
 952         if (args->flags & I915_EXEC_IS_PINNED)
 953                 flags |= I915_DISPATCH_PINNED;
 954
 955         switch (args->flags & I915_EXEC_RING_MASK) {
 956         case I915_EXEC_DEFAULT:
 957         case I915_EXEC_RENDER:
 958                 ring = &dev_priv->ring[RCS];
 959                 break;
 960         case I915_EXEC_BSD:
 961                 ring = &dev_priv->ring[VCS];
 962                 if (ctx_id != DEFAULT_CONTEXT_ID) {
 963                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 964                                   ring->name);
 965                         return -EPERM;
 966                 }
 967                 break;
 968         case I915_EXEC_BLT:
 969                 ring = &dev_priv->ring[BCS];
 970                 if (ctx_id != DEFAULT_CONTEXT_ID) {
 971                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 972                                   ring->name);
 973                         return -EPERM;
 974                 }
 975                 break;
 976         case I915_EXEC_VEBOX:
 977                 ring = &dev_priv->ring[VECS];
 978                 if (ctx_id != DEFAULT_CONTEXT_ID) {
 979                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 980                                   ring->name);
 981                         return -EPERM;
 982                 }
 983                 break;
 984
 985         default:
 986                 DRM_DEBUG("execbuf with unknown ring: %d\n",
 987                           (int)(args->flags & I915_EXEC_RING_MASK));
 988                 return -EINVAL;
 989         }
 990         if (!intel_ring_initialized(ring)) {
 991                 DRM_DEBUG("execbuf with invalid ring: %d\n",
 992                           (int)(args->flags & I915_EXEC_RING_MASK));
 993                 return -EINVAL;
 994         }
 995
 996         mode = args->flags & I915_EXEC_CONSTANTS_MASK;
 997         mask = I915_EXEC_CONSTANTS_MASK;
 998         switch (mode) {
 999         case I915_EXEC_CONSTANTS_REL_GENERAL:
1000         case I915_EXEC_CONSTANTS_ABSOLUTE:
1001         case I915_EXEC_CONSTANTS_REL_SURFACE:
1002                 if (ring == &dev_priv->ring[RCS] &&
1003                     mode != dev_priv->relative_constants_mode) {
1004                         if (INTEL_INFO(dev)->gen < 4)
1005                                 return -EINVAL;
1006
1007                         if (INTEL_INFO(dev)->gen > 5 &&
1008                             mode == I915_EXEC_CONSTANTS_REL_SURFACE)
1009                                 return -EINVAL;
1010
1011                         /* The HW changed the meaning on this bit on gen6 */
1012                         if (INTEL_INFO(dev)->gen >= 6)
1013                                 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
1014                 }
1015                 break;
1016         default:
1017                 DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
1018                 return -EINVAL;
1019         }
1020
1021         if (args->buffer_count < 1) {
1022                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1023                 return -EINVAL;
1024         }
1025
1026         if (args->num_cliprects != 0) {
1027                 if (ring != &dev_priv->ring[RCS]) {
1028                         DRM_DEBUG("clip rectangles are only valid with the render ring\n");
1029                         return -EINVAL;
1030                 }
1031
1032                 if (INTEL_INFO(dev)->gen >= 5) {
1033                         DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
1034                         return -EINVAL;
1035                 }
1036
1037                 if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
1038                         DRM_DEBUG("execbuf with %u cliprects\n",
1039                                   args->num_cliprects);
1040                         return -EINVAL;
1041                 }
1042
1043                 cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
1044                                     GFP_KERNEL);
1045                 if (cliprects == NULL) {
1046                         ret = -ENOMEM;
1047                         goto pre_mutex_err;
1048                 }
1049
1050                 if (copy_from_user(cliprects,
1051                                    to_user_ptr(args->cliprects_ptr),
1052                                    sizeof(*cliprects)*args->num_cliprects)) {
1053                         ret = -EFAULT;
1054                         goto pre_mutex_err;
1055                 }
1056         }
1057
1058         ret = i915_mutex_lock_interruptible(dev);
1059         if (ret)
1060                 goto pre_mutex_err;
1061
1062         if (dev_priv->ums.mm_suspended) {
1063                 mutex_unlock(&dev->struct_mutex);
1064                 ret = -EBUSY;
1065                 goto pre_mutex_err;
1066         }
1067
1068         eb = eb_create(args, vm);
1069         if (eb == NULL) {
1070                 mutex_unlock(&dev->struct_mutex);
1071                 ret = -ENOMEM;
1072                 goto pre_mutex_err;
1073         }
1074
1075         /* Look up object handles */
1076         ret = eb_lookup_vmas(eb, exec, args, vm, file);
1077         if (ret)
1078                 goto err;
1079
1080         /* take note of the batch buffer before we might reorder the lists */
1081         batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
1082
1083         /* Move the objects en-masse into the GTT, evicting if necessary. */
1084         need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
1085         ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
1086         if (ret)
1087                 goto err;
1088
1089         /* The objects are in their final locations, apply the relocations. */
1090         if (need_relocs)
1091                 ret = i915_gem_execbuffer_relocate(eb, vm);
1092         if (ret) {
1093                 if (ret == -EFAULT) {
1094                         ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
1095                                                                 eb, exec);
1096                         BUG_ON(!mutex_is_locked(&dev->struct_mutex));
1097                 }
1098                 if (ret)
1099                         goto err;
1100         }
1101
1102         /* Set the pending read domains for the batch buffer to COMMAND */
1103         if (batch_obj->base.pending_write_domain) {
1104                 DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1105                 ret = -EINVAL;
1106                 goto err;
1107         }
1108         batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1109
1110         /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1111          * batch" bit. Hence we need to pin secure batches into the global gtt.
1112          * hsw should have this fixed, but let's be paranoid and do it
1113          * unconditionally for now. */
1114         if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1115                 i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1116
1117         ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
1118         if (ret)
1119                 goto err;
1120
1121         ret = i915_switch_context(ring, file, ctx_id);
1122         if (ret)
1123                 goto err;
1124
1125         if (ring == &dev_priv->ring[RCS] &&
1126             mode != dev_priv->relative_constants_mode) {
1127                 ret = intel_ring_begin(ring, 4);
1128                 if (ret)
1129                                 goto err;
1130
1131                 intel_ring_emit(ring, MI_NOOP);
1132                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1133                 intel_ring_emit(ring, INSTPM);
1134                 intel_ring_emit(ring, mask << 16 | mode);
1135                 intel_ring_advance(ring);
1136
1137                 dev_priv->relative_constants_mode = mode;
1138         }
1139
1140         if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1141                 ret = i915_reset_gen7_sol_offsets(dev, ring);
1142                 if (ret)
1143                         goto err;
1144         }
1145
1146         exec_start = i915_gem_obj_offset(batch_obj, vm) +
1147                 args->batch_start_offset;
1148         exec_len = args->batch_len;
1149         if (cliprects) {
1150                 for (i = 0; i < args->num_cliprects; i++) {
1151                         ret = i915_emit_box(dev, &cliprects[i],
1152                                             args->DR1, args->DR4);
1153                         if (ret)
1154                                 goto err;
1155
1156                         ret = ring->dispatch_execbuffer(ring,
1157                                                         exec_start, exec_len,
1158                                                         flags);
1159                         if (ret)
1160                                 goto err;
1161                 }
1162         } else {
1163                 ret = ring->dispatch_execbuffer(ring,
1164                                                 exec_start, exec_len,
1165                                                 flags);
1166                 if (ret)
1167                         goto err;
1168         }
1169
1170         trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1171
1172         i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
1173         i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
1174
1175 err:
1176         eb_destroy(eb);
1177
1178         mutex_unlock(&dev->struct_mutex);
1179
1180 pre_mutex_err:
1181         kfree(cliprects);
1182         return ret;
1183 }
1184
1185 /*
1186  * Legacy execbuffer just creates an exec2 list from the original exec object
1187  * list array and passes it to the real function.
1188  */
1189 int
1190 i915_gem_execbuffer(struct drm_device *dev, void *data,
1191                     struct drm_file *file)
1192 {
1193         struct drm_i915_private *dev_priv = dev->dev_private;
1194         struct drm_i915_gem_execbuffer *args = data;
1195         struct drm_i915_gem_execbuffer2 exec2;
1196         struct drm_i915_gem_exec_object *exec_list = NULL;
1197         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1198         int ret, i;
1199
1200         if (args->buffer_count < 1) {
1201                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1202                 return -EINVAL;
1203         }
1204
1205         /* Copy in the exec list from userland */
1206         exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1207         exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1208         if (exec_list == NULL || exec2_list == NULL) {
1209                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1210                           args->buffer_count);
1211                 drm_free_large(exec_list);
1212                 drm_free_large(exec2_list);
1213                 return -ENOMEM;
1214         }
1215         ret = copy_from_user(exec_list,
1216                              to_user_ptr(args->buffers_ptr),
1217                              sizeof(*exec_list) * args->buffer_count);
1218         if (ret != 0) {
1219                 DRM_DEBUG("copy %d exec entries failed %d\n",
1220                           args->buffer_count, ret);
1221                 drm_free_large(exec_list);
1222                 drm_free_large(exec2_list);
1223                 return -EFAULT;
1224         }
1225
1226         for (i = 0; i < args->buffer_count; i++) {
1227                 exec2_list[i].handle = exec_list[i].handle;
1228                 exec2_list[i].relocation_count = exec_list[i].relocation_count;
1229                 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1230                 exec2_list[i].alignment = exec_list[i].alignment;
1231                 exec2_list[i].offset = exec_list[i].offset;
1232                 if (INTEL_INFO(dev)->gen < 4)
1233                         exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1234                 else
1235                         exec2_list[i].flags = 0;
1236         }
1237
1238         exec2.buffers_ptr = args->buffers_ptr;
1239         exec2.buffer_count = args->buffer_count;
1240         exec2.batch_start_offset = args->batch_start_offset;
1241         exec2.batch_len = args->batch_len;
1242         exec2.DR1 = args->DR1;
1243         exec2.DR4 = args->DR4;
1244         exec2.num_cliprects = args->num_cliprects;
1245         exec2.cliprects_ptr = args->cliprects_ptr;
1246         exec2.flags = I915_EXEC_RENDER;
1247         i915_execbuffer2_set_context_id(exec2, 0);
1248
1249         ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
1250                                      &dev_priv->gtt.base);
1251         if (!ret) {
1252                 /* Copy the new buffer offsets back to the user's exec list. */
1253                 for (i = 0; i < args->buffer_count; i++)
1254                         exec_list[i].offset = exec2_list[i].offset;
1255                 /* ... and back out to userspace */
1256                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1257                                    exec_list,
1258                                    sizeof(*exec_list) * args->buffer_count);
1259                 if (ret) {
1260                         ret = -EFAULT;
1261                         DRM_DEBUG("failed to copy %d exec entries "
1262                                   "back to user (%d)\n",
1263                                   args->buffer_count, ret);
1264                 }
1265         }
1266
1267         drm_free_large(exec_list);
1268         drm_free_large(exec2_list);
1269         return ret;
1270 }
1271
1272 int
1273 i915_gem_execbuffer2(struct drm_device *dev, void *data,
1274                      struct drm_file *file)
1275 {
1276         struct drm_i915_private *dev_priv = dev->dev_private;
1277         struct drm_i915_gem_execbuffer2 *args = data;
1278         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1279         int ret;
1280
1281         if (args->buffer_count < 1 ||
1282             args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1283                 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1284                 return -EINVAL;
1285         }
1286
1287         exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1288                              GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
1289         if (exec2_list == NULL)
1290                 exec2_list = drm_malloc_ab(sizeof(*exec2_list),
1291                                            args->buffer_count);
1292         if (exec2_list == NULL) {
1293                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1294                           args->buffer_count);
1295                 return -ENOMEM;
1296         }
1297         ret = copy_from_user(exec2_list,
1298                              to_user_ptr(args->buffers_ptr),
1299                              sizeof(*exec2_list) * args->buffer_count);
1300         if (ret != 0) {
1301                 DRM_DEBUG("copy %d exec entries failed %d\n",
1302                           args->buffer_count, ret);
1303                 drm_free_large(exec2_list);
1304                 return -EFAULT;
1305         }
1306
1307         ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
1308                                      &dev_priv->gtt.base);
1309         if (!ret) {
1310                 /* Copy the new buffer offsets back to the user's exec list. */
1311                 ret = copy_to_user(to_user_ptr(args->buffers_ptr),
1312                                    exec2_list,
1313                                    sizeof(*exec2_list) * args->buffer_count);
1314                 if (ret) {
1315                         ret = -EFAULT;
1316                         DRM_DEBUG("failed to copy %d exec entries "
1317                                   "back to user (%d)\n",
1318                                   args->buffer_count, ret);
1319                 }
1320         }
1321
1322         drm_free_large(exec2_list);
1323         return ret;
1324 }