2 * edac_mc kernel module
3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
11 * Modified by Dave Peterson and Doug Thompson
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/ctype.h>
29 #include <linux/edac.h>
30 #include <linux/bitops.h>
31 #include <asm/uaccess.h>
34 #include "edac_core.h"
35 #include "edac_module.h"
37 #define CREATE_TRACE_POINTS
38 #define TRACE_INCLUDE_PATH ../../include/ras
39 #include <ras/ras_event.h>
41 /* lock to memory controller's control array */
42 static DEFINE_MUTEX(mem_ctls_mutex);
43 static LIST_HEAD(mc_devices);
45 #ifdef CONFIG_EDAC_DEBUG
47 static void edac_mc_dump_channel(struct rank_info *chan)
49 debugf4("\tchannel = %p\n", chan);
50 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
51 debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
52 debugf4("\tchannel->dimm = %p\n", chan->dimm);
55 static void edac_mc_dump_dimm(struct dimm_info *dimm)
59 debugf4("\tdimm = %p\n", dimm);
60 debugf4("\tdimm->label = '%s'\n", dimm->label);
61 debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
62 debugf4("\tdimm location ");
63 for (i = 0; i < dimm->mci->n_layers; i++) {
64 printk(KERN_CONT "%d", dimm->location[i]);
65 if (i < dimm->mci->n_layers - 1)
66 printk(KERN_CONT ".");
68 printk(KERN_CONT "\n");
69 debugf4("\tdimm->grain = %d\n", dimm->grain);
70 debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
73 static void edac_mc_dump_csrow(struct csrow_info *csrow)
75 debugf4("\tcsrow = %p\n", csrow);
76 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
77 debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page);
78 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
79 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
80 debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels);
81 debugf4("\tcsrow->channels = %p\n", csrow->channels);
82 debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
85 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
87 debugf3("\tmci = %p\n", mci);
88 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
89 debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
90 debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
91 debugf4("\tmci->edac_check = %p\n", mci->edac_check);
92 debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
93 mci->nr_csrows, mci->csrows);
94 debugf3("\tmci->nr_dimms = %d, dimms = %p\n",
95 mci->tot_dimms, mci->dimms);
96 debugf3("\tdev = %p\n", mci->pdev);
97 debugf3("\tmod_name:ctl_name = %s:%s\n", mci->mod_name, mci->ctl_name);
98 debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
101 #endif /* CONFIG_EDAC_DEBUG */
104 * keep those in sync with the enum mem_type
106 const char *edac_mem_types[] = {
108 "Reserved csrow type",
109 "Unknown csrow type",
110 "Fast page mode RAM",
111 "Extended data out RAM",
112 "Burst Extended data out RAM",
113 "Single data rate SDRAM",
114 "Registered single data rate SDRAM",
115 "Double data rate SDRAM",
116 "Registered Double data rate SDRAM",
118 "Unbuffered DDR2 RAM",
119 "Fully buffered DDR2",
120 "Registered DDR2 RAM",
122 "Unbuffered DDR3 RAM",
123 "Registered DDR3 RAM",
125 EXPORT_SYMBOL_GPL(edac_mem_types);
128 * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
129 * @p: pointer to a pointer with the memory offset to be used. At
130 * return, this will be incremented to point to the next offset
131 * @size: Size of the data structure to be reserved
132 * @n_elems: Number of elements that should be reserved
134 * If 'size' is a constant, the compiler will optimize this whole function
135 * down to either a no-op or the addition of a constant to the value of '*p'.
137 * The 'p' pointer is absolutely needed to keep the proper advancing
138 * further in memory to the proper offsets when allocating the struct along
139 * with its embedded structs, as edac_device_alloc_ctl_info() does it
140 * above, for example.
142 * At return, the pointer 'p' will be incremented to be used on a next call
145 void *edac_align_ptr(void **p, unsigned size, int n_elems)
150 *p += size * n_elems;
153 * 'p' can possibly be an unaligned item X such that sizeof(X) is
154 * 'size'. Adjust 'p' so that its alignment is at least as
155 * stringent as what the compiler would provide for X and return
156 * the aligned result.
157 * Here we assume that the alignment of a "long long" is the most
158 * stringent alignment that the compiler will ever provide by default.
159 * As far as I know, this is a reasonable assumption.
161 if (size > sizeof(long))
162 align = sizeof(long long);
163 else if (size > sizeof(int))
164 align = sizeof(long);
165 else if (size > sizeof(short))
167 else if (size > sizeof(char))
168 align = sizeof(short);
179 return (void *)(((unsigned long)ptr) + align - r);
183 * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure
184 * @mc_num: Memory controller number
185 * @n_layers: Number of MC hierarchy layers
186 * layers: Describes each layer as seen by the Memory Controller
187 * @size_pvt: size of private storage needed
190 * Everything is kmalloc'ed as one big chunk - more efficient.
191 * Only can be used if all structures have the same lifetime - otherwise
192 * you have to allocate and initialize your own structures.
194 * Use edac_mc_free() to free mc structures allocated by this function.
196 * NOTE: drivers handle multi-rank memories in different ways: in some
197 * drivers, one multi-rank memory stick is mapped as one entry, while, in
198 * others, a single multi-rank memory stick would be mapped into several
199 * entries. Currently, this function will allocate multiple struct dimm_info
200 * on such scenarios, as grouping the multiple ranks require drivers change.
204 * On success: struct mem_ctl_info pointer
206 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
208 struct edac_mc_layer *layers,
211 struct mem_ctl_info *mci;
212 struct edac_mc_layer *layer;
213 struct csrow_info *csr;
214 struct rank_info *chan;
215 struct dimm_info *dimm;
216 u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
217 unsigned pos[EDAC_MAX_LAYERS];
218 unsigned size, tot_dimms = 1, count = 1;
219 unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
220 void *pvt, *p, *ptr = NULL;
221 int i, j, row, chn, n, len, off;
222 bool per_rank = false;
224 BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
226 * Calculate the total amount of dimms and csrows/cschannels while
227 * in the old API emulation mode
229 for (i = 0; i < n_layers; i++) {
230 tot_dimms *= layers[i].size;
231 if (layers[i].is_virt_csrow)
232 tot_csrows *= layers[i].size;
234 tot_channels *= layers[i].size;
236 if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
240 /* Figure out the offsets of the various items from the start of an mc
241 * structure. We want the alignment of each item to be at least as
242 * stringent as what the compiler would provide if we could simply
243 * hardcode everything into a single struct.
245 mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
246 layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
247 for (i = 0; i < n_layers; i++) {
248 count *= layers[i].size;
249 debugf4("errcount layer %d size %d\n", i, count);
250 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
251 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
252 tot_errcount += 2 * count;
255 debugf4("allocating %d error counters\n", tot_errcount);
256 pvt = edac_align_ptr(&ptr, sz_pvt, 1);
257 size = ((unsigned long)pvt) + sz_pvt;
259 debugf1("allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
262 per_rank ? "ranks" : "dimms",
263 tot_csrows * tot_channels);
265 mci = kzalloc(size, GFP_KERNEL);
269 /* Adjust pointers so they point within the memory we just allocated
270 * rather than an imaginary chunk of memory located at address 0.
272 layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
273 for (i = 0; i < n_layers; i++) {
274 mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
275 mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
277 pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
279 /* setup index and various internal pointers */
280 mci->mc_idx = mc_num;
281 mci->tot_dimms = tot_dimms;
283 mci->n_layers = n_layers;
285 memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
286 mci->nr_csrows = tot_csrows;
287 mci->num_cschannel = tot_channels;
288 mci->mem_is_per_rank = per_rank;
291 * Alocate and fill the csrow/channels structs
293 mci->csrows = kcalloc(sizeof(*mci->csrows), tot_csrows, GFP_KERNEL);
296 for (row = 0; row < tot_csrows; row++) {
297 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
300 mci->csrows[row] = csr;
301 csr->csrow_idx = row;
303 csr->nr_channels = tot_channels;
304 csr->channels = kcalloc(sizeof(*csr->channels), tot_channels,
309 for (chn = 0; chn < tot_channels; chn++) {
310 chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
313 csr->channels[chn] = chan;
314 chan->chan_idx = chn;
320 * Allocate and fill the dimm structs
322 mci->dimms = kcalloc(sizeof(*mci->dimms), tot_dimms, GFP_KERNEL);
326 memset(&pos, 0, sizeof(pos));
329 debugf4("initializing %d %s\n", tot_dimms,
330 per_rank ? "ranks" : "dimms");
331 for (i = 0; i < tot_dimms; i++) {
332 chan = mci->csrows[row]->channels[chn];
333 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
334 if (off < 0 || off >= tot_dimms) {
335 edac_mc_printk(mci, KERN_ERR, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
339 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
340 mci->dimms[off] = dimm;
343 debugf2("%d: %s%i (%d:%d:%d): row %d, chan %d\n", i,
344 per_rank ? "rank" : "dimm", off,
345 pos[0], pos[1], pos[2], row, chn);
348 * Copy DIMM location and initialize it.
350 len = sizeof(dimm->label);
352 n = snprintf(p, len, "mc#%u", mc_num);
355 for (j = 0; j < n_layers; j++) {
356 n = snprintf(p, len, "%s#%u",
357 edac_layer_name[layers[j].type],
361 dimm->location[j] = pos[j];
367 /* Link it to the csrows old API data */
370 dimm->cschannel = chn;
372 /* Increment csrow location */
374 if (row == tot_csrows) {
379 /* Increment dimm location */
380 for (j = n_layers - 1; j >= 0; j--) {
382 if (pos[j] < layers[j].size)
388 mci->op_state = OP_ALLOC;
390 /* at this point, the root kobj is valid, and in order to
391 * 'free' the object, then the function:
392 * edac_mc_unregister_sysfs_main_kobj() must be called
393 * which will perform kobj unregistration and the actual free
394 * will occur during the kobject callback operation
401 for (i = 0; i < tot_dimms; i++)
402 kfree(mci->dimms[i]);
406 for (chn = 0; chn < tot_channels; chn++) {
407 csr = mci->csrows[chn];
409 for (chn = 0; chn < tot_channels; chn++)
410 kfree(csr->channels[chn]);
413 kfree(mci->csrows[i]);
421 EXPORT_SYMBOL_GPL(edac_mc_alloc);
425 * 'Free' a previously allocated 'mci' structure
426 * @mci: pointer to a struct mem_ctl_info structure
428 void edac_mc_free(struct mem_ctl_info *mci)
432 /* the mci instance is freed here, when the sysfs object is dropped */
433 edac_unregister_sysfs(mci);
435 EXPORT_SYMBOL_GPL(edac_mc_free);
441 * scan list of controllers looking for the one that manages
443 * @dev: pointer to a struct device related with the MCI
445 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
447 struct mem_ctl_info *mci;
448 struct list_head *item;
452 list_for_each(item, &mc_devices) {
453 mci = list_entry(item, struct mem_ctl_info, link);
455 if (mci->pdev == dev)
461 EXPORT_SYMBOL_GPL(find_mci_by_dev);
464 * handler for EDAC to check if NMI type handler has asserted interrupt
466 static int edac_mc_assert_error_check_and_clear(void)
470 if (edac_op_state == EDAC_OPSTATE_POLL)
473 old_state = edac_err_assert;
480 * edac_mc_workq_function
481 * performs the operation scheduled by a workq request
483 static void edac_mc_workq_function(struct work_struct *work_req)
485 struct delayed_work *d_work = to_delayed_work(work_req);
486 struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
488 mutex_lock(&mem_ctls_mutex);
490 /* if this control struct has movd to offline state, we are done */
491 if (mci->op_state == OP_OFFLINE) {
492 mutex_unlock(&mem_ctls_mutex);
496 /* Only poll controllers that are running polled and have a check */
497 if (edac_mc_assert_error_check_and_clear() && (mci->edac_check != NULL))
498 mci->edac_check(mci);
500 mutex_unlock(&mem_ctls_mutex);
503 queue_delayed_work(edac_workqueue, &mci->work,
504 msecs_to_jiffies(edac_mc_get_poll_msec()));
508 * edac_mc_workq_setup
509 * initialize a workq item for this mci
510 * passing in the new delay period in msec
514 * called with the mem_ctls_mutex held
516 static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
520 /* if this instance is not in the POLL state, then simply return */
521 if (mci->op_state != OP_RUNNING_POLL)
524 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
525 queue_delayed_work(edac_workqueue, &mci->work, msecs_to_jiffies(msec));
529 * edac_mc_workq_teardown
530 * stop the workq processing on this mci
534 * called WITHOUT lock held
536 static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
540 if (mci->op_state != OP_RUNNING_POLL)
543 status = cancel_delayed_work(&mci->work);
545 debugf0("not canceled, flush the queue\n");
547 /* workq instance might be running, wait for it */
548 flush_workqueue(edac_workqueue);
553 * edac_mc_reset_delay_period(unsigned long value)
555 * user space has updated our poll period value, need to
556 * reset our workq delays
558 void edac_mc_reset_delay_period(int value)
560 struct mem_ctl_info *mci;
561 struct list_head *item;
563 mutex_lock(&mem_ctls_mutex);
565 /* scan the list and turn off all workq timers, doing so under lock
567 list_for_each(item, &mc_devices) {
568 mci = list_entry(item, struct mem_ctl_info, link);
570 if (mci->op_state == OP_RUNNING_POLL)
571 cancel_delayed_work(&mci->work);
574 mutex_unlock(&mem_ctls_mutex);
577 /* re-walk the list, and reset the poll delay */
578 mutex_lock(&mem_ctls_mutex);
580 list_for_each(item, &mc_devices) {
581 mci = list_entry(item, struct mem_ctl_info, link);
583 edac_mc_workq_setup(mci, (unsigned long) value);
586 mutex_unlock(&mem_ctls_mutex);
591 /* Return 0 on success, 1 on failure.
592 * Before calling this function, caller must
593 * assign a unique value to mci->mc_idx.
597 * called with the mem_ctls_mutex lock held
599 static int add_mc_to_global_list(struct mem_ctl_info *mci)
601 struct list_head *item, *insert_before;
602 struct mem_ctl_info *p;
604 insert_before = &mc_devices;
606 p = find_mci_by_dev(mci->pdev);
607 if (unlikely(p != NULL))
610 list_for_each(item, &mc_devices) {
611 p = list_entry(item, struct mem_ctl_info, link);
613 if (p->mc_idx >= mci->mc_idx) {
614 if (unlikely(p->mc_idx == mci->mc_idx))
617 insert_before = item;
622 list_add_tail_rcu(&mci->link, insert_before);
623 atomic_inc(&edac_handlers);
627 edac_printk(KERN_WARNING, EDAC_MC,
628 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
629 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
633 edac_printk(KERN_WARNING, EDAC_MC,
634 "bug in low-level driver: attempt to assign\n"
635 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
639 static void del_mc_from_global_list(struct mem_ctl_info *mci)
641 atomic_dec(&edac_handlers);
642 list_del_rcu(&mci->link);
644 /* these are for safe removal of devices from global list while
645 * NMI handlers may be traversing list
648 INIT_LIST_HEAD(&mci->link);
652 * edac_mc_find: Search for a mem_ctl_info structure whose index is 'idx'.
654 * If found, return a pointer to the structure.
657 * Caller must hold mem_ctls_mutex.
659 struct mem_ctl_info *edac_mc_find(int idx)
661 struct list_head *item;
662 struct mem_ctl_info *mci;
664 list_for_each(item, &mc_devices) {
665 mci = list_entry(item, struct mem_ctl_info, link);
667 if (mci->mc_idx >= idx) {
668 if (mci->mc_idx == idx)
677 EXPORT_SYMBOL(edac_mc_find);
680 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
681 * create sysfs entries associated with mci structure
682 * @mci: pointer to the mci structure to be added to the list
689 /* FIXME - should a warning be printed if no error detection? correction? */
690 int edac_mc_add_mc(struct mem_ctl_info *mci)
694 #ifdef CONFIG_EDAC_DEBUG
695 if (edac_debug_level >= 3)
696 edac_mc_dump_mci(mci);
698 if (edac_debug_level >= 4) {
701 for (i = 0; i < mci->nr_csrows; i++) {
704 edac_mc_dump_csrow(mci->csrows[i]);
705 for (j = 0; j < mci->csrows[i]->nr_channels; j++)
706 edac_mc_dump_channel(mci->csrows[i]->channels[j]);
708 for (i = 0; i < mci->tot_dimms; i++)
709 edac_mc_dump_dimm(mci->dimms[i]);
712 mutex_lock(&mem_ctls_mutex);
714 if (add_mc_to_global_list(mci))
717 /* set load time so that error rate can be tracked */
718 mci->start_time = jiffies;
720 if (edac_create_sysfs_mci_device(mci)) {
721 edac_mc_printk(mci, KERN_WARNING,
722 "failed to create sysfs device\n");
726 /* If there IS a check routine, then we are running POLLED */
727 if (mci->edac_check != NULL) {
728 /* This instance is NOW RUNNING */
729 mci->op_state = OP_RUNNING_POLL;
731 edac_mc_workq_setup(mci, edac_mc_get_poll_msec());
733 mci->op_state = OP_RUNNING_INTERRUPT;
736 /* Report action taken */
737 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':"
738 " DEV %s\n", mci->mod_name, mci->ctl_name, edac_dev_name(mci));
740 mutex_unlock(&mem_ctls_mutex);
744 del_mc_from_global_list(mci);
747 mutex_unlock(&mem_ctls_mutex);
750 EXPORT_SYMBOL_GPL(edac_mc_add_mc);
753 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
754 * remove mci structure from global list
755 * @pdev: Pointer to 'struct device' representing mci structure to remove.
757 * Return pointer to removed mci structure, or NULL if device not found.
759 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
761 struct mem_ctl_info *mci;
765 mutex_lock(&mem_ctls_mutex);
767 /* find the requested mci struct in the global list */
768 mci = find_mci_by_dev(dev);
770 mutex_unlock(&mem_ctls_mutex);
774 del_mc_from_global_list(mci);
775 mutex_unlock(&mem_ctls_mutex);
777 /* flush workq processes */
778 edac_mc_workq_teardown(mci);
780 /* marking MCI offline */
781 mci->op_state = OP_OFFLINE;
783 /* remove from sysfs */
784 edac_remove_sysfs_mci_device(mci);
786 edac_printk(KERN_INFO, EDAC_MC,
787 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
788 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
792 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
794 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
799 unsigned long flags = 0;
803 /* ECC error page was not in our memory. Ignore it. */
804 if (!pfn_valid(page))
807 /* Find the actual page structure then map it and fix */
808 pg = pfn_to_page(page);
811 local_irq_save(flags);
813 virt_addr = kmap_atomic(pg);
815 /* Perform architecture specific atomic scrub operation */
816 atomic_scrub(virt_addr + offset, size);
818 /* Unmap and complete */
819 kunmap_atomic(virt_addr);
822 local_irq_restore(flags);
825 /* FIXME - should return -1 */
826 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
828 struct csrow_info **csrows = mci->csrows;
831 debugf1("MC%d: 0x%lx\n", mci->mc_idx, page);
834 for (i = 0; i < mci->nr_csrows; i++) {
835 struct csrow_info *csrow = csrows[i];
837 for (j = 0; j < csrow->nr_channels; j++) {
838 struct dimm_info *dimm = csrow->channels[j]->dimm;
844 debugf3("MC%d: first(0x%lx) page(0x%lx) last(0x%lx) "
845 "mask(0x%lx)\n", mci->mc_idx,
846 csrow->first_page, page, csrow->last_page,
849 if ((page >= csrow->first_page) &&
850 (page <= csrow->last_page) &&
851 ((page & csrow->page_mask) ==
852 (csrow->first_page & csrow->page_mask))) {
859 edac_mc_printk(mci, KERN_ERR,
860 "could not look up page error address %lx\n",
861 (unsigned long)page);
865 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
867 const char *edac_layer_name[] = {
868 [EDAC_MC_LAYER_BRANCH] = "branch",
869 [EDAC_MC_LAYER_CHANNEL] = "channel",
870 [EDAC_MC_LAYER_SLOT] = "slot",
871 [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
873 EXPORT_SYMBOL_GPL(edac_layer_name);
875 static void edac_inc_ce_error(struct mem_ctl_info *mci,
876 bool enable_per_layer_report,
877 const int pos[EDAC_MAX_LAYERS])
883 if (!enable_per_layer_report) {
884 mci->ce_noinfo_count++;
888 for (i = 0; i < mci->n_layers; i++) {
892 mci->ce_per_layer[i][index]++;
894 if (i < mci->n_layers - 1)
895 index *= mci->layers[i + 1].size;
899 static void edac_inc_ue_error(struct mem_ctl_info *mci,
900 bool enable_per_layer_report,
901 const int pos[EDAC_MAX_LAYERS])
907 if (!enable_per_layer_report) {
908 mci->ce_noinfo_count++;
912 for (i = 0; i < mci->n_layers; i++) {
916 mci->ue_per_layer[i][index]++;
918 if (i < mci->n_layers - 1)
919 index *= mci->layers[i + 1].size;
923 static void edac_ce_error(struct mem_ctl_info *mci,
924 const int pos[EDAC_MAX_LAYERS],
926 const char *location,
929 const char *other_detail,
930 const bool enable_per_layer_report,
931 const unsigned long page_frame_number,
932 const unsigned long offset_in_page,
935 unsigned long remapped_page;
937 if (edac_mc_get_log_ce()) {
938 if (other_detail && *other_detail)
939 edac_mc_printk(mci, KERN_WARNING,
940 "CE %s on %s (%s %s - %s)\n",
941 msg, label, location,
942 detail, other_detail);
944 edac_mc_printk(mci, KERN_WARNING,
945 "CE %s on %s (%s %s)\n",
946 msg, label, location,
949 edac_inc_ce_error(mci, enable_per_layer_report, pos);
951 if (mci->scrub_mode & SCRUB_SW_SRC) {
953 * Some memory controllers (called MCs below) can remap
954 * memory so that it is still available at a different
955 * address when PCI devices map into memory.
956 * MC's that can't do this, lose the memory where PCI
957 * devices are mapped. This mapping is MC-dependent
958 * and so we call back into the MC driver for it to
959 * map the MC page to a physical (CPU) page which can
960 * then be mapped to a virtual page - which can then
963 remapped_page = mci->ctl_page_to_phys ?
964 mci->ctl_page_to_phys(mci, page_frame_number) :
967 edac_mc_scrub_block(remapped_page,
968 offset_in_page, grain);
972 static void edac_ue_error(struct mem_ctl_info *mci,
973 const int pos[EDAC_MAX_LAYERS],
975 const char *location,
978 const char *other_detail,
979 const bool enable_per_layer_report)
981 if (edac_mc_get_log_ue()) {
982 if (other_detail && *other_detail)
983 edac_mc_printk(mci, KERN_WARNING,
984 "UE %s on %s (%s %s - %s)\n",
985 msg, label, location, detail,
988 edac_mc_printk(mci, KERN_WARNING,
989 "UE %s on %s (%s %s)\n",
990 msg, label, location, detail);
993 if (edac_mc_get_panic_on_ue()) {
994 if (other_detail && *other_detail)
995 panic("UE %s on %s (%s%s - %s)\n",
996 msg, label, location, detail, other_detail);
998 panic("UE %s on %s (%s%s)\n",
999 msg, label, location, detail);
1002 edac_inc_ue_error(mci, enable_per_layer_report, pos);
1005 #define OTHER_LABEL " or "
1008 * edac_mc_handle_error - reports a memory event to userspace
1010 * @type: severity of the error (CE/UE/Fatal)
1011 * @mci: a struct mem_ctl_info pointer
1012 * @page_frame_number: mem page where the error occurred
1013 * @offset_in_page: offset of the error inside the page
1014 * @syndrome: ECC syndrome
1015 * @top_layer: Memory layer[0] position
1016 * @mid_layer: Memory layer[1] position
1017 * @low_layer: Memory layer[2] position
1018 * @msg: Message meaningful to the end users that
1019 * explains the event
1020 * @other_detail: Technical details about the event that
1021 * may help hardware manufacturers and
1022 * EDAC developers to analyse the event
1023 * @arch_log: Architecture-specific struct that can
1024 * be used to add extended information to the
1025 * tracepoint, like dumping MCE registers.
1027 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1028 struct mem_ctl_info *mci,
1029 const unsigned long page_frame_number,
1030 const unsigned long offset_in_page,
1031 const unsigned long syndrome,
1032 const int top_layer,
1033 const int mid_layer,
1034 const int low_layer,
1036 const char *other_detail,
1037 const void *arch_log)
1039 /* FIXME: too much for stack: move it to some pre-alocated area */
1040 char detail[80], location[80];
1041 char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci->tot_dimms];
1043 int row = -1, chan = -1;
1044 int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1047 bool enable_per_layer_report = false;
1048 u16 error_count; /* FIXME: make it a parameter */
1051 debugf3("MC%d\n", mci->mc_idx);
1054 * Check if the event report is consistent and if the memory
1055 * location is known. If it is known, enable_per_layer_report will be
1056 * true, the DIMM(s) label info will be filled and the per-layer
1057 * error counters will be incremented.
1059 for (i = 0; i < mci->n_layers; i++) {
1060 if (pos[i] >= (int)mci->layers[i].size) {
1061 if (type == HW_EVENT_ERR_CORRECTED)
1066 edac_mc_printk(mci, KERN_ERR,
1067 "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1068 edac_layer_name[mci->layers[i].type],
1069 pos[i], mci->layers[i].size);
1071 * Instead of just returning it, let's use what's
1072 * known about the error. The increment routines and
1073 * the DIMM filter logic will do the right thing by
1074 * pointing the likely damaged DIMMs.
1079 enable_per_layer_report = true;
1083 * Get the dimm label/grain that applies to the match criteria.
1084 * As the error algorithm may not be able to point to just one memory
1085 * stick, the logic here will get all possible labels that could
1086 * pottentially be affected by the error.
1087 * On FB-DIMM memory controllers, for uncorrected errors, it is common
1088 * to have only the MC channel and the MC dimm (also called "branch")
1089 * but the channel is not known, as the memory is arranged in pairs,
1090 * where each memory belongs to a separate channel within the same
1096 for (i = 0; i < mci->tot_dimms; i++) {
1097 struct dimm_info *dimm = mci->dimms[i];
1099 if (top_layer >= 0 && top_layer != dimm->location[0])
1101 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1103 if (low_layer >= 0 && low_layer != dimm->location[2])
1106 /* get the max grain, over the error match range */
1107 if (dimm->grain > grain)
1108 grain = dimm->grain;
1111 * If the error is memory-controller wide, there's no need to
1112 * seek for the affected DIMMs because the whole
1113 * channel/memory controller/... may be affected.
1114 * Also, don't show errors for empty DIMM slots.
1116 if (enable_per_layer_report && dimm->nr_pages) {
1118 strcpy(p, OTHER_LABEL);
1119 p += strlen(OTHER_LABEL);
1121 strcpy(p, dimm->label);
1126 * get csrow/channel of the DIMM, in order to allow
1127 * incrementing the compat API counters
1129 debugf4("%s csrows map: (%d,%d)\n",
1130 mci->mem_is_per_rank ? "rank" : "dimm",
1131 dimm->csrow, dimm->cschannel);
1135 else if (row >= 0 && row != dimm->csrow)
1139 chan = dimm->cschannel;
1140 else if (chan >= 0 && chan != dimm->cschannel)
1145 if (!enable_per_layer_report) {
1146 strcpy(label, "any memory");
1148 debugf4("csrow/channel to increment: (%d,%d)\n",
1151 strcpy(label, "unknown memory");
1152 if (type == HW_EVENT_ERR_CORRECTED) {
1154 mci->csrows[row]->ce_count++;
1156 mci->csrows[row]->channels[chan]->ce_count++;
1160 mci->csrows[row]->ue_count++;
1163 /* Fill the RAM location data */
1165 for (i = 0; i < mci->n_layers; i++) {
1169 p += sprintf(p, "%s:%d ",
1170 edac_layer_name[mci->layers[i].type],
1176 /* Report the error via the trace interface */
1178 error_count = 1; /* FIXME: allow change it */
1179 grain_bits = fls_long(grain) + 1;
1180 trace_mc_event(type, msg, label, error_count,
1181 mci->mc_idx, top_layer, mid_layer, low_layer,
1182 PAGES_TO_MiB(page_frame_number) | offset_in_page,
1183 grain_bits, syndrome, other_detail);
1185 /* Memory type dependent details about the error */
1186 if (type == HW_EVENT_ERR_CORRECTED) {
1187 snprintf(detail, sizeof(detail),
1188 "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1189 page_frame_number, offset_in_page,
1191 edac_ce_error(mci, pos, msg, location, label, detail,
1192 other_detail, enable_per_layer_report,
1193 page_frame_number, offset_in_page, grain);
1195 snprintf(detail, sizeof(detail),
1196 "page:0x%lx offset:0x%lx grain:%ld",
1197 page_frame_number, offset_in_page, grain);
1199 edac_ue_error(mci, pos, msg, location, label, detail,
1200 other_detail, enable_per_layer_report);
1203 EXPORT_SYMBOL_GPL(edac_mc_handle_error);