2 * edac_mc kernel module
3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
11 * Modified by Dave Peterson and Doug Thompson
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/ctype.h>
29 #include <linux/edac.h>
30 #include <linux/bitops.h>
31 #include <asm/uaccess.h>
34 #include "edac_core.h"
35 #include "edac_module.h"
37 #define CREATE_TRACE_POINTS
38 #define TRACE_INCLUDE_PATH ../../include/ras
39 #include <ras/ras_event.h>
41 /* lock to memory controller's control array */
42 static DEFINE_MUTEX(mem_ctls_mutex);
43 static LIST_HEAD(mc_devices);
45 #ifdef CONFIG_EDAC_DEBUG
47 static void edac_mc_dump_channel(struct rank_info *chan)
49 debugf4("\tchannel = %p\n", chan);
50 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
51 debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
52 debugf4("\tchannel->dimm = %p\n", chan->dimm);
55 static void edac_mc_dump_dimm(struct dimm_info *dimm)
59 debugf4("\tdimm = %p\n", dimm);
60 debugf4("\tdimm->label = '%s'\n", dimm->label);
61 debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
62 debugf4("\tdimm location ");
63 for (i = 0; i < dimm->mci->n_layers; i++) {
64 printk(KERN_CONT "%d", dimm->location[i]);
65 if (i < dimm->mci->n_layers - 1)
66 printk(KERN_CONT ".");
68 printk(KERN_CONT "\n");
69 debugf4("\tdimm->grain = %d\n", dimm->grain);
70 debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
73 static void edac_mc_dump_csrow(struct csrow_info *csrow)
75 debugf4("\tcsrow = %p\n", csrow);
76 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
77 debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page);
78 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
79 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
80 debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels);
81 debugf4("\tcsrow->channels = %p\n", csrow->channels);
82 debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
85 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
87 debugf3("\tmci = %p\n", mci);
88 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
89 debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
90 debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
91 debugf4("\tmci->edac_check = %p\n", mci->edac_check);
92 debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
93 mci->nr_csrows, mci->csrows);
94 debugf3("\tmci->nr_dimms = %d, dimms = %p\n",
95 mci->tot_dimms, mci->dimms);
96 debugf3("\tdev = %p\n", mci->pdev);
97 debugf3("\tmod_name:ctl_name = %s:%s\n", mci->mod_name, mci->ctl_name);
98 debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
101 #endif /* CONFIG_EDAC_DEBUG */
104 * keep those in sync with the enum mem_type
106 const char *edac_mem_types[] = {
108 "Reserved csrow type",
109 "Unknown csrow type",
110 "Fast page mode RAM",
111 "Extended data out RAM",
112 "Burst Extended data out RAM",
113 "Single data rate SDRAM",
114 "Registered single data rate SDRAM",
115 "Double data rate SDRAM",
116 "Registered Double data rate SDRAM",
118 "Unbuffered DDR2 RAM",
119 "Fully buffered DDR2",
120 "Registered DDR2 RAM",
122 "Unbuffered DDR3 RAM",
123 "Registered DDR3 RAM",
125 EXPORT_SYMBOL_GPL(edac_mem_types);
128 * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
129 * @p: pointer to a pointer with the memory offset to be used. At
130 * return, this will be incremented to point to the next offset
131 * @size: Size of the data structure to be reserved
132 * @n_elems: Number of elements that should be reserved
134 * If 'size' is a constant, the compiler will optimize this whole function
135 * down to either a no-op or the addition of a constant to the value of '*p'.
137 * The 'p' pointer is absolutely needed to keep the proper advancing
138 * further in memory to the proper offsets when allocating the struct along
139 * with its embedded structs, as edac_device_alloc_ctl_info() does it
140 * above, for example.
142 * At return, the pointer 'p' will be incremented to be used on a next call
145 void *edac_align_ptr(void **p, unsigned size, int n_elems)
150 *p += size * n_elems;
153 * 'p' can possibly be an unaligned item X such that sizeof(X) is
154 * 'size'. Adjust 'p' so that its alignment is at least as
155 * stringent as what the compiler would provide for X and return
156 * the aligned result.
157 * Here we assume that the alignment of a "long long" is the most
158 * stringent alignment that the compiler will ever provide by default.
159 * As far as I know, this is a reasonable assumption.
161 if (size > sizeof(long))
162 align = sizeof(long long);
163 else if (size > sizeof(int))
164 align = sizeof(long);
165 else if (size > sizeof(short))
167 else if (size > sizeof(char))
168 align = sizeof(short);
179 return (void *)(((unsigned long)ptr) + align - r);
183 * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure
184 * @mc_num: Memory controller number
185 * @n_layers: Number of MC hierarchy layers
186 * layers: Describes each layer as seen by the Memory Controller
187 * @size_pvt: size of private storage needed
190 * Everything is kmalloc'ed as one big chunk - more efficient.
191 * Only can be used if all structures have the same lifetime - otherwise
192 * you have to allocate and initialize your own structures.
194 * Use edac_mc_free() to free mc structures allocated by this function.
196 * NOTE: drivers handle multi-rank memories in different ways: in some
197 * drivers, one multi-rank memory stick is mapped as one entry, while, in
198 * others, a single multi-rank memory stick would be mapped into several
199 * entries. Currently, this function will allocate multiple struct dimm_info
200 * on such scenarios, as grouping the multiple ranks require drivers change.
204 * On success: struct mem_ctl_info pointer
206 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
208 struct edac_mc_layer *layers,
211 struct mem_ctl_info *mci;
212 struct edac_mc_layer *layer;
213 struct csrow_info *csi, *csr;
214 struct rank_info *chi, *chp, *chan;
215 struct dimm_info *dimm;
216 u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
217 unsigned pos[EDAC_MAX_LAYERS];
218 unsigned size, tot_dimms = 1, count = 1;
219 unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
220 void *pvt, *p, *ptr = NULL;
221 int i, j, row, chn, n, len;
222 bool per_rank = false;
224 BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
226 * Calculate the total amount of dimms and csrows/cschannels while
227 * in the old API emulation mode
229 for (i = 0; i < n_layers; i++) {
230 tot_dimms *= layers[i].size;
231 if (layers[i].is_virt_csrow)
232 tot_csrows *= layers[i].size;
234 tot_channels *= layers[i].size;
236 if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
240 /* Figure out the offsets of the various items from the start of an mc
241 * structure. We want the alignment of each item to be at least as
242 * stringent as what the compiler would provide if we could simply
243 * hardcode everything into a single struct.
245 mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
246 layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
247 csi = edac_align_ptr(&ptr, sizeof(*csi), tot_csrows);
248 chi = edac_align_ptr(&ptr, sizeof(*chi), tot_csrows * tot_channels);
249 dimm = edac_align_ptr(&ptr, sizeof(*dimm), tot_dimms);
250 for (i = 0; i < n_layers; i++) {
251 count *= layers[i].size;
252 debugf4("%s: errcount layer %d size %d\n", __func__, i, count);
253 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
254 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
255 tot_errcount += 2 * count;
258 debugf4("%s: allocating %d error counters\n", __func__, tot_errcount);
259 pvt = edac_align_ptr(&ptr, sz_pvt, 1);
260 size = ((unsigned long)pvt) + sz_pvt;
262 debugf1("%s(): allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
265 per_rank ? "ranks" : "dimms",
266 tot_csrows * tot_channels);
267 mci = kzalloc(size, GFP_KERNEL);
271 /* Adjust pointers so they point within the memory we just allocated
272 * rather than an imaginary chunk of memory located at address 0.
274 layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
275 csi = (struct csrow_info *)(((char *)mci) + ((unsigned long)csi));
276 chi = (struct rank_info *)(((char *)mci) + ((unsigned long)chi));
277 dimm = (struct dimm_info *)(((char *)mci) + ((unsigned long)dimm));
278 for (i = 0; i < n_layers; i++) {
279 mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
280 mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
282 pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
284 /* setup index and various internal pointers */
285 mci->mc_idx = mc_num;
288 mci->tot_dimms = tot_dimms;
290 mci->n_layers = n_layers;
292 memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
293 mci->nr_csrows = tot_csrows;
294 mci->num_cschannel = tot_channels;
295 mci->mem_is_per_rank = per_rank;
298 * Fill the csrow struct
300 for (row = 0; row < tot_csrows; row++) {
302 csr->csrow_idx = row;
304 csr->nr_channels = tot_channels;
305 chp = &chi[row * tot_channels];
308 for (chn = 0; chn < tot_channels; chn++) {
310 chan->chan_idx = chn;
316 * Fill the dimm struct
318 memset(&pos, 0, sizeof(pos));
321 debugf4("%s: initializing %d %s\n", __func__, tot_dimms,
322 per_rank ? "ranks" : "dimms");
323 for (i = 0; i < tot_dimms; i++) {
324 chan = &csi[row].channels[chn];
325 dimm = EDAC_DIMM_PTR(layer, mci->dimms, n_layers,
326 pos[0], pos[1], pos[2]);
329 debugf2("%s: %d: %s%zd (%d:%d:%d): row %d, chan %d\n", __func__,
330 i, per_rank ? "rank" : "dimm", (dimm - mci->dimms),
331 pos[0], pos[1], pos[2], row, chn);
334 * Copy DIMM location and initialize it.
336 len = sizeof(dimm->label);
338 n = snprintf(p, len, "mc#%u", mc_num);
341 for (j = 0; j < n_layers; j++) {
342 n = snprintf(p, len, "%s#%u",
343 edac_layer_name[layers[j].type],
347 dimm->location[j] = pos[j];
353 /* Link it to the csrows old API data */
356 dimm->cschannel = chn;
358 /* Increment csrow location */
360 if (row == tot_csrows) {
365 /* Increment dimm location */
366 for (j = n_layers - 1; j >= 0; j--) {
368 if (pos[j] < layers[j].size)
374 mci->op_state = OP_ALLOC;
376 /* at this point, the root kobj is valid, and in order to
377 * 'free' the object, then the function:
378 * edac_mc_unregister_sysfs_main_kobj() must be called
379 * which will perform kobj unregistration and the actual free
380 * will occur during the kobject callback operation
385 EXPORT_SYMBOL_GPL(edac_mc_alloc);
389 * 'Free' a previously allocated 'mci' structure
390 * @mci: pointer to a struct mem_ctl_info structure
392 void edac_mc_free(struct mem_ctl_info *mci)
394 debugf1("%s()\n", __func__);
396 edac_unregister_sysfs(mci);
398 /* free the mci instance memory here */
401 EXPORT_SYMBOL_GPL(edac_mc_free);
407 * scan list of controllers looking for the one that manages
409 * @dev: pointer to a struct device related with the MCI
411 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
413 struct mem_ctl_info *mci;
414 struct list_head *item;
416 debugf3("%s()\n", __func__);
418 list_for_each(item, &mc_devices) {
419 mci = list_entry(item, struct mem_ctl_info, link);
421 if (mci->pdev == dev)
427 EXPORT_SYMBOL_GPL(find_mci_by_dev);
430 * handler for EDAC to check if NMI type handler has asserted interrupt
432 static int edac_mc_assert_error_check_and_clear(void)
436 if (edac_op_state == EDAC_OPSTATE_POLL)
439 old_state = edac_err_assert;
446 * edac_mc_workq_function
447 * performs the operation scheduled by a workq request
449 static void edac_mc_workq_function(struct work_struct *work_req)
451 struct delayed_work *d_work = to_delayed_work(work_req);
452 struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
454 mutex_lock(&mem_ctls_mutex);
456 /* if this control struct has movd to offline state, we are done */
457 if (mci->op_state == OP_OFFLINE) {
458 mutex_unlock(&mem_ctls_mutex);
462 /* Only poll controllers that are running polled and have a check */
463 if (edac_mc_assert_error_check_and_clear() && (mci->edac_check != NULL))
464 mci->edac_check(mci);
466 mutex_unlock(&mem_ctls_mutex);
469 queue_delayed_work(edac_workqueue, &mci->work,
470 msecs_to_jiffies(edac_mc_get_poll_msec()));
474 * edac_mc_workq_setup
475 * initialize a workq item for this mci
476 * passing in the new delay period in msec
480 * called with the mem_ctls_mutex held
482 static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
484 debugf0("%s()\n", __func__);
486 /* if this instance is not in the POLL state, then simply return */
487 if (mci->op_state != OP_RUNNING_POLL)
490 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
491 queue_delayed_work(edac_workqueue, &mci->work, msecs_to_jiffies(msec));
495 * edac_mc_workq_teardown
496 * stop the workq processing on this mci
500 * called WITHOUT lock held
502 static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
506 if (mci->op_state != OP_RUNNING_POLL)
509 status = cancel_delayed_work(&mci->work);
511 debugf0("%s() not canceled, flush the queue\n",
514 /* workq instance might be running, wait for it */
515 flush_workqueue(edac_workqueue);
520 * edac_mc_reset_delay_period(unsigned long value)
522 * user space has updated our poll period value, need to
523 * reset our workq delays
525 void edac_mc_reset_delay_period(int value)
527 struct mem_ctl_info *mci;
528 struct list_head *item;
530 mutex_lock(&mem_ctls_mutex);
532 /* scan the list and turn off all workq timers, doing so under lock
534 list_for_each(item, &mc_devices) {
535 mci = list_entry(item, struct mem_ctl_info, link);
537 if (mci->op_state == OP_RUNNING_POLL)
538 cancel_delayed_work(&mci->work);
541 mutex_unlock(&mem_ctls_mutex);
544 /* re-walk the list, and reset the poll delay */
545 mutex_lock(&mem_ctls_mutex);
547 list_for_each(item, &mc_devices) {
548 mci = list_entry(item, struct mem_ctl_info, link);
550 edac_mc_workq_setup(mci, (unsigned long) value);
553 mutex_unlock(&mem_ctls_mutex);
558 /* Return 0 on success, 1 on failure.
559 * Before calling this function, caller must
560 * assign a unique value to mci->mc_idx.
564 * called with the mem_ctls_mutex lock held
566 static int add_mc_to_global_list(struct mem_ctl_info *mci)
568 struct list_head *item, *insert_before;
569 struct mem_ctl_info *p;
571 insert_before = &mc_devices;
573 p = find_mci_by_dev(mci->pdev);
574 if (unlikely(p != NULL))
577 list_for_each(item, &mc_devices) {
578 p = list_entry(item, struct mem_ctl_info, link);
580 if (p->mc_idx >= mci->mc_idx) {
581 if (unlikely(p->mc_idx == mci->mc_idx))
584 insert_before = item;
589 list_add_tail_rcu(&mci->link, insert_before);
590 atomic_inc(&edac_handlers);
594 edac_printk(KERN_WARNING, EDAC_MC,
595 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
596 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
600 edac_printk(KERN_WARNING, EDAC_MC,
601 "bug in low-level driver: attempt to assign\n"
602 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
606 static void del_mc_from_global_list(struct mem_ctl_info *mci)
608 atomic_dec(&edac_handlers);
609 list_del_rcu(&mci->link);
611 /* these are for safe removal of devices from global list while
612 * NMI handlers may be traversing list
615 INIT_LIST_HEAD(&mci->link);
619 * edac_mc_find: Search for a mem_ctl_info structure whose index is 'idx'.
621 * If found, return a pointer to the structure.
624 * Caller must hold mem_ctls_mutex.
626 struct mem_ctl_info *edac_mc_find(int idx)
628 struct list_head *item;
629 struct mem_ctl_info *mci;
631 list_for_each(item, &mc_devices) {
632 mci = list_entry(item, struct mem_ctl_info, link);
634 if (mci->mc_idx >= idx) {
635 if (mci->mc_idx == idx)
644 EXPORT_SYMBOL(edac_mc_find);
647 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
648 * create sysfs entries associated with mci structure
649 * @mci: pointer to the mci structure to be added to the list
656 /* FIXME - should a warning be printed if no error detection? correction? */
657 int edac_mc_add_mc(struct mem_ctl_info *mci)
659 debugf0("%s()\n", __func__);
661 #ifdef CONFIG_EDAC_DEBUG
662 if (edac_debug_level >= 3)
663 edac_mc_dump_mci(mci);
665 if (edac_debug_level >= 4) {
668 for (i = 0; i < mci->nr_csrows; i++) {
671 edac_mc_dump_csrow(&mci->csrows[i]);
672 for (j = 0; j < mci->csrows[i].nr_channels; j++)
673 edac_mc_dump_channel(&mci->csrows[i].
676 for (i = 0; i < mci->tot_dimms; i++)
677 edac_mc_dump_dimm(&mci->dimms[i]);
680 mutex_lock(&mem_ctls_mutex);
682 if (add_mc_to_global_list(mci))
685 /* set load time so that error rate can be tracked */
686 mci->start_time = jiffies;
688 if (edac_create_sysfs_mci_device(mci)) {
689 edac_mc_printk(mci, KERN_WARNING,
690 "failed to create sysfs device\n");
694 /* If there IS a check routine, then we are running POLLED */
695 if (mci->edac_check != NULL) {
696 /* This instance is NOW RUNNING */
697 mci->op_state = OP_RUNNING_POLL;
699 edac_mc_workq_setup(mci, edac_mc_get_poll_msec());
701 mci->op_state = OP_RUNNING_INTERRUPT;
704 /* Report action taken */
705 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':"
706 " DEV %s\n", mci->mod_name, mci->ctl_name, edac_dev_name(mci));
708 mutex_unlock(&mem_ctls_mutex);
712 del_mc_from_global_list(mci);
715 mutex_unlock(&mem_ctls_mutex);
718 EXPORT_SYMBOL_GPL(edac_mc_add_mc);
721 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
722 * remove mci structure from global list
723 * @pdev: Pointer to 'struct device' representing mci structure to remove.
725 * Return pointer to removed mci structure, or NULL if device not found.
727 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
729 struct mem_ctl_info *mci;
731 debugf0("%s()\n", __func__);
733 mutex_lock(&mem_ctls_mutex);
735 /* find the requested mci struct in the global list */
736 mci = find_mci_by_dev(dev);
738 mutex_unlock(&mem_ctls_mutex);
742 del_mc_from_global_list(mci);
743 mutex_unlock(&mem_ctls_mutex);
745 /* flush workq processes */
746 edac_mc_workq_teardown(mci);
748 /* marking MCI offline */
749 mci->op_state = OP_OFFLINE;
751 /* remove from sysfs */
752 edac_remove_sysfs_mci_device(mci);
754 edac_printk(KERN_INFO, EDAC_MC,
755 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
756 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
760 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
762 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
767 unsigned long flags = 0;
769 debugf3("%s()\n", __func__);
771 /* ECC error page was not in our memory. Ignore it. */
772 if (!pfn_valid(page))
775 /* Find the actual page structure then map it and fix */
776 pg = pfn_to_page(page);
779 local_irq_save(flags);
781 virt_addr = kmap_atomic(pg);
783 /* Perform architecture specific atomic scrub operation */
784 atomic_scrub(virt_addr + offset, size);
786 /* Unmap and complete */
787 kunmap_atomic(virt_addr);
790 local_irq_restore(flags);
793 /* FIXME - should return -1 */
794 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
796 struct csrow_info *csrows = mci->csrows;
799 debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
802 for (i = 0; i < mci->nr_csrows; i++) {
803 struct csrow_info *csrow = &csrows[i];
805 for (j = 0; j < csrow->nr_channels; j++) {
806 struct dimm_info *dimm = csrow->channels[j].dimm;
812 debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
813 "mask(0x%lx)\n", mci->mc_idx, __func__,
814 csrow->first_page, page, csrow->last_page,
817 if ((page >= csrow->first_page) &&
818 (page <= csrow->last_page) &&
819 ((page & csrow->page_mask) ==
820 (csrow->first_page & csrow->page_mask))) {
827 edac_mc_printk(mci, KERN_ERR,
828 "could not look up page error address %lx\n",
829 (unsigned long)page);
833 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
835 const char *edac_layer_name[] = {
836 [EDAC_MC_LAYER_BRANCH] = "branch",
837 [EDAC_MC_LAYER_CHANNEL] = "channel",
838 [EDAC_MC_LAYER_SLOT] = "slot",
839 [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
841 EXPORT_SYMBOL_GPL(edac_layer_name);
843 static void edac_inc_ce_error(struct mem_ctl_info *mci,
844 bool enable_per_layer_report,
845 const int pos[EDAC_MAX_LAYERS])
851 if (!enable_per_layer_report) {
852 mci->ce_noinfo_count++;
856 for (i = 0; i < mci->n_layers; i++) {
860 mci->ce_per_layer[i][index]++;
862 if (i < mci->n_layers - 1)
863 index *= mci->layers[i + 1].size;
867 static void edac_inc_ue_error(struct mem_ctl_info *mci,
868 bool enable_per_layer_report,
869 const int pos[EDAC_MAX_LAYERS])
875 if (!enable_per_layer_report) {
876 mci->ce_noinfo_count++;
880 for (i = 0; i < mci->n_layers; i++) {
884 mci->ue_per_layer[i][index]++;
886 if (i < mci->n_layers - 1)
887 index *= mci->layers[i + 1].size;
891 static void edac_ce_error(struct mem_ctl_info *mci,
892 const int pos[EDAC_MAX_LAYERS],
894 const char *location,
897 const char *other_detail,
898 const bool enable_per_layer_report,
899 const unsigned long page_frame_number,
900 const unsigned long offset_in_page,
903 unsigned long remapped_page;
905 if (edac_mc_get_log_ce()) {
906 if (other_detail && *other_detail)
907 edac_mc_printk(mci, KERN_WARNING,
908 "CE %s on %s (%s %s - %s)\n",
909 msg, label, location,
910 detail, other_detail);
912 edac_mc_printk(mci, KERN_WARNING,
913 "CE %s on %s (%s %s)\n",
914 msg, label, location,
917 edac_inc_ce_error(mci, enable_per_layer_report, pos);
919 if (mci->scrub_mode & SCRUB_SW_SRC) {
921 * Some memory controllers (called MCs below) can remap
922 * memory so that it is still available at a different
923 * address when PCI devices map into memory.
924 * MC's that can't do this, lose the memory where PCI
925 * devices are mapped. This mapping is MC-dependent
926 * and so we call back into the MC driver for it to
927 * map the MC page to a physical (CPU) page which can
928 * then be mapped to a virtual page - which can then
931 remapped_page = mci->ctl_page_to_phys ?
932 mci->ctl_page_to_phys(mci, page_frame_number) :
935 edac_mc_scrub_block(remapped_page,
936 offset_in_page, grain);
940 static void edac_ue_error(struct mem_ctl_info *mci,
941 const int pos[EDAC_MAX_LAYERS],
943 const char *location,
946 const char *other_detail,
947 const bool enable_per_layer_report)
949 if (edac_mc_get_log_ue()) {
950 if (other_detail && *other_detail)
951 edac_mc_printk(mci, KERN_WARNING,
952 "UE %s on %s (%s %s - %s)\n",
953 msg, label, location, detail,
956 edac_mc_printk(mci, KERN_WARNING,
957 "UE %s on %s (%s %s)\n",
958 msg, label, location, detail);
961 if (edac_mc_get_panic_on_ue()) {
962 if (other_detail && *other_detail)
963 panic("UE %s on %s (%s%s - %s)\n",
964 msg, label, location, detail, other_detail);
966 panic("UE %s on %s (%s%s)\n",
967 msg, label, location, detail);
970 edac_inc_ue_error(mci, enable_per_layer_report, pos);
973 #define OTHER_LABEL " or "
976 * edac_mc_handle_error - reports a memory event to userspace
978 * @type: severity of the error (CE/UE/Fatal)
979 * @mci: a struct mem_ctl_info pointer
980 * @page_frame_number: mem page where the error occurred
981 * @offset_in_page: offset of the error inside the page
982 * @syndrome: ECC syndrome
983 * @top_layer: Memory layer[0] position
984 * @mid_layer: Memory layer[1] position
985 * @low_layer: Memory layer[2] position
986 * @msg: Message meaningful to the end users that
988 * @other_detail: Technical details about the event that
989 * may help hardware manufacturers and
990 * EDAC developers to analyse the event
991 * @arch_log: Architecture-specific struct that can
992 * be used to add extended information to the
993 * tracepoint, like dumping MCE registers.
995 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
996 struct mem_ctl_info *mci,
997 const unsigned long page_frame_number,
998 const unsigned long offset_in_page,
999 const unsigned long syndrome,
1000 const int top_layer,
1001 const int mid_layer,
1002 const int low_layer,
1004 const char *other_detail,
1005 const void *arch_log)
1007 /* FIXME: too much for stack: move it to some pre-alocated area */
1008 char detail[80], location[80];
1009 char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci->tot_dimms];
1011 int row = -1, chan = -1;
1012 int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1015 bool enable_per_layer_report = false;
1016 u16 error_count; /* FIXME: make it a parameter */
1019 debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
1022 * Check if the event report is consistent and if the memory
1023 * location is known. If it is known, enable_per_layer_report will be
1024 * true, the DIMM(s) label info will be filled and the per-layer
1025 * error counters will be incremented.
1027 for (i = 0; i < mci->n_layers; i++) {
1028 if (pos[i] >= (int)mci->layers[i].size) {
1029 if (type == HW_EVENT_ERR_CORRECTED)
1034 edac_mc_printk(mci, KERN_ERR,
1035 "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1036 edac_layer_name[mci->layers[i].type],
1037 pos[i], mci->layers[i].size);
1039 * Instead of just returning it, let's use what's
1040 * known about the error. The increment routines and
1041 * the DIMM filter logic will do the right thing by
1042 * pointing the likely damaged DIMMs.
1047 enable_per_layer_report = true;
1051 * Get the dimm label/grain that applies to the match criteria.
1052 * As the error algorithm may not be able to point to just one memory
1053 * stick, the logic here will get all possible labels that could
1054 * pottentially be affected by the error.
1055 * On FB-DIMM memory controllers, for uncorrected errors, it is common
1056 * to have only the MC channel and the MC dimm (also called "branch")
1057 * but the channel is not known, as the memory is arranged in pairs,
1058 * where each memory belongs to a separate channel within the same
1064 for (i = 0; i < mci->tot_dimms; i++) {
1065 struct dimm_info *dimm = &mci->dimms[i];
1067 if (top_layer >= 0 && top_layer != dimm->location[0])
1069 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1071 if (low_layer >= 0 && low_layer != dimm->location[2])
1074 /* get the max grain, over the error match range */
1075 if (dimm->grain > grain)
1076 grain = dimm->grain;
1079 * If the error is memory-controller wide, there's no need to
1080 * seek for the affected DIMMs because the whole
1081 * channel/memory controller/... may be affected.
1082 * Also, don't show errors for empty DIMM slots.
1084 if (enable_per_layer_report && dimm->nr_pages) {
1086 strcpy(p, OTHER_LABEL);
1087 p += strlen(OTHER_LABEL);
1089 strcpy(p, dimm->label);
1094 * get csrow/channel of the DIMM, in order to allow
1095 * incrementing the compat API counters
1097 debugf4("%s: %s csrows map: (%d,%d)\n",
1099 mci->mem_is_per_rank ? "rank" : "dimm",
1100 dimm->csrow, dimm->cschannel);
1104 else if (row >= 0 && row != dimm->csrow)
1108 chan = dimm->cschannel;
1109 else if (chan >= 0 && chan != dimm->cschannel)
1114 if (!enable_per_layer_report) {
1115 strcpy(label, "any memory");
1117 debugf4("%s: csrow/channel to increment: (%d,%d)\n",
1118 __func__, row, chan);
1120 strcpy(label, "unknown memory");
1121 if (type == HW_EVENT_ERR_CORRECTED) {
1123 mci->csrows[row].ce_count++;
1125 mci->csrows[row].channels[chan].ce_count++;
1129 mci->csrows[row].ue_count++;
1132 /* Fill the RAM location data */
1134 for (i = 0; i < mci->n_layers; i++) {
1138 p += sprintf(p, "%s:%d ",
1139 edac_layer_name[mci->layers[i].type],
1145 /* Report the error via the trace interface */
1147 error_count = 1; /* FIXME: allow change it */
1148 grain_bits = fls_long(grain) + 1;
1149 trace_mc_event(type, msg, label, error_count,
1150 mci->mc_idx, top_layer, mid_layer, low_layer,
1151 PAGES_TO_MiB(page_frame_number) | offset_in_page,
1152 grain_bits, syndrome, other_detail);
1154 /* Memory type dependent details about the error */
1155 if (type == HW_EVENT_ERR_CORRECTED) {
1156 snprintf(detail, sizeof(detail),
1157 "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1158 page_frame_number, offset_in_page,
1160 edac_ce_error(mci, pos, msg, location, label, detail,
1161 other_detail, enable_per_layer_report,
1162 page_frame_number, offset_in_page, grain);
1164 snprintf(detail, sizeof(detail),
1165 "page:0x%lx offset:0x%lx grain:%ld",
1166 page_frame_number, offset_in_page, grain);
1168 edac_ue_error(mci, pos, msg, location, label, detail,
1169 other_detail, enable_per_layer_report);
1172 EXPORT_SYMBOL_GPL(edac_mc_handle_error);