2 * edac_mc kernel module
3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
11 * Modified by Dave Peterson and Doug Thompson
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/ctype.h>
29 #include <linux/edac.h>
30 #include <linux/bitops.h>
31 #include <asm/uaccess.h>
34 #include "edac_core.h"
35 #include "edac_module.h"
37 #define CREATE_TRACE_POINTS
38 #define TRACE_INCLUDE_PATH ../../include/ras
39 #include <ras/ras_event.h>
41 /* lock to memory controller's control array */
42 static DEFINE_MUTEX(mem_ctls_mutex);
43 static LIST_HEAD(mc_devices);
45 unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
48 struct mem_ctl_info *mci = dimm->mci;
52 for (i = 0; i < mci->n_layers; i++) {
53 n = snprintf(p, len, "%s %d ",
54 edac_layer_name[mci->layers[i].type],
66 #ifdef CONFIG_EDAC_DEBUG
68 static void edac_mc_dump_channel(struct rank_info *chan)
70 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx);
71 edac_dbg(4, " channel = %p\n", chan);
72 edac_dbg(4, " channel->csrow = %p\n", chan->csrow);
73 edac_dbg(4, " channel->dimm = %p\n", chan->dimm);
76 static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
80 edac_dimm_info_location(dimm, location, sizeof(location));
82 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
83 dimm->mci->mem_is_per_rank ? "rank" : "dimm",
84 number, location, dimm->csrow, dimm->cschannel);
85 edac_dbg(4, " dimm = %p\n", dimm);
86 edac_dbg(4, " dimm->label = '%s'\n", dimm->label);
87 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages);
88 edac_dbg(4, " dimm->grain = %d\n", dimm->grain);
89 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages);
92 static void edac_mc_dump_csrow(struct csrow_info *csrow)
94 edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
95 edac_dbg(4, " csrow = %p\n", csrow);
96 edac_dbg(4, " csrow->first_page = 0x%lx\n", csrow->first_page);
97 edac_dbg(4, " csrow->last_page = 0x%lx\n", csrow->last_page);
98 edac_dbg(4, " csrow->page_mask = 0x%lx\n", csrow->page_mask);
99 edac_dbg(4, " csrow->nr_channels = %d\n", csrow->nr_channels);
100 edac_dbg(4, " csrow->channels = %p\n", csrow->channels);
101 edac_dbg(4, " csrow->mci = %p\n", csrow->mci);
104 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
106 edac_dbg(3, "\tmci = %p\n", mci);
107 edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
108 edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
109 edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
110 edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
111 edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
112 mci->nr_csrows, mci->csrows);
113 edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
114 mci->tot_dimms, mci->dimms);
115 edac_dbg(3, "\tdev = %p\n", mci->pdev);
116 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
117 mci->mod_name, mci->ctl_name);
118 edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
121 #endif /* CONFIG_EDAC_DEBUG */
124 * keep those in sync with the enum mem_type
126 const char *edac_mem_types[] = {
128 "Reserved csrow type",
129 "Unknown csrow type",
130 "Fast page mode RAM",
131 "Extended data out RAM",
132 "Burst Extended data out RAM",
133 "Single data rate SDRAM",
134 "Registered single data rate SDRAM",
135 "Double data rate SDRAM",
136 "Registered Double data rate SDRAM",
138 "Unbuffered DDR2 RAM",
139 "Fully buffered DDR2",
140 "Registered DDR2 RAM",
142 "Unbuffered DDR3 RAM",
143 "Registered DDR3 RAM",
145 EXPORT_SYMBOL_GPL(edac_mem_types);
148 * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
149 * @p: pointer to a pointer with the memory offset to be used. At
150 * return, this will be incremented to point to the next offset
151 * @size: Size of the data structure to be reserved
152 * @n_elems: Number of elements that should be reserved
154 * If 'size' is a constant, the compiler will optimize this whole function
155 * down to either a no-op or the addition of a constant to the value of '*p'.
157 * The 'p' pointer is absolutely needed to keep the proper advancing
158 * further in memory to the proper offsets when allocating the struct along
159 * with its embedded structs, as edac_device_alloc_ctl_info() does it
160 * above, for example.
162 * At return, the pointer 'p' will be incremented to be used on a next call
165 void *edac_align_ptr(void **p, unsigned size, int n_elems)
170 *p += size * n_elems;
173 * 'p' can possibly be an unaligned item X such that sizeof(X) is
174 * 'size'. Adjust 'p' so that its alignment is at least as
175 * stringent as what the compiler would provide for X and return
176 * the aligned result.
177 * Here we assume that the alignment of a "long long" is the most
178 * stringent alignment that the compiler will ever provide by default.
179 * As far as I know, this is a reasonable assumption.
181 if (size > sizeof(long))
182 align = sizeof(long long);
183 else if (size > sizeof(int))
184 align = sizeof(long);
185 else if (size > sizeof(short))
187 else if (size > sizeof(char))
188 align = sizeof(short);
192 r = (unsigned long)p % align;
199 return (void *)(((unsigned long)ptr) + align - r);
202 static void _edac_mc_free(struct mem_ctl_info *mci)
205 struct csrow_info *csr;
206 const unsigned int tot_dimms = mci->tot_dimms;
207 const unsigned int tot_channels = mci->num_cschannel;
208 const unsigned int tot_csrows = mci->nr_csrows;
211 for (i = 0; i < tot_dimms; i++)
212 kfree(mci->dimms[i]);
216 for (row = 0; row < tot_csrows; row++) {
217 csr = mci->csrows[row];
220 for (chn = 0; chn < tot_channels; chn++)
221 kfree(csr->channels[chn]);
222 kfree(csr->channels);
233 * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure
234 * @mc_num: Memory controller number
235 * @n_layers: Number of MC hierarchy layers
236 * layers: Describes each layer as seen by the Memory Controller
237 * @size_pvt: size of private storage needed
240 * Everything is kmalloc'ed as one big chunk - more efficient.
241 * Only can be used if all structures have the same lifetime - otherwise
242 * you have to allocate and initialize your own structures.
244 * Use edac_mc_free() to free mc structures allocated by this function.
246 * NOTE: drivers handle multi-rank memories in different ways: in some
247 * drivers, one multi-rank memory stick is mapped as one entry, while, in
248 * others, a single multi-rank memory stick would be mapped into several
249 * entries. Currently, this function will allocate multiple struct dimm_info
250 * on such scenarios, as grouping the multiple ranks require drivers change.
254 * On success: struct mem_ctl_info pointer
256 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
258 struct edac_mc_layer *layers,
261 struct mem_ctl_info *mci;
262 struct edac_mc_layer *layer;
263 struct csrow_info *csr;
264 struct rank_info *chan;
265 struct dimm_info *dimm;
266 u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
267 unsigned pos[EDAC_MAX_LAYERS];
268 unsigned size, tot_dimms = 1, count = 1;
269 unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
270 void *pvt, *p, *ptr = NULL;
271 int i, j, row, chn, n, len, off;
272 bool per_rank = false;
274 BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
276 * Calculate the total amount of dimms and csrows/cschannels while
277 * in the old API emulation mode
279 for (i = 0; i < n_layers; i++) {
280 tot_dimms *= layers[i].size;
281 if (layers[i].is_virt_csrow)
282 tot_csrows *= layers[i].size;
284 tot_channels *= layers[i].size;
286 if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
290 /* Figure out the offsets of the various items from the start of an mc
291 * structure. We want the alignment of each item to be at least as
292 * stringent as what the compiler would provide if we could simply
293 * hardcode everything into a single struct.
295 mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
296 layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
297 for (i = 0; i < n_layers; i++) {
298 count *= layers[i].size;
299 edac_dbg(4, "errcount layer %d size %d\n", i, count);
300 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
301 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
302 tot_errcount += 2 * count;
305 edac_dbg(4, "allocating %d error counters\n", tot_errcount);
306 pvt = edac_align_ptr(&ptr, sz_pvt, 1);
307 size = ((unsigned long)pvt) + sz_pvt;
309 edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
312 per_rank ? "ranks" : "dimms",
313 tot_csrows * tot_channels);
315 mci = kzalloc(size, GFP_KERNEL);
319 /* Adjust pointers so they point within the memory we just allocated
320 * rather than an imaginary chunk of memory located at address 0.
322 layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
323 for (i = 0; i < n_layers; i++) {
324 mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
325 mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
327 pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
329 /* setup index and various internal pointers */
330 mci->mc_idx = mc_num;
331 mci->tot_dimms = tot_dimms;
333 mci->n_layers = n_layers;
335 memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
336 mci->nr_csrows = tot_csrows;
337 mci->num_cschannel = tot_channels;
338 mci->mem_is_per_rank = per_rank;
341 * Alocate and fill the csrow/channels structs
343 mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL);
346 for (row = 0; row < tot_csrows; row++) {
347 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
350 mci->csrows[row] = csr;
351 csr->csrow_idx = row;
353 csr->nr_channels = tot_channels;
354 csr->channels = kcalloc(tot_channels, sizeof(*csr->channels),
359 for (chn = 0; chn < tot_channels; chn++) {
360 chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
363 csr->channels[chn] = chan;
364 chan->chan_idx = chn;
370 * Allocate and fill the dimm structs
372 mci->dimms = kcalloc(tot_dimms, sizeof(*mci->dimms), GFP_KERNEL);
376 memset(&pos, 0, sizeof(pos));
379 for (i = 0; i < tot_dimms; i++) {
380 chan = mci->csrows[row]->channels[chn];
381 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
382 if (off < 0 || off >= tot_dimms) {
383 edac_mc_printk(mci, KERN_ERR, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
387 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
390 mci->dimms[off] = dimm;
394 * Copy DIMM location and initialize it.
396 len = sizeof(dimm->label);
398 n = snprintf(p, len, "mc#%u", mc_num);
401 for (j = 0; j < n_layers; j++) {
402 n = snprintf(p, len, "%s#%u",
403 edac_layer_name[layers[j].type],
407 dimm->location[j] = pos[j];
413 /* Link it to the csrows old API data */
416 dimm->cschannel = chn;
418 /* Increment csrow location */
419 if (layers[0].is_virt_csrow) {
421 if (chn == tot_channels) {
427 if (row == tot_csrows) {
433 /* Increment dimm location */
434 for (j = n_layers - 1; j >= 0; j--) {
436 if (pos[j] < layers[j].size)
442 mci->op_state = OP_ALLOC;
451 EXPORT_SYMBOL_GPL(edac_mc_alloc);
455 * 'Free' a previously allocated 'mci' structure
456 * @mci: pointer to a struct mem_ctl_info structure
458 void edac_mc_free(struct mem_ctl_info *mci)
462 /* If we're not yet registered with sysfs free only what was allocated
463 * in edac_mc_alloc().
465 if (!device_is_registered(&mci->dev)) {
470 /* the mci instance is freed here, when the sysfs object is dropped */
471 edac_unregister_sysfs(mci);
473 EXPORT_SYMBOL_GPL(edac_mc_free);
479 * scan list of controllers looking for the one that manages
481 * @dev: pointer to a struct device related with the MCI
483 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
485 struct mem_ctl_info *mci;
486 struct list_head *item;
490 list_for_each(item, &mc_devices) {
491 mci = list_entry(item, struct mem_ctl_info, link);
493 if (mci->pdev == dev)
499 EXPORT_SYMBOL_GPL(find_mci_by_dev);
502 * handler for EDAC to check if NMI type handler has asserted interrupt
504 static int edac_mc_assert_error_check_and_clear(void)
508 if (edac_op_state == EDAC_OPSTATE_POLL)
511 old_state = edac_err_assert;
518 * edac_mc_workq_function
519 * performs the operation scheduled by a workq request
521 static void edac_mc_workq_function(struct work_struct *work_req)
523 struct delayed_work *d_work = to_delayed_work(work_req);
524 struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
526 mutex_lock(&mem_ctls_mutex);
528 /* if this control struct has movd to offline state, we are done */
529 if (mci->op_state == OP_OFFLINE) {
530 mutex_unlock(&mem_ctls_mutex);
534 /* Only poll controllers that are running polled and have a check */
535 if (edac_mc_assert_error_check_and_clear() && (mci->edac_check != NULL))
536 mci->edac_check(mci);
538 mutex_unlock(&mem_ctls_mutex);
541 queue_delayed_work(edac_workqueue, &mci->work,
542 msecs_to_jiffies(edac_mc_get_poll_msec()));
546 * edac_mc_workq_setup
547 * initialize a workq item for this mci
548 * passing in the new delay period in msec
552 * called with the mem_ctls_mutex held
554 static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
558 /* if this instance is not in the POLL state, then simply return */
559 if (mci->op_state != OP_RUNNING_POLL)
562 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
563 mod_delayed_work(edac_workqueue, &mci->work, msecs_to_jiffies(msec));
567 * edac_mc_workq_teardown
568 * stop the workq processing on this mci
572 * called WITHOUT lock held
574 static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
578 if (mci->op_state != OP_RUNNING_POLL)
581 status = cancel_delayed_work(&mci->work);
583 edac_dbg(0, "not canceled, flush the queue\n");
585 /* workq instance might be running, wait for it */
586 flush_workqueue(edac_workqueue);
591 * edac_mc_reset_delay_period(unsigned long value)
593 * user space has updated our poll period value, need to
594 * reset our workq delays
596 void edac_mc_reset_delay_period(int value)
598 struct mem_ctl_info *mci;
599 struct list_head *item;
601 mutex_lock(&mem_ctls_mutex);
603 list_for_each(item, &mc_devices) {
604 mci = list_entry(item, struct mem_ctl_info, link);
606 edac_mc_workq_setup(mci, (unsigned long) value);
609 mutex_unlock(&mem_ctls_mutex);
614 /* Return 0 on success, 1 on failure.
615 * Before calling this function, caller must
616 * assign a unique value to mci->mc_idx.
620 * called with the mem_ctls_mutex lock held
622 static int add_mc_to_global_list(struct mem_ctl_info *mci)
624 struct list_head *item, *insert_before;
625 struct mem_ctl_info *p;
627 insert_before = &mc_devices;
629 p = find_mci_by_dev(mci->pdev);
630 if (unlikely(p != NULL))
633 list_for_each(item, &mc_devices) {
634 p = list_entry(item, struct mem_ctl_info, link);
636 if (p->mc_idx >= mci->mc_idx) {
637 if (unlikely(p->mc_idx == mci->mc_idx))
640 insert_before = item;
645 list_add_tail_rcu(&mci->link, insert_before);
646 atomic_inc(&edac_handlers);
650 edac_printk(KERN_WARNING, EDAC_MC,
651 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
652 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
656 edac_printk(KERN_WARNING, EDAC_MC,
657 "bug in low-level driver: attempt to assign\n"
658 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
662 static void del_mc_from_global_list(struct mem_ctl_info *mci)
664 atomic_dec(&edac_handlers);
665 list_del_rcu(&mci->link);
667 /* these are for safe removal of devices from global list while
668 * NMI handlers may be traversing list
671 INIT_LIST_HEAD(&mci->link);
675 * edac_mc_find: Search for a mem_ctl_info structure whose index is 'idx'.
677 * If found, return a pointer to the structure.
680 * Caller must hold mem_ctls_mutex.
682 struct mem_ctl_info *edac_mc_find(int idx)
684 struct list_head *item;
685 struct mem_ctl_info *mci;
687 list_for_each(item, &mc_devices) {
688 mci = list_entry(item, struct mem_ctl_info, link);
690 if (mci->mc_idx >= idx) {
691 if (mci->mc_idx == idx)
700 EXPORT_SYMBOL(edac_mc_find);
703 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
704 * create sysfs entries associated with mci structure
705 * @mci: pointer to the mci structure to be added to the list
712 /* FIXME - should a warning be printed if no error detection? correction? */
713 int edac_mc_add_mc(struct mem_ctl_info *mci)
717 #ifdef CONFIG_EDAC_DEBUG
718 if (edac_debug_level >= 3)
719 edac_mc_dump_mci(mci);
721 if (edac_debug_level >= 4) {
724 for (i = 0; i < mci->nr_csrows; i++) {
725 struct csrow_info *csrow = mci->csrows[i];
729 for (j = 0; j < csrow->nr_channels; j++)
730 nr_pages += csrow->channels[j]->dimm->nr_pages;
733 edac_mc_dump_csrow(csrow);
734 for (j = 0; j < csrow->nr_channels; j++)
735 if (csrow->channels[j]->dimm->nr_pages)
736 edac_mc_dump_channel(csrow->channels[j]);
738 for (i = 0; i < mci->tot_dimms; i++)
739 if (mci->dimms[i]->nr_pages)
740 edac_mc_dump_dimm(mci->dimms[i], i);
743 mutex_lock(&mem_ctls_mutex);
745 if (add_mc_to_global_list(mci))
748 /* set load time so that error rate can be tracked */
749 mci->start_time = jiffies;
751 if (edac_create_sysfs_mci_device(mci)) {
752 edac_mc_printk(mci, KERN_WARNING,
753 "failed to create sysfs device\n");
757 /* If there IS a check routine, then we are running POLLED */
758 if (mci->edac_check != NULL) {
759 /* This instance is NOW RUNNING */
760 mci->op_state = OP_RUNNING_POLL;
762 edac_mc_workq_setup(mci, edac_mc_get_poll_msec());
764 mci->op_state = OP_RUNNING_INTERRUPT;
767 /* Report action taken */
768 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':"
769 " DEV %s\n", mci->mod_name, mci->ctl_name, edac_dev_name(mci));
771 mutex_unlock(&mem_ctls_mutex);
775 del_mc_from_global_list(mci);
778 mutex_unlock(&mem_ctls_mutex);
781 EXPORT_SYMBOL_GPL(edac_mc_add_mc);
784 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
785 * remove mci structure from global list
786 * @pdev: Pointer to 'struct device' representing mci structure to remove.
788 * Return pointer to removed mci structure, or NULL if device not found.
790 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
792 struct mem_ctl_info *mci;
796 mutex_lock(&mem_ctls_mutex);
798 /* find the requested mci struct in the global list */
799 mci = find_mci_by_dev(dev);
801 mutex_unlock(&mem_ctls_mutex);
805 del_mc_from_global_list(mci);
806 mutex_unlock(&mem_ctls_mutex);
808 /* flush workq processes */
809 edac_mc_workq_teardown(mci);
811 /* marking MCI offline */
812 mci->op_state = OP_OFFLINE;
814 /* remove from sysfs */
815 edac_remove_sysfs_mci_device(mci);
817 edac_printk(KERN_INFO, EDAC_MC,
818 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
819 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
823 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
825 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
830 unsigned long flags = 0;
834 /* ECC error page was not in our memory. Ignore it. */
835 if (!pfn_valid(page))
838 /* Find the actual page structure then map it and fix */
839 pg = pfn_to_page(page);
842 local_irq_save(flags);
844 virt_addr = kmap_atomic(pg);
846 /* Perform architecture specific atomic scrub operation */
847 atomic_scrub(virt_addr + offset, size);
849 /* Unmap and complete */
850 kunmap_atomic(virt_addr);
853 local_irq_restore(flags);
856 /* FIXME - should return -1 */
857 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
859 struct csrow_info **csrows = mci->csrows;
862 edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
865 for (i = 0; i < mci->nr_csrows; i++) {
866 struct csrow_info *csrow = csrows[i];
868 for (j = 0; j < csrow->nr_channels; j++) {
869 struct dimm_info *dimm = csrow->channels[j]->dimm;
875 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
877 csrow->first_page, page, csrow->last_page,
880 if ((page >= csrow->first_page) &&
881 (page <= csrow->last_page) &&
882 ((page & csrow->page_mask) ==
883 (csrow->first_page & csrow->page_mask))) {
890 edac_mc_printk(mci, KERN_ERR,
891 "could not look up page error address %lx\n",
892 (unsigned long)page);
896 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
898 const char *edac_layer_name[] = {
899 [EDAC_MC_LAYER_BRANCH] = "branch",
900 [EDAC_MC_LAYER_CHANNEL] = "channel",
901 [EDAC_MC_LAYER_SLOT] = "slot",
902 [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
904 EXPORT_SYMBOL_GPL(edac_layer_name);
906 static void edac_inc_ce_error(struct mem_ctl_info *mci,
907 bool enable_per_layer_report,
908 const int pos[EDAC_MAX_LAYERS],
915 if (!enable_per_layer_report) {
916 mci->ce_noinfo_count += count;
920 for (i = 0; i < mci->n_layers; i++) {
924 mci->ce_per_layer[i][index] += count;
926 if (i < mci->n_layers - 1)
927 index *= mci->layers[i + 1].size;
931 static void edac_inc_ue_error(struct mem_ctl_info *mci,
932 bool enable_per_layer_report,
933 const int pos[EDAC_MAX_LAYERS],
940 if (!enable_per_layer_report) {
941 mci->ce_noinfo_count += count;
945 for (i = 0; i < mci->n_layers; i++) {
949 mci->ue_per_layer[i][index] += count;
951 if (i < mci->n_layers - 1)
952 index *= mci->layers[i + 1].size;
956 static void edac_ce_error(struct mem_ctl_info *mci,
957 const u16 error_count,
958 const int pos[EDAC_MAX_LAYERS],
960 const char *location,
963 const char *other_detail,
964 const bool enable_per_layer_report,
965 const unsigned long page_frame_number,
966 const unsigned long offset_in_page,
969 unsigned long remapped_page;
975 if (edac_mc_get_log_ce()) {
976 if (other_detail && *other_detail)
977 edac_mc_printk(mci, KERN_WARNING,
978 "%d CE %s%son %s (%s %s - %s)\n",
979 error_count, msg, msg_aux, label,
980 location, detail, other_detail);
982 edac_mc_printk(mci, KERN_WARNING,
983 "%d CE %s%son %s (%s %s)\n",
984 error_count, msg, msg_aux, label,
987 edac_inc_ce_error(mci, enable_per_layer_report, pos, error_count);
989 if (mci->scrub_mode & SCRUB_SW_SRC) {
991 * Some memory controllers (called MCs below) can remap
992 * memory so that it is still available at a different
993 * address when PCI devices map into memory.
994 * MC's that can't do this, lose the memory where PCI
995 * devices are mapped. This mapping is MC-dependent
996 * and so we call back into the MC driver for it to
997 * map the MC page to a physical (CPU) page which can
998 * then be mapped to a virtual page - which can then
1001 remapped_page = mci->ctl_page_to_phys ?
1002 mci->ctl_page_to_phys(mci, page_frame_number) :
1005 edac_mc_scrub_block(remapped_page,
1006 offset_in_page, grain);
1010 static void edac_ue_error(struct mem_ctl_info *mci,
1011 const u16 error_count,
1012 const int pos[EDAC_MAX_LAYERS],
1014 const char *location,
1017 const char *other_detail,
1018 const bool enable_per_layer_report)
1025 if (edac_mc_get_log_ue()) {
1026 if (other_detail && *other_detail)
1027 edac_mc_printk(mci, KERN_WARNING,
1028 "%d UE %s%son %s (%s %s - %s)\n",
1029 error_count, msg, msg_aux, label,
1030 location, detail, other_detail);
1032 edac_mc_printk(mci, KERN_WARNING,
1033 "%d UE %s%son %s (%s %s)\n",
1034 error_count, msg, msg_aux, label,
1038 if (edac_mc_get_panic_on_ue()) {
1039 if (other_detail && *other_detail)
1040 panic("UE %s%son %s (%s%s - %s)\n",
1041 msg, msg_aux, label, location, detail, other_detail);
1043 panic("UE %s%son %s (%s%s)\n",
1044 msg, msg_aux, label, location, detail);
1047 edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count);
1050 #define OTHER_LABEL " or "
1053 * edac_mc_handle_error - reports a memory event to userspace
1055 * @type: severity of the error (CE/UE/Fatal)
1056 * @mci: a struct mem_ctl_info pointer
1057 * @error_count: Number of errors of the same type
1058 * @page_frame_number: mem page where the error occurred
1059 * @offset_in_page: offset of the error inside the page
1060 * @syndrome: ECC syndrome
1061 * @top_layer: Memory layer[0] position
1062 * @mid_layer: Memory layer[1] position
1063 * @low_layer: Memory layer[2] position
1064 * @msg: Message meaningful to the end users that
1065 * explains the event
1066 * @other_detail: Technical details about the event that
1067 * may help hardware manufacturers and
1068 * EDAC developers to analyse the event
1070 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1071 struct mem_ctl_info *mci,
1072 const u16 error_count,
1073 const unsigned long page_frame_number,
1074 const unsigned long offset_in_page,
1075 const unsigned long syndrome,
1076 const int top_layer,
1077 const int mid_layer,
1078 const int low_layer,
1080 const char *other_detail)
1082 /* FIXME: too much for stack: move it to some pre-alocated area */
1083 char detail[80], location[80];
1084 char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci->tot_dimms];
1086 int row = -1, chan = -1;
1087 int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1090 bool enable_per_layer_report = false;
1093 edac_dbg(3, "MC%d\n", mci->mc_idx);
1096 * Check if the event report is consistent and if the memory
1097 * location is known. If it is known, enable_per_layer_report will be
1098 * true, the DIMM(s) label info will be filled and the per-layer
1099 * error counters will be incremented.
1101 for (i = 0; i < mci->n_layers; i++) {
1102 if (pos[i] >= (int)mci->layers[i].size) {
1104 edac_mc_printk(mci, KERN_ERR,
1105 "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1106 edac_layer_name[mci->layers[i].type],
1107 pos[i], mci->layers[i].size);
1109 * Instead of just returning it, let's use what's
1110 * known about the error. The increment routines and
1111 * the DIMM filter logic will do the right thing by
1112 * pointing the likely damaged DIMMs.
1117 enable_per_layer_report = true;
1121 * Get the dimm label/grain that applies to the match criteria.
1122 * As the error algorithm may not be able to point to just one memory
1123 * stick, the logic here will get all possible labels that could
1124 * pottentially be affected by the error.
1125 * On FB-DIMM memory controllers, for uncorrected errors, it is common
1126 * to have only the MC channel and the MC dimm (also called "branch")
1127 * but the channel is not known, as the memory is arranged in pairs,
1128 * where each memory belongs to a separate channel within the same
1135 for (i = 0; i < mci->tot_dimms; i++) {
1136 struct dimm_info *dimm = mci->dimms[i];
1138 if (top_layer >= 0 && top_layer != dimm->location[0])
1140 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1142 if (low_layer >= 0 && low_layer != dimm->location[2])
1145 /* get the max grain, over the error match range */
1146 if (dimm->grain > grain)
1147 grain = dimm->grain;
1150 * If the error is memory-controller wide, there's no need to
1151 * seek for the affected DIMMs because the whole
1152 * channel/memory controller/... may be affected.
1153 * Also, don't show errors for empty DIMM slots.
1155 if (enable_per_layer_report && dimm->nr_pages) {
1157 strcpy(p, OTHER_LABEL);
1158 p += strlen(OTHER_LABEL);
1160 strcpy(p, dimm->label);
1165 * get csrow/channel of the DIMM, in order to allow
1166 * incrementing the compat API counters
1168 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1169 mci->mem_is_per_rank ? "rank" : "dimm",
1170 dimm->csrow, dimm->cschannel);
1173 else if (row >= 0 && row != dimm->csrow)
1177 chan = dimm->cschannel;
1178 else if (chan >= 0 && chan != dimm->cschannel)
1183 if (!enable_per_layer_report) {
1184 strcpy(label, "any memory");
1186 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
1188 strcpy(label, "unknown memory");
1189 if (type == HW_EVENT_ERR_CORRECTED) {
1191 mci->csrows[row]->ce_count += error_count;
1193 mci->csrows[row]->channels[chan]->ce_count += error_count;
1197 mci->csrows[row]->ue_count += error_count;
1200 /* Fill the RAM location data */
1203 for (i = 0; i < mci->n_layers; i++) {
1207 p += sprintf(p, "%s:%d ",
1208 edac_layer_name[mci->layers[i].type],
1214 /* Report the error via the trace interface */
1215 grain_bits = fls_long(grain) + 1;
1216 trace_mc_event(type, msg, label, error_count,
1217 mci->mc_idx, top_layer, mid_layer, low_layer,
1218 PAGES_TO_MiB(page_frame_number) | offset_in_page,
1219 grain_bits, syndrome, other_detail);
1221 /* Memory type dependent details about the error */
1222 if (type == HW_EVENT_ERR_CORRECTED) {
1223 snprintf(detail, sizeof(detail),
1224 "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1225 page_frame_number, offset_in_page,
1227 edac_ce_error(mci, error_count, pos, msg, location, label,
1228 detail, other_detail, enable_per_layer_report,
1229 page_frame_number, offset_in_page, grain);
1231 snprintf(detail, sizeof(detail),
1232 "page:0x%lx offset:0x%lx grain:%ld",
1233 page_frame_number, offset_in_page, grain);
1235 edac_ue_error(mci, error_count, pos, msg, location, label,
1236 detail, other_detail, enable_per_layer_report);
1239 EXPORT_SYMBOL_GPL(edac_mc_handle_error);