Pileus Git - ~andy/linux/blob - drivers/cpufreq/exynos-cpufreq.c

   1 /*
   2  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   3  *              http://www.samsung.com
   4  *
   5  * EXYNOS - CPU frequency scaling support for EXYNOS series
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/err.h>
  14 #include <linux/clk.h>
  15 #include <linux/io.h>
  16 #include <linux/slab.h>
  17 #include <linux/regulator/consumer.h>
  18 #include <linux/cpufreq.h>
  19 #include <linux/suspend.h>
  20
  21 #include <mach/cpufreq.h>
  22
  23 #include <plat/cpu.h>
  24
  25 static struct exynos_dvfs_info *exynos_info;
  26
  27 static struct regulator *arm_regulator;
  28 static struct cpufreq_freqs freqs;
  29
  30 static unsigned int locking_frequency;
  31 static bool frequency_locked;
  32 static DEFINE_MUTEX(cpufreq_lock);
  33
  34 static int exynos_verify_speed(struct cpufreq_policy *policy)
  35 {
  36         return cpufreq_frequency_table_verify(policy,
  37                                               exynos_info->freq_table);
  38 }
  39
  40 static unsigned int exynos_getspeed(unsigned int cpu)
  41 {
  42         return clk_get_rate(exynos_info->cpu_clk) / 1000;
  43 }
  44
  45 static int exynos_target(struct cpufreq_policy *policy,
  46                           unsigned int target_freq,
  47                           unsigned int relation)
  48 {
  49         unsigned int index, old_index;
  50         unsigned int arm_volt, safe_arm_volt = 0;
  51         int ret = 0;
  52         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  53         unsigned int *volt_table = exynos_info->volt_table;
  54         unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
  55
  56         mutex_lock(&cpufreq_lock);
  57
  58         freqs.old = policy->cur;
  59
  60         if (frequency_locked && target_freq != locking_frequency) {
  61                 ret = -EAGAIN;
  62                 goto out;
  63         }
  64
  65         /*
  66          * The policy max have been changed so that we cannot get proper
  67          * old_index with cpufreq_frequency_table_target(). Thus, ignore
  68          * policy and get the index from the raw freqeuncy table.
  69          */
  70         for (old_index = 0;
  71                 freq_table[old_index].frequency != CPUFREQ_TABLE_END;
  72                 old_index++)
  73                 if (freq_table[old_index].frequency == freqs.old)
  74                         break;
  75
  76         if (freq_table[old_index].frequency == CPUFREQ_TABLE_END) {
  77                 ret = -EINVAL;
  78                 goto out;
  79         }
  80
  81         if (cpufreq_frequency_table_target(policy, freq_table,
  82                                            target_freq, relation, &index)) {
  83                 ret = -EINVAL;
  84                 goto out;
  85         }
  86
  87         freqs.new = freq_table[index].frequency;
  88         freqs.cpu = policy->cpu;
  89
  90         /*
  91          * ARM clock source will be changed APLL to MPLL temporary
  92          * To support this level, need to control regulator for
  93          * required voltage level
  94          */
  95         if (exynos_info->need_apll_change != NULL) {
  96                 if (exynos_info->need_apll_change(old_index, index) &&
  97                    (freq_table[index].frequency < mpll_freq_khz) &&
  98                    (freq_table[old_index].frequency < mpll_freq_khz))
  99                         safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
 100         }
 101         arm_volt = volt_table[index];
 102
 103         for_each_cpu(freqs.cpu, policy->cpus)
 104                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 105
 106         /* When the new frequency is higher than current frequency */
 107         if ((freqs.new > freqs.old) && !safe_arm_volt) {
 108                 /* Firstly, voltage up to increase frequency */
 109                 regulator_set_voltage(arm_regulator, arm_volt,
 110                                 arm_volt);
 111         }
 112
 113         if (safe_arm_volt)
 114                 regulator_set_voltage(arm_regulator, safe_arm_volt,
 115                                       safe_arm_volt);
 116         if (freqs.new != freqs.old)
 117                 exynos_info->set_freq(old_index, index);
 118
 119         for_each_cpu(freqs.cpu, policy->cpus)
 120                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 121
 122         /* When the new frequency is lower than current frequency */
 123         if ((freqs.new < freqs.old) ||
 124            ((freqs.new > freqs.old) && safe_arm_volt)) {
 125                 /* down the voltage after frequency change */
 126                 regulator_set_voltage(arm_regulator, arm_volt,
 127                                 arm_volt);
 128         }
 129
 130 out:
 131         mutex_unlock(&cpufreq_lock);
 132
 133         return ret;
 134 }
 135
 136 #ifdef CONFIG_PM
 137 static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
 138 {
 139         return 0;
 140 }
 141
 142 static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
 143 {
 144         return 0;
 145 }
 146 #endif
 147
 148 /**
 149  * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
 150  *                      context
 151  * @notifier
 152  * @pm_event
 153  * @v
 154  *
 155  * While frequency_locked == true, target() ignores every frequency but
 156  * locking_frequency. The locking_frequency value is the initial frequency,
 157  * which is set by the bootloader. In order to eliminate possible
 158  * inconsistency in clock values, we save and restore frequencies during
 159  * suspend and resume and block CPUFREQ activities. Note that the standard
 160  * suspend/resume cannot be used as they are too deep (syscore_ops) for
 161  * regulator actions.
 162  */
 163 static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
 164                                        unsigned long pm_event, void *v)
 165 {
 166         struct cpufreq_policy *policy = cpufreq_cpu_get(0); /* boot CPU */
 167         static unsigned int saved_frequency;
 168         unsigned int temp;
 169
 170         mutex_lock(&cpufreq_lock);
 171         switch (pm_event) {
 172         case PM_SUSPEND_PREPARE:
 173                 if (frequency_locked)
 174                         goto out;
 175
 176                 frequency_locked = true;
 177
 178                 if (locking_frequency) {
 179                         saved_frequency = exynos_getspeed(0);
 180
 181                         mutex_unlock(&cpufreq_lock);
 182                         exynos_target(policy, locking_frequency,
 183                                       CPUFREQ_RELATION_H);
 184                         mutex_lock(&cpufreq_lock);
 185                 }
 186                 break;
 187
 188         case PM_POST_SUSPEND:
 189                 if (saved_frequency) {
 190                         /*
 191                          * While frequency_locked, only locking_frequency
 192                          * is valid for target(). In order to use
 193                          * saved_frequency while keeping frequency_locked,
 194                          * we temporarly overwrite locking_frequency.
 195                          */
 196                         temp = locking_frequency;
 197                         locking_frequency = saved_frequency;
 198
 199                         mutex_unlock(&cpufreq_lock);
 200                         exynos_target(policy, locking_frequency,
 201                                       CPUFREQ_RELATION_H);
 202                         mutex_lock(&cpufreq_lock);
 203
 204                         locking_frequency = temp;
 205                 }
 206                 frequency_locked = false;
 207                 break;
 208         }
 209 out:
 210         mutex_unlock(&cpufreq_lock);
 211
 212         return NOTIFY_OK;
 213 }
 214
 215 static struct notifier_block exynos_cpufreq_nb = {
 216         .notifier_call = exynos_cpufreq_pm_notifier,
 217 };
 218
 219 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
 220 {
 221         policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
 222
 223         cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
 224
 225         locking_frequency = exynos_getspeed(0);
 226
 227         /* set the transition latency value */
 228         policy->cpuinfo.transition_latency = 100000;
 229
 230         /*
 231          * EXYNOS4 multi-core processors has 2 cores
 232          * that the frequency cannot be set independently.
 233          * Each cpu is bound to the same speed.
 234          * So the affected cpu is all of the cpus.
 235          */
 236         if (num_online_cpus() == 1) {
 237                 cpumask_copy(policy->related_cpus, cpu_possible_mask);
 238                 cpumask_copy(policy->cpus, cpu_online_mask);
 239         } else {
 240                 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
 241                 cpumask_setall(policy->cpus);
 242         }
 243
 244         return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
 245 }
 246
 247 static struct cpufreq_driver exynos_driver = {
 248         .flags          = CPUFREQ_STICKY,
 249         .verify         = exynos_verify_speed,
 250         .target         = exynos_target,
 251         .get            = exynos_getspeed,
 252         .init           = exynos_cpufreq_cpu_init,
 253         .name           = "exynos_cpufreq",
 254 #ifdef CONFIG_PM
 255         .suspend        = exynos_cpufreq_suspend,
 256         .resume         = exynos_cpufreq_resume,
 257 #endif
 258 };
 259
 260 static int __init exynos_cpufreq_init(void)
 261 {
 262         int ret = -EINVAL;
 263
 264         exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
 265         if (!exynos_info)
 266                 return -ENOMEM;
 267
 268         if (soc_is_exynos4210())
 269                 ret = exynos4210_cpufreq_init(exynos_info);
 270         else if (soc_is_exynos4212() || soc_is_exynos4412())
 271                 ret = exynos4x12_cpufreq_init(exynos_info);
 272         else if (soc_is_exynos5250())
 273                 ret = exynos5250_cpufreq_init(exynos_info);
 274         else
 275                 pr_err("%s: CPU type not found\n", __func__);
 276
 277         if (ret)
 278                 goto err_vdd_arm;
 279
 280         if (exynos_info->set_freq == NULL) {
 281                 pr_err("%s: No set_freq function (ERR)\n", __func__);
 282                 goto err_vdd_arm;
 283         }
 284
 285         arm_regulator = regulator_get(NULL, "vdd_arm");
 286         if (IS_ERR(arm_regulator)) {
 287                 pr_err("%s: failed to get resource vdd_arm\n", __func__);
 288                 goto err_vdd_arm;
 289         }
 290
 291         register_pm_notifier(&exynos_cpufreq_nb);
 292
 293         if (cpufreq_register_driver(&exynos_driver)) {
 294                 pr_err("%s: failed to register cpufreq driver\n", __func__);
 295                 goto err_cpufreq;
 296         }
 297
 298         return 0;
 299 err_cpufreq:
 300         unregister_pm_notifier(&exynos_cpufreq_nb);
 301
 302         if (!IS_ERR(arm_regulator))
 303                 regulator_put(arm_regulator);
 304 err_vdd_arm:
 305         kfree(exynos_info);
 306         pr_debug("%s: failed initialization\n", __func__);
 307         return -EINVAL;
 308 }
 309 late_initcall(exynos_cpufreq_init);