Pileus Git - ~andy/linux/blob - drivers/cpufreq/cris-etraxfs-cpufreq.c

   1 #include <linux/init.h>
   2 #include <linux/module.h>
   3 #include <linux/cpufreq.h>
   4 #include <hwregs/reg_map.h>
   5 #include <arch/hwregs/reg_rdwr.h>
   6 #include <arch/hwregs/config_defs.h>
   7 #include <arch/hwregs/bif_core_defs.h>
   8
   9 static int
  10 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
  11                          void *data);
  12
  13 static struct notifier_block cris_sdram_freq_notifier_block = {
  14         .notifier_call = cris_sdram_freq_notifier
  15 };
  16
  17 static struct cpufreq_frequency_table cris_freq_table[] = {
  18         {0x01, 6000},
  19         {0x02, 200000},
  20         {0, CPUFREQ_TABLE_END},
  21 };
  22
  23 static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
  24 {
  25         reg_config_rw_clk_ctrl clk_ctrl;
  26         clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
  27         return clk_ctrl.pll ? 200000 : 6000;
  28 }
  29
  30 static void cris_freq_set_cpu_state(struct cpufreq_policy *policy,
  31                 unsigned int state)
  32 {
  33         struct cpufreq_freqs freqs;
  34         reg_config_rw_clk_ctrl clk_ctrl;
  35         clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
  36
  37         freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
  38         freqs.new = cris_freq_table[state].frequency;
  39
  40         cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  41
  42         local_irq_disable();
  43
  44         /* Even though we may be SMP they will share the same clock
  45          * so all settings are made on CPU0. */
  46         if (cris_freq_table[state].frequency == 200000)
  47                 clk_ctrl.pll = 1;
  48         else
  49                 clk_ctrl.pll = 0;
  50         REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
  51
  52         local_irq_enable();
  53
  54         cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  55 };
  56
  57 static int cris_freq_target(struct cpufreq_policy *policy,
  58                             unsigned int target_freq, unsigned int relation)
  59 {
  60         unsigned int newstate = 0;
  61
  62         if (cpufreq_frequency_table_target
  63             (policy, cris_freq_table, target_freq, relation, &newstate))
  64                 return -EINVAL;
  65
  66         cris_freq_set_cpu_state(policy, newstate);
  67
  68         return 0;
  69 }
  70
  71 static int cris_freq_cpu_init(struct cpufreq_policy *policy)
  72 {
  73         /* cpuinfo and default policy values */
  74         policy->cpuinfo.transition_latency = 1000000;   /* 1ms */
  75
  76         return cpufreq_table_validate_and_show(policy, cris_freq_table);
  77 }
  78
  79 static struct cpufreq_driver cris_freq_driver = {
  80         .get = cris_freq_get_cpu_frequency,
  81         .verify = cpufreq_generic_frequency_table_verify,
  82         .target = cris_freq_target,
  83         .init = cris_freq_cpu_init,
  84         .exit = cpufreq_generic_exit,
  85         .name = "cris_freq",
  86         .attr = cpufreq_generic_attr,
  87 };
  88
  89 static int __init cris_freq_init(void)
  90 {
  91         int ret;
  92         ret = cpufreq_register_driver(&cris_freq_driver);
  93         cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
  94                                   CPUFREQ_TRANSITION_NOTIFIER);
  95         return ret;
  96 }
  97
  98 static int
  99 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
 100                          void *data)
 101 {
 102         int i;
 103         struct cpufreq_freqs *freqs = data;
 104         if (val == CPUFREQ_PRECHANGE) {
 105                 reg_bif_core_rw_sdram_timing timing =
 106                     REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
 107                 timing.cpd = (freqs->new == 200000 ? 0 : 1);
 108
 109                 if (freqs->new == 200000)
 110                         for (i = 0; i < 50000; i++) ;
 111                 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
 112         }
 113         return 0;
 114 }
 115
 116 module_init(cris_freq_init);