Pileus Git - ~andy/linux/blob - drivers/cpufreq/cris-etraxfs-cpufreq.c

   1 #include <linux/init.h>
   2 #include <linux/module.h>
   3 #include <linux/cpufreq.h>
   4 #include <hwregs/reg_map.h>
   5 #include <arch/hwregs/reg_rdwr.h>
   6 #include <arch/hwregs/config_defs.h>
   7 #include <arch/hwregs/bif_core_defs.h>
   8
   9 static int
  10 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
  11                          void *data);
  12
  13 static struct notifier_block cris_sdram_freq_notifier_block = {
  14         .notifier_call = cris_sdram_freq_notifier
  15 };
  16
  17 static struct cpufreq_frequency_table cris_freq_table[] = {
  18         {0x01, 6000},
  19         {0x02, 200000},
  20         {0, CPUFREQ_TABLE_END},
  21 };
  22
  23 static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
  24 {
  25         reg_config_rw_clk_ctrl clk_ctrl;
  26         clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
  27         return clk_ctrl.pll ? 200000 : 6000;
  28 }
  29
  30 static int cris_freq_target(struct cpufreq_policy *policy, unsigned int state)
  31 {
  32         reg_config_rw_clk_ctrl clk_ctrl;
  33         clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
  34
  35         local_irq_disable();
  36
  37         /* Even though we may be SMP they will share the same clock
  38          * so all settings are made on CPU0. */
  39         if (cris_freq_table[state].frequency == 200000)
  40                 clk_ctrl.pll = 1;
  41         else
  42                 clk_ctrl.pll = 0;
  43         REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
  44
  45         local_irq_enable();
  46
  47         return 0;
  48 }
  49
  50 static int cris_freq_cpu_init(struct cpufreq_policy *policy)
  51 {
  52         return cpufreq_generic_init(policy, cris_freq_table, 1000000);
  53 }
  54
  55 static struct cpufreq_driver cris_freq_driver = {
  56         .get = cris_freq_get_cpu_frequency,
  57         .verify = cpufreq_generic_frequency_table_verify,
  58         .target_index = cris_freq_target,
  59         .init = cris_freq_cpu_init,
  60         .exit = cpufreq_generic_exit,
  61         .name = "cris_freq",
  62         .attr = cpufreq_generic_attr,
  63 };
  64
  65 static int __init cris_freq_init(void)
  66 {
  67         int ret;
  68         ret = cpufreq_register_driver(&cris_freq_driver);
  69         cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
  70                                   CPUFREQ_TRANSITION_NOTIFIER);
  71         return ret;
  72 }
  73
  74 static int
  75 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
  76                          void *data)
  77 {
  78         int i;
  79         struct cpufreq_freqs *freqs = data;
  80         if (val == CPUFREQ_PRECHANGE) {
  81                 reg_bif_core_rw_sdram_timing timing =
  82                     REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
  83                 timing.cpd = (freqs->new == 200000 ? 0 : 1);
  84
  85                 if (freqs->new == 200000)
  86                         for (i = 0; i < 50000; i++) ;
  87                 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
  88         }
  89         return 0;
  90 }
  91
  92 module_init(cris_freq_init);