1 #include <linux/init.h>
2 #include <linux/module.h>
3 #include <linux/cpufreq.h>
4 #include <hwregs/reg_map.h>
5 #include <hwregs/reg_rdwr.h>
6 #include <hwregs/clkgen_defs.h>
7 #include <hwregs/ddr2_defs.h>
10 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
13 static struct notifier_block cris_sdram_freq_notifier_block = {
14 .notifier_call = cris_sdram_freq_notifier
17 static struct cpufreq_frequency_table cris_freq_table[] = {
20 {0, CPUFREQ_TABLE_END},
23 static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
25 reg_clkgen_rw_clk_ctrl clk_ctrl;
26 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
27 return clk_ctrl.pll ? 200000 : 6000;
30 static void cris_freq_set_cpu_state(struct cpufreq_policy *policy,
33 struct cpufreq_freqs freqs;
34 reg_clkgen_rw_clk_ctrl clk_ctrl;
35 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
37 freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
38 freqs.new = cris_freq_table[state].frequency;
40 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
44 /* Even though we may be SMP they will share the same clock
45 * so all settings are made on CPU0. */
46 if (cris_freq_table[state].frequency == 200000)
50 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
54 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
57 static int cris_freq_target(struct cpufreq_policy *policy,
58 unsigned int target_freq,
59 unsigned int relation)
61 unsigned int newstate = 0;
63 if (cpufreq_frequency_table_target(policy, cris_freq_table,
64 target_freq, relation, &newstate))
67 cris_freq_set_cpu_state(policy, newstate);
72 static int cris_freq_cpu_init(struct cpufreq_policy *policy)
74 /* cpuinfo and default policy values */
75 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
77 return cpufreq_table_validate_and_show(policy, cris_freq_table);
81 static struct cpufreq_driver cris_freq_driver = {
82 .get = cris_freq_get_cpu_frequency,
83 .verify = cpufreq_generic_frequency_table_verify,
84 .target = cris_freq_target,
85 .init = cris_freq_cpu_init,
86 .exit = cpufreq_generic_exit,
88 .attr = cpufreq_generic_attr,
91 static int __init cris_freq_init(void)
94 ret = cpufreq_register_driver(&cris_freq_driver);
95 cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
96 CPUFREQ_TRANSITION_NOTIFIER);
101 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
105 struct cpufreq_freqs *freqs = data;
106 if (val == CPUFREQ_PRECHANGE) {
107 reg_ddr2_rw_cfg cfg =
108 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
109 cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46);
111 if (freqs->new == 200000)
112 for (i = 0; i < 50000; i++);
113 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
119 module_init(cris_freq_init);