Pileus Git - ~andy/linux/blob - drivers/clk/hisilicon/clk.h

   1 /*
   2  * Hisilicon Hi3620 clock gate driver
   3  *
   4  * Copyright (c) 2012-2013 Hisilicon Limited.
   5  * Copyright (c) 2012-2013 Linaro Limited.
   6  *
   7  * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
   8  *         Xin Li <li.xin@linaro.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License along
  21  * with this program; if not, write to the Free Software Foundation, Inc.,
  22  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  23  *
  24  */
  25
  26 #ifndef __HISI_CLK_H
  27 #define __HISI_CLK_H
  28
  29 #include <linux/clk-provider.h>
  30 #include <linux/io.h>
  31 #include <linux/spinlock.h>
  32
  33 struct hisi_fixed_rate_clock {
  34         unsigned int            id;
  35         char                    *name;
  36         const char              *parent_name;
  37         unsigned long           flags;
  38         unsigned long           fixed_rate;
  39 };
  40
  41 struct hisi_fixed_factor_clock {
  42         unsigned int            id;
  43         char                    *name;
  44         const char              *parent_name;
  45         unsigned long           mult;
  46         unsigned long           div;
  47         unsigned long           flags;
  48 };
  49
  50 struct hisi_mux_clock {
  51         unsigned int            id;
  52         const char              *name;
  53         const char              **parent_names;
  54         u8                      num_parents;
  55         unsigned long           flags;
  56         unsigned long           offset;
  57         u8                      shift;
  58         u8                      width;
  59         u8                      mux_flags;
  60         const char              *alias;
  61 };
  62
  63 struct hisi_divider_clock {
  64         unsigned int            id;
  65         const char              *name;
  66         const char              *parent_name;
  67         unsigned long           flags;
  68         unsigned long           offset;
  69         u8                      shift;
  70         u8                      width;
  71         u8                      div_flags;
  72         struct clk_div_table    *table;
  73         const char              *alias;
  74 };
  75
  76 struct hisi_gate_clock {
  77         unsigned int            id;
  78         const char              *name;
  79         const char              *parent_name;
  80         unsigned long           flags;
  81         unsigned long           offset;
  82         u8                      bit_idx;
  83         u8                      gate_flags;
  84         const char              *alias;
  85 };
  86
  87 struct clk *hisi_register_clkgate_sep(struct device *, const char *,
  88                                 const char *, unsigned long,
  89                                 void __iomem *, u8,
  90                                 u8, spinlock_t *);
  91
  92 void __init hisi_clk_init(struct device_node *, int);
  93 void __init hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *,
  94                                         int, void __iomem *);
  95 void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *,
  96                                         int, void __iomem *);
  97 void __init hisi_clk_register_mux(struct hisi_mux_clock *, int,
  98                                 void __iomem *);
  99 void __init hisi_clk_register_divider(struct hisi_divider_clock *,
 100                                 int, void __iomem *);
 101 void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *,
 102                                         int, void __iomem *);
 103 #endif  /* __HISI_CLK_H */