2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include <scsi/scsi_cmnd.h>
55 #include <scsi/scsi_host.h>
56 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
63 /* debounce timing parameters in msecs { interval, duration, timeout } */
64 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
65 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
66 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
68 static unsigned int ata_dev_init_params(struct ata_device *dev,
69 u16 heads, u16 sectors);
70 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
71 static unsigned int ata_dev_set_feature(struct ata_device *dev,
72 u8 enable, u8 feature);
73 static void ata_dev_xfermask(struct ata_device *dev);
74 static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
76 unsigned int ata_print_id = 1;
77 static struct workqueue_struct *ata_wq;
79 struct workqueue_struct *ata_aux_wq;
81 int atapi_enabled = 1;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
86 module_param(atapi_dmadir, int, 0444);
87 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 int atapi_passthru16 = 1;
90 module_param(atapi_passthru16, int, 0444);
91 MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)");
94 module_param_named(fua, libata_fua, int, 0444);
95 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
97 static int ata_ignore_hpa;
98 module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
99 MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
101 static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
102 module_param_named(dma, libata_dma_mask, int, 0444);
103 MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
105 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
106 module_param(ata_probe_timeout, int, 0444);
107 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
109 int libata_noacpi = 0;
110 module_param_named(noacpi, libata_noacpi, int, 0444);
111 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set");
113 MODULE_AUTHOR("Jeff Garzik");
114 MODULE_DESCRIPTION("Library module for ATA devices");
115 MODULE_LICENSE("GPL");
116 MODULE_VERSION(DRV_VERSION);
120 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
121 * @tf: Taskfile to convert
122 * @pmp: Port multiplier port
123 * @is_cmd: This FIS is for command
124 * @fis: Buffer into which data will output
126 * Converts a standard ATA taskfile to a Serial ATA
127 * FIS structure (Register - Host to Device).
130 * Inherited from caller.
132 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
134 fis[0] = 0x27; /* Register - Host to Device FIS */
135 fis[1] = pmp & 0xf; /* Port multiplier number*/
137 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
139 fis[2] = tf->command;
140 fis[3] = tf->feature;
147 fis[8] = tf->hob_lbal;
148 fis[9] = tf->hob_lbam;
149 fis[10] = tf->hob_lbah;
150 fis[11] = tf->hob_feature;
153 fis[13] = tf->hob_nsect;
164 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
165 * @fis: Buffer from which data will be input
166 * @tf: Taskfile to output
168 * Converts a serial ATA FIS structure to a standard ATA taskfile.
171 * Inherited from caller.
174 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
176 tf->command = fis[2]; /* status */
177 tf->feature = fis[3]; /* error */
184 tf->hob_lbal = fis[8];
185 tf->hob_lbam = fis[9];
186 tf->hob_lbah = fis[10];
189 tf->hob_nsect = fis[13];
192 static const u8 ata_rw_cmds[] = {
196 ATA_CMD_READ_MULTI_EXT,
197 ATA_CMD_WRITE_MULTI_EXT,
201 ATA_CMD_WRITE_MULTI_FUA_EXT,
205 ATA_CMD_PIO_READ_EXT,
206 ATA_CMD_PIO_WRITE_EXT,
219 ATA_CMD_WRITE_FUA_EXT
223 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
224 * @tf: command to examine and configure
225 * @dev: device tf belongs to
227 * Examine the device configuration and tf->flags to calculate
228 * the proper read/write commands and protocol to use.
233 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
237 int index, fua, lba48, write;
239 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
240 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
241 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
243 if (dev->flags & ATA_DFLAG_PIO) {
244 tf->protocol = ATA_PROT_PIO;
245 index = dev->multi_count ? 0 : 8;
246 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
247 /* Unable to use DMA due to host limitation */
248 tf->protocol = ATA_PROT_PIO;
249 index = dev->multi_count ? 0 : 8;
251 tf->protocol = ATA_PROT_DMA;
255 cmd = ata_rw_cmds[index + fua + lba48 + write];
264 * ata_tf_read_block - Read block address from ATA taskfile
265 * @tf: ATA taskfile of interest
266 * @dev: ATA device @tf belongs to
271 * Read block address from @tf. This function can handle all
272 * three address formats - LBA, LBA48 and CHS. tf->protocol and
273 * flags select the address format to use.
276 * Block address read from @tf.
278 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
282 if (tf->flags & ATA_TFLAG_LBA) {
283 if (tf->flags & ATA_TFLAG_LBA48) {
284 block |= (u64)tf->hob_lbah << 40;
285 block |= (u64)tf->hob_lbam << 32;
286 block |= tf->hob_lbal << 24;
288 block |= (tf->device & 0xf) << 24;
290 block |= tf->lbah << 16;
291 block |= tf->lbam << 8;
296 cyl = tf->lbam | (tf->lbah << 8);
297 head = tf->device & 0xf;
300 block = (cyl * dev->heads + head) * dev->sectors + sect;
307 * ata_build_rw_tf - Build ATA taskfile for given read/write request
308 * @tf: Target ATA taskfile
309 * @dev: ATA device @tf belongs to
310 * @block: Block address
311 * @n_block: Number of blocks
312 * @tf_flags: RW/FUA etc...
318 * Build ATA taskfile @tf for read/write request described by
319 * @block, @n_block, @tf_flags and @tag on @dev.
323 * 0 on success, -ERANGE if the request is too large for @dev,
324 * -EINVAL if the request is invalid.
326 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
327 u64 block, u32 n_block, unsigned int tf_flags,
330 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
331 tf->flags |= tf_flags;
333 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
335 if (!lba_48_ok(block, n_block))
338 tf->protocol = ATA_PROT_NCQ;
339 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
341 if (tf->flags & ATA_TFLAG_WRITE)
342 tf->command = ATA_CMD_FPDMA_WRITE;
344 tf->command = ATA_CMD_FPDMA_READ;
346 tf->nsect = tag << 3;
347 tf->hob_feature = (n_block >> 8) & 0xff;
348 tf->feature = n_block & 0xff;
350 tf->hob_lbah = (block >> 40) & 0xff;
351 tf->hob_lbam = (block >> 32) & 0xff;
352 tf->hob_lbal = (block >> 24) & 0xff;
353 tf->lbah = (block >> 16) & 0xff;
354 tf->lbam = (block >> 8) & 0xff;
355 tf->lbal = block & 0xff;
358 if (tf->flags & ATA_TFLAG_FUA)
359 tf->device |= 1 << 7;
360 } else if (dev->flags & ATA_DFLAG_LBA) {
361 tf->flags |= ATA_TFLAG_LBA;
363 if (lba_28_ok(block, n_block)) {
365 tf->device |= (block >> 24) & 0xf;
366 } else if (lba_48_ok(block, n_block)) {
367 if (!(dev->flags & ATA_DFLAG_LBA48))
371 tf->flags |= ATA_TFLAG_LBA48;
373 tf->hob_nsect = (n_block >> 8) & 0xff;
375 tf->hob_lbah = (block >> 40) & 0xff;
376 tf->hob_lbam = (block >> 32) & 0xff;
377 tf->hob_lbal = (block >> 24) & 0xff;
379 /* request too large even for LBA48 */
382 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
385 tf->nsect = n_block & 0xff;
387 tf->lbah = (block >> 16) & 0xff;
388 tf->lbam = (block >> 8) & 0xff;
389 tf->lbal = block & 0xff;
391 tf->device |= ATA_LBA;
394 u32 sect, head, cyl, track;
396 /* The request -may- be too large for CHS addressing. */
397 if (!lba_28_ok(block, n_block))
400 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
403 /* Convert LBA to CHS */
404 track = (u32)block / dev->sectors;
405 cyl = track / dev->heads;
406 head = track % dev->heads;
407 sect = (u32)block % dev->sectors + 1;
409 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
410 (u32)block, track, cyl, head, sect);
412 /* Check whether the converted CHS can fit.
416 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
419 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
430 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
431 * @pio_mask: pio_mask
432 * @mwdma_mask: mwdma_mask
433 * @udma_mask: udma_mask
435 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
436 * unsigned int xfer_mask.
444 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
445 unsigned int mwdma_mask,
446 unsigned int udma_mask)
448 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
449 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
450 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
454 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
455 * @xfer_mask: xfer_mask to unpack
456 * @pio_mask: resulting pio_mask
457 * @mwdma_mask: resulting mwdma_mask
458 * @udma_mask: resulting udma_mask
460 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
461 * Any NULL distination masks will be ignored.
463 static void ata_unpack_xfermask(unsigned int xfer_mask,
464 unsigned int *pio_mask,
465 unsigned int *mwdma_mask,
466 unsigned int *udma_mask)
469 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
471 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
473 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
476 static const struct ata_xfer_ent {
480 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
481 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
482 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
487 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
488 * @xfer_mask: xfer_mask of interest
490 * Return matching XFER_* value for @xfer_mask. Only the highest
491 * bit of @xfer_mask is considered.
497 * Matching XFER_* value, 0 if no match found.
499 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
501 int highbit = fls(xfer_mask) - 1;
502 const struct ata_xfer_ent *ent;
504 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
505 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
506 return ent->base + highbit - ent->shift;
511 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
512 * @xfer_mode: XFER_* of interest
514 * Return matching xfer_mask for @xfer_mode.
520 * Matching xfer_mask, 0 if no match found.
522 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
524 const struct ata_xfer_ent *ent;
526 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
527 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
528 return 1 << (ent->shift + xfer_mode - ent->base);
533 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
534 * @xfer_mode: XFER_* of interest
536 * Return matching xfer_shift for @xfer_mode.
542 * Matching xfer_shift, -1 if no match found.
544 static int ata_xfer_mode2shift(unsigned int xfer_mode)
546 const struct ata_xfer_ent *ent;
548 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
549 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
555 * ata_mode_string - convert xfer_mask to string
556 * @xfer_mask: mask of bits supported; only highest bit counts.
558 * Determine string which represents the highest speed
559 * (highest bit in @modemask).
565 * Constant C string representing highest speed listed in
566 * @mode_mask, or the constant C string "<n/a>".
568 static const char *ata_mode_string(unsigned int xfer_mask)
570 static const char * const xfer_mode_str[] = {
594 highbit = fls(xfer_mask) - 1;
595 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
596 return xfer_mode_str[highbit];
600 static const char *sata_spd_string(unsigned int spd)
602 static const char * const spd_str[] = {
607 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
609 return spd_str[spd - 1];
612 void ata_dev_disable(struct ata_device *dev)
614 if (ata_dev_enabled(dev)) {
615 if (ata_msg_drv(dev->link->ap))
616 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
617 ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 |
623 static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy)
625 struct ata_link *link = dev->link;
626 struct ata_port *ap = link->ap;
628 unsigned int err_mask;
632 * disallow DIPM for drivers which haven't set
633 * ATA_FLAG_IPM. This is because when DIPM is enabled,
634 * phy ready will be set in the interrupt status on
635 * state changes, which will cause some drivers to
636 * think there are errors - additionally drivers will
637 * need to disable hot plug.
639 if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) {
640 ap->pm_policy = NOT_AVAILABLE;
645 * For DIPM, we will only enable it for the
648 * Why? Because Disks are too stupid to know that
649 * If the host rejects a request to go to SLUMBER
650 * they should retry at PARTIAL, and instead it
651 * just would give up. So, for medium_power to
652 * work at all, we need to only allow HIPM.
654 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
660 /* no restrictions on IPM transitions */
661 scontrol &= ~(0x3 << 8);
662 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
667 if (dev->flags & ATA_DFLAG_DIPM)
668 err_mask = ata_dev_set_feature(dev,
669 SETFEATURES_SATA_ENABLE, SATA_DIPM);
672 /* allow IPM to PARTIAL */
673 scontrol &= ~(0x1 << 8);
674 scontrol |= (0x2 << 8);
675 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
680 if (ata_dev_enabled(dev) && (dev->flags & ATA_DFLAG_DIPM))
681 err_mask = ata_dev_set_feature(dev,
682 SETFEATURES_SATA_DISABLE, SATA_DIPM);
685 case MAX_PERFORMANCE:
686 /* disable all IPM transitions */
687 scontrol |= (0x3 << 8);
688 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
693 if (ata_dev_enabled(dev) && (dev->flags & ATA_DFLAG_DIPM))
694 err_mask = ata_dev_set_feature(dev,
695 SETFEATURES_SATA_DISABLE, SATA_DIPM);
699 /* FIXME: handle SET FEATURES failure */
706 * ata_dev_enable_pm - enable SATA interface power management
707 * @dev: device to enable power management
708 * @policy: the link power management policy
710 * Enable SATA Interface power management. This will enable
711 * Device Interface Power Management (DIPM) for min_power
712 * policy, and then call driver specific callbacks for
713 * enabling Host Initiated Power management.
716 * Returns: -EINVAL if IPM is not supported, 0 otherwise.
718 void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy)
721 struct ata_port *ap = dev->link->ap;
723 /* set HIPM first, then DIPM */
724 if (ap->ops->enable_pm)
725 rc = ap->ops->enable_pm(ap, policy);
728 rc = ata_dev_set_dipm(dev, policy);
732 ap->pm_policy = MAX_PERFORMANCE;
734 ap->pm_policy = policy;
735 return /* rc */; /* hopefully we can use 'rc' eventually */
740 * ata_dev_disable_pm - disable SATA interface power management
741 * @dev: device to disable power management
743 * Disable SATA Interface power management. This will disable
744 * Device Interface Power Management (DIPM) without changing
745 * policy, call driver specific callbacks for disabling Host
746 * Initiated Power management.
751 static void ata_dev_disable_pm(struct ata_device *dev)
753 struct ata_port *ap = dev->link->ap;
755 ata_dev_set_dipm(dev, MAX_PERFORMANCE);
756 if (ap->ops->disable_pm)
757 ap->ops->disable_pm(ap);
759 #endif /* CONFIG_PM */
761 void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy)
763 ap->pm_policy = policy;
764 ap->link.eh_info.action |= ATA_EHI_LPM;
765 ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY;
766 ata_port_schedule_eh(ap);
770 static void ata_lpm_enable(struct ata_host *host)
772 struct ata_link *link;
774 struct ata_device *dev;
777 for (i = 0; i < host->n_ports; i++) {
779 ata_port_for_each_link(link, ap) {
780 ata_link_for_each_dev(dev, link)
781 ata_dev_disable_pm(dev);
786 static void ata_lpm_disable(struct ata_host *host)
790 for (i = 0; i < host->n_ports; i++) {
791 struct ata_port *ap = host->ports[i];
792 ata_lpm_schedule(ap, ap->pm_policy);
795 #endif /* CONFIG_PM */
799 * ata_devchk - PATA device presence detection
800 * @ap: ATA channel to examine
801 * @device: Device to examine (starting at zero)
803 * This technique was originally described in
804 * Hale Landis's ATADRVR (www.ata-atapi.com), and
805 * later found its way into the ATA/ATAPI spec.
807 * Write a pattern to the ATA shadow registers,
808 * and if a device is present, it will respond by
809 * correctly storing and echoing back the
810 * ATA shadow register contents.
816 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
818 struct ata_ioports *ioaddr = &ap->ioaddr;
821 ap->ops->dev_select(ap, device);
823 iowrite8(0x55, ioaddr->nsect_addr);
824 iowrite8(0xaa, ioaddr->lbal_addr);
826 iowrite8(0xaa, ioaddr->nsect_addr);
827 iowrite8(0x55, ioaddr->lbal_addr);
829 iowrite8(0x55, ioaddr->nsect_addr);
830 iowrite8(0xaa, ioaddr->lbal_addr);
832 nsect = ioread8(ioaddr->nsect_addr);
833 lbal = ioread8(ioaddr->lbal_addr);
835 if ((nsect == 0x55) && (lbal == 0xaa))
836 return 1; /* we found a device */
838 return 0; /* nothing found */
842 * ata_dev_classify - determine device type based on ATA-spec signature
843 * @tf: ATA taskfile register set for device to be identified
845 * Determine from taskfile register contents whether a device is
846 * ATA or ATAPI, as per "Signature and persistence" section
847 * of ATA/PI spec (volume 1, sect 5.14).
853 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
854 * %ATA_DEV_UNKNOWN the event of failure.
856 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
858 /* Apple's open source Darwin code hints that some devices only
859 * put a proper signature into the LBA mid/high registers,
860 * So, we only check those. It's sufficient for uniqueness.
862 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
863 * signatures for ATA and ATAPI devices attached on SerialATA,
864 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
865 * spec has never mentioned about using different signatures
866 * for ATA/ATAPI devices. Then, Serial ATA II: Port
867 * Multiplier specification began to use 0x69/0x96 to identify
868 * port multpliers and 0x3c/0xc3 to identify SEMB device.
869 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
870 * 0x69/0x96 shortly and described them as reserved for
873 * We follow the current spec and consider that 0x69/0x96
874 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
876 if ((tf->lbam == 0) && (tf->lbah == 0)) {
877 DPRINTK("found ATA device by sig\n");
881 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
882 DPRINTK("found ATAPI device by sig\n");
883 return ATA_DEV_ATAPI;
886 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
887 DPRINTK("found PMP device by sig\n");
891 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
892 printk(KERN_INFO "ata: SEMB device ignored\n");
893 return ATA_DEV_SEMB_UNSUP; /* not yet */
896 DPRINTK("unknown device\n");
897 return ATA_DEV_UNKNOWN;
901 * ata_dev_try_classify - Parse returned ATA device signature
902 * @dev: ATA device to classify (starting at zero)
903 * @present: device seems present
904 * @r_err: Value of error register on completion
906 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
907 * an ATA/ATAPI-defined set of values is placed in the ATA
908 * shadow registers, indicating the results of device detection
911 * Select the ATA device, and read the values from the ATA shadow
912 * registers. Then parse according to the Error register value,
913 * and the spec-defined values examined by ata_dev_classify().
919 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
921 unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
924 struct ata_port *ap = dev->link->ap;
925 struct ata_taskfile tf;
929 ap->ops->dev_select(ap, dev->devno);
931 memset(&tf, 0, sizeof(tf));
933 ap->ops->tf_read(ap, &tf);
938 /* see if device passed diags: if master then continue and warn later */
939 if (err == 0 && dev->devno == 0)
940 /* diagnostic fail : do nothing _YET_ */
941 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
944 else if ((dev->devno == 0) && (err == 0x81))
949 /* determine if device is ATA or ATAPI */
950 class = ata_dev_classify(&tf);
952 if (class == ATA_DEV_UNKNOWN) {
953 /* If the device failed diagnostic, it's likely to
954 * have reported incorrect device signature too.
955 * Assume ATA device if the device seems present but
956 * device signature is invalid with diagnostic
959 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
962 class = ATA_DEV_NONE;
963 } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
964 class = ATA_DEV_NONE;
970 * ata_id_string - Convert IDENTIFY DEVICE page into string
971 * @id: IDENTIFY DEVICE results we will examine
972 * @s: string into which data is output
973 * @ofs: offset into identify device page
974 * @len: length of string to return. must be an even number.
976 * The strings in the IDENTIFY DEVICE page are broken up into
977 * 16-bit chunks. Run through the string, and output each
978 * 8-bit chunk linearly, regardless of platform.
984 void ata_id_string(const u16 *id, unsigned char *s,
985 unsigned int ofs, unsigned int len)
1004 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
1005 * @id: IDENTIFY DEVICE results we will examine
1006 * @s: string into which data is output
1007 * @ofs: offset into identify device page
1008 * @len: length of string to return. must be an odd number.
1010 * This function is identical to ata_id_string except that it
1011 * trims trailing spaces and terminates the resulting string with
1012 * null. @len must be actual maximum length (even number) + 1.
1017 void ata_id_c_string(const u16 *id, unsigned char *s,
1018 unsigned int ofs, unsigned int len)
1022 WARN_ON(!(len & 1));
1024 ata_id_string(id, s, ofs, len - 1);
1026 p = s + strnlen(s, len - 1);
1027 while (p > s && p[-1] == ' ')
1032 static u64 ata_id_n_sectors(const u16 *id)
1034 if (ata_id_has_lba(id)) {
1035 if (ata_id_has_lba48(id))
1036 return ata_id_u64(id, 100);
1038 return ata_id_u32(id, 60);
1040 if (ata_id_current_chs_valid(id))
1041 return ata_id_u32(id, 57);
1043 return id[1] * id[3] * id[6];
1047 static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
1051 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1052 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
1053 sectors |= (tf->hob_lbal & 0xff) << 24;
1054 sectors |= (tf->lbah & 0xff) << 16;
1055 sectors |= (tf->lbam & 0xff) << 8;
1056 sectors |= (tf->lbal & 0xff);
1061 static u64 ata_tf_to_lba(struct ata_taskfile *tf)
1065 sectors |= (tf->device & 0x0f) << 24;
1066 sectors |= (tf->lbah & 0xff) << 16;
1067 sectors |= (tf->lbam & 0xff) << 8;
1068 sectors |= (tf->lbal & 0xff);
1074 * ata_read_native_max_address - Read native max address
1075 * @dev: target device
1076 * @max_sectors: out parameter for the result native max address
1078 * Perform an LBA48 or LBA28 native size query upon the device in
1082 * 0 on success, -EACCES if command is aborted by the drive.
1083 * -EIO on other errors.
1085 static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1087 unsigned int err_mask;
1088 struct ata_taskfile tf;
1089 int lba48 = ata_id_has_lba48(dev->id);
1091 ata_tf_init(dev, &tf);
1093 /* always clear all address registers */
1094 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1097 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1098 tf.flags |= ATA_TFLAG_LBA48;
1100 tf.command = ATA_CMD_READ_NATIVE_MAX;
1102 tf.protocol |= ATA_PROT_NODATA;
1103 tf.device |= ATA_LBA;
1105 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1107 ata_dev_printk(dev, KERN_WARNING, "failed to read native "
1108 "max address (err_mask=0x%x)\n", err_mask);
1109 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1115 *max_sectors = ata_tf_to_lba48(&tf);
1117 *max_sectors = ata_tf_to_lba(&tf);
1118 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
1124 * ata_set_max_sectors - Set max sectors
1125 * @dev: target device
1126 * @new_sectors: new max sectors value to set for the device
1128 * Set max sectors of @dev to @new_sectors.
1131 * 0 on success, -EACCES if command is aborted or denied (due to
1132 * previous non-volatile SET_MAX) by the drive. -EIO on other
1135 static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1137 unsigned int err_mask;
1138 struct ata_taskfile tf;
1139 int lba48 = ata_id_has_lba48(dev->id);
1143 ata_tf_init(dev, &tf);
1145 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1148 tf.command = ATA_CMD_SET_MAX_EXT;
1149 tf.flags |= ATA_TFLAG_LBA48;
1151 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1152 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1153 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1155 tf.command = ATA_CMD_SET_MAX;
1157 tf.device |= (new_sectors >> 24) & 0xf;
1160 tf.protocol |= ATA_PROT_NODATA;
1161 tf.device |= ATA_LBA;
1163 tf.lbal = (new_sectors >> 0) & 0xff;
1164 tf.lbam = (new_sectors >> 8) & 0xff;
1165 tf.lbah = (new_sectors >> 16) & 0xff;
1167 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1169 ata_dev_printk(dev, KERN_WARNING, "failed to set "
1170 "max address (err_mask=0x%x)\n", err_mask);
1171 if (err_mask == AC_ERR_DEV &&
1172 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1181 * ata_hpa_resize - Resize a device with an HPA set
1182 * @dev: Device to resize
1184 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1185 * it if required to the full size of the media. The caller must check
1186 * the drive has the HPA feature set enabled.
1189 * 0 on success, -errno on failure.
1191 static int ata_hpa_resize(struct ata_device *dev)
1193 struct ata_eh_context *ehc = &dev->link->eh_context;
1194 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1195 u64 sectors = ata_id_n_sectors(dev->id);
1199 /* do we need to do it? */
1200 if (dev->class != ATA_DEV_ATA ||
1201 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1202 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
1205 /* read native max address */
1206 rc = ata_read_native_max_address(dev, &native_sectors);
1208 /* If HPA isn't going to be unlocked, skip HPA
1209 * resizing from the next try.
1211 if (!ata_ignore_hpa) {
1212 ata_dev_printk(dev, KERN_WARNING, "HPA support seems "
1213 "broken, will skip HPA handling\n");
1214 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1216 /* we can continue if device aborted the command */
1224 /* nothing to do? */
1225 if (native_sectors <= sectors || !ata_ignore_hpa) {
1226 if (!print_info || native_sectors == sectors)
1229 if (native_sectors > sectors)
1230 ata_dev_printk(dev, KERN_INFO,
1231 "HPA detected: current %llu, native %llu\n",
1232 (unsigned long long)sectors,
1233 (unsigned long long)native_sectors);
1234 else if (native_sectors < sectors)
1235 ata_dev_printk(dev, KERN_WARNING,
1236 "native sectors (%llu) is smaller than "
1238 (unsigned long long)native_sectors,
1239 (unsigned long long)sectors);
1243 /* let's unlock HPA */
1244 rc = ata_set_max_sectors(dev, native_sectors);
1245 if (rc == -EACCES) {
1246 /* if device aborted the command, skip HPA resizing */
1247 ata_dev_printk(dev, KERN_WARNING, "device aborted resize "
1248 "(%llu -> %llu), skipping HPA handling\n",
1249 (unsigned long long)sectors,
1250 (unsigned long long)native_sectors);
1251 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1256 /* re-read IDENTIFY data */
1257 rc = ata_dev_reread_id(dev, 0);
1259 ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY "
1260 "data after HPA resizing\n");
1265 u64 new_sectors = ata_id_n_sectors(dev->id);
1266 ata_dev_printk(dev, KERN_INFO,
1267 "HPA unlocked: %llu -> %llu, native %llu\n",
1268 (unsigned long long)sectors,
1269 (unsigned long long)new_sectors,
1270 (unsigned long long)native_sectors);
1277 * ata_id_to_dma_mode - Identify DMA mode from id block
1278 * @dev: device to identify
1279 * @unknown: mode to assume if we cannot tell
1281 * Set up the timing values for the device based upon the identify
1282 * reported values for the DMA mode. This function is used by drivers
1283 * which rely upon firmware configured modes, but wish to report the
1284 * mode correctly when possible.
1286 * In addition we emit similarly formatted messages to the default
1287 * ata_dev_set_mode handler, in order to provide consistency of
1291 void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
1296 /* Pack the DMA modes */
1297 mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
1298 if (dev->id[53] & 0x04)
1299 mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
1301 /* Select the mode in use */
1302 mode = ata_xfer_mask2mode(mask);
1305 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
1306 ata_mode_string(mask));
1308 /* SWDMA perhaps ? */
1310 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
1313 /* Configure the device reporting */
1314 dev->xfer_mode = mode;
1315 dev->xfer_shift = ata_xfer_mode2shift(mode);
1319 * ata_noop_dev_select - Select device 0/1 on ATA bus
1320 * @ap: ATA channel to manipulate
1321 * @device: ATA device (numbered from zero) to select
1323 * This function performs no actual function.
1325 * May be used as the dev_select() entry in ata_port_operations.
1330 void ata_noop_dev_select(struct ata_port *ap, unsigned int device)
1336 * ata_std_dev_select - Select device 0/1 on ATA bus
1337 * @ap: ATA channel to manipulate
1338 * @device: ATA device (numbered from zero) to select
1340 * Use the method defined in the ATA specification to
1341 * make either device 0, or device 1, active on the
1342 * ATA channel. Works with both PIO and MMIO.
1344 * May be used as the dev_select() entry in ata_port_operations.
1350 void ata_std_dev_select(struct ata_port *ap, unsigned int device)
1355 tmp = ATA_DEVICE_OBS;
1357 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1359 iowrite8(tmp, ap->ioaddr.device_addr);
1360 ata_pause(ap); /* needed; also flushes, for mmio */
1364 * ata_dev_select - Select device 0/1 on ATA bus
1365 * @ap: ATA channel to manipulate
1366 * @device: ATA device (numbered from zero) to select
1367 * @wait: non-zero to wait for Status register BSY bit to clear
1368 * @can_sleep: non-zero if context allows sleeping
1370 * Use the method defined in the ATA specification to
1371 * make either device 0, or device 1, active on the
1374 * This is a high-level version of ata_std_dev_select(),
1375 * which additionally provides the services of inserting
1376 * the proper pauses and status polling, where needed.
1382 void ata_dev_select(struct ata_port *ap, unsigned int device,
1383 unsigned int wait, unsigned int can_sleep)
1385 if (ata_msg_probe(ap))
1386 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
1387 "device %u, wait %u\n", device, wait);
1392 ap->ops->dev_select(ap, device);
1395 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
1402 * ata_dump_id - IDENTIFY DEVICE info debugging output
1403 * @id: IDENTIFY DEVICE page to dump
1405 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1412 static inline void ata_dump_id(const u16 *id)
1414 DPRINTK("49==0x%04x "
1424 DPRINTK("80==0x%04x "
1434 DPRINTK("88==0x%04x "
1441 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1442 * @id: IDENTIFY data to compute xfer mask from
1444 * Compute the xfermask for this device. This is not as trivial
1445 * as it seems if we must consider early devices correctly.
1447 * FIXME: pre IDE drive timing (do we care ?).
1455 static unsigned int ata_id_xfermask(const u16 *id)
1457 unsigned int pio_mask, mwdma_mask, udma_mask;
1459 /* Usual case. Word 53 indicates word 64 is valid */
1460 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1461 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1465 /* If word 64 isn't valid then Word 51 high byte holds
1466 * the PIO timing number for the maximum. Turn it into
1469 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1470 if (mode < 5) /* Valid PIO range */
1471 pio_mask = (2 << mode) - 1;
1475 /* But wait.. there's more. Design your standards by
1476 * committee and you too can get a free iordy field to
1477 * process. However its the speeds not the modes that
1478 * are supported... Note drivers using the timing API
1479 * will get this right anyway
1483 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1485 if (ata_id_is_cfa(id)) {
1487 * Process compact flash extended modes
1489 int pio = id[163] & 0x7;
1490 int dma = (id[163] >> 3) & 7;
1493 pio_mask |= (1 << 5);
1495 pio_mask |= (1 << 6);
1497 mwdma_mask |= (1 << 3);
1499 mwdma_mask |= (1 << 4);
1503 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1504 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1506 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1510 * ata_port_queue_task - Queue port_task
1511 * @ap: The ata_port to queue port_task for
1512 * @fn: workqueue function to be scheduled
1513 * @data: data for @fn to use
1514 * @delay: delay time for workqueue function
1516 * Schedule @fn(@data) for execution after @delay jiffies using
1517 * port_task. There is one port_task per port and it's the
1518 * user(low level driver)'s responsibility to make sure that only
1519 * one task is active at any given time.
1521 * libata core layer takes care of synchronization between
1522 * port_task and EH. ata_port_queue_task() may be ignored for EH
1526 * Inherited from caller.
1528 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1529 unsigned long delay)
1531 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1532 ap->port_task_data = data;
1534 /* may fail if ata_port_flush_task() in progress */
1535 queue_delayed_work(ata_wq, &ap->port_task, delay);
1539 * ata_port_flush_task - Flush port_task
1540 * @ap: The ata_port to flush port_task for
1542 * After this function completes, port_task is guranteed not to
1543 * be running or scheduled.
1546 * Kernel thread context (may sleep)
1548 void ata_port_flush_task(struct ata_port *ap)
1552 cancel_rearming_delayed_work(&ap->port_task);
1554 if (ata_msg_ctl(ap))
1555 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1558 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1560 struct completion *waiting = qc->private_data;
1566 * ata_exec_internal_sg - execute libata internal command
1567 * @dev: Device to which the command is sent
1568 * @tf: Taskfile registers for the command and the result
1569 * @cdb: CDB for packet command
1570 * @dma_dir: Data tranfer direction of the command
1571 * @sgl: sg list for the data buffer of the command
1572 * @n_elem: Number of sg entries
1573 * @timeout: Timeout in msecs (0 for default)
1575 * Executes libata internal command with timeout. @tf contains
1576 * command on entry and result on return. Timeout and error
1577 * conditions are reported via return value. No recovery action
1578 * is taken after a command times out. It's caller's duty to
1579 * clean up after timeout.
1582 * None. Should be called with kernel context, might sleep.
1585 * Zero on success, AC_ERR_* mask on failure
1587 unsigned ata_exec_internal_sg(struct ata_device *dev,
1588 struct ata_taskfile *tf, const u8 *cdb,
1589 int dma_dir, struct scatterlist *sgl,
1590 unsigned int n_elem, unsigned long timeout)
1592 struct ata_link *link = dev->link;
1593 struct ata_port *ap = link->ap;
1594 u8 command = tf->command;
1595 struct ata_queued_cmd *qc;
1596 unsigned int tag, preempted_tag;
1597 u32 preempted_sactive, preempted_qc_active;
1598 int preempted_nr_active_links;
1599 DECLARE_COMPLETION_ONSTACK(wait);
1600 unsigned long flags;
1601 unsigned int err_mask;
1604 spin_lock_irqsave(ap->lock, flags);
1606 /* no internal command while frozen */
1607 if (ap->pflags & ATA_PFLAG_FROZEN) {
1608 spin_unlock_irqrestore(ap->lock, flags);
1609 return AC_ERR_SYSTEM;
1612 /* initialize internal qc */
1614 /* XXX: Tag 0 is used for drivers with legacy EH as some
1615 * drivers choke if any other tag is given. This breaks
1616 * ata_tag_internal() test for those drivers. Don't use new
1617 * EH stuff without converting to it.
1619 if (ap->ops->error_handler)
1620 tag = ATA_TAG_INTERNAL;
1624 if (test_and_set_bit(tag, &ap->qc_allocated))
1626 qc = __ata_qc_from_tag(ap, tag);
1634 preempted_tag = link->active_tag;
1635 preempted_sactive = link->sactive;
1636 preempted_qc_active = ap->qc_active;
1637 preempted_nr_active_links = ap->nr_active_links;
1638 link->active_tag = ATA_TAG_POISON;
1641 ap->nr_active_links = 0;
1643 /* prepare & issue qc */
1646 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1647 qc->flags |= ATA_QCFLAG_RESULT_TF;
1648 qc->dma_dir = dma_dir;
1649 if (dma_dir != DMA_NONE) {
1650 unsigned int i, buflen = 0;
1651 struct scatterlist *sg;
1653 for_each_sg(sgl, sg, n_elem, i)
1654 buflen += sg->length;
1656 ata_sg_init(qc, sgl, n_elem);
1657 qc->nbytes = buflen;
1660 qc->private_data = &wait;
1661 qc->complete_fn = ata_qc_complete_internal;
1665 spin_unlock_irqrestore(ap->lock, flags);
1668 timeout = ata_probe_timeout * 1000 / HZ;
1670 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
1672 ata_port_flush_task(ap);
1675 spin_lock_irqsave(ap->lock, flags);
1677 /* We're racing with irq here. If we lose, the
1678 * following test prevents us from completing the qc
1679 * twice. If we win, the port is frozen and will be
1680 * cleaned up by ->post_internal_cmd().
1682 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1683 qc->err_mask |= AC_ERR_TIMEOUT;
1685 if (ap->ops->error_handler)
1686 ata_port_freeze(ap);
1688 ata_qc_complete(qc);
1690 if (ata_msg_warn(ap))
1691 ata_dev_printk(dev, KERN_WARNING,
1692 "qc timeout (cmd 0x%x)\n", command);
1695 spin_unlock_irqrestore(ap->lock, flags);
1698 /* do post_internal_cmd */
1699 if (ap->ops->post_internal_cmd)
1700 ap->ops->post_internal_cmd(qc);
1702 /* perform minimal error analysis */
1703 if (qc->flags & ATA_QCFLAG_FAILED) {
1704 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1705 qc->err_mask |= AC_ERR_DEV;
1708 qc->err_mask |= AC_ERR_OTHER;
1710 if (qc->err_mask & ~AC_ERR_OTHER)
1711 qc->err_mask &= ~AC_ERR_OTHER;
1715 spin_lock_irqsave(ap->lock, flags);
1717 *tf = qc->result_tf;
1718 err_mask = qc->err_mask;
1721 link->active_tag = preempted_tag;
1722 link->sactive = preempted_sactive;
1723 ap->qc_active = preempted_qc_active;
1724 ap->nr_active_links = preempted_nr_active_links;
1726 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1727 * Until those drivers are fixed, we detect the condition
1728 * here, fail the command with AC_ERR_SYSTEM and reenable the
1731 * Note that this doesn't change any behavior as internal
1732 * command failure results in disabling the device in the
1733 * higher layer for LLDDs without new reset/EH callbacks.
1735 * Kill the following code as soon as those drivers are fixed.
1737 if (ap->flags & ATA_FLAG_DISABLED) {
1738 err_mask |= AC_ERR_SYSTEM;
1742 spin_unlock_irqrestore(ap->lock, flags);
1748 * ata_exec_internal - execute libata internal command
1749 * @dev: Device to which the command is sent
1750 * @tf: Taskfile registers for the command and the result
1751 * @cdb: CDB for packet command
1752 * @dma_dir: Data tranfer direction of the command
1753 * @buf: Data buffer of the command
1754 * @buflen: Length of data buffer
1755 * @timeout: Timeout in msecs (0 for default)
1757 * Wrapper around ata_exec_internal_sg() which takes simple
1758 * buffer instead of sg list.
1761 * None. Should be called with kernel context, might sleep.
1764 * Zero on success, AC_ERR_* mask on failure
1766 unsigned ata_exec_internal(struct ata_device *dev,
1767 struct ata_taskfile *tf, const u8 *cdb,
1768 int dma_dir, void *buf, unsigned int buflen,
1769 unsigned long timeout)
1771 struct scatterlist *psg = NULL, sg;
1772 unsigned int n_elem = 0;
1774 if (dma_dir != DMA_NONE) {
1776 sg_init_one(&sg, buf, buflen);
1781 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1786 * ata_do_simple_cmd - execute simple internal command
1787 * @dev: Device to which the command is sent
1788 * @cmd: Opcode to execute
1790 * Execute a 'simple' command, that only consists of the opcode
1791 * 'cmd' itself, without filling any other registers
1794 * Kernel thread context (may sleep).
1797 * Zero on success, AC_ERR_* mask on failure
1799 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1801 struct ata_taskfile tf;
1803 ata_tf_init(dev, &tf);
1806 tf.flags |= ATA_TFLAG_DEVICE;
1807 tf.protocol = ATA_PROT_NODATA;
1809 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1813 * ata_pio_need_iordy - check if iordy needed
1816 * Check if the current speed of the device requires IORDY. Used
1817 * by various controllers for chip configuration.
1820 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1822 /* Controller doesn't support IORDY. Probably a pointless check
1823 as the caller should know this */
1824 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1826 /* PIO3 and higher it is mandatory */
1827 if (adev->pio_mode > XFER_PIO_2)
1829 /* We turn it on when possible */
1830 if (ata_id_has_iordy(adev->id))
1836 * ata_pio_mask_no_iordy - Return the non IORDY mask
1839 * Compute the highest mode possible if we are not using iordy. Return
1840 * -1 if no iordy mode is available.
1843 static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1845 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1846 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1847 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1848 /* Is the speed faster than the drive allows non IORDY ? */
1850 /* This is cycle times not frequency - watch the logic! */
1851 if (pio > 240) /* PIO2 is 240nS per cycle */
1852 return 3 << ATA_SHIFT_PIO;
1853 return 7 << ATA_SHIFT_PIO;
1856 return 3 << ATA_SHIFT_PIO;
1860 * ata_dev_read_id - Read ID data from the specified device
1861 * @dev: target device
1862 * @p_class: pointer to class of the target device (may be changed)
1863 * @flags: ATA_READID_* flags
1864 * @id: buffer to read IDENTIFY data into
1866 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1867 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1868 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1869 * for pre-ATA4 drives.
1871 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
1872 * now we abort if we hit that case.
1875 * Kernel thread context (may sleep)
1878 * 0 on success, -errno otherwise.
1880 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1881 unsigned int flags, u16 *id)
1883 struct ata_port *ap = dev->link->ap;
1884 unsigned int class = *p_class;
1885 struct ata_taskfile tf;
1886 unsigned int err_mask = 0;
1888 int may_fallback = 1, tried_spinup = 0;
1891 if (ata_msg_ctl(ap))
1892 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1894 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1896 ata_tf_init(dev, &tf);
1900 tf.command = ATA_CMD_ID_ATA;
1903 tf.command = ATA_CMD_ID_ATAPI;
1907 reason = "unsupported class";
1911 tf.protocol = ATA_PROT_PIO;
1913 /* Some devices choke if TF registers contain garbage. Make
1914 * sure those are properly initialized.
1916 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1918 /* Device presence detection is unreliable on some
1919 * controllers. Always poll IDENTIFY if available.
1921 tf.flags |= ATA_TFLAG_POLLING;
1923 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1924 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1926 if (err_mask & AC_ERR_NODEV_HINT) {
1927 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1928 ap->print_id, dev->devno);
1932 /* Device or controller might have reported the wrong
1933 * device class. Give a shot at the other IDENTIFY if
1934 * the current one is aborted by the device.
1937 (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1940 if (class == ATA_DEV_ATA)
1941 class = ATA_DEV_ATAPI;
1943 class = ATA_DEV_ATA;
1948 reason = "I/O error";
1952 /* Falling back doesn't make sense if ID data was read
1953 * successfully at least once.
1957 swap_buf_le16(id, ATA_ID_WORDS);
1961 reason = "device reports invalid type";
1963 if (class == ATA_DEV_ATA) {
1964 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1967 if (ata_id_is_ata(id))
1971 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1974 * Drive powered-up in standby mode, and requires a specific
1975 * SET_FEATURES spin-up subcommand before it will accept
1976 * anything other than the original IDENTIFY command.
1978 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
1979 if (err_mask && id[2] != 0x738c) {
1981 reason = "SPINUP failed";
1985 * If the drive initially returned incomplete IDENTIFY info,
1986 * we now must reissue the IDENTIFY command.
1988 if (id[2] == 0x37c8)
1992 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1994 * The exact sequence expected by certain pre-ATA4 drives is:
1996 * IDENTIFY (optional in early ATA)
1997 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
1999 * Some drives were very specific about that exact sequence.
2001 * Note that ATA4 says lba is mandatory so the second check
2002 * shoud never trigger.
2004 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
2005 err_mask = ata_dev_init_params(dev, id[3], id[6]);
2008 reason = "INIT_DEV_PARAMS failed";
2012 /* current CHS translation info (id[53-58]) might be
2013 * changed. reread the identify device info.
2015 flags &= ~ATA_READID_POSTRESET;
2025 if (ata_msg_warn(ap))
2026 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
2027 "(%s, err_mask=0x%x)\n", reason, err_mask);
2031 static inline u8 ata_dev_knobble(struct ata_device *dev)
2033 struct ata_port *ap = dev->link->ap;
2034 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
2037 static void ata_dev_config_ncq(struct ata_device *dev,
2038 char *desc, size_t desc_sz)
2040 struct ata_port *ap = dev->link->ap;
2041 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
2043 if (!ata_id_has_ncq(dev->id)) {
2047 if (dev->horkage & ATA_HORKAGE_NONCQ) {
2048 snprintf(desc, desc_sz, "NCQ (not used)");
2051 if (ap->flags & ATA_FLAG_NCQ) {
2052 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
2053 dev->flags |= ATA_DFLAG_NCQ;
2056 if (hdepth >= ddepth)
2057 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
2059 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
2063 * ata_dev_configure - Configure the specified ATA/ATAPI device
2064 * @dev: Target device to configure
2066 * Configure @dev according to @dev->id. Generic and low-level
2067 * driver specific fixups are also applied.
2070 * Kernel thread context (may sleep)
2073 * 0 on success, -errno otherwise
2075 int ata_dev_configure(struct ata_device *dev)
2077 struct ata_port *ap = dev->link->ap;
2078 struct ata_eh_context *ehc = &dev->link->eh_context;
2079 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
2080 const u16 *id = dev->id;
2081 unsigned int xfer_mask;
2082 char revbuf[7]; /* XYZ-99\0 */
2083 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2084 char modelbuf[ATA_ID_PROD_LEN+1];
2087 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
2088 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n",
2093 if (ata_msg_probe(ap))
2094 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
2097 dev->horkage |= ata_dev_blacklisted(dev);
2099 /* let ACPI work its magic */
2100 rc = ata_acpi_on_devcfg(dev);
2104 /* massage HPA, do it early as it might change IDENTIFY data */
2105 rc = ata_hpa_resize(dev);
2109 /* print device capabilities */
2110 if (ata_msg_probe(ap))
2111 ata_dev_printk(dev, KERN_DEBUG,
2112 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2113 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2115 id[49], id[82], id[83], id[84],
2116 id[85], id[86], id[87], id[88]);
2118 /* initialize to-be-configured parameters */
2119 dev->flags &= ~ATA_DFLAG_CFG_MASK;
2120 dev->max_sectors = 0;
2128 * common ATA, ATAPI feature tests
2131 /* find max transfer mode; for printk only */
2132 xfer_mask = ata_id_xfermask(id);
2134 if (ata_msg_probe(ap))
2137 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2138 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2141 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2144 /* ATA-specific feature tests */
2145 if (dev->class == ATA_DEV_ATA) {
2146 if (ata_id_is_cfa(id)) {
2147 if (id[162] & 1) /* CPRM may make this media unusable */
2148 ata_dev_printk(dev, KERN_WARNING,
2149 "supports DRM functions and may "
2150 "not be fully accessable.\n");
2151 snprintf(revbuf, 7, "CFA");
2153 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
2155 dev->n_sectors = ata_id_n_sectors(id);
2157 if (dev->id[59] & 0x100)
2158 dev->multi_count = dev->id[59] & 0xff;
2160 if (ata_id_has_lba(id)) {
2161 const char *lba_desc;
2165 dev->flags |= ATA_DFLAG_LBA;
2166 if (ata_id_has_lba48(id)) {
2167 dev->flags |= ATA_DFLAG_LBA48;
2170 if (dev->n_sectors >= (1UL << 28) &&
2171 ata_id_has_flush_ext(id))
2172 dev->flags |= ATA_DFLAG_FLUSH_EXT;
2176 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2178 /* print device info to dmesg */
2179 if (ata_msg_drv(ap) && print_info) {
2180 ata_dev_printk(dev, KERN_INFO,
2181 "%s: %s, %s, max %s\n",
2182 revbuf, modelbuf, fwrevbuf,
2183 ata_mode_string(xfer_mask));
2184 ata_dev_printk(dev, KERN_INFO,
2185 "%Lu sectors, multi %u: %s %s\n",
2186 (unsigned long long)dev->n_sectors,
2187 dev->multi_count, lba_desc, ncq_desc);
2192 /* Default translation */
2193 dev->cylinders = id[1];
2195 dev->sectors = id[6];
2197 if (ata_id_current_chs_valid(id)) {
2198 /* Current CHS translation is valid. */
2199 dev->cylinders = id[54];
2200 dev->heads = id[55];
2201 dev->sectors = id[56];
2204 /* print device info to dmesg */
2205 if (ata_msg_drv(ap) && print_info) {
2206 ata_dev_printk(dev, KERN_INFO,
2207 "%s: %s, %s, max %s\n",
2208 revbuf, modelbuf, fwrevbuf,
2209 ata_mode_string(xfer_mask));
2210 ata_dev_printk(dev, KERN_INFO,
2211 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
2212 (unsigned long long)dev->n_sectors,
2213 dev->multi_count, dev->cylinders,
2214 dev->heads, dev->sectors);
2221 /* ATAPI-specific feature tests */
2222 else if (dev->class == ATA_DEV_ATAPI) {
2223 const char *cdb_intr_string = "";
2224 const char *atapi_an_string = "";
2227 rc = atapi_cdb_len(id);
2228 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
2229 if (ata_msg_warn(ap))
2230 ata_dev_printk(dev, KERN_WARNING,
2231 "unsupported CDB len\n");
2235 dev->cdb_len = (unsigned int) rc;
2237 /* Enable ATAPI AN if both the host and device have
2238 * the support. If PMP is attached, SNTF is required
2239 * to enable ATAPI AN to discern between PHY status
2240 * changed notifications and ATAPI ANs.
2242 if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
2243 (!ap->nr_pmp_links ||
2244 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
2245 unsigned int err_mask;
2247 /* issue SET feature command to turn this on */
2248 err_mask = ata_dev_set_feature(dev,
2249 SETFEATURES_SATA_ENABLE, SATA_AN);
2251 ata_dev_printk(dev, KERN_ERR,
2252 "failed to enable ATAPI AN "
2253 "(err_mask=0x%x)\n", err_mask);
2255 dev->flags |= ATA_DFLAG_AN;
2256 atapi_an_string = ", ATAPI AN";
2260 if (ata_id_cdb_intr(dev->id)) {
2261 dev->flags |= ATA_DFLAG_CDB_INTR;
2262 cdb_intr_string = ", CDB intr";
2265 /* print device info to dmesg */
2266 if (ata_msg_drv(ap) && print_info)
2267 ata_dev_printk(dev, KERN_INFO,
2268 "ATAPI: %s, %s, max %s%s%s\n",
2270 ata_mode_string(xfer_mask),
2271 cdb_intr_string, atapi_an_string);
2274 /* determine max_sectors */
2275 dev->max_sectors = ATA_MAX_SECTORS;
2276 if (dev->flags & ATA_DFLAG_LBA48)
2277 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2279 if (!(dev->horkage & ATA_HORKAGE_IPM)) {
2280 if (ata_id_has_hipm(dev->id))
2281 dev->flags |= ATA_DFLAG_HIPM;
2282 if (ata_id_has_dipm(dev->id))
2283 dev->flags |= ATA_DFLAG_DIPM;
2286 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2287 /* Let the user know. We don't want to disallow opens for
2288 rescue purposes, or in case the vendor is just a blithering
2291 ata_dev_printk(dev, KERN_WARNING,
2292 "Drive reports diagnostics failure. This may indicate a drive\n");
2293 ata_dev_printk(dev, KERN_WARNING,
2294 "fault or invalid emulation. Contact drive vendor for information.\n");
2298 /* limit bridge transfers to udma5, 200 sectors */
2299 if (ata_dev_knobble(dev)) {
2300 if (ata_msg_drv(ap) && print_info)
2301 ata_dev_printk(dev, KERN_INFO,
2302 "applying bridge limits\n");
2303 dev->udma_mask &= ATA_UDMA5;
2304 dev->max_sectors = ATA_MAX_SECTORS;
2307 if ((dev->class == ATA_DEV_ATAPI) &&
2308 (atapi_command_packet_set(id) == TYPE_TAPE))
2309 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
2311 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
2312 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2315 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) {
2316 dev->horkage |= ATA_HORKAGE_IPM;
2318 /* reset link pm_policy for this port to no pm */
2319 ap->pm_policy = MAX_PERFORMANCE;
2322 if (ap->ops->dev_config)
2323 ap->ops->dev_config(dev);
2325 if (ata_msg_probe(ap))
2326 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
2327 __FUNCTION__, ata_chk_status(ap));
2331 if (ata_msg_probe(ap))
2332 ata_dev_printk(dev, KERN_DEBUG,
2333 "%s: EXIT, err\n", __FUNCTION__);
2338 * ata_cable_40wire - return 40 wire cable type
2341 * Helper method for drivers which want to hardwire 40 wire cable
2345 int ata_cable_40wire(struct ata_port *ap)
2347 return ATA_CBL_PATA40;
2351 * ata_cable_80wire - return 80 wire cable type
2354 * Helper method for drivers which want to hardwire 80 wire cable
2358 int ata_cable_80wire(struct ata_port *ap)
2360 return ATA_CBL_PATA80;
2364 * ata_cable_unknown - return unknown PATA cable.
2367 * Helper method for drivers which have no PATA cable detection.
2370 int ata_cable_unknown(struct ata_port *ap)
2372 return ATA_CBL_PATA_UNK;
2376 * ata_cable_sata - return SATA cable type
2379 * Helper method for drivers which have SATA cables
2382 int ata_cable_sata(struct ata_port *ap)
2384 return ATA_CBL_SATA;
2388 * ata_bus_probe - Reset and probe ATA bus
2391 * Master ATA bus probing function. Initiates a hardware-dependent
2392 * bus reset, then attempts to identify any devices found on
2396 * PCI/etc. bus probe sem.
2399 * Zero on success, negative errno otherwise.
2402 int ata_bus_probe(struct ata_port *ap)
2404 unsigned int classes[ATA_MAX_DEVICES];
2405 int tries[ATA_MAX_DEVICES];
2407 struct ata_device *dev;
2411 ata_link_for_each_dev(dev, &ap->link)
2412 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
2415 ata_link_for_each_dev(dev, &ap->link) {
2416 /* If we issue an SRST then an ATA drive (not ATAPI)
2417 * may change configuration and be in PIO0 timing. If
2418 * we do a hard reset (or are coming from power on)
2419 * this is true for ATA or ATAPI. Until we've set a
2420 * suitable controller mode we should not touch the
2421 * bus as we may be talking too fast.
2423 dev->pio_mode = XFER_PIO_0;
2425 /* If the controller has a pio mode setup function
2426 * then use it to set the chipset to rights. Don't
2427 * touch the DMA setup as that will be dealt with when
2428 * configuring devices.
2430 if (ap->ops->set_piomode)
2431 ap->ops->set_piomode(ap, dev);
2434 /* reset and determine device classes */
2435 ap->ops->phy_reset(ap);
2437 ata_link_for_each_dev(dev, &ap->link) {
2438 if (!(ap->flags & ATA_FLAG_DISABLED) &&
2439 dev->class != ATA_DEV_UNKNOWN)
2440 classes[dev->devno] = dev->class;
2442 classes[dev->devno] = ATA_DEV_NONE;
2444 dev->class = ATA_DEV_UNKNOWN;
2449 /* read IDENTIFY page and configure devices. We have to do the identify
2450 specific sequence bass-ackwards so that PDIAG- is released by
2453 ata_link_for_each_dev(dev, &ap->link) {
2454 if (tries[dev->devno])
2455 dev->class = classes[dev->devno];
2457 if (!ata_dev_enabled(dev))
2460 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2466 /* Now ask for the cable type as PDIAG- should have been released */
2467 if (ap->ops->cable_detect)
2468 ap->cbl = ap->ops->cable_detect(ap);
2470 /* We may have SATA bridge glue hiding here irrespective of the
2471 reported cable types and sensed types */
2472 ata_link_for_each_dev(dev, &ap->link) {
2473 if (!ata_dev_enabled(dev))
2475 /* SATA drives indicate we have a bridge. We don't know which
2476 end of the link the bridge is which is a problem */
2477 if (ata_id_is_sata(dev->id))
2478 ap->cbl = ATA_CBL_SATA;
2481 /* After the identify sequence we can now set up the devices. We do
2482 this in the normal order so that the user doesn't get confused */
2484 ata_link_for_each_dev(dev, &ap->link) {
2485 if (!ata_dev_enabled(dev))
2488 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
2489 rc = ata_dev_configure(dev);
2490 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
2495 /* configure transfer mode */
2496 rc = ata_set_mode(&ap->link, &dev);
2500 ata_link_for_each_dev(dev, &ap->link)
2501 if (ata_dev_enabled(dev))
2504 /* no device present, disable port */
2505 ata_port_disable(ap);
2509 tries[dev->devno]--;
2513 /* eeek, something went very wrong, give up */
2514 tries[dev->devno] = 0;
2518 /* give it just one more chance */
2519 tries[dev->devno] = min(tries[dev->devno], 1);
2521 if (tries[dev->devno] == 1) {
2522 /* This is the last chance, better to slow
2523 * down than lose it.
2525 sata_down_spd_limit(&ap->link);
2526 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2530 if (!tries[dev->devno])
2531 ata_dev_disable(dev);
2537 * ata_port_probe - Mark port as enabled
2538 * @ap: Port for which we indicate enablement
2540 * Modify @ap data structure such that the system
2541 * thinks that the entire port is enabled.
2543 * LOCKING: host lock, or some other form of
2547 void ata_port_probe(struct ata_port *ap)
2549 ap->flags &= ~ATA_FLAG_DISABLED;
2553 * sata_print_link_status - Print SATA link status
2554 * @link: SATA link to printk link status about
2556 * This function prints link speed and status of a SATA link.
2561 void sata_print_link_status(struct ata_link *link)
2563 u32 sstatus, scontrol, tmp;
2565 if (sata_scr_read(link, SCR_STATUS, &sstatus))
2567 sata_scr_read(link, SCR_CONTROL, &scontrol);
2569 if (ata_link_online(link)) {
2570 tmp = (sstatus >> 4) & 0xf;
2571 ata_link_printk(link, KERN_INFO,
2572 "SATA link up %s (SStatus %X SControl %X)\n",
2573 sata_spd_string(tmp), sstatus, scontrol);
2575 ata_link_printk(link, KERN_INFO,
2576 "SATA link down (SStatus %X SControl %X)\n",
2582 * __sata_phy_reset - Wake/reset a low-level SATA PHY
2583 * @ap: SATA port associated with target SATA PHY.
2585 * This function issues commands to standard SATA Sxxx
2586 * PHY registers, to wake up the phy (and device), and
2587 * clear any reset condition.
2590 * PCI/etc. bus probe sem.
2593 void __sata_phy_reset(struct ata_port *ap)
2595 struct ata_link *link = &ap->link;
2596 unsigned long timeout = jiffies + (HZ * 5);
2599 if (ap->flags & ATA_FLAG_SATA_RESET) {
2600 /* issue phy wake/reset */
2601 sata_scr_write_flush(link, SCR_CONTROL, 0x301);
2602 /* Couldn't find anything in SATA I/II specs, but
2603 * AHCI-1.1 10.4.2 says at least 1 ms. */
2606 /* phy wake/clear reset */
2607 sata_scr_write_flush(link, SCR_CONTROL, 0x300);
2609 /* wait for phy to become ready, if necessary */
2612 sata_scr_read(link, SCR_STATUS, &sstatus);
2613 if ((sstatus & 0xf) != 1)
2615 } while (time_before(jiffies, timeout));
2617 /* print link status */
2618 sata_print_link_status(link);
2620 /* TODO: phy layer with polling, timeouts, etc. */
2621 if (!ata_link_offline(link))
2624 ata_port_disable(ap);
2626 if (ap->flags & ATA_FLAG_DISABLED)
2629 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2630 ata_port_disable(ap);
2634 ap->cbl = ATA_CBL_SATA;
2638 * sata_phy_reset - Reset SATA bus.
2639 * @ap: SATA port associated with target SATA PHY.
2641 * This function resets the SATA bus, and then probes
2642 * the bus for devices.
2645 * PCI/etc. bus probe sem.
2648 void sata_phy_reset(struct ata_port *ap)
2650 __sata_phy_reset(ap);
2651 if (ap->flags & ATA_FLAG_DISABLED)
2657 * ata_dev_pair - return other device on cable
2660 * Obtain the other device on the same cable, or if none is
2661 * present NULL is returned
2664 struct ata_device *ata_dev_pair(struct ata_device *adev)
2666 struct ata_link *link = adev->link;
2667 struct ata_device *pair = &link->device[1 - adev->devno];
2668 if (!ata_dev_enabled(pair))
2674 * ata_port_disable - Disable port.
2675 * @ap: Port to be disabled.
2677 * Modify @ap data structure such that the system
2678 * thinks that the entire port is disabled, and should
2679 * never attempt to probe or communicate with devices
2682 * LOCKING: host lock, or some other form of
2686 void ata_port_disable(struct ata_port *ap)
2688 ap->link.device[0].class = ATA_DEV_NONE;
2689 ap->link.device[1].class = ATA_DEV_NONE;
2690 ap->flags |= ATA_FLAG_DISABLED;
2694 * sata_down_spd_limit - adjust SATA spd limit downward
2695 * @link: Link to adjust SATA spd limit for
2697 * Adjust SATA spd limit of @link downward. Note that this
2698 * function only adjusts the limit. The change must be applied
2699 * using sata_set_spd().
2702 * Inherited from caller.
2705 * 0 on success, negative errno on failure
2707 int sata_down_spd_limit(struct ata_link *link)
2709 u32 sstatus, spd, mask;
2712 if (!sata_scr_valid(link))
2715 /* If SCR can be read, use it to determine the current SPD.
2716 * If not, use cached value in link->sata_spd.
2718 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
2720 spd = (sstatus >> 4) & 0xf;
2722 spd = link->sata_spd;
2724 mask = link->sata_spd_limit;
2728 /* unconditionally mask off the highest bit */
2729 highbit = fls(mask) - 1;
2730 mask &= ~(1 << highbit);
2732 /* Mask off all speeds higher than or equal to the current
2733 * one. Force 1.5Gbps if current SPD is not available.
2736 mask &= (1 << (spd - 1)) - 1;
2740 /* were we already at the bottom? */
2744 link->sata_spd_limit = mask;
2746 ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n",
2747 sata_spd_string(fls(mask)));
2752 static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
2754 struct ata_link *host_link = &link->ap->link;
2755 u32 limit, target, spd;
2757 limit = link->sata_spd_limit;
2759 /* Don't configure downstream link faster than upstream link.
2760 * It doesn't speed up anything and some PMPs choke on such
2763 if (!ata_is_host_link(link) && host_link->sata_spd)
2764 limit &= (1 << host_link->sata_spd) - 1;
2766 if (limit == UINT_MAX)
2769 target = fls(limit);
2771 spd = (*scontrol >> 4) & 0xf;
2772 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
2774 return spd != target;
2778 * sata_set_spd_needed - is SATA spd configuration needed
2779 * @link: Link in question
2781 * Test whether the spd limit in SControl matches
2782 * @link->sata_spd_limit. This function is used to determine
2783 * whether hardreset is necessary to apply SATA spd
2787 * Inherited from caller.
2790 * 1 if SATA spd configuration is needed, 0 otherwise.
2792 int sata_set_spd_needed(struct ata_link *link)
2796 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
2799 return __sata_set_spd_needed(link, &scontrol);
2803 * sata_set_spd - set SATA spd according to spd limit
2804 * @link: Link to set SATA spd for
2806 * Set SATA spd of @link according to sata_spd_limit.
2809 * Inherited from caller.
2812 * 0 if spd doesn't need to be changed, 1 if spd has been
2813 * changed. Negative errno if SCR registers are inaccessible.
2815 int sata_set_spd(struct ata_link *link)
2820 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
2823 if (!__sata_set_spd_needed(link, &scontrol))
2826 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
2833 * This mode timing computation functionality is ported over from
2834 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2837 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2838 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2839 * for UDMA6, which is currently supported only by Maxtor drives.
2841 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2844 static const struct ata_timing ata_timing[] = {
2846 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2847 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2848 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2849 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2851 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2852 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2853 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2854 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2855 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2857 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2859 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2860 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2861 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2863 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2864 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2865 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2867 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2868 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2869 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2870 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2872 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2873 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2874 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2876 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2881 #define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2882 #define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
2884 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2886 q->setup = EZ(t->setup * 1000, T);
2887 q->act8b = EZ(t->act8b * 1000, T);
2888 q->rec8b = EZ(t->rec8b * 1000, T);
2889 q->cyc8b = EZ(t->cyc8b * 1000, T);
2890 q->active = EZ(t->active * 1000, T);
2891 q->recover = EZ(t->recover * 1000, T);
2892 q->cycle = EZ(t->cycle * 1000, T);
2893 q->udma = EZ(t->udma * 1000, UT);
2896 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2897 struct ata_timing *m, unsigned int what)
2899 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2900 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2901 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2902 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2903 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2904 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2905 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2906 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2909 static const struct ata_timing *ata_timing_find_mode(unsigned short speed)
2911 const struct ata_timing *t;
2913 for (t = ata_timing; t->mode != speed; t++)
2914 if (t->mode == 0xFF)
2919 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2920 struct ata_timing *t, int T, int UT)
2922 const struct ata_timing *s;
2923 struct ata_timing p;
2929 if (!(s = ata_timing_find_mode(speed)))
2932 memcpy(t, s, sizeof(*s));
2935 * If the drive is an EIDE drive, it can tell us it needs extended
2936 * PIO/MW_DMA cycle timing.
2939 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2940 memset(&p, 0, sizeof(p));
2941 if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2942 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2943 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2944 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2945 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2947 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2951 * Convert the timing to bus clock counts.
2954 ata_timing_quantize(t, t, T, UT);
2957 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2958 * S.M.A.R.T * and some other commands. We have to ensure that the
2959 * DMA cycle timing is slower/equal than the fastest PIO timing.
2962 if (speed > XFER_PIO_6) {
2963 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2964 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2968 * Lengthen active & recovery time so that cycle time is correct.
2971 if (t->act8b + t->rec8b < t->cyc8b) {
2972 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2973 t->rec8b = t->cyc8b - t->act8b;
2976 if (t->active + t->recover < t->cycle) {
2977 t->active += (t->cycle - (t->active + t->recover)) / 2;
2978 t->recover = t->cycle - t->active;
2981 /* In a few cases quantisation may produce enough errors to
2982 leave t->cycle too low for the sum of active and recovery
2983 if so we must correct this */
2984 if (t->active + t->recover > t->cycle)
2985 t->cycle = t->active + t->recover;
2991 * ata_down_xfermask_limit - adjust dev xfer masks downward
2992 * @dev: Device to adjust xfer masks
2993 * @sel: ATA_DNXFER_* selector
2995 * Adjust xfer masks of @dev downward. Note that this function
2996 * does not apply the change. Invoking ata_set_mode() afterwards
2997 * will apply the limit.
3000 * Inherited from caller.
3003 * 0 on success, negative errno on failure
3005 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
3008 unsigned int orig_mask, xfer_mask;
3009 unsigned int pio_mask, mwdma_mask, udma_mask;
3012 quiet = !!(sel & ATA_DNXFER_QUIET);
3013 sel &= ~ATA_DNXFER_QUIET;
3015 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3018 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
3021 case ATA_DNXFER_PIO:
3022 highbit = fls(pio_mask) - 1;
3023 pio_mask &= ~(1 << highbit);
3026 case ATA_DNXFER_DMA:
3028 highbit = fls(udma_mask) - 1;
3029 udma_mask &= ~(1 << highbit);
3032 } else if (mwdma_mask) {
3033 highbit = fls(mwdma_mask) - 1;
3034 mwdma_mask &= ~(1 << highbit);
3040 case ATA_DNXFER_40C:
3041 udma_mask &= ATA_UDMA_MASK_40C;
3044 case ATA_DNXFER_FORCE_PIO0:
3046 case ATA_DNXFER_FORCE_PIO:
3055 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3057 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3061 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3062 snprintf(buf, sizeof(buf), "%s:%s",
3063 ata_mode_string(xfer_mask),
3064 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3066 snprintf(buf, sizeof(buf), "%s",
3067 ata_mode_string(xfer_mask));
3069 ata_dev_printk(dev, KERN_WARNING,
3070 "limiting speed to %s\n", buf);
3073 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3079 static int ata_dev_set_mode(struct ata_device *dev)
3081 struct ata_eh_context *ehc = &dev->link->eh_context;
3082 unsigned int err_mask;
3085 dev->flags &= ~ATA_DFLAG_PIO;
3086 if (dev->xfer_shift == ATA_SHIFT_PIO)
3087 dev->flags |= ATA_DFLAG_PIO;
3089 err_mask = ata_dev_set_xfermode(dev);
3091 /* Old CFA may refuse this command, which is just fine */
3092 if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id))
3093 err_mask &= ~AC_ERR_DEV;
3095 /* Some very old devices and some bad newer ones fail any kind of
3096 SET_XFERMODE request but support PIO0-2 timings and no IORDY */
3097 if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) &&
3098 dev->pio_mode <= XFER_PIO_2)
3099 err_mask &= ~AC_ERR_DEV;
3101 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3102 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
3103 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3104 dev->dma_mode == XFER_MW_DMA_0 &&
3105 (dev->id[63] >> 8) & 1)
3106 err_mask &= ~AC_ERR_DEV;
3109 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
3110 "(err_mask=0x%x)\n", err_mask);
3114 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3115 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3116 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3120 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3121 dev->xfer_shift, (int)dev->xfer_mode);
3123 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
3124 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
3129 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
3130 * @link: link on which timings will be programmed
3131 * @r_failed_dev: out paramter for failed device
3133 * Standard implementation of the function used to tune and set
3134 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3135 * ata_dev_set_mode() fails, pointer to the failing device is
3136 * returned in @r_failed_dev.
3139 * PCI/etc. bus probe sem.
3142 * 0 on success, negative errno otherwise
3145 int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
3147 struct ata_port *ap = link->ap;
3148 struct ata_device *dev;
3149 int rc = 0, used_dma = 0, found = 0;
3151 /* step 1: calculate xfer_mask */
3152 ata_link_for_each_dev(dev, link) {
3153 unsigned int pio_mask, dma_mask;
3154 unsigned int mode_mask;
3156 if (!ata_dev_enabled(dev))
3159 mode_mask = ATA_DMA_MASK_ATA;
3160 if (dev->class == ATA_DEV_ATAPI)
3161 mode_mask = ATA_DMA_MASK_ATAPI;
3162 else if (ata_id_is_cfa(dev->id))
3163 mode_mask = ATA_DMA_MASK_CFA;
3165 ata_dev_xfermask(dev);
3167 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
3168 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
3170 if (libata_dma_mask & mode_mask)
3171 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
3175 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3176 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
3185 /* step 2: always set host PIO timings */
3186 ata_link_for_each_dev(dev, link) {
3187 if (!ata_dev_enabled(dev))
3190 if (!dev->pio_mode) {
3191 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
3196 dev->xfer_mode = dev->pio_mode;
3197 dev->xfer_shift = ATA_SHIFT_PIO;
3198 if (ap->ops->set_piomode)
3199 ap->ops->set_piomode(ap, dev);
3202 /* step 3: set host DMA timings */
3203 ata_link_for_each_dev(dev, link) {
3204 if (!ata_dev_enabled(dev) || !dev->dma_mode)
3207 dev->xfer_mode = dev->dma_mode;
3208 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3209 if (ap->ops->set_dmamode)
3210 ap->ops->set_dmamode(ap, dev);
3213 /* step 4: update devices' xfer mode */
3214 ata_link_for_each_dev(dev, link) {
3215 /* don't update suspended devices' xfer mode */
3216 if (!ata_dev_enabled(dev))
3219 rc = ata_dev_set_mode(dev);
3224 /* Record simplex status. If we selected DMA then the other
3225 * host channels are not permitted to do so.
3227 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
3228 ap->host->simplex_claimed = ap;
3232 *r_failed_dev = dev;
3237 * ata_set_mode - Program timings and issue SET FEATURES - XFER
3238 * @link: link on which timings will be programmed
3239 * @r_failed_dev: out paramter for failed device
3241 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3242 * ata_set_mode() fails, pointer to the failing device is
3243 * returned in @r_failed_dev.
3246 * PCI/etc. bus probe sem.
3249 * 0 on success, negative errno otherwise
3251 int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
3253 struct ata_port *ap = link->ap;
3255 /* has private set_mode? */
3256 if (ap->ops->set_mode)
3257 return ap->ops->set_mode(link, r_failed_dev);
3258 return ata_do_set_mode(link, r_failed_dev);
3262 * ata_tf_to_host - issue ATA taskfile to host controller
3263 * @ap: port to which command is being issued
3264 * @tf: ATA taskfile register set
3266 * Issues ATA taskfile register set to ATA host controller,
3267 * with proper synchronization with interrupt handler and
3271 * spin_lock_irqsave(host lock)
3274 static inline void ata_tf_to_host(struct ata_port *ap,
3275 const struct ata_taskfile *tf)
3277 ap->ops->tf_load(ap, tf);
3278 ap->ops->exec_command(ap, tf);
3282 * ata_busy_sleep - sleep until BSY clears, or timeout
3283 * @ap: port containing status register to be polled
3284 * @tmout_pat: impatience timeout
3285 * @tmout: overall timeout
3287 * Sleep until ATA Status register bit BSY clears,
3288 * or a timeout occurs.
3291 * Kernel thread context (may sleep).
3294 * 0 on success, -errno otherwise.
3296 int ata_busy_sleep(struct ata_port *ap,
3297 unsigned long tmout_pat, unsigned long tmout)
3299 unsigned long timer_start, timeout;
3302 status = ata_busy_wait(ap, ATA_BUSY, 300);
3303 timer_start = jiffies;
3304 timeout = timer_start + tmout_pat;
3305 while (status != 0xff && (status & ATA_BUSY) &&
3306 time_before(jiffies, timeout)) {
3308 status = ata_busy_wait(ap, ATA_BUSY, 3);
3311 if (status != 0xff && (status & ATA_BUSY))
3312 ata_port_printk(ap, KERN_WARNING,
3313 "port is slow to respond, please be patient "
3314 "(Status 0x%x)\n", status);
3316 timeout = timer_start + tmout;
3317 while (status != 0xff && (status & ATA_BUSY) &&
3318 time_before(jiffies, timeout)) {
3320 status = ata_chk_status(ap);
3326 if (status & ATA_BUSY) {
3327 ata_port_printk(ap, KERN_ERR, "port failed to respond "
3328 "(%lu secs, Status 0x%x)\n",
3329 tmout / HZ, status);
3337 * ata_wait_after_reset - wait before checking status after reset
3338 * @ap: port containing status register to be polled
3339 * @deadline: deadline jiffies for the operation
3341 * After reset, we need to pause a while before reading status.
3342 * Also, certain combination of controller and device report 0xff
3343 * for some duration (e.g. until SATA PHY is up and running)
3344 * which is interpreted as empty port in ATA world. This
3345 * function also waits for such devices to get out of 0xff
3349 * Kernel thread context (may sleep).
3351 void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline)
3353 unsigned long until = jiffies + ATA_TMOUT_FF_WAIT;
3355 if (time_before(until, deadline))
3358 /* Spec mandates ">= 2ms" before checking status. We wait
3359 * 150ms, because that was the magic delay used for ATAPI
3360 * devices in Hale Landis's ATADRVR, for the period of time
3361 * between when the ATA command register is written, and then
3362 * status is checked. Because waiting for "a while" before
3363 * checking status is fine, post SRST, we perform this magic
3364 * delay here as well.
3366 * Old drivers/ide uses the 2mS rule and then waits for ready.
3370 /* Wait for 0xff to clear. Some SATA devices take a long time
3371 * to clear 0xff after reset. For example, HHD424020F7SV00
3372 * iVDR needs >= 800ms while. Quantum GoVault needs even more
3376 u8 status = ata_chk_status(ap);
3378 if (status != 0xff || time_after(jiffies, deadline))
3386 * ata_wait_ready - sleep until BSY clears, or timeout
3387 * @ap: port containing status register to be polled
3388 * @deadline: deadline jiffies for the operation
3390 * Sleep until ATA Status register bit BSY clears, or timeout
3394 * Kernel thread context (may sleep).
3397 * 0 on success, -errno otherwise.
3399 int ata_wait_ready(struct ata_port *ap, unsigned long deadline)
3401 unsigned long start = jiffies;
3405 u8 status = ata_chk_status(ap);
3406 unsigned long now = jiffies;
3408 if (!(status & ATA_BUSY))
3410 if (!ata_link_online(&ap->link) && status == 0xff)
3412 if (time_after(now, deadline))
3415 if (!warned && time_after(now, start + 5 * HZ) &&
3416 (deadline - now > 3 * HZ)) {
3417 ata_port_printk(ap, KERN_WARNING,
3418 "port is slow to respond, please be patient "
3419 "(Status 0x%x)\n", status);
3427 static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask,
3428 unsigned long deadline)
3430 struct ata_ioports *ioaddr = &ap->ioaddr;
3431 unsigned int dev0 = devmask & (1 << 0);
3432 unsigned int dev1 = devmask & (1 << 1);
3435 /* if device 0 was found in ata_devchk, wait for its
3439 rc = ata_wait_ready(ap, deadline);
3447 /* if device 1 was found in ata_devchk, wait for register
3448 * access briefly, then wait for BSY to clear.
3453 ap->ops->dev_select(ap, 1);
3455 /* Wait for register access. Some ATAPI devices fail
3456 * to set nsect/lbal after reset, so don't waste too
3457 * much time on it. We're gonna wait for !BSY anyway.
3459 for (i = 0; i < 2; i++) {
3462 nsect = ioread8(ioaddr->nsect_addr);
3463 lbal = ioread8(ioaddr->lbal_addr);
3464 if ((nsect == 1) && (lbal == 1))
3466 msleep(50); /* give drive a breather */
3469 rc = ata_wait_ready(ap, deadline);
3477 /* is all this really necessary? */
3478 ap->ops->dev_select(ap, 0);
3480 ap->ops->dev_select(ap, 1);
3482 ap->ops->dev_select(ap, 0);
3487 static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
3488 unsigned long deadline)
3490 struct ata_ioports *ioaddr = &ap->ioaddr;
3492 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
3494 /* software reset. causes dev0 to be selected */
3495 iowrite8(ap->ctl, ioaddr->ctl_addr);
3496 udelay(20); /* FIXME: flush */
3497 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
3498 udelay(20); /* FIXME: flush */
3499 iowrite8(ap->ctl, ioaddr->ctl_addr);
3501 /* wait a while before checking status */
3502 ata_wait_after_reset(ap, deadline);
3504 /* Before we perform post reset processing we want to see if
3505 * the bus shows 0xFF because the odd clown forgets the D7
3506 * pulldown resistor.
3508 if (ata_chk_status(ap) == 0xFF)
3511 return ata_bus_post_reset(ap, devmask, deadline);
3515 * ata_bus_reset - reset host port and associated ATA channel
3516 * @ap: port to reset
3518 * This is typically the first time we actually start issuing
3519 * commands to the ATA channel. We wait for BSY to clear, then
3520 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
3521 * result. Determine what devices, if any, are on the channel
3522 * by looking at the device 0/1 error register. Look at the signature
3523 * stored in each device's taskfile registers, to determine if
3524 * the device is ATA or ATAPI.
3527 * PCI/etc. bus probe sem.
3528 * Obtains host lock.
3531 * Sets ATA_FLAG_DISABLED if bus reset fails.
3534 void ata_bus_reset(struct ata_port *ap)
3536 struct ata_device *device = ap->link.device;
3537 struct ata_ioports *ioaddr = &ap->ioaddr;
3538 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3540 unsigned int dev0, dev1 = 0, devmask = 0;
3543 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
3545 /* determine if device 0/1 are present */
3546 if (ap->flags & ATA_FLAG_SATA_RESET)
3549 dev0 = ata_devchk(ap, 0);
3551 dev1 = ata_devchk(ap, 1);
3555 devmask |= (1 << 0);
3557 devmask |= (1 << 1);
3559 /* select device 0 again */
3560 ap->ops->dev_select(ap, 0);
3562 /* issue bus reset */
3563 if (ap->flags & ATA_FLAG_SRST) {
3564 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
3565 if (rc && rc != -ENODEV)
3570 * determine by signature whether we have ATA or ATAPI devices
3572 device[0].class = ata_dev_try_classify(&device[0], dev0, &err);
3573 if ((slave_possible) && (err != 0x81))
3574 device[1].class = ata_dev_try_classify(&device[1], dev1, &err);
3576 /* is double-select really necessary? */
3577 if (device[1].class != ATA_DEV_NONE)
3578 ap->ops->dev_select(ap, 1);
3579 if (device[0].class != ATA_DEV_NONE)
3580 ap->ops->dev_select(ap, 0);
3582 /* if no devices were detected, disable this port */
3583 if ((device[0].class == ATA_DEV_NONE) &&
3584 (device[1].class == ATA_DEV_NONE))
3587 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
3588 /* set up device control for ATA_FLAG_SATA_RESET */
3589 iowrite8(ap->ctl, ioaddr->ctl_addr);
3596 ata_port_printk(ap, KERN_ERR, "disabling port\n");
3597 ata_port_disable(ap);
3603 * sata_link_debounce - debounce SATA phy status
3604 * @link: ATA link to debounce SATA phy status for
3605 * @params: timing parameters { interval, duratinon, timeout } in msec
3606 * @deadline: deadline jiffies for the operation
3608 * Make sure SStatus of @link reaches stable state, determined by
3609 * holding the same value where DET is not 1 for @duration polled
3610 * every @interval, before @timeout. Timeout constraints the
3611 * beginning of the stable state. Because DET gets stuck at 1 on
3612 * some controllers after hot unplugging, this functions waits
3613 * until timeout then returns 0 if DET is stable at 1.
3615 * @timeout is further limited by @deadline. The sooner of the
3619 * Kernel thread context (may sleep)
3622 * 0 on success, -errno on failure.
3624 int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3625 unsigned long deadline)
3627 unsigned long interval_msec = params[0];
3628 unsigned long duration = msecs_to_jiffies(params[1]);
3629 unsigned long last_jiffies, t;
3633 t = jiffies + msecs_to_jiffies(params[2]);
3634 if (time_before(t, deadline))
3637 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3642 last_jiffies = jiffies;
3645 msleep(interval_msec);
3646 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
3652 if (cur == 1 && time_before(jiffies, deadline))
3654 if (time_after(jiffies, last_jiffies + duration))
3659 /* unstable, start over */
3661 last_jiffies = jiffies;
3663 /* Check deadline. If debouncing failed, return
3664 * -EPIPE to tell upper layer to lower link speed.
3666 if (time_after(jiffies, deadline))
3672 * sata_link_resume - resume SATA link
3673 * @link: ATA link to resume SATA
3674 * @params: timing parameters { interval, duratinon, timeout } in msec
3675 * @deadline: deadline jiffies for the operation
3677 * Resume SATA phy @link and debounce it.
3680 * Kernel thread context (may sleep)
3683 * 0 on success, -errno on failure.
3685 int sata_link_resume(struct ata_link *link, const unsigned long *params,
3686 unsigned long deadline)
3691 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3694 scontrol = (scontrol & 0x0f0) | 0x300;
3696 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3699 /* Some PHYs react badly if SStatus is pounded immediately
3700 * after resuming. Delay 200ms before debouncing.
3704 return sata_link_debounce(link, params, deadline);
3708 * ata_std_prereset - prepare for reset
3709 * @link: ATA link to be reset
3710 * @deadline: deadline jiffies for the operation
3712 * @link is about to be reset. Initialize it. Failure from
3713 * prereset makes libata abort whole reset sequence and give up
3714 * that port, so prereset should be best-effort. It does its
3715 * best to prepare for reset sequence but if things go wrong, it
3716 * should just whine, not fail.
3719 * Kernel thread context (may sleep)
3722 * 0 on success, -errno otherwise.
3724 int ata_std_prereset(struct ata_link *link, unsigned long deadline)
3726 struct ata_port *ap = link->ap;
3727 struct ata_eh_context *ehc = &link->eh_context;
3728 const unsigned long *timing = sata_ehc_deb_timing(ehc);
3731 /* handle link resume */
3732 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
3733 (link->flags & ATA_LFLAG_HRST_TO_RESUME))
3734 ehc->i.action |= ATA_EH_HARDRESET;
3736 /* Some PMPs don't work with only SRST, force hardreset if PMP
3739 if (ap->flags & ATA_FLAG_PMP)
3740 ehc->i.action |= ATA_EH_HARDRESET;
3742 /* if we're about to do hardreset, nothing more to do */
3743 if (ehc->i.action & ATA_EH_HARDRESET)
3746 /* if SATA, resume link */
3747 if (ap->flags & ATA_FLAG_SATA) {
3748 rc = sata_link_resume(link, timing, deadline);
3749 /* whine about phy resume failure but proceed */
3750 if (rc && rc != -EOPNOTSUPP)
3751 ata_link_printk(link, KERN_WARNING, "failed to resume "
3752 "link for reset (errno=%d)\n", rc);
3755 /* Wait for !BSY if the controller can wait for the first D2H
3756 * Reg FIS and we don't know that no device is attached.
3758 if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) {
3759 rc = ata_wait_ready(ap, deadline);
3760 if (rc && rc != -ENODEV) {
3761 ata_link_printk(link, KERN_WARNING, "device not ready "
3762 "(errno=%d), forcing hardreset\n", rc);
3763 ehc->i.action |= ATA_EH_HARDRESET;
3771 * ata_std_softreset - reset host port via ATA SRST
3772 * @link: ATA link to reset
3773 * @classes: resulting classes of attached devices
3774 * @deadline: deadline jiffies for the operation
3776 * Reset host port using ATA SRST.
3779 * Kernel thread context (may sleep)
3782 * 0 on success, -errno otherwise.
3784 int ata_std_softreset(struct ata_link *link, unsigned int *classes,
3785 unsigned long deadline)
3787 struct ata_port *ap = link->ap;
3788 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
3789 unsigned int devmask = 0;
3795 if (ata_link_offline(link)) {
3796 classes[0] = ATA_DEV_NONE;
3800 /* determine if device 0/1 are present */
3801 if (ata_devchk(ap, 0))
3802 devmask |= (1 << 0);
3803 if (slave_possible && ata_devchk(ap, 1))
3804 devmask |= (1 << 1);
3806 /* select device 0 again */
3807 ap->ops->dev_select(ap, 0);
3809 /* issue bus reset */
3810 DPRINTK("about to softreset, devmask=%x\n", devmask);
3811 rc = ata_bus_softreset(ap, devmask, deadline);
3812 /* if link is occupied, -ENODEV too is an error */
3813 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
3814 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
3818 /* determine by signature whether we have ATA or ATAPI devices */
3819 classes[0] = ata_dev_try_classify(&link->device[0],
3820 devmask & (1 << 0), &err);
3821 if (slave_possible && err != 0x81)
3822 classes[1] = ata_dev_try_classify(&link->device[1],
3823 devmask & (1 << 1), &err);
3826 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3831 * sata_link_hardreset - reset link via SATA phy reset
3832 * @link: link to reset
3833 * @timing: timing parameters { interval, duratinon, timeout } in msec
3834 * @deadline: deadline jiffies for the operation
3836 * SATA phy-reset @link using DET bits of SControl register.
3839 * Kernel thread context (may sleep)
3842 * 0 on success, -errno otherwise.
3844 int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
3845 unsigned long deadline)
3852 if (sata_set_spd_needed(link)) {
3853 /* SATA spec says nothing about how to reconfigure
3854 * spd. To be on the safe side, turn off phy during
3855 * reconfiguration. This works for at least ICH7 AHCI
3858 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3861 scontrol = (scontrol & 0x0f0) | 0x304;
3863 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3869 /* issue phy wake/reset */
3870 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3873 scontrol = (scontrol & 0x0f0) | 0x301;
3875 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
3878 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3879 * 10.4.2 says at least 1 ms.
3883 /* bring link back */
3884 rc = sata_link_resume(link, timing, deadline);
3886 DPRINTK("EXIT, rc=%d\n", rc);
3891 * sata_std_hardreset - reset host port via SATA phy reset
3892 * @link: link to reset
3893 * @class: resulting class of attached device
3894 * @deadline: deadline jiffies for the operation
3896 * SATA phy-reset host port using DET bits of SControl register,
3897 * wait for !BSY and classify the attached device.
3900 * Kernel thread context (may sleep)
3903 * 0 on success, -errno otherwise.
3905 int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3906 unsigned long deadline)
3908 struct ata_port *ap = link->ap;
3909 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3915 rc = sata_link_hardreset(link, timing, deadline);
3917 ata_link_printk(link, KERN_ERR,
3918 "COMRESET failed (errno=%d)\n", rc);
3922 /* TODO: phy layer with polling, timeouts, etc. */
3923 if (ata_link_offline(link)) {
3924 *class = ATA_DEV_NONE;
3925 DPRINTK("EXIT, link offline\n");
3929 /* wait a while before checking status */
3930 ata_wait_after_reset(ap, deadline);
3932 /* If PMP is supported, we have to do follow-up SRST. Note
3933 * that some PMPs don't send D2H Reg FIS after hardreset at
3934 * all if the first port is empty. Wait for it just for a
3935 * second and request follow-up SRST.
3937 if (ap->flags & ATA_FLAG_PMP) {
3938 ata_wait_ready(ap, jiffies + HZ);
3942 rc = ata_wait_ready(ap, deadline);
3943 /* link occupied, -ENODEV too is an error */
3945 ata_link_printk(link, KERN_ERR,
3946 "COMRESET failed (errno=%d)\n", rc);
3950 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3952 *class = ata_dev_try_classify(link->device, 1, NULL);
3954 DPRINTK("EXIT, class=%u\n", *class);
3959 * ata_std_postreset - standard postreset callback
3960 * @link: the target ata_link
3961 * @classes: classes of attached devices
3963 * This function is invoked after a successful reset. Note that
3964 * the device might have been reset more than once using
3965 * different reset methods before postreset is invoked.
3968 * Kernel thread context (may sleep)
3970 void ata_std_postreset(struct ata_link *link, unsigned int *classes)
3972 struct ata_port *ap = link->ap;
3977 /* print link status */
3978 sata_print_link_status(link);
3981 if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
3982 sata_scr_write(link, SCR_ERROR, serror);
3984 /* is double-select really necessary? */
3985 if (classes[0] != ATA_DEV_NONE)
3986 ap->ops->dev_select(ap, 1);
3987 if (classes[1] != ATA_DEV_NONE)
3988 ap->ops->dev_select(ap, 0);
3990 /* bail out if no device is present */
3991 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3992 DPRINTK("EXIT, no device\n");
3996 /* set up device control */
3997 if (ap->ioaddr.ctl_addr)
3998 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
4004 * ata_dev_same_device - Determine whether new ID matches configured device
4005 * @dev: device to compare against
4006 * @new_class: class of the new device
4007 * @new_id: IDENTIFY page of the new device
4009 * Compare @new_class and @new_id against @dev and determine
4010 * whether @dev is the device indicated by @new_class and
4017 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
4019 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
4022 const u16 *old_id = dev->id;
4023 unsigned char model[2][ATA_ID_PROD_LEN + 1];
4024 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
4026 if (dev->class != new_class) {
4027 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
4028 dev->class, new_class);
4032 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
4033 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
4034 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
4035 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
4037 if (strcmp(model[0], model[1])) {
4038 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
4039 "'%s' != '%s'\n", model[0], model[1]);
4043 if (strcmp(serial[0], serial[1])) {
4044 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
4045 "'%s' != '%s'\n", serial[0], serial[1]);
4053 * ata_dev_reread_id - Re-read IDENTIFY data
4054 * @dev: target ATA device
4055 * @readid_flags: read ID flags
4057 * Re-read IDENTIFY page and make sure @dev is still attached to
4061 * Kernel thread context (may sleep)
4064 * 0 on success, negative errno otherwise
4066 int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
4068 unsigned int class = dev->class;
4069 u16 *id = (void *)dev->link->ap->sector_buf;
4073 rc = ata_dev_read_id(dev, &class, readid_flags, id);
4077 /* is the device still there? */
4078 if (!ata_dev_same_device(dev, class, id))
4081 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
4086 * ata_dev_revalidate - Revalidate ATA device
4087 * @dev: device to revalidate
4088 * @new_class: new class code
4089 * @readid_flags: read ID flags
4091 * Re-read IDENTIFY page, make sure @dev is still attached to the
4092 * port and reconfigure it according to the new IDENTIFY page.
4095 * Kernel thread context (may sleep)
4098 * 0 on success, negative errno otherwise
4100 int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4101 unsigned int readid_flags)
4103 u64 n_sectors = dev->n_sectors;
4106 if (!ata_dev_enabled(dev))
4109 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
4110 if (ata_class_enabled(new_class) &&
4111 new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) {
4112 ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n",
4113 dev->class, new_class);
4119 rc = ata_dev_reread_id(dev, readid_flags);
4123 /* configure device according to the new ID */
4124 rc = ata_dev_configure(dev);
4128 /* verify n_sectors hasn't changed */
4129 if (dev->class == ATA_DEV_ATA && n_sectors &&
4130 dev->n_sectors != n_sectors) {
4131 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
4133 (unsigned long long)n_sectors,
4134 (unsigned long long)dev->n_sectors);
4136 /* restore original n_sectors */
4137 dev->n_sectors = n_sectors;
4146 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
4150 struct ata_blacklist_entry {
4151 const char *model_num;
4152 const char *model_rev;
4153 unsigned long horkage;
4156 static const struct ata_blacklist_entry ata_device_blacklist [] = {
4157 /* Devices with DMA related problems under Linux */
4158 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4159 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4160 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4161 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4162 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4163 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4164 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4165 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4166 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
4167 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
4168 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
4169 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4170 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4171 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4172 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4173 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
4174 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
4175 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
4176 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4177 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4178 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4179 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4180 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4181 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4182 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4183 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
4184 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4185 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
4186 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
4187 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
4188 /* Odd clown on sil3726/4726 PMPs */
4189 { "Config Disk", NULL, ATA_HORKAGE_NODMA |
4190 ATA_HORKAGE_SKIP_PM },
4192 /* Weird ATAPI devices */
4193 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
4195 /* Devices we expect to fail diagnostics */
4197 /* Devices where NCQ should be avoided */
4199 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
4200 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4201 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
4203 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
4204 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
4205 { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ },
4206 { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ },
4207 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
4209 /* Blacklist entries taken from Silicon Image 3124/3132
4210 Windows driver .inf file - also several Linux problem reports */
4211 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4212 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4213 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
4214 /* Drives which do spurious command completion */
4215 { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
4216 { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
4217 { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, },
4218 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
4219 { "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, },
4220 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
4221 { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, },
4222 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
4223 { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, },
4224 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
4225 { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, },
4226 { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, },
4227 { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, },
4228 { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, },
4229 { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
4230 { "Maxtor 7V300F0", "VA111900", ATA_HORKAGE_NONCQ, },
4232 /* devices which puke on READ_NATIVE_MAX */
4233 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4234 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4235 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4236 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
4238 /* Devices which report 1 sector over size HPA */
4239 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4240 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
4246 static int strn_pattern_cmp(const char *patt, const char *name, int wildchar)
4252 * check for trailing wildcard: *\0
4254 p = strchr(patt, wildchar);
4255 if (p && ((*(p + 1)) == 0))
4266 return strncmp(patt, name, len);
4269 static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
4271 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4272 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
4273 const struct ata_blacklist_entry *ad = ata_device_blacklist;
4275 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4276 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
4278 while (ad->model_num) {
4279 if (!strn_pattern_cmp(ad->model_num, model_num, '*')) {
4280 if (ad->model_rev == NULL)
4282 if (!strn_pattern_cmp(ad->model_rev, model_rev, '*'))
4290 static int ata_dma_blacklisted(const struct ata_device *dev)
4292 /* We don't support polling DMA.
4293 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4294 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4296 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
4297 (dev->flags & ATA_DFLAG_CDB_INTR))
4299 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
4303 * ata_dev_xfermask - Compute supported xfermask of the given device
4304 * @dev: Device to compute xfermask for
4306 * Compute supported xfermask of @dev and store it in
4307 * dev->*_mask. This function is responsible for applying all
4308 * known limits including host controller limits, device
4314 static void ata_dev_xfermask(struct ata_device *dev)
4316 struct ata_link *link = dev->link;
4317 struct ata_port *ap = link->ap;
4318 struct ata_host *host = ap->host;
4319 unsigned long xfer_mask;
4321 /* controller modes available */
4322 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4323 ap->mwdma_mask, ap->udma_mask);
4325 /* drive modes available */
4326 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4327 dev->mwdma_mask, dev->udma_mask);
4328 xfer_mask &= ata_id_xfermask(dev->id);
4331 * CFA Advanced TrueIDE timings are not allowed on a shared
4334 if (ata_dev_pair(dev)) {
4335 /* No PIO5 or PIO6 */
4336 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4337 /* No MWDMA3 or MWDMA 4 */
4338 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4341 if (ata_dma_blacklisted(dev)) {
4342 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4343 ata_dev_printk(dev, KERN_WARNING,
4344 "device is on DMA blacklist, disabling DMA\n");
4347 if ((host->flags & ATA_HOST_SIMPLEX) &&
4348 host->simplex_claimed && host->simplex_claimed != ap) {
4349 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
4350 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
4351 "other device, disabling DMA\n");
4354 if (ap->flags & ATA_FLAG_NO_IORDY)
4355 xfer_mask &= ata_pio_mask_no_iordy(dev);
4357 if (ap->ops->mode_filter)
4358 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
4360 /* Apply cable rule here. Don't apply it early because when
4361 * we handle hot plug the cable type can itself change.
4362 * Check this last so that we know if the transfer rate was
4363 * solely limited by the cable.
4364 * Unknown or 80 wire cables reported host side are checked
4365 * drive side as well. Cases where we know a 40wire cable
4366 * is used safely for 80 are not checked here.
4368 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4369 /* UDMA/44 or higher would be available */
4370 if ((ap->cbl == ATA_CBL_PATA40) ||
4371 (ata_drive_40wire(dev->id) &&
4372 (ap->cbl == ATA_CBL_PATA_UNK ||
4373 ap->cbl == ATA_CBL_PATA80))) {
4374 ata_dev_printk(dev, KERN_WARNING,
4375 "limited to UDMA/33 due to 40-wire cable\n");
4376 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4379 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4380 &dev->mwdma_mask, &dev->udma_mask);
4384 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
4385 * @dev: Device to which command will be sent
4387 * Issue SET FEATURES - XFER MODE command to device @dev
4391 * PCI/etc. bus probe sem.
4394 * 0 on success, AC_ERR_* mask otherwise.
4397 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
4399 struct ata_taskfile tf;
4400 unsigned int err_mask;
4402 /* set up set-features taskfile */
4403 DPRINTK("set features - xfer mode\n");
4405 /* Some controllers and ATAPI devices show flaky interrupt
4406 * behavior after setting xfer mode. Use polling instead.
4408 ata_tf_init(dev, &tf);
4409 tf.command = ATA_CMD_SET_FEATURES;
4410 tf.feature = SETFEATURES_XFER;
4411 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
4412 tf.protocol = ATA_PROT_NODATA;
4413 tf.nsect = dev->xfer_mode;
4415 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4417 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4421 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
4422 * @dev: Device to which command will be sent
4423 * @enable: Whether to enable or disable the feature
4424 * @feature: The sector count represents the feature to set
4426 * Issue SET FEATURES - SATA FEATURES command to device @dev
4427 * on port @ap with sector count
4430 * PCI/etc. bus probe sem.
4433 * 0 on success, AC_ERR_* mask otherwise.
4435 static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable,
4438 struct ata_taskfile tf;
4439 unsigned int err_mask;
4441 /* set up set-features taskfile */
4442 DPRINTK("set features - SATA features\n");
4444 ata_tf_init(dev, &tf);
4445 tf.command = ATA_CMD_SET_FEATURES;
4446 tf.feature = enable;
4447 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4448 tf.protocol = ATA_PROT_NODATA;
4451 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4453 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4458 * ata_dev_init_params - Issue INIT DEV PARAMS command
4459 * @dev: Device to which command will be sent
4460 * @heads: Number of heads (taskfile parameter)
4461 * @sectors: Number of sectors (taskfile parameter)
4464 * Kernel thread context (may sleep)
4467 * 0 on success, AC_ERR_* mask otherwise.
4469 static unsigned int ata_dev_init_params(struct ata_device *dev,
4470 u16 heads, u16 sectors)
4472 struct ata_taskfile tf;
4473 unsigned int err_mask;
4475 /* Number of sectors per track 1-255. Number of heads 1-16 */
4476 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
4477 return AC_ERR_INVALID;
4479 /* set up init dev params taskfile */
4480 DPRINTK("init dev params \n");
4482 ata_tf_init(dev, &tf);
4483 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4484 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4485 tf.protocol = ATA_PROT_NODATA;
4487 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
4489 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
4490 /* A clean abort indicates an original or just out of spec drive
4491 and we should continue as we issue the setup based on the
4492 drive reported working geometry */
4493 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4496 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4501 * ata_sg_clean - Unmap DMA memory associated with command
4502 * @qc: Command containing DMA memory to be released
4504 * Unmap all mapped DMA memory associated with this command.
4507 * spin_lock_irqsave(host lock)
4509 void ata_sg_clean(struct ata_queued_cmd *qc)
4511 struct ata_port *ap = qc->ap;
4512 struct scatterlist *sg = qc->__sg;
4513 int dir = qc->dma_dir;
4514 void *pad_buf = NULL;
4516 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
4517 WARN_ON(sg == NULL);
4519 if (qc->flags & ATA_QCFLAG_SINGLE)
4520 WARN_ON(qc->n_elem > 1);
4522 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
4524 /* if we padded the buffer out to 32-bit bound, and data
4525 * xfer direction is from-device, we must copy from the
4526 * pad buffer back into the supplied buffer
4528 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
4529 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4531 if (qc->flags & ATA_QCFLAG_SG) {
4533 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
4534 /* restore last sg */
4535 sg_last(sg, qc->orig_n_elem)->length += qc->pad_len;
4537 struct scatterlist *psg = &qc->pad_sgent;
4538 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
4539 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
4540 kunmap_atomic(addr, KM_IRQ0);
4544 dma_unmap_single(ap->dev,
4545 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
4548 sg->length += qc->pad_len;
4550 memcpy(qc->buf_virt + sg->length - qc->pad_len,
4551 pad_buf, qc->pad_len);
4554 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4559 * ata_fill_sg - Fill PCI IDE PRD table
4560 * @qc: Metadata associated with taskfile to be transferred
4562 * Fill PCI IDE PRD (scatter-gather) table with segments
4563 * associated with the current disk command.
4566 * spin_lock_irqsave(host lock)
4569 static void ata_fill_sg(struct ata_queued_cmd *qc)
4571 struct ata_port *ap = qc->ap;
4572 struct scatterlist *sg;
4575 WARN_ON(qc->__sg == NULL);
4576 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4579 ata_for_each_sg(sg, qc) {
4583 /* determine if physical DMA addr spans 64K boundary.
4584 * Note h/w doesn't support 64-bit, so we unconditionally
4585 * truncate dma_addr_t to u32.
4587 addr = (u32) sg_dma_address(sg);
4588 sg_len = sg_dma_len(sg);
4591 offset = addr & 0xffff;
4593 if ((offset + sg_len) > 0x10000)
4594 len = 0x10000 - offset;
4596 ap->prd[idx].addr = cpu_to_le32(addr);
4597 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
4598 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4607 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4611 * ata_fill_sg_dumb - Fill PCI IDE PRD table
4612 * @qc: Metadata associated with taskfile to be transferred
4614 * Fill PCI IDE PRD (scatter-gather) table with segments
4615 * associated with the current disk command. Perform the fill
4616 * so that we avoid writing any length 64K records for
4617 * controllers that don't follow the spec.
4620 * spin_lock_irqsave(host lock)
4623 static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
4625 struct ata_port *ap = qc->ap;
4626 struct scatterlist *sg;
4629 WARN_ON(qc->__sg == NULL);
4630 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
4633 ata_for_each_sg(sg, qc) {
4635 u32 sg_len, len, blen;
4637 /* determine if physical DMA addr spans 64K boundary.
4638 * Note h/w doesn't support 64-bit, so we unconditionally
4639 * truncate dma_addr_t to u32.
4641 addr = (u32) sg_dma_address(sg);
4642 sg_len = sg_dma_len(sg);
4645 offset = addr & 0xffff;
4647 if ((offset + sg_len) > 0x10000)
4648 len = 0x10000 - offset;
4650 blen = len & 0xffff;
4651 ap->prd[idx].addr = cpu_to_le32(addr);
4653 /* Some PATA chipsets like the CS5530 can't
4654 cope with 0x0000 meaning 64K as the spec says */
4655 ap->prd[idx].flags_len = cpu_to_le32(0x8000);
4657 ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
4659 ap->prd[idx].flags_len = cpu_to_le32(blen);
4660 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
4669 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
4673 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
4674 * @qc: Metadata associated with taskfile to check
4676 * Allow low-level driver to filter ATA PACKET commands, returning
4677 * a status indicating whether or not it is OK to use DMA for the
4678 * supplied PACKET command.
4681 * spin_lock_irqsave(host lock)
4683 * RETURNS: 0 when ATAPI DMA can be used
4686 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
4688 struct ata_port *ap = qc->ap;
4690 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4691 * few ATAPI devices choke on such DMA requests.
4693 if (unlikely(qc->nbytes & 15))
4696 if (ap->ops->check_atapi_dma)
4697 return ap->ops->check_atapi_dma(qc);
4703 * ata_std_qc_defer - Check whether a qc needs to be deferred
4704 * @qc: ATA command in question
4706 * Non-NCQ commands cannot run with any other command, NCQ or
4707 * not. As upper layer only knows the queue depth, we are
4708 * responsible for maintaining exclusion. This function checks
4709 * whether a new command @qc can be issued.
4712 * spin_lock_irqsave(host lock)
4715 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4717 int ata_std_qc_defer(struct ata_queued_cmd *qc)
4719 struct ata_link *link = qc->dev->link;
4721 if (qc->tf.protocol == ATA_PROT_NCQ) {
4722 if (!ata_tag_valid(link->active_tag))
4725 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4729 return ATA_DEFER_LINK;
4733 * ata_qc_prep - Prepare taskfile for submission
4734 * @qc: Metadata associated with taskfile to be prepared
4736 * Prepare ATA taskfile for submission.
4739 * spin_lock_irqsave(host lock)
4741 void ata_qc_prep(struct ata_queued_cmd *qc)
4743 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4750 * ata_dumb_qc_prep - Prepare taskfile for submission
4751 * @qc: Metadata associated with taskfile to be prepared
4753 * Prepare ATA taskfile for submission.
4756 * spin_lock_irqsave(host lock)
4758 void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
4760 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
4763 ata_fill_sg_dumb(qc);
4766 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
4769 * ata_sg_init_one - Associate command with memory buffer
4770 * @qc: Command to be associated
4771 * @buf: Memory buffer
4772 * @buflen: Length of memory buffer, in bytes.
4774 * Initialize the data-related elements of queued_cmd @qc
4775 * to point to a single memory buffer, @buf of byte length @buflen.
4778 * spin_lock_irqsave(host lock)
4781 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
4783 qc->flags |= ATA_QCFLAG_SINGLE;
4785 qc->__sg = &qc->sgent;
4787 qc->orig_n_elem = 1;
4789 qc->nbytes = buflen;
4790 qc->cursg = qc->__sg;
4792 sg_init_one(&qc->sgent, buf, buflen);
4796 * ata_sg_init - Associate command with scatter-gather table.
4797 * @qc: Command to be associated
4798 * @sg: Scatter-gather table.
4799 * @n_elem: Number of elements in s/g table.
4801 * Initialize the data-related elements of queued_cmd @qc
4802 * to point to a scatter-gather table @sg, containing @n_elem
4806 * spin_lock_irqsave(host lock)
4809 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4810 unsigned int n_elem)
4812 qc->flags |= ATA_QCFLAG_SG;
4814 qc->n_elem = n_elem;
4815 qc->orig_n_elem = n_elem;
4816 qc->cursg = qc->__sg;
4820 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
4821 * @qc: Command with memory buffer to be mapped.
4823 * DMA-map the memory buffer associated with queued_cmd @qc.
4826 * spin_lock_irqsave(host lock)
4829 * Zero on success, negative on error.
4832 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
4834 struct ata_port *ap = qc->ap;
4835 int dir = qc->dma_dir;
4836 struct scatterlist *sg = qc->__sg;
4837 dma_addr_t dma_address;
4840 /* we must lengthen transfers to end on a 32-bit boundary */
4841 qc->pad_len = sg->length & 3;
4843 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4844 struct scatterlist *psg = &qc->pad_sgent;
4846 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4848 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4850 if (qc->tf.flags & ATA_TFLAG_WRITE)
4851 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
4854 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4855 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4857 sg->length -= qc->pad_len;
4858 if (sg->length == 0)
4861 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
4862 sg->length, qc->pad_len);
4870 dma_address = dma_map_single(ap->dev, qc->buf_virt,
4872 if (dma_mapping_error(dma_address)) {
4874 sg->length += qc->pad_len;
4878 sg_dma_address(sg) = dma_address;
4879 sg_dma_len(sg) = sg->length;
4882 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
4883 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4889 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4890 * @qc: Command with scatter-gather table to be mapped.
4892 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4895 * spin_lock_irqsave(host lock)
4898 * Zero on success, negative on error.
4902 static int ata_sg_setup(struct ata_queued_cmd *qc)
4904 struct ata_port *ap = qc->ap;
4905 struct scatterlist *sg = qc->__sg;
4906 struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem);
4907 int n_elem, pre_n_elem, dir, trim_sg = 0;
4909 VPRINTK("ENTER, ata%u\n", ap->print_id);
4910 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
4912 /* we must lengthen transfers to end on a 32-bit boundary */
4913 qc->pad_len = lsg->length & 3;
4915 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
4916 struct scatterlist *psg = &qc->pad_sgent;
4917 unsigned int offset;
4919 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
4921 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
4924 * psg->page/offset are used to copy to-be-written
4925 * data in this function or read data in ata_sg_clean.
4927 offset = lsg->offset + lsg->length - qc->pad_len;
4928 sg_init_table(psg, 1);
4929 sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT),
4930 qc->pad_len, offset_in_page(offset));
4932 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4933 void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
4934 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
4935 kunmap_atomic(addr, KM_IRQ0);
4938 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
4939 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
4941 lsg->length -= qc->pad_len;
4942 if (lsg->length == 0)
4945 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
4946 qc->n_elem - 1, lsg->length, qc->pad_len);
4949 pre_n_elem = qc->n_elem;
4950 if (trim_sg && pre_n_elem)
4959 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
4961 /* restore last sg */
4962 lsg->length += qc->pad_len;
4966 DPRINTK("%d sg elements mapped\n", n_elem);
4969 qc->n_elem = n_elem;
4975 * swap_buf_le16 - swap halves of 16-bit words in place
4976 * @buf: Buffer to swap
4977 * @buf_words: Number of 16-bit words in buffer.
4979 * Swap halves of 16-bit words if needed to convert from
4980 * little-endian byte order to native cpu byte order, or
4984 * Inherited from caller.
4986 void swap_buf_le16(u16 *buf, unsigned int buf_words)
4991 for (i = 0; i < buf_words; i++)
4992 buf[i] = le16_to_cpu(buf[i]);
4993 #endif /* __BIG_ENDIAN */
4997 * ata_data_xfer - Transfer data by PIO
4998 * @adev: device to target
5000 * @buflen: buffer length
5001 * @write_data: read/write
5003 * Transfer data from/to the device data register by PIO.
5006 * Inherited from caller.
5008 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
5009 unsigned int buflen, int write_data)
5011 struct ata_port *ap = adev->link->ap;
5012 unsigned int words = buflen >> 1;
5014 /* Transfer multiple of 2 bytes */
5016 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
5018 ioread16_rep(ap->ioaddr.data_addr, buf, words);
5020 /* Transfer trailing 1 byte, if any. */
5021 if (unlikely(buflen & 0x01)) {
5022 u16 align_buf[1] = { 0 };
5023 unsigned char *trailing_buf = buf + buflen - 1;
5026 memcpy(align_buf, trailing_buf, 1);
5027 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
5029 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
5030 memcpy(trailing_buf, align_buf, 1);
5036 * ata_data_xfer_noirq - Transfer data by PIO
5037 * @adev: device to target
5039 * @buflen: buffer length
5040 * @write_data: read/write
5042 * Transfer data from/to the device data register by PIO. Do the
5043 * transfer with interrupts disabled.
5046 * Inherited from caller.
5048 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
5049 unsigned int buflen, int write_data)
5051 unsigned long flags;
5052 local_irq_save(flags);
5053 ata_data_xfer(adev, buf, buflen, write_data);
5054 local_irq_restore(flags);
5059 * ata_pio_sector - Transfer a sector of data.
5060 * @qc: Command on going
5062 * Transfer qc->sect_size bytes of data from/to the ATA device.
5065 * Inherited from caller.
5068 static void ata_pio_sector(struct ata_queued_cmd *qc)
5070 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
5071 struct ata_port *ap = qc->ap;
5073 unsigned int offset;
5076 if (qc->curbytes == qc->nbytes - qc->sect_size)
5077 ap->hsm_task_state = HSM_ST_LAST;
5079 page = sg_page(qc->cursg);
5080 offset = qc->cursg->offset + qc->cursg_ofs;
5082 /* get the current page and offset */
5083 page = nth_page(page, (offset >> PAGE_SHIFT));
5084 offset %= PAGE_SIZE;
5086 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
5088 if (PageHighMem(page)) {
5089 unsigned long flags;
5091 /* FIXME: use a bounce buffer */
5092 local_irq_save(flags);
5093 buf = kmap_atomic(page, KM_IRQ0);
5095 /* do the actual data transfer */
5096 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
5098 kunmap_atomic(buf, KM_IRQ0);
5099 local_irq_restore(flags);
5101 buf = page_address(page);
5102 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
5105 qc->curbytes += qc->sect_size;
5106 qc->cursg_ofs += qc->sect_size;
5108 if (qc->cursg_ofs == qc->cursg->length) {
5109 qc->cursg = sg_next(qc->cursg);
5115 * ata_pio_sectors - Transfer one or many sectors.
5116 * @qc: Command on going
5118 * Transfer one or many sectors of data from/to the
5119 * ATA device for the DRQ request.
5122 * Inherited from caller.
5125 static void ata_pio_sectors(struct ata_queued_cmd *qc)
5127 if (is_multi_taskfile(&qc->tf)) {
5128 /* READ/WRITE MULTIPLE */
5131 WARN_ON(qc->dev->multi_count == 0);
5133 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
5134 qc->dev->multi_count);
5140 ata_altstatus(qc->ap); /* flush */
5144 * atapi_send_cdb - Write CDB bytes to hardware
5145 * @ap: Port to which ATAPI device is attached.
5146 * @qc: Taskfile currently active
5148 * When device has indicated its readiness to accept
5149 * a CDB, this function is called. Send the CDB.
5155 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
5158 DPRINTK("send cdb\n");
5159 WARN_ON(qc->dev->cdb_len < 12);
5161 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
5162 ata_altstatus(ap); /* flush */
5164 switch (qc->tf.protocol) {
5165 case ATA_PROT_ATAPI:
5166 ap->hsm_task_state = HSM_ST;
5168 case ATA_PROT_ATAPI_NODATA:
5169 ap->hsm_task_state = HSM_ST_LAST;
5171 case ATA_PROT_ATAPI_DMA:
5172 ap->hsm_task_state = HSM_ST_LAST;
5173 /* initiate bmdma */
5174 ap->ops->bmdma_start(qc);
5180 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
5181 * @qc: Command on going
5182 * @bytes: number of bytes
5184 * Transfer Transfer data from/to the ATAPI device.
5187 * Inherited from caller.
5191 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
5193 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
5194 struct scatterlist *sg = qc->__sg;
5195 struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem);
5196 struct ata_port *ap = qc->ap;
5199 unsigned int offset, count;
5202 if (qc->curbytes + bytes >= qc->nbytes)
5203 ap->hsm_task_state = HSM_ST_LAST;
5206 if (unlikely(no_more_sg)) {
5208 * The end of qc->sg is reached and the device expects
5209 * more data to transfer. In order not to overrun qc->sg
5210 * and fulfill length specified in the byte count register,
5211 * - for read case, discard trailing data from the device
5212 * - for write case, padding zero data to the device
5214 u16 pad_buf[1] = { 0 };
5215 unsigned int words = bytes >> 1;
5218 if (words) /* warning if bytes > 1 */
5219 ata_dev_printk(qc->dev, KERN_WARNING,
5220 "%u bytes trailing data\n", bytes);
5222 for (i = 0; i < words; i++)
5223 ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write);
5225 ap->hsm_task_state = HSM_ST_LAST;
5232 offset = sg->offset + qc->cursg_ofs;
5234 /* get the current page and offset */
5235 page = nth_page(page, (offset >> PAGE_SHIFT));
5236 offset %= PAGE_SIZE;
5238 /* don't overrun current sg */
5239 count = min(sg->length - qc->cursg_ofs, bytes);
5241 /* don't cross page boundaries */
5242 count = min(count, (unsigned int)PAGE_SIZE - offset);
5244 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
5246 if (PageHighMem(page)) {
5247 unsigned long flags;
5249 /* FIXME: use bounce buffer */
5250 local_irq_save(flags);
5251 buf = kmap_atomic(page, KM_IRQ0);
5253 /* do the actual data transfer */
5254 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
5256 kunmap_atomic(buf, KM_IRQ0);
5257 local_irq_restore(flags);
5259 buf = page_address(page);
5260 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
5264 qc->curbytes += count;
5265 qc->cursg_ofs += count;
5267 if (qc->cursg_ofs == sg->length) {
5268 if (qc->cursg == lsg)
5271 qc->cursg = sg_next(qc->cursg);
5280 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
5281 * @qc: Command on going
5283 * Transfer Transfer data from/to the ATAPI device.
5286 * Inherited from caller.
5289 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
5291 struct ata_port *ap = qc->ap;
5292 struct ata_device *dev = qc->dev;
5293 unsigned int ireason, bc_lo, bc_hi, bytes;
5294 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
5296 /* Abuse qc->result_tf for temp storage of intermediate TF
5297 * here to save some kernel stack usage.
5298 * For normal completion, qc->result_tf is not relevant. For
5299 * error, qc->result_tf is later overwritten by ata_qc_complete().
5300 * So, the correctness of qc->result_tf is not affected.
5302 ap->ops->tf_read(ap, &qc->result_tf);
5303 ireason = qc->result_tf.nsect;
5304 bc_lo = qc->result_tf.lbam;
5305 bc_hi = qc->result_tf.lbah;
5306 bytes = (bc_hi << 8) | bc_lo;
5308 /* shall be cleared to zero, indicating xfer of data */
5309 if (ireason & (1 << 0))
5312 /* make sure transfer direction matches expected */
5313 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
5314 if (do_write != i_write)
5317 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
5319 __atapi_pio_bytes(qc, bytes);
5320 ata_altstatus(ap); /* flush */
5325 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
5326 qc->err_mask |= AC_ERR_HSM;
5327 ap->hsm_task_state = HSM_ST_ERR;
5331 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
5332 * @ap: the target ata_port
5336 * 1 if ok in workqueue, 0 otherwise.
5339 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
5341 if (qc->tf.flags & ATA_TFLAG_POLLING)
5344 if (ap->hsm_task_state == HSM_ST_FIRST) {
5345 if (qc->tf.protocol == ATA_PROT_PIO &&
5346 (qc->tf.flags & ATA_TFLAG_WRITE))
5349 if (is_atapi_taskfile(&qc->tf) &&
5350 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5358 * ata_hsm_qc_complete - finish a qc running on standard HSM
5359 * @qc: Command to complete
5360 * @in_wq: 1 if called from workqueue, 0 otherwise
5362 * Finish @qc which is running on standard HSM.
5365 * If @in_wq is zero, spin_lock_irqsave(host lock).
5366 * Otherwise, none on entry and grabs host lock.
5368 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
5370 struct ata_port *ap = qc->ap;
5371 unsigned long flags;
5373 if (ap->ops->error_handler) {
5375 spin_lock_irqsave(ap->lock, flags);
5377 /* EH might have kicked in while host lock is
5380 qc = ata_qc_from_tag(ap, qc->tag);
5382 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
5383 ap->ops->irq_on(ap);
5384 ata_qc_complete(qc);
5386 ata_port_freeze(ap);
5389 spin_unlock_irqrestore(ap->lock, flags);
5391 if (likely(!(qc->err_mask & AC_ERR_HSM)))
5392 ata_qc_complete(qc);
5394 ata_port_freeze(ap);
5398 spin_lock_irqsave(ap->lock, flags);
5399 ap->ops->irq_on(ap);
5400 ata_qc_complete(qc);
5401 spin_unlock_irqrestore(ap->lock, flags);
5403 ata_qc_complete(qc);
5408 * ata_hsm_move - move the HSM to the next state.
5409 * @ap: the target ata_port
5411 * @status: current device status
5412 * @in_wq: 1 if called from workqueue, 0 otherwise
5415 * 1 when poll next status needed, 0 otherwise.
5417 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
5418 u8 status, int in_wq)
5420 unsigned long flags = 0;
5423 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
5425 /* Make sure ata_qc_issue_prot() does not throw things
5426 * like DMA polling into the workqueue. Notice that
5427 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
5429 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
5432 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
5433 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
5435 switch (ap->hsm_task_state) {
5437 /* Send first data block or PACKET CDB */
5439 /* If polling, we will stay in the work queue after
5440 * sending the data. Otherwise, interrupt handler
5441 * takes over after sending the data.
5443 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
5445 /* check device status */
5446 if (unlikely((status & ATA_DRQ) == 0)) {
5447 /* handle BSY=0, DRQ=0 as error */
5448 if (likely(status & (ATA_ERR | ATA_DF)))
5449 /* device stops HSM for abort/error */
5450 qc->err_mask |= AC_ERR_DEV;
5452 /* HSM violation. Let EH handle this */
5453 qc->err_mask |= AC_ERR_HSM;
5455 ap->hsm_task_state = HSM_ST_ERR;
5459 /* Device should not ask for data transfer (DRQ=1)
5460 * when it finds something wrong.
5461 * We ignore DRQ here and stop the HSM by
5462 * changing hsm_task_state to HSM_ST_ERR and
5463 * let the EH abort the command or reset the device.
5465 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5466 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device "
5467 "error, dev_stat 0x%X\n", status);
5468 qc->err_mask |= AC_ERR_HSM;
5469 ap->hsm_task_state = HSM_ST_ERR;
5473 /* Send the CDB (atapi) or the first data block (ata pio out).
5474 * During the state transition, interrupt handler shouldn't
5475 * be invoked before the data transfer is complete and
5476 * hsm_task_state is changed. Hence, the following locking.
5479 spin_lock_irqsave(ap->lock, flags);
5481 if (qc->tf.protocol == ATA_PROT_PIO) {
5482 /* PIO data out protocol.
5483 * send first data block.
5486 /* ata_pio_sectors() might change the state
5487 * to HSM_ST_LAST. so, the state is changed here
5488 * before ata_pio_sectors().
5490 ap->hsm_task_state = HSM_ST;
5491 ata_pio_sectors(qc);
5494 atapi_send_cdb(ap, qc);
5497 spin_unlock_irqrestore(ap->lock, flags);
5499 /* if polling, ata_pio_task() handles the rest.
5500 * otherwise, interrupt handler takes over from here.
5505 /* complete command or read/write the data register */
5506 if (qc->tf.protocol == ATA_PROT_ATAPI) {
5507 /* ATAPI PIO protocol */
5508 if ((status & ATA_DRQ) == 0) {
5509 /* No more data to transfer or device error.
5510 * Device error will be tagged in HSM_ST_LAST.
5512 ap->hsm_task_state = HSM_ST_LAST;
5516 /* Device should not ask for data transfer (DRQ=1)
5517 * when it finds something wrong.
5518 * We ignore DRQ here and stop the HSM by
5519 * changing hsm_task_state to HSM_ST_ERR and
5520 * let the EH abort the command or reset the device.
5522 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5523 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
5524 "device error, dev_stat 0x%X\n",
5526 qc->err_mask |= AC_ERR_HSM;
5527 ap->hsm_task_state = HSM_ST_ERR;
5531 atapi_pio_bytes(qc);
5533 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
5534 /* bad ireason reported by device */
5538 /* ATA PIO protocol */
5539 if (unlikely((status & ATA_DRQ) == 0)) {
5540 /* handle BSY=0, DRQ=0 as error */
5541 if (likely(status & (ATA_ERR | ATA_DF)))
5542 /* device stops HSM for abort/error */
5543 qc->err_mask |= AC_ERR_DEV;
5545 /* HSM violation. Let EH handle this.
5546 * Phantom devices also trigger this
5547 * condition. Mark hint.
5549 qc->err_mask |= AC_ERR_HSM |
5552 ap->hsm_task_state = HSM_ST_ERR;
5556 /* For PIO reads, some devices may ask for
5557 * data transfer (DRQ=1) alone with ERR=1.
5558 * We respect DRQ here and transfer one
5559 * block of junk data before changing the
5560 * hsm_task_state to HSM_ST_ERR.
5562 * For PIO writes, ERR=1 DRQ=1 doesn't make
5563 * sense since the data block has been
5564 * transferred to the device.
5566 if (unlikely(status & (ATA_ERR | ATA_DF))) {
5567 /* data might be corrputed */
5568 qc->err_mask |= AC_ERR_DEV;
5570 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
5571 ata_pio_sectors(qc);
5572 status = ata_wait_idle(ap);
5575 if (status & (ATA_BUSY | ATA_DRQ))
5576 qc->err_mask |= AC_ERR_HSM;
5578 /* ata_pio_sectors() might change the
5579 * state to HSM_ST_LAST. so, the state
5580 * is changed after ata_pio_sectors().
5582 ap->hsm_task_state = HSM_ST_ERR;
5586 ata_pio_sectors(qc);
5588 if (ap->hsm_task_state == HSM_ST_LAST &&
5589 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
5591 status = ata_wait_idle(ap);
5600 if (unlikely(!ata_ok(status))) {
5601 qc->err_mask |= __ac_err_mask(status);
5602 ap->hsm_task_state = HSM_ST_ERR;
5606 /* no more data to transfer */
5607 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
5608 ap->print_id, qc->dev->devno, status);
5610 WARN_ON(qc->err_mask);
5612 ap->hsm_task_state = HSM_ST_IDLE;
5614 /* complete taskfile transaction */
5615 ata_hsm_qc_complete(qc, in_wq);
5621 /* make sure qc->err_mask is available to
5622 * know what's wrong and recover
5624 WARN_ON(qc->err_mask == 0);
5626 ap->hsm_task_state = HSM_ST_IDLE;
5628 /* complete taskfile transaction */
5629 ata_hsm_qc_complete(qc, in_wq);
5641 static void ata_pio_task(struct work_struct *work)
5643 struct ata_port *ap =
5644 container_of(work, struct ata_port, port_task.work);
5645 struct ata_queued_cmd *qc = ap->port_task_data;
5650 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
5653 * This is purely heuristic. This is a fast path.
5654 * Sometimes when we enter, BSY will be cleared in
5655 * a chk-status or two. If not, the drive is probably seeking
5656 * or something. Snooze for a couple msecs, then
5657 * chk-status again. If still busy, queue delayed work.
5659 status = ata_busy_wait(ap, ATA_BUSY, 5);
5660 if (status & ATA_BUSY) {
5662 status = ata_busy_wait(ap, ATA_BUSY, 10);
5663 if (status & ATA_BUSY) {
5664 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
5670 poll_next = ata_hsm_move(ap, qc, status, 1);
5672 /* another command or interrupt handler
5673 * may be running at this point.
5680 * ata_qc_new - Request an available ATA command, for queueing
5681 * @ap: Port associated with device @dev
5682 * @dev: Device from whom we request an available command structure
5688 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
5690 struct ata_queued_cmd *qc = NULL;
5693 /* no command while frozen */
5694 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5697 /* the last tag is reserved for internal command. */
5698 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
5699 if (!test_and_set_bit(i, &ap->qc_allocated)) {
5700 qc = __ata_qc_from_tag(ap, i);
5711 * ata_qc_new_init - Request an available ATA command, and initialize it
5712 * @dev: Device from whom we request an available command structure
5718 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
5720 struct ata_port *ap = dev->link->ap;
5721 struct ata_queued_cmd *qc;
5723 qc = ata_qc_new(ap);
5736 * ata_qc_free - free unused ata_queued_cmd
5737 * @qc: Command to complete
5739 * Designed to free unused ata_queued_cmd object
5740 * in case something prevents using it.
5743 * spin_lock_irqsave(host lock)
5745 void ata_qc_free(struct ata_queued_cmd *qc)
5747 struct ata_port *ap = qc->ap;
5750 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5754 if (likely(ata_tag_valid(tag))) {
5755 qc->tag = ATA_TAG_POISON;
5756 clear_bit(tag, &ap->qc_allocated);
5760 void __ata_qc_complete(struct ata_queued_cmd *qc)
5762 struct ata_port *ap = qc->ap;
5763 struct ata_link *link = qc->dev->link;
5765 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5766 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
5768 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5771 /* command should be marked inactive atomically with qc completion */
5772 if (qc->tf.protocol == ATA_PROT_NCQ) {
5773 link->sactive &= ~(1 << qc->tag);
5775 ap->nr_active_links--;
5777 link->active_tag = ATA_TAG_POISON;
5778 ap->nr_active_links--;
5781 /* clear exclusive status */
5782 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
5783 ap->excl_link == link))
5784 ap->excl_link = NULL;
5786 /* atapi: mark qc as inactive to prevent the interrupt handler
5787 * from completing the command twice later, before the error handler
5788 * is called. (when rc != 0 and atapi request sense is needed)
5790 qc->flags &= ~ATA_QCFLAG_ACTIVE;
5791 ap->qc_active &= ~(1 << qc->tag);
5793 /* call completion callback */
5794 qc->complete_fn(qc);
5797 static void fill_result_tf(struct ata_queued_cmd *qc)
5799 struct ata_port *ap = qc->ap;
5801 qc->result_tf.flags = qc->tf.flags;
5802 ap->ops->tf_read(ap, &qc->result_tf);
5806 * ata_qc_complete - Complete an active ATA command
5807 * @qc: Command to complete
5808 * @err_mask: ATA Status register contents
5810 * Indicate to the mid and upper layers that an ATA
5811 * command has completed, with either an ok or not-ok status.
5814 * spin_lock_irqsave(host lock)
5816 void ata_qc_complete(struct ata_queued_cmd *qc)
5818 struct ata_port *ap = qc->ap;
5820 /* XXX: New EH and old EH use different mechanisms to
5821 * synchronize EH with regular execution path.
5823 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5824 * Normal execution path is responsible for not accessing a
5825 * failed qc. libata core enforces the rule by returning NULL
5826 * from ata_qc_from_tag() for failed qcs.
5828 * Old EH depends on ata_qc_complete() nullifying completion
5829 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5830 * not synchronize with interrupt handler. Only PIO task is
5833 if (ap->ops->error_handler) {
5834 struct ata_device *dev = qc->dev;
5835 struct ata_eh_info *ehi = &dev->link->eh_info;
5837 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
5839 if (unlikely(qc->err_mask))
5840 qc->flags |= ATA_QCFLAG_FAILED;
5842 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5843 if (!ata_tag_internal(qc->tag)) {
5844 /* always fill result TF for failed qc */
5846 ata_qc_schedule_eh(qc);
5851 /* read result TF if requested */
5852 if (qc->flags & ATA_QCFLAG_RESULT_TF)
5855 /* Some commands need post-processing after successful
5858 switch (qc->tf.command) {
5859 case ATA_CMD_SET_FEATURES:
5860 if (qc->tf.feature != SETFEATURES_WC_ON &&
5861 qc->tf.feature != SETFEATURES_WC_OFF)
5864 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
5865 case ATA_CMD_SET_MULTI: /* multi_count changed */
5866 /* revalidate device */
5867 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
5868 ata_port_schedule_eh(ap);
5872 dev->flags |= ATA_DFLAG_SLEEPING;
5876 __ata_qc_complete(qc);
5878 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5881 /* read result TF if failed or requested */
5882 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
5885 __ata_qc_complete(qc);
5890 * ata_qc_complete_multiple - Complete multiple qcs successfully
5891 * @ap: port in question
5892 * @qc_active: new qc_active mask
5893 * @finish_qc: LLDD callback invoked before completing a qc
5895 * Complete in-flight commands. This functions is meant to be
5896 * called from low-level driver's interrupt routine to complete
5897 * requests normally. ap->qc_active and @qc_active is compared
5898 * and commands are completed accordingly.
5901 * spin_lock_irqsave(host lock)
5904 * Number of completed commands on success, -errno otherwise.
5906 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
5907 void (*finish_qc)(struct ata_queued_cmd *))
5913 done_mask = ap->qc_active ^ qc_active;
5915 if (unlikely(done_mask & qc_active)) {
5916 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
5917 "(%08x->%08x)\n", ap->qc_active, qc_active);
5921 for (i = 0; i < ATA_MAX_QUEUE; i++) {
5922 struct ata_queued_cmd *qc;
5924 if (!(done_mask & (1 << i)))
5927 if ((qc = ata_qc_from_tag(ap, i))) {
5930 ata_qc_complete(qc);
5938 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
5940 struct ata_port *ap = qc->ap;
5942 switch (qc->tf.protocol) {
5945 case ATA_PROT_ATAPI_DMA:
5948 case ATA_PROT_ATAPI:
5950 if (ap->flags & ATA_FLAG_PIO_DMA)
5963 * ata_qc_issue - issue taskfile to device
5964 * @qc: command to issue to device
5966 * Prepare an ATA command to submission to device.
5967 * This includes mapping the data into a DMA-able
5968 * area, filling in the S/G table, and finally
5969 * writing the taskfile to hardware, starting the command.
5972 * spin_lock_irqsave(host lock)
5974 void ata_qc_issue(struct ata_queued_cmd *qc)
5976 struct ata_port *ap = qc->ap;
5977 struct ata_link *link = qc->dev->link;
5979 /* Make sure only one non-NCQ command is outstanding. The
5980 * check is skipped for old EH because it reuses active qc to
5981 * request ATAPI sense.
5983 WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag));
5985 if (qc->tf.protocol == ATA_PROT_NCQ) {
5986 WARN_ON(link->sactive & (1 << qc->tag));
5989 ap->nr_active_links++;
5990 link->sactive |= 1 << qc->tag;
5992 WARN_ON(link->sactive);
5994 ap->nr_active_links++;
5995 link->active_tag = qc->tag;
5998 qc->flags |= ATA_QCFLAG_ACTIVE;
5999 ap->qc_active |= 1 << qc->tag;
6001 if (ata_should_dma_map(qc)) {
6002 if (qc->flags & ATA_QCFLAG_SG) {
6003 if (ata_sg_setup(qc))
6005 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
6006 if (ata_sg_setup_one(qc))
6010 qc->flags &= ~ATA_QCFLAG_DMAMAP;
6013 /* if device is sleeping, schedule softreset and abort the link */
6014 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
6015 link->eh_info.action |= ATA_EH_SOFTRESET;
6016 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
6017 ata_link_abort(link);
6021 ap->ops->qc_prep(qc);
6023 qc->err_mask |= ap->ops->qc_issue(qc);
6024 if (unlikely(qc->err_mask))
6029 qc->flags &= ~ATA_QCFLAG_DMAMAP;
6030 qc->err_mask |= AC_ERR_SYSTEM;
6032 ata_qc_complete(qc);
6036 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
6037 * @qc: command to issue to device
6039 * Using various libata functions and hooks, this function
6040 * starts an ATA command. ATA commands are grouped into
6041 * classes called "protocols", and issuing each type of protocol
6042 * is slightly different.
6044 * May be used as the qc_issue() entry in ata_port_operations.
6047 * spin_lock_irqsave(host lock)
6050 * Zero on success, AC_ERR_* mask on failure
6053 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
6055 struct ata_port *ap = qc->ap;
6057 /* Use polling pio if the LLD doesn't handle
6058 * interrupt driven pio and atapi CDB interrupt.
6060 if (ap->flags & ATA_FLAG_PIO_POLLING) {
6061 switch (qc->tf.protocol) {
6063 case ATA_PROT_NODATA:
6064 case ATA_PROT_ATAPI:
6065 case ATA_PROT_ATAPI_NODATA:
6066 qc->tf.flags |= ATA_TFLAG_POLLING;
6068 case ATA_PROT_ATAPI_DMA:
6069 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
6070 /* see ata_dma_blacklisted() */
6078 /* select the device */
6079 ata_dev_select(ap, qc->dev->devno, 1, 0);
6081 /* start the command */
6082 switch (qc->tf.protocol) {
6083 case ATA_PROT_NODATA:
6084 if (qc->tf.flags & ATA_TFLAG_POLLING)
6085 ata_qc_set_polling(qc);
6087 ata_tf_to_host(ap, &qc->tf);
6088 ap->hsm_task_state = HSM_ST_LAST;
6090 if (qc->tf.flags & ATA_TFLAG_POLLING)
6091 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6096 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
6098 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
6099 ap->ops->bmdma_setup(qc); /* set up bmdma */
6100 ap->ops->bmdma_start(qc); /* initiate bmdma */
6101 ap->hsm_task_state = HSM_ST_LAST;
6105 if (qc->tf.flags & ATA_TFLAG_POLLING)
6106 ata_qc_set_polling(qc);
6108 ata_tf_to_host(ap, &qc->tf);
6110 if (qc->tf.flags & ATA_TFLAG_WRITE) {
6111 /* PIO data out protocol */
6112 ap->hsm_task_state = HSM_ST_FIRST;
6113 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6115 /* always send first data block using
6116 * the ata_pio_task() codepath.
6119 /* PIO data in protocol */
6120 ap->hsm_task_state = HSM_ST;
6122 if (qc->tf.flags & ATA_TFLAG_POLLING)
6123 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6125 /* if polling, ata_pio_task() handles the rest.
6126 * otherwise, interrupt handler takes over from here.
6132 case ATA_PROT_ATAPI:
6133 case ATA_PROT_ATAPI_NODATA:
6134 if (qc->tf.flags & ATA_TFLAG_POLLING)
6135 ata_qc_set_polling(qc);
6137 ata_tf_to_host(ap, &qc->tf);
6139 ap->hsm_task_state = HSM_ST_FIRST;
6141 /* send cdb by polling if no cdb interrupt */
6142 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
6143 (qc->tf.flags & ATA_TFLAG_POLLING))
6144 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6147 case ATA_PROT_ATAPI_DMA:
6148 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
6150 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
6151 ap->ops->bmdma_setup(qc); /* set up bmdma */
6152 ap->hsm_task_state = HSM_ST_FIRST;
6154 /* send cdb by polling if no cdb interrupt */
6155 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
6156 ata_port_queue_task(ap, ata_pio_task, qc, 0);
6161 return AC_ERR_SYSTEM;
6168 * ata_host_intr - Handle host interrupt for given (port, task)
6169 * @ap: Port on which interrupt arrived (possibly...)
6170 * @qc: Taskfile currently active in engine
6172 * Handle host interrupt for given queued command. Currently,
6173 * only DMA interrupts are handled. All other commands are
6174 * handled via polling with interrupts disabled (nIEN bit).
6177 * spin_lock_irqsave(host lock)
6180 * One if interrupt was handled, zero if not (shared irq).
6183 inline unsigned int ata_host_intr(struct ata_port *ap,
6184 struct ata_queued_cmd *qc)
6186 struct ata_eh_info *ehi = &ap->link.eh_info;
6187 u8 status, host_stat = 0;
6189 VPRINTK("ata%u: protocol %d task_state %d\n",
6190 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
6192 /* Check whether we are expecting interrupt in this state */
6193 switch (ap->hsm_task_state) {
6195 /* Some pre-ATAPI-4 devices assert INTRQ
6196 * at this state when ready to receive CDB.
6199 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
6200 * The flag was turned on only for atapi devices.
6201 * No need to check is_atapi_taskfile(&qc->tf) again.
6203 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
6207 if (qc->tf.protocol == ATA_PROT_DMA ||
6208 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
6209 /* check status of DMA engine */
6210 host_stat = ap->ops->bmdma_status(ap);
6211 VPRINTK("ata%u: host_stat 0x%X\n",
6212 ap->print_id, host_stat);
6214 /* if it's not our irq... */
6215 if (!(host_stat & ATA_DMA_INTR))
6218 /* before we do anything else, clear DMA-Start bit */
6219 ap->ops->bmdma_stop(qc);
6221 if (unlikely(host_stat & ATA_DMA_ERR)) {
6222 /* error when transfering data to/from memory */
6223 qc->err_mask |= AC_ERR_HOST_BUS;
6224 ap->hsm_task_state = HSM_ST_ERR;
6234 /* check altstatus */
6235 status = ata_altstatus(ap);
6236 if (status & ATA_BUSY)
6239 /* check main status, clearing INTRQ */
6240 status = ata_chk_status(ap);
6241 if (unlikely(status & ATA_BUSY))
6244 /* ack bmdma irq events */
6245 ap->ops->irq_clear(ap);
6247 ata_hsm_move(ap, qc, status, 0);
6249 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
6250 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
6251 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
6253 return 1; /* irq handled */
6256 ap->stats.idle_irq++;
6259 if ((ap->stats.idle_irq % 1000) == 0) {
6261 ap->ops->irq_clear(ap);
6262 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
6266 return 0; /* irq not handled */
6270 * ata_interrupt - Default ATA host interrupt handler
6271 * @irq: irq line (unused)
6272 * @dev_instance: pointer to our ata_host information structure
6274 * Default interrupt handler for PCI IDE devices. Calls
6275 * ata_host_intr() for each port that is not disabled.
6278 * Obtains host lock during operation.
6281 * IRQ_NONE or IRQ_HANDLED.
6284 irqreturn_t ata_interrupt(int irq, void *dev_instance)
6286 struct ata_host *host = dev_instance;
6288 unsigned int handled = 0;
6289 unsigned long flags;
6291 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
6292 spin_lock_irqsave(&host->lock, flags);
6294 for (i = 0; i < host->n_ports; i++) {
6295 struct ata_port *ap;
6297 ap = host->ports[i];
6299 !(ap->flags & ATA_FLAG_DISABLED)) {
6300 struct ata_queued_cmd *qc;
6302 qc = ata_qc_from_tag(ap, ap->link.active_tag);
6303 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
6304 (qc->flags & ATA_QCFLAG_ACTIVE))
6305 handled |= ata_host_intr(ap, qc);
6309 spin_unlock_irqrestore(&host->lock, flags);
6311 return IRQ_RETVAL(handled);
6315 * sata_scr_valid - test whether SCRs are accessible
6316 * @link: ATA link to test SCR accessibility for
6318 * Test whether SCRs are accessible for @link.
6324 * 1 if SCRs are accessible, 0 otherwise.
6326 int sata_scr_valid(struct ata_link *link)
6328 struct ata_port *ap = link->ap;
6330 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
6334 * sata_scr_read - read SCR register of the specified port
6335 * @link: ATA link to read SCR for
6337 * @val: Place to store read value
6339 * Read SCR register @reg of @link into *@val. This function is
6340 * guaranteed to succeed if @link is ap->link, the cable type of
6341 * the port is SATA and the port implements ->scr_read.
6344 * None if @link is ap->link. Kernel thread context otherwise.
6347 * 0 on success, negative errno on failure.
6349 int sata_scr_read(struct ata_link *link, int reg, u32 *val)
6351 if (ata_is_host_link(link)) {
6352 struct ata_port *ap = link->ap;
6354 if (sata_scr_valid(link))
6355 return ap->ops->scr_read(ap, reg, val);
6359 return sata_pmp_scr_read(link, reg, val);
6363 * sata_scr_write - write SCR register of the specified port
6364 * @link: ATA link to write SCR for
6365 * @reg: SCR to write
6366 * @val: value to write
6368 * Write @val to SCR register @reg of @link. This function is
6369 * guaranteed to succeed if @link is ap->link, the cable type of
6370 * the port is SATA and the port implements ->scr_read.
6373 * None if @link is ap->link. Kernel thread context otherwise.
6376 * 0 on success, negative errno on failure.
6378 int sata_scr_write(struct ata_link *link, int reg, u32 val)
6380 if (ata_is_host_link(link)) {
6381 struct ata_port *ap = link->ap;
6383 if (sata_scr_valid(link))
6384 return ap->ops->scr_write(ap, reg, val);
6388 return sata_pmp_scr_write(link, reg, val);
6392 * sata_scr_write_flush - write SCR register of the specified port and flush
6393 * @link: ATA link to write SCR for
6394 * @reg: SCR to write
6395 * @val: value to write
6397 * This function is identical to sata_scr_write() except that this
6398 * function performs flush after writing to the register.
6401 * None if @link is ap->link. Kernel thread context otherwise.
6404 * 0 on success, negative errno on failure.
6406 int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
6408 if (ata_is_host_link(link)) {
6409 struct ata_port *ap = link->ap;
6412 if (sata_scr_valid(link)) {
6413 rc = ap->ops->scr_write(ap, reg, val);
6415 rc = ap->ops->scr_read(ap, reg, &val);
6421 return sata_pmp_scr_write(link, reg, val);
6425 * ata_link_online - test whether the given link is online
6426 * @link: ATA link to test
6428 * Test whether @link is online. Note that this function returns
6429 * 0 if online status of @link cannot be obtained, so
6430 * ata_link_online(link) != !ata_link_offline(link).
6436 * 1 if the port online status is available and online.
6438 int ata_link_online(struct ata_link *link)
6442 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6443 (sstatus & 0xf) == 0x3)
6449 * ata_link_offline - test whether the given link is offline
6450 * @link: ATA link to test
6452 * Test whether @link is offline. Note that this function
6453 * returns 0 if offline status of @link cannot be obtained, so
6454 * ata_link_online(link) != !ata_link_offline(link).
6460 * 1 if the port offline status is available and offline.
6462 int ata_link_offline(struct ata_link *link)
6466 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
6467 (sstatus & 0xf) != 0x3)
6472 int ata_flush_cache(struct ata_device *dev)
6474 unsigned int err_mask;
6477 if (!ata_try_flush_cache(dev))
6480 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
6481 cmd = ATA_CMD_FLUSH_EXT;
6483 cmd = ATA_CMD_FLUSH;
6485 /* This is wrong. On a failed flush we get back the LBA of the lost
6486 sector and we should (assuming it wasn't aborted as unknown) issue
6487 a further flush command to continue the writeback until it
6489 err_mask = ata_do_simple_cmd(dev, cmd);
6491 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
6499 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
6500 unsigned int action, unsigned int ehi_flags,
6503 unsigned long flags;
6506 for (i = 0; i < host->n_ports; i++) {
6507 struct ata_port *ap = host->ports[i];
6508 struct ata_link *link;
6510 /* Previous resume operation might still be in
6511 * progress. Wait for PM_PENDING to clear.
6513 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
6514 ata_port_wait_eh(ap);
6515 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6518 /* request PM ops to EH */
6519 spin_lock_irqsave(ap->lock, flags);
6524 ap->pm_result = &rc;
6527 ap->pflags |= ATA_PFLAG_PM_PENDING;
6528 __ata_port_for_each_link(link, ap) {
6529 link->eh_info.action |= action;
6530 link->eh_info.flags |= ehi_flags;
6533 ata_port_schedule_eh(ap);
6535 spin_unlock_irqrestore(ap->lock, flags);
6537 /* wait and check result */
6539 ata_port_wait_eh(ap);
6540 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
6550 * ata_host_suspend - suspend host
6551 * @host: host to suspend
6554 * Suspend @host. Actual operation is performed by EH. This
6555 * function requests EH to perform PM operations and waits for EH
6559 * Kernel thread context (may sleep).
6562 * 0 on success, -errno on failure.
6564 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
6569 * disable link pm on all ports before requesting
6572 ata_lpm_enable(host);
6574 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
6576 host->dev->power.power_state = mesg;
6581 * ata_host_resume - resume host
6582 * @host: host to resume
6584 * Resume @host. Actual operation is performed by EH. This
6585 * function requests EH to perform PM operations and returns.
6586 * Note that all resume operations are performed parallely.
6589 * Kernel thread context (may sleep).
6591 void ata_host_resume(struct ata_host *host)
6593 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
6594 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
6595 host->dev->power.power_state = PMSG_ON;
6597 /* reenable link pm */
6598 ata_lpm_disable(host);
6603 * ata_port_start - Set port up for dma.
6604 * @ap: Port to initialize
6606 * Called just after data structures for each port are
6607 * initialized. Allocates space for PRD table.
6609 * May be used as the port_start() entry in ata_port_operations.
6612 * Inherited from caller.
6614 int ata_port_start(struct ata_port *ap)
6616 struct device *dev = ap->dev;
6619 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
6624 rc = ata_pad_alloc(ap, dev);
6628 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
6629 (unsigned long long)ap->prd_dma);
6634 * ata_dev_init - Initialize an ata_device structure
6635 * @dev: Device structure to initialize
6637 * Initialize @dev in preparation for probing.
6640 * Inherited from caller.
6642 void ata_dev_init(struct ata_device *dev)
6644 struct ata_link *link = dev->link;
6645 struct ata_port *ap = link->ap;
6646 unsigned long flags;
6648 /* SATA spd limit is bound to the first device */
6649 link->sata_spd_limit = link->hw_sata_spd_limit;
6652 /* High bits of dev->flags are used to record warm plug
6653 * requests which occur asynchronously. Synchronize using
6656 spin_lock_irqsave(ap->lock, flags);
6657 dev->flags &= ~ATA_DFLAG_INIT_MASK;
6659 spin_unlock_irqrestore(ap->lock, flags);
6661 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
6662 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
6663 dev->pio_mask = UINT_MAX;
6664 dev->mwdma_mask = UINT_MAX;
6665 dev->udma_mask = UINT_MAX;
6669 * ata_link_init - Initialize an ata_link structure
6670 * @ap: ATA port link is attached to
6671 * @link: Link structure to initialize
6672 * @pmp: Port multiplier port number
6677 * Kernel thread context (may sleep)
6679 void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
6683 /* clear everything except for devices */
6684 memset(link, 0, offsetof(struct ata_link, device[0]));
6688 link->active_tag = ATA_TAG_POISON;
6689 link->hw_sata_spd_limit = UINT_MAX;
6691 /* can't use iterator, ap isn't initialized yet */
6692 for (i = 0; i < ATA_MAX_DEVICES; i++) {
6693 struct ata_device *dev = &link->device[i];
6696 dev->devno = dev - link->device;
6702 * sata_link_init_spd - Initialize link->sata_spd_limit
6703 * @link: Link to configure sata_spd_limit for
6705 * Initialize @link->[hw_]sata_spd_limit to the currently
6709 * Kernel thread context (may sleep).
6712 * 0 on success, -errno on failure.
6714 int sata_link_init_spd(struct ata_link *link)
6719 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
6723 spd = (scontrol >> 4) & 0xf;
6725 link->hw_sata_spd_limit &= (1 << spd) - 1;
6727 link->sata_spd_limit = link->hw_sata_spd_limit;
6733 * ata_port_alloc - allocate and initialize basic ATA port resources
6734 * @host: ATA host this allocated port belongs to
6736 * Allocate and initialize basic ATA port resources.
6739 * Allocate ATA port on success, NULL on failure.
6742 * Inherited from calling layer (may sleep).
6744 struct ata_port *ata_port_alloc(struct ata_host *host)
6746 struct ata_port *ap;
6750 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
6754 ap->pflags |= ATA_PFLAG_INITIALIZING;
6755 ap->lock = &host->lock;
6756 ap->flags = ATA_FLAG_DISABLED;
6758 ap->ctl = ATA_DEVCTL_OBS;
6760 ap->dev = host->dev;
6761 ap->last_ctl = 0xFF;
6763 #if defined(ATA_VERBOSE_DEBUG)
6764 /* turn on all debugging levels */
6765 ap->msg_enable = 0x00FF;
6766 #elif defined(ATA_DEBUG)
6767 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
6769 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
6772 INIT_DELAYED_WORK(&ap->port_task, NULL);
6773 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
6774 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6775 INIT_LIST_HEAD(&ap->eh_done_q);
6776 init_waitqueue_head(&ap->eh_wait_q);
6777 init_timer_deferrable(&ap->fastdrain_timer);
6778 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
6779 ap->fastdrain_timer.data = (unsigned long)ap;
6781 ap->cbl = ATA_CBL_NONE;
6783 ata_link_init(ap, &ap->link, 0);
6786 ap->stats.unhandled_irq = 1;
6787 ap->stats.idle_irq = 1;
6792 static void ata_host_release(struct device *gendev, void *res)
6794 struct ata_host *host = dev_get_drvdata(gendev);
6797 for (i = 0; i < host->n_ports; i++) {
6798 struct ata_port *ap = host->ports[i];
6803 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop)
6804 ap->ops->port_stop(ap);
6807 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop)
6808 host->ops->host_stop(host);
6810 for (i = 0; i < host->n_ports; i++) {
6811 struct ata_port *ap = host->ports[i];
6817 scsi_host_put(ap->scsi_host);
6819 kfree(ap->pmp_link);
6821 host->ports[i] = NULL;
6824 dev_set_drvdata(gendev, NULL);
6828 * ata_host_alloc - allocate and init basic ATA host resources
6829 * @dev: generic device this host is associated with
6830 * @max_ports: maximum number of ATA ports associated with this host
6832 * Allocate and initialize basic ATA host resources. LLD calls
6833 * this function to allocate a host, initializes it fully and
6834 * attaches it using ata_host_register().
6836 * @max_ports ports are allocated and host->n_ports is
6837 * initialized to @max_ports. The caller is allowed to decrease
6838 * host->n_ports before calling ata_host_register(). The unused
6839 * ports will be automatically freed on registration.
6842 * Allocate ATA host on success, NULL on failure.
6845 * Inherited from calling layer (may sleep).
6847 struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6849 struct ata_host *host;
6855 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6858 /* alloc a container for our list of ATA ports (buses) */
6859 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6860 /* alloc a container for our list of ATA ports (buses) */
6861 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6865 devres_add(dev, host);
6866 dev_set_drvdata(dev, host);
6868 spin_lock_init(&host->lock);
6870 host->n_ports = max_ports;
6872 /* allocate ports bound to this host */
6873 for (i = 0; i < max_ports; i++) {
6874 struct ata_port *ap;
6876 ap = ata_port_alloc(host);
6881 host->ports[i] = ap;
6884 devres_remove_group(dev, NULL);
6888 devres_release_group(dev, NULL);
6893 * ata_host_alloc_pinfo - alloc host and init with port_info array
6894 * @dev: generic device this host is associated with
6895 * @ppi: array of ATA port_info to initialize host with
6896 * @n_ports: number of ATA ports attached to this host
6898 * Allocate ATA host and initialize with info from @ppi. If NULL
6899 * terminated, @ppi may contain fewer entries than @n_ports. The
6900 * last entry will be used for the remaining ports.
6903 * Allocate ATA host on success, NULL on failure.
6906 * Inherited from calling layer (may sleep).
6908 struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6909 const struct ata_port_info * const * ppi,
6912 const struct ata_port_info *pi;
6913 struct ata_host *host;
6916 host = ata_host_alloc(dev, n_ports);
6920 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6921 struct ata_port *ap = host->ports[i];
6926 ap->pio_mask = pi->pio_mask;
6927 ap->mwdma_mask = pi->mwdma_mask;
6928 ap->udma_mask = pi->udma_mask;
6929 ap->flags |= pi->flags;
6930 ap->link.flags |= pi->link_flags;
6931 ap->ops = pi->port_ops;
6933 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
6934 host->ops = pi->port_ops;
6935 if (!host->private_data && pi->private_data)
6936 host->private_data = pi->private_data;
6943 * ata_host_start - start and freeze ports of an ATA host
6944 * @host: ATA host to start ports for
6946 * Start and then freeze ports of @host. Started status is
6947 * recorded in host->flags, so this function can be called
6948 * multiple times. Ports are guaranteed to get started only
6949 * once. If host->ops isn't initialized yet, its set to the
6950 * first non-dummy port ops.
6953 * Inherited from calling layer (may sleep).
6956 * 0 if all ports are started successfully, -errno otherwise.
6958 int ata_host_start(struct ata_host *host)
6962 if (host->flags & ATA_HOST_STARTED)
6965 for (i = 0; i < host->n_ports; i++) {
6966 struct ata_port *ap = host->ports[i];
6968 if (!host->ops && !ata_port_is_dummy(ap))
6969 host->ops = ap->ops;
6971 if (ap->ops->port_start) {
6972 rc = ap->ops->port_start(ap);
6974 ata_port_printk(ap, KERN_ERR, "failed to "
6975 "start port (errno=%d)\n", rc);
6980 ata_eh_freeze_port(ap);
6983 host->flags |= ATA_HOST_STARTED;
6988 struct ata_port *ap = host->ports[i];
6990 if (ap->ops->port_stop)
6991 ap->ops->port_stop(ap);
6997 * ata_sas_host_init - Initialize a host struct
6998 * @host: host to initialize
6999 * @dev: device host is attached to
7000 * @flags: host flags
7004 * PCI/etc. bus probe sem.
7007 /* KILLME - the only user left is ipr */
7008 void ata_host_init(struct ata_host *host, struct device *dev,
7009 unsigned long flags, const struct ata_port_operations *ops)
7011 spin_lock_init(&host->lock);
7013 host->flags = flags;
7018 * ata_host_register - register initialized ATA host
7019 * @host: ATA host to register
7020 * @sht: template for SCSI host
7022 * Register initialized ATA host. @host is allocated using
7023 * ata_host_alloc() and fully initialized by LLD. This function
7024 * starts ports, registers @host with ATA and SCSI layers and
7025 * probe registered devices.
7028 * Inherited from calling layer (may sleep).
7031 * 0 on success, -errno otherwise.
7033 int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
7037 /* host must have been started */
7038 if (!(host->flags & ATA_HOST_STARTED)) {
7039 dev_printk(KERN_ERR, host->dev,
7040 "BUG: trying to register unstarted host\n");
7045 /* Blow away unused ports. This happens when LLD can't
7046 * determine the exact number of ports to allocate at
7049 for (i = host->n_ports; host->ports[i]; i++)
7050 kfree(host->ports[i]);
7052 /* give ports names and add SCSI hosts */
7053 for (i = 0; i < host->n_ports; i++)
7054 host->ports[i]->print_id = ata_print_id++;
7056 rc = ata_scsi_add_hosts(host, sht);
7060 /* associate with ACPI nodes */
7061 ata_acpi_associate(host);
7063 /* set cable, sata_spd_limit and report */
7064 for (i = 0; i < host->n_ports; i++) {
7065 struct ata_port *ap = host->ports[i];
7066 unsigned long xfer_mask;
7068 /* set SATA cable type if still unset */
7069 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
7070 ap->cbl = ATA_CBL_SATA;
7072 /* init sata_spd_limit to the current value */
7073 sata_link_init_spd(&ap->link);
7075 /* print per-port info to dmesg */
7076 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
7079 if (!ata_port_is_dummy(ap)) {
7080 ata_port_printk(ap, KERN_INFO,
7081 "%cATA max %s %s\n",
7082 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
7083 ata_mode_string(xfer_mask),
7084 ap->link.eh_info.desc);
7085 ata_ehi_clear_desc(&ap->link.eh_info);
7087 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
7090 /* perform each probe synchronously */
7091 DPRINTK("probe begin\n");
7092 for (i = 0; i < host->n_ports; i++) {
7093 struct ata_port *ap = host->ports[i];
7097 if (ap->ops->error_handler) {
7098 struct ata_eh_info *ehi = &ap->link.eh_info;
7099 unsigned long flags;
7103 /* kick EH for boot probing */
7104 spin_lock_irqsave(ap->lock, flags);
7107 (1 << ata_link_max_devices(&ap->link)) - 1;
7108 ehi->action |= ATA_EH_SOFTRESET;
7109 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
7111 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
7112 ap->pflags |= ATA_PFLAG_LOADING;
7113 ata_port_schedule_eh(ap);
7115 spin_unlock_irqrestore(ap->lock, flags);
7117 /* wait for EH to finish */
7118 ata_port_wait_eh(ap);
7120 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
7121 rc = ata_bus_probe(ap);
7122 DPRINTK("ata%u: bus probe end\n", ap->print_id);
7125 /* FIXME: do something useful here?
7126 * Current libata behavior will
7127 * tear down everything when
7128 * the module is removed
7129 * or the h/w is unplugged.
7135 /* probes are done, now scan each port's disk(s) */
7136 DPRINTK("host probe begin\n");
7137 for (i = 0; i < host->n_ports; i++) {
7138 struct ata_port *ap = host->ports[i];
7140 ata_scsi_scan_host(ap, 1);
7141 ata_lpm_schedule(ap, ap->pm_policy);
7148 * ata_host_activate - start host, request IRQ and register it
7149 * @host: target ATA host
7150 * @irq: IRQ to request
7151 * @irq_handler: irq_handler used when requesting IRQ
7152 * @irq_flags: irq_flags used when requesting IRQ
7153 * @sht: scsi_host_template to use when registering the host
7155 * After allocating an ATA host and initializing it, most libata
7156 * LLDs perform three steps to activate the host - start host,
7157 * request IRQ and register it. This helper takes necessasry
7158 * arguments and performs the three steps in one go.
7161 * Inherited from calling layer (may sleep).
7164 * 0 on success, -errno otherwise.
7166 int ata_host_activate(struct ata_host *host, int irq,
7167 irq_handler_t irq_handler, unsigned long irq_flags,
7168 struct scsi_host_template *sht)
7172 rc = ata_host_start(host);
7176 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
7177 dev_driver_string(host->dev), host);
7181 for (i = 0; i < host->n_ports; i++)
7182 ata_port_desc(host->ports[i], "irq %d", irq);
7184 rc = ata_host_register(host, sht);
7185 /* if failed, just free the IRQ and leave ports alone */
7187 devm_free_irq(host->dev, irq, host);
7193 * ata_port_detach - Detach ATA port in prepration of device removal
7194 * @ap: ATA port to be detached
7196 * Detach all ATA devices and the associated SCSI devices of @ap;
7197 * then, remove the associated SCSI host. @ap is guaranteed to
7198 * be quiescent on return from this function.
7201 * Kernel thread context (may sleep).
7203 static void ata_port_detach(struct ata_port *ap)
7205 unsigned long flags;
7206 struct ata_link *link;
7207 struct ata_device *dev;
7209 if (!ap->ops->error_handler)
7212 /* tell EH we're leaving & flush EH */
7213 spin_lock_irqsave(ap->lock, flags);
7214 ap->pflags |= ATA_PFLAG_UNLOADING;
7215 spin_unlock_irqrestore(ap->lock, flags);
7217 ata_port_wait_eh(ap);
7219 /* EH is now guaranteed to see UNLOADING, so no new device
7220 * will be attached. Disable all existing devices.
7222 spin_lock_irqsave(ap->lock, flags);
7224 ata_port_for_each_link(link, ap) {
7225 ata_link_for_each_dev(dev, link)
7226 ata_dev_disable(dev);
7229 spin_unlock_irqrestore(ap->lock, flags);
7231 /* Final freeze & EH. All in-flight commands are aborted. EH
7232 * will be skipped and retrials will be terminated with bad
7235 spin_lock_irqsave(ap->lock, flags);
7236 ata_port_freeze(ap); /* won't be thawed */
7237 spin_unlock_irqrestore(ap->lock, flags);
7239 ata_port_wait_eh(ap);
7240 cancel_rearming_delayed_work(&ap->hotplug_task);
7243 /* remove the associated SCSI host */
7244 scsi_remove_host(ap->scsi_host);
7248 * ata_host_detach - Detach all ports of an ATA host
7249 * @host: Host to detach
7251 * Detach all ports of @host.
7254 * Kernel thread context (may sleep).
7256 void ata_host_detach(struct ata_host *host)
7260 for (i = 0; i < host->n_ports; i++)
7261 ata_port_detach(host->ports[i]);
7265 * ata_std_ports - initialize ioaddr with standard port offsets.
7266 * @ioaddr: IO address structure to be initialized
7268 * Utility function which initializes data_addr, error_addr,
7269 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
7270 * device_addr, status_addr, and command_addr to standard offsets
7271 * relative to cmd_addr.
7273 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
7276 void ata_std_ports(struct ata_ioports *ioaddr)
7278 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
7279 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
7280 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
7281 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
7282 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
7283 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
7284 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
7285 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
7286 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
7287 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
7294 * ata_pci_remove_one - PCI layer callback for device removal
7295 * @pdev: PCI device that was removed
7297 * PCI layer indicates to libata via this hook that hot-unplug or
7298 * module unload event has occurred. Detach all ports. Resource
7299 * release is handled via devres.
7302 * Inherited from PCI layer (may sleep).
7304 void ata_pci_remove_one(struct pci_dev *pdev)
7306 struct device *dev = &pdev->dev;
7307 struct ata_host *host = dev_get_drvdata(dev);
7309 ata_host_detach(host);
7312 /* move to PCI subsystem */
7313 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
7315 unsigned long tmp = 0;
7317 switch (bits->width) {
7320 pci_read_config_byte(pdev, bits->reg, &tmp8);
7326 pci_read_config_word(pdev, bits->reg, &tmp16);
7332 pci_read_config_dword(pdev, bits->reg, &tmp32);
7343 return (tmp == bits->val) ? 1 : 0;
7347 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
7349 pci_save_state(pdev);
7350 pci_disable_device(pdev);
7352 if (mesg.event == PM_EVENT_SUSPEND)
7353 pci_set_power_state(pdev, PCI_D3hot);
7356 int ata_pci_device_do_resume(struct pci_dev *pdev)
7360 pci_set_power_state(pdev, PCI_D0);
7361 pci_restore_state(pdev);
7363 rc = pcim_enable_device(pdev);
7365 dev_printk(KERN_ERR, &pdev->dev,
7366 "failed to enable device after resume (%d)\n", rc);
7370 pci_set_master(pdev);
7374 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
7376 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7379 rc = ata_host_suspend(host, mesg);
7383 ata_pci_device_do_suspend(pdev, mesg);
7388 int ata_pci_device_resume(struct pci_dev *pdev)
7390 struct ata_host *host = dev_get_drvdata(&pdev->dev);
7393 rc = ata_pci_device_do_resume(pdev);
7395 ata_host_resume(host);
7398 #endif /* CONFIG_PM */
7400 #endif /* CONFIG_PCI */
7403 static int __init ata_init(void)
7405 ata_probe_timeout *= HZ;
7406 ata_wq = create_workqueue("ata");
7410 ata_aux_wq = create_singlethread_workqueue("ata_aux");
7412 destroy_workqueue(ata_wq);
7416 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
7420 static void __exit ata_exit(void)
7422 destroy_workqueue(ata_wq);
7423 destroy_workqueue(ata_aux_wq);
7426 subsys_initcall(ata_init);
7427 module_exit(ata_exit);
7429 static unsigned long ratelimit_time;
7430 static DEFINE_SPINLOCK(ata_ratelimit_lock);
7432 int ata_ratelimit(void)
7435 unsigned long flags;
7437 spin_lock_irqsave(&ata_ratelimit_lock, flags);
7439 if (time_after(jiffies, ratelimit_time)) {
7441 ratelimit_time = jiffies + (HZ/5);
7445 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
7451 * ata_wait_register - wait until register value changes
7452 * @reg: IO-mapped register
7453 * @mask: Mask to apply to read register value
7454 * @val: Wait condition
7455 * @interval_msec: polling interval in milliseconds
7456 * @timeout_msec: timeout in milliseconds
7458 * Waiting for some bits of register to change is a common
7459 * operation for ATA controllers. This function reads 32bit LE
7460 * IO-mapped register @reg and tests for the following condition.
7462 * (*@reg & mask) != val
7464 * If the condition is met, it returns; otherwise, the process is
7465 * repeated after @interval_msec until timeout.
7468 * Kernel thread context (may sleep)
7471 * The final register value.
7473 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
7474 unsigned long interval_msec,
7475 unsigned long timeout_msec)
7477 unsigned long timeout;
7480 tmp = ioread32(reg);
7482 /* Calculate timeout _after_ the first read to make sure
7483 * preceding writes reach the controller before starting to
7484 * eat away the timeout.
7486 timeout = jiffies + (timeout_msec * HZ) / 1000;
7488 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
7489 msleep(interval_msec);
7490 tmp = ioread32(reg);
7499 static void ata_dummy_noret(struct ata_port *ap) { }
7500 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
7501 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
7503 static u8 ata_dummy_check_status(struct ata_port *ap)
7508 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
7510 return AC_ERR_SYSTEM;
7513 const struct ata_port_operations ata_dummy_port_ops = {
7514 .check_status = ata_dummy_check_status,
7515 .check_altstatus = ata_dummy_check_status,
7516 .dev_select = ata_noop_dev_select,
7517 .qc_prep = ata_noop_qc_prep,
7518 .qc_issue = ata_dummy_qc_issue,
7519 .freeze = ata_dummy_noret,
7520 .thaw = ata_dummy_noret,
7521 .error_handler = ata_dummy_noret,
7522 .post_internal_cmd = ata_dummy_qc_noret,
7523 .irq_clear = ata_dummy_noret,
7524 .port_start = ata_dummy_ret0,
7525 .port_stop = ata_dummy_noret,
7528 const struct ata_port_info ata_dummy_port_info = {
7529 .port_ops = &ata_dummy_port_ops,
7533 * libata is essentially a library of internal helper functions for
7534 * low-level ATA host controller drivers. As such, the API/ABI is
7535 * likely to change as new drivers are added and updated.
7536 * Do not depend on ABI/API stability.
7538 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
7539 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
7540 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
7541 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
7542 EXPORT_SYMBOL_GPL(ata_dummy_port_info);
7543 EXPORT_SYMBOL_GPL(ata_std_bios_param);
7544 EXPORT_SYMBOL_GPL(ata_std_ports);
7545 EXPORT_SYMBOL_GPL(ata_host_init);
7546 EXPORT_SYMBOL_GPL(ata_host_alloc);
7547 EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
7548 EXPORT_SYMBOL_GPL(ata_host_start);
7549 EXPORT_SYMBOL_GPL(ata_host_register);
7550 EXPORT_SYMBOL_GPL(ata_host_activate);
7551 EXPORT_SYMBOL_GPL(ata_host_detach);
7552 EXPORT_SYMBOL_GPL(ata_sg_init);
7553 EXPORT_SYMBOL_GPL(ata_sg_init_one);
7554 EXPORT_SYMBOL_GPL(ata_hsm_move);
7555 EXPORT_SYMBOL_GPL(ata_qc_complete);
7556 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
7557 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
7558 EXPORT_SYMBOL_GPL(ata_tf_load);
7559 EXPORT_SYMBOL_GPL(ata_tf_read);
7560 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
7561 EXPORT_SYMBOL_GPL(ata_std_dev_select);
7562 EXPORT_SYMBOL_GPL(sata_print_link_status);
7563 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
7564 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
7565 EXPORT_SYMBOL_GPL(ata_check_status);
7566 EXPORT_SYMBOL_GPL(ata_altstatus);
7567 EXPORT_SYMBOL_GPL(ata_exec_command);
7568 EXPORT_SYMBOL_GPL(ata_port_start);
7569 EXPORT_SYMBOL_GPL(ata_sff_port_start);
7570 EXPORT_SYMBOL_GPL(ata_interrupt);
7571 EXPORT_SYMBOL_GPL(ata_do_set_mode);
7572 EXPORT_SYMBOL_GPL(ata_data_xfer);
7573 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
7574 EXPORT_SYMBOL_GPL(ata_std_qc_defer);
7575 EXPORT_SYMBOL_GPL(ata_qc_prep);
7576 EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);
7577 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
7578 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
7579 EXPORT_SYMBOL_GPL(ata_bmdma_start);
7580 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
7581 EXPORT_SYMBOL_GPL(ata_bmdma_status);
7582 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
7583 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
7584 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
7585 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
7586 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
7587 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
7588 EXPORT_SYMBOL_GPL(ata_port_probe);
7589 EXPORT_SYMBOL_GPL(ata_dev_disable);
7590 EXPORT_SYMBOL_GPL(sata_set_spd);
7591 EXPORT_SYMBOL_GPL(sata_link_debounce);
7592 EXPORT_SYMBOL_GPL(sata_link_resume);
7593 EXPORT_SYMBOL_GPL(sata_phy_reset);
7594 EXPORT_SYMBOL_GPL(__sata_phy_reset);
7595 EXPORT_SYMBOL_GPL(ata_bus_reset);
7596 EXPORT_SYMBOL_GPL(ata_std_prereset);
7597 EXPORT_SYMBOL_GPL(ata_std_softreset);
7598 EXPORT_SYMBOL_GPL(sata_link_hardreset);
7599 EXPORT_SYMBOL_GPL(sata_std_hardreset);
7600 EXPORT_SYMBOL_GPL(ata_std_postreset);
7601 EXPORT_SYMBOL_GPL(ata_dev_classify);
7602 EXPORT_SYMBOL_GPL(ata_dev_pair);
7603 EXPORT_SYMBOL_GPL(ata_port_disable);
7604 EXPORT_SYMBOL_GPL(ata_ratelimit);
7605 EXPORT_SYMBOL_GPL(ata_wait_register);
7606 EXPORT_SYMBOL_GPL(ata_busy_sleep);
7607 EXPORT_SYMBOL_GPL(ata_wait_after_reset);
7608 EXPORT_SYMBOL_GPL(ata_wait_ready);
7609 EXPORT_SYMBOL_GPL(ata_port_queue_task);
7610 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
7611 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
7612 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
7613 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
7614 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
7615 EXPORT_SYMBOL_GPL(ata_host_intr);
7616 EXPORT_SYMBOL_GPL(sata_scr_valid);
7617 EXPORT_SYMBOL_GPL(sata_scr_read);
7618 EXPORT_SYMBOL_GPL(sata_scr_write);
7619 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
7620 EXPORT_SYMBOL_GPL(ata_link_online);
7621 EXPORT_SYMBOL_GPL(ata_link_offline);
7623 EXPORT_SYMBOL_GPL(ata_host_suspend);
7624 EXPORT_SYMBOL_GPL(ata_host_resume);
7625 #endif /* CONFIG_PM */
7626 EXPORT_SYMBOL_GPL(ata_id_string);
7627 EXPORT_SYMBOL_GPL(ata_id_c_string);
7628 EXPORT_SYMBOL_GPL(ata_id_to_dma_mode);
7629 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
7631 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
7632 EXPORT_SYMBOL_GPL(ata_timing_compute);
7633 EXPORT_SYMBOL_GPL(ata_timing_merge);
7636 EXPORT_SYMBOL_GPL(pci_test_config_bits);
7637 EXPORT_SYMBOL_GPL(ata_pci_init_sff_host);
7638 EXPORT_SYMBOL_GPL(ata_pci_init_bmdma);
7639 EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host);
7640 EXPORT_SYMBOL_GPL(ata_pci_init_one);
7641 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
7643 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
7644 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
7645 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
7646 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
7647 #endif /* CONFIG_PM */
7648 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
7649 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
7650 #endif /* CONFIG_PCI */
7652 EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch);
7653 EXPORT_SYMBOL_GPL(sata_pmp_std_prereset);
7654 EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset);
7655 EXPORT_SYMBOL_GPL(sata_pmp_std_postreset);
7656 EXPORT_SYMBOL_GPL(sata_pmp_do_eh);
7658 EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
7659 EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
7660 EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
7661 EXPORT_SYMBOL_GPL(ata_port_desc);
7663 EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
7664 #endif /* CONFIG_PCI */
7665 EXPORT_SYMBOL_GPL(ata_eng_timeout);
7666 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
7667 EXPORT_SYMBOL_GPL(ata_link_abort);
7668 EXPORT_SYMBOL_GPL(ata_port_abort);
7669 EXPORT_SYMBOL_GPL(ata_port_freeze);
7670 EXPORT_SYMBOL_GPL(sata_async_notification);
7671 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
7672 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
7673 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
7674 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
7675 EXPORT_SYMBOL_GPL(ata_do_eh);
7676 EXPORT_SYMBOL_GPL(ata_irq_on);
7677 EXPORT_SYMBOL_GPL(ata_dev_try_classify);
7679 EXPORT_SYMBOL_GPL(ata_cable_40wire);
7680 EXPORT_SYMBOL_GPL(ata_cable_80wire);
7681 EXPORT_SYMBOL_GPL(ata_cable_unknown);
7682 EXPORT_SYMBOL_GPL(ata_cable_sata);