2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/acpi.h>
39 #include <linux/dmi.h>
40 #include <linux/moduleparam.h>
41 #include <linux/sched.h> /* need_resched() */
42 #include <linux/pm_qos_params.h>
43 #include <linux/clockchips.h>
44 #include <linux/cpuidle.h>
45 #include <linux/irqflags.h>
48 * Include the apic definitions for x86 to have the APIC timer related defines
49 * available also for UP (on SMP it gets magically included via linux/smp.h).
50 * asm/acpi.h is not an option, as it would require more include magic. Also
51 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
58 #include <asm/uaccess.h>
60 #include <acpi/acpi_bus.h>
61 #include <acpi/processor.h>
62 #include <asm/processor.h>
64 #define PREFIX "ACPI: "
66 #define ACPI_PROCESSOR_CLASS "processor"
67 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
68 ACPI_MODULE_NAME("processor_idle");
69 #define ACPI_PROCESSOR_FILE_POWER "power"
70 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
71 #define C2_OVERHEAD 1 /* 1us */
72 #define C3_OVERHEAD 1 /* 1us */
73 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
75 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
76 module_param(max_cstate, uint, 0000);
77 static unsigned int nocst __read_mostly;
78 module_param(nocst, uint, 0000);
80 static unsigned int latency_factor __read_mostly = 2;
81 module_param(latency_factor, uint, 0644);
83 #ifdef CONFIG_ACPI_PROCFS
84 static u64 us_to_pm_timer_ticks(s64 t)
86 return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
91 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
92 * For now disable this. Probably a bug somewhere else.
94 * To skip this limit, boot/load with a large max_cstate limit.
96 static int set_max_cstate(const struct dmi_system_id *id)
98 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
101 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
102 " Override with \"processor.max_cstate=%d\"\n", id->ident,
103 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
105 max_cstate = (long)id->driver_data;
110 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
111 callers to only run once -AK */
112 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
113 { set_max_cstate, "Clevo 5600D", {
114 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
115 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
117 { set_max_cstate, "Pavilion zv5000", {
118 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
119 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
121 { set_max_cstate, "Asus L8400B", {
122 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
123 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
130 * Callers should disable interrupts before the call and enable
131 * interrupts after return.
133 static void acpi_safe_halt(void)
135 current_thread_info()->status &= ~TS_POLLING;
137 * TS_POLLING-cleared state must be visible before we
141 if (!need_resched()) {
145 current_thread_info()->status |= TS_POLLING;
148 #ifdef ARCH_APICTIMER_STOPS_ON_C3
151 * Some BIOS implementations switch to C3 in the published C2 state.
152 * This seems to be a common problem on AMD boxen, but other vendors
153 * are affected too. We pick the most conservative approach: we assume
154 * that the local APIC stops in both C2 and C3.
156 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
157 struct acpi_processor_cx *cx)
159 struct acpi_processor_power *pwr = &pr->power;
160 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
162 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
165 if (boot_cpu_has(X86_FEATURE_AMDC1E))
166 type = ACPI_STATE_C1;
169 * Check, if one of the previous states already marked the lapic
172 if (pwr->timer_broadcast_on_state < state)
175 if (cx->type >= type)
176 pr->power.timer_broadcast_on_state = state;
179 static void __lapic_timer_propagate_broadcast(void *arg)
181 struct acpi_processor *pr = (struct acpi_processor *) arg;
182 unsigned long reason;
184 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
185 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
187 clockevents_notify(reason, &pr->id);
190 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
192 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
196 /* Power(C) State timer broadcast control */
197 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
198 struct acpi_processor_cx *cx,
201 int state = cx - pr->power.states;
203 if (state >= pr->power.timer_broadcast_on_state) {
204 unsigned long reason;
206 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
207 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
208 clockevents_notify(reason, &pr->id);
214 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
215 struct acpi_processor_cx *cstate) { }
216 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
217 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
218 struct acpi_processor_cx *cx,
226 * Suspend / resume control
228 static int acpi_idle_suspend;
229 static u32 saved_bm_rld;
231 static void acpi_idle_bm_rld_save(void)
233 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
235 static void acpi_idle_bm_rld_restore(void)
239 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
241 if (resumed_bm_rld != saved_bm_rld)
242 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
245 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
247 if (acpi_idle_suspend == 1)
250 acpi_idle_bm_rld_save();
251 acpi_idle_suspend = 1;
255 int acpi_processor_resume(struct acpi_device * device)
257 if (acpi_idle_suspend == 0)
260 acpi_idle_bm_rld_restore();
261 acpi_idle_suspend = 0;
265 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
266 static void tsc_check_state(int state)
268 switch (boot_cpu_data.x86_vendor) {
270 case X86_VENDOR_INTEL:
272 * AMD Fam10h TSC will tick in all
273 * C/P/S0/S1 states when this bit is set.
275 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
280 /* TSC could halt in idle, so notify users */
281 if (state > ACPI_STATE_C1)
282 mark_tsc_unstable("TSC halts in idle");
286 static void tsc_check_state(int state) { return; }
289 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
298 /* if info is obtained from pblk/fadt, type equals state */
299 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
300 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
302 #ifndef CONFIG_HOTPLUG_CPU
304 * Check for P_LVL2_UP flag before entering C2 and above on
307 if ((num_online_cpus() > 1) &&
308 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
312 /* determine C2 and C3 address from pblk */
313 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
314 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
316 /* determine latencies from FADT */
317 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
318 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
321 * FADT specified C2 latency must be less than or equal to
324 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
325 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
326 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
328 pr->power.states[ACPI_STATE_C2].address = 0;
332 * FADT supplied C3 latency must be less than or equal to
335 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
336 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
337 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
339 pr->power.states[ACPI_STATE_C3].address = 0;
342 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
343 "lvl2[0x%08x] lvl3[0x%08x]\n",
344 pr->power.states[ACPI_STATE_C2].address,
345 pr->power.states[ACPI_STATE_C3].address));
350 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
352 if (!pr->power.states[ACPI_STATE_C1].valid) {
353 /* set the first C-State to C1 */
354 /* all processors need to support C1 */
355 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
356 pr->power.states[ACPI_STATE_C1].valid = 1;
357 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
359 /* the C0 state only exists as a filler in our array */
360 pr->power.states[ACPI_STATE_C0].valid = 1;
364 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
366 acpi_status status = 0;
370 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
371 union acpi_object *cst;
379 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
380 if (ACPI_FAILURE(status)) {
381 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
385 cst = buffer.pointer;
387 /* There must be at least 2 elements */
388 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
389 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
394 count = cst->package.elements[0].integer.value;
396 /* Validate number of power states. */
397 if (count < 1 || count != cst->package.count - 1) {
398 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
403 /* Tell driver that at least _CST is supported. */
404 pr->flags.has_cst = 1;
406 for (i = 1; i <= count; i++) {
407 union acpi_object *element;
408 union acpi_object *obj;
409 struct acpi_power_register *reg;
410 struct acpi_processor_cx cx;
412 memset(&cx, 0, sizeof(cx));
414 element = &(cst->package.elements[i]);
415 if (element->type != ACPI_TYPE_PACKAGE)
418 if (element->package.count != 4)
421 obj = &(element->package.elements[0]);
423 if (obj->type != ACPI_TYPE_BUFFER)
426 reg = (struct acpi_power_register *)obj->buffer.pointer;
428 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
429 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
432 /* There should be an easy way to extract an integer... */
433 obj = &(element->package.elements[1]);
434 if (obj->type != ACPI_TYPE_INTEGER)
437 cx.type = obj->integer.value;
439 * Some buggy BIOSes won't list C1 in _CST -
440 * Let acpi_processor_get_power_info_default() handle them later
442 if (i == 1 && cx.type != ACPI_STATE_C1)
445 cx.address = reg->address;
446 cx.index = current_count + 1;
448 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
449 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
450 if (acpi_processor_ffh_cstate_probe
451 (pr->id, &cx, reg) == 0) {
452 cx.entry_method = ACPI_CSTATE_FFH;
453 } else if (cx.type == ACPI_STATE_C1) {
455 * C1 is a special case where FIXED_HARDWARE
456 * can be handled in non-MWAIT way as well.
457 * In that case, save this _CST entry info.
458 * Otherwise, ignore this info and continue.
460 cx.entry_method = ACPI_CSTATE_HALT;
461 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
465 if (cx.type == ACPI_STATE_C1 &&
466 (idle_halt || idle_nomwait)) {
468 * In most cases the C1 space_id obtained from
469 * _CST object is FIXED_HARDWARE access mode.
470 * But when the option of idle=halt is added,
471 * the entry_method type should be changed from
472 * CSTATE_FFH to CSTATE_HALT.
473 * When the option of idle=nomwait is added,
474 * the C1 entry_method type should be
477 cx.entry_method = ACPI_CSTATE_HALT;
478 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
481 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
485 if (cx.type == ACPI_STATE_C1) {
489 obj = &(element->package.elements[2]);
490 if (obj->type != ACPI_TYPE_INTEGER)
493 cx.latency = obj->integer.value;
495 obj = &(element->package.elements[3]);
496 if (obj->type != ACPI_TYPE_INTEGER)
499 cx.power = obj->integer.value;
502 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
505 * We support total ACPI_PROCESSOR_MAX_POWER - 1
506 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
508 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
510 "Limiting number of power states to max (%d)\n",
511 ACPI_PROCESSOR_MAX_POWER);
513 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
518 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
521 /* Validate number of power states discovered */
522 if (current_count < 2)
526 kfree(buffer.pointer);
531 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
532 struct acpi_processor_cx *cx)
534 static int bm_check_flag = -1;
535 static int bm_control_flag = -1;
542 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
543 * DMA transfers are used by any ISA device to avoid livelock.
544 * Note that we could disable Type-F DMA (as recommended by
545 * the erratum), but this is known to disrupt certain ISA
546 * devices thus we take the conservative approach.
548 else if (errata.piix4.fdma) {
549 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
550 "C3 not supported on PIIX4 with Type-F DMA\n"));
554 /* All the logic here assumes flags.bm_check is same across all CPUs */
555 if (bm_check_flag == -1) {
556 /* Determine whether bm_check is needed based on CPU */
557 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
558 bm_check_flag = pr->flags.bm_check;
559 bm_control_flag = pr->flags.bm_control;
561 pr->flags.bm_check = bm_check_flag;
562 pr->flags.bm_control = bm_control_flag;
565 if (pr->flags.bm_check) {
566 if (!pr->flags.bm_control) {
567 if (pr->flags.has_cst != 1) {
568 /* bus mastering control is necessary */
569 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
570 "C3 support requires BM control\n"));
573 /* Here we enter C3 without bus mastering */
574 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
575 "C3 support without BM control\n"));
580 * WBINVD should be set in fadt, for C3 state to be
581 * supported on when bm_check is not required.
583 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
584 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
585 "Cache invalidation should work properly"
586 " for C3 to be enabled on SMP systems\n"));
592 * Otherwise we've met all of our C3 requirements.
593 * Normalize the C3 latency to expidite policy. Enable
594 * checking of bus mastering status (bm_check) so we can
595 * use this in our C3 policy
599 cx->latency_ticks = cx->latency;
601 * On older chipsets, BM_RLD needs to be set
602 * in order for Bus Master activity to wake the
603 * system from C3. Newer chipsets handle DMA
604 * during C3 automatically and BM_RLD is a NOP.
605 * In either case, the proper way to
606 * handle BM_RLD is to set it and leave it set.
608 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
613 static int acpi_processor_power_verify(struct acpi_processor *pr)
616 unsigned int working = 0;
618 pr->power.timer_broadcast_on_state = INT_MAX;
620 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
621 struct acpi_processor_cx *cx = &pr->power.states[i];
632 cx->latency_ticks = cx->latency; /* Normalize latency */
636 acpi_processor_power_verify_c3(pr, cx);
642 lapic_timer_check_state(i, pr, cx);
643 tsc_check_state(cx->type);
647 lapic_timer_propagate_broadcast(pr);
652 static int acpi_processor_get_power_info(struct acpi_processor *pr)
658 /* NOTE: the idle thread may not be running while calling
661 /* Zero initialize all the C-states info. */
662 memset(pr->power.states, 0, sizeof(pr->power.states));
664 result = acpi_processor_get_power_info_cst(pr);
665 if (result == -ENODEV)
666 result = acpi_processor_get_power_info_fadt(pr);
671 acpi_processor_get_power_info_default(pr);
673 pr->power.count = acpi_processor_power_verify(pr);
676 * if one state of type C2 or C3 is available, mark this
677 * CPU as being "idle manageable"
679 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
680 if (pr->power.states[i].valid) {
682 if (pr->power.states[i].type >= ACPI_STATE_C2)
690 #ifdef CONFIG_ACPI_PROCFS
691 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
693 struct acpi_processor *pr = seq->private;
700 seq_printf(seq, "active state: C%zd\n"
702 "maximum allowed latency: %d usec\n",
703 pr->power.state ? pr->power.state - pr->power.states : 0,
704 max_cstate, pm_qos_request(PM_QOS_CPU_DMA_LATENCY));
706 seq_puts(seq, "states:\n");
708 for (i = 1; i <= pr->power.count; i++) {
709 seq_printf(seq, " %cC%d: ",
710 (&pr->power.states[i] ==
711 pr->power.state ? '*' : ' '), i);
713 if (!pr->power.states[i].valid) {
714 seq_puts(seq, "<not supported>\n");
718 switch (pr->power.states[i].type) {
720 seq_printf(seq, "type[C1] ");
723 seq_printf(seq, "type[C2] ");
726 seq_printf(seq, "type[C3] ");
729 seq_printf(seq, "type[--] ");
733 seq_puts(seq, "promotion[--] ");
735 seq_puts(seq, "demotion[--] ");
737 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020Lu]\n",
738 pr->power.states[i].latency,
739 pr->power.states[i].usage,
740 us_to_pm_timer_ticks(pr->power.states[i].time));
747 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
749 return single_open(file, acpi_processor_power_seq_show,
753 static const struct file_operations acpi_processor_power_fops = {
754 .owner = THIS_MODULE,
755 .open = acpi_processor_power_open_fs,
758 .release = single_release,
763 * acpi_idle_bm_check - checks if bus master activity was detected
765 static int acpi_idle_bm_check(void)
769 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
771 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
773 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
774 * the true state of bus mastering activity; forcing us to
775 * manually check the BMIDEA bit of each IDE channel.
777 else if (errata.piix4.bmisx) {
778 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
779 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
786 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
789 * Caller disables interrupt before call and enables interrupt after return.
791 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
793 /* Don't trace irqs off for idle */
794 stop_critical_timings();
795 if (cx->entry_method == ACPI_CSTATE_FFH) {
796 /* Call into architectural FFH based C-state */
797 acpi_processor_ffh_cstate_enter(cx);
798 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
802 /* IO port based C-state */
804 /* Dummy wait op - must do something useless after P_LVL2 read
805 because chipsets cannot guarantee that STPCLK# signal
806 gets asserted in time to freeze execution properly. */
807 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
809 start_critical_timings();
813 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
814 * @dev: the target CPU
815 * @state: the state data
817 * This is equivalent to the HALT instruction.
819 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
820 struct cpuidle_state *state)
824 struct acpi_processor *pr;
825 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
827 pr = __get_cpu_var(processors);
834 /* Do not access any ACPI IO ports in suspend path */
835 if (acpi_idle_suspend) {
841 lapic_timer_state_broadcast(pr, cx, 1);
842 kt1 = ktime_get_real();
843 acpi_idle_do_entry(cx);
844 kt2 = ktime_get_real();
845 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
849 lapic_timer_state_broadcast(pr, cx, 0);
855 * acpi_idle_enter_simple - enters an ACPI state without BM handling
856 * @dev: the target CPU
857 * @state: the state data
859 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
860 struct cpuidle_state *state)
862 struct acpi_processor *pr;
863 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
868 pr = __get_cpu_var(processors);
873 if (acpi_idle_suspend)
874 return(acpi_idle_enter_c1(dev, state));
878 if (cx->entry_method != ACPI_CSTATE_FFH) {
879 current_thread_info()->status &= ~TS_POLLING;
881 * TS_POLLING-cleared state must be visible before we test
886 if (unlikely(need_resched())) {
887 current_thread_info()->status |= TS_POLLING;
894 * Must be done before busmaster disable as we might need to
897 lapic_timer_state_broadcast(pr, cx, 1);
899 if (cx->type == ACPI_STATE_C3)
900 ACPI_FLUSH_CPU_CACHE();
902 kt1 = ktime_get_real();
903 /* Tell the scheduler that we are going deep-idle: */
904 sched_clock_idle_sleep_event();
905 acpi_idle_do_entry(cx);
906 kt2 = ktime_get_real();
907 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
908 idle_time = idle_time_ns;
909 do_div(idle_time, NSEC_PER_USEC);
911 /* Tell the scheduler how much we idled: */
912 sched_clock_idle_wakeup_event(idle_time_ns);
915 if (cx->entry_method != ACPI_CSTATE_FFH)
916 current_thread_info()->status |= TS_POLLING;
920 lapic_timer_state_broadcast(pr, cx, 0);
921 cx->time += idle_time;
925 static int c3_cpu_count;
926 static DEFINE_SPINLOCK(c3_lock);
929 * acpi_idle_enter_bm - enters C3 with proper BM handling
930 * @dev: the target CPU
931 * @state: the state data
933 * If BM is detected, the deepest non-C3 idle state is entered instead.
935 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
936 struct cpuidle_state *state)
938 struct acpi_processor *pr;
939 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
945 pr = __get_cpu_var(processors);
950 if (acpi_idle_suspend)
951 return(acpi_idle_enter_c1(dev, state));
953 if (acpi_idle_bm_check()) {
954 if (dev->safe_state) {
955 dev->last_state = dev->safe_state;
956 return dev->safe_state->enter(dev, dev->safe_state);
967 if (cx->entry_method != ACPI_CSTATE_FFH) {
968 current_thread_info()->status &= ~TS_POLLING;
970 * TS_POLLING-cleared state must be visible before we test
975 if (unlikely(need_resched())) {
976 current_thread_info()->status |= TS_POLLING;
982 acpi_unlazy_tlb(smp_processor_id());
984 /* Tell the scheduler that we are going deep-idle: */
985 sched_clock_idle_sleep_event();
987 * Must be done before busmaster disable as we might need to
990 lapic_timer_state_broadcast(pr, cx, 1);
992 kt1 = ktime_get_real();
995 * bm_check implies we need ARB_DIS
996 * !bm_check implies we need cache flush
997 * bm_control implies whether we can do ARB_DIS
999 * That leaves a case where bm_check is set and bm_control is
1000 * not set. In that case we cannot do much, we enter C3
1001 * without doing anything.
1003 if (pr->flags.bm_check && pr->flags.bm_control) {
1004 spin_lock(&c3_lock);
1006 /* Disable bus master arbitration when all CPUs are in C3 */
1007 if (c3_cpu_count == num_online_cpus())
1008 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
1009 spin_unlock(&c3_lock);
1010 } else if (!pr->flags.bm_check) {
1011 ACPI_FLUSH_CPU_CACHE();
1014 acpi_idle_do_entry(cx);
1016 /* Re-enable bus master arbitration */
1017 if (pr->flags.bm_check && pr->flags.bm_control) {
1018 spin_lock(&c3_lock);
1019 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
1021 spin_unlock(&c3_lock);
1023 kt2 = ktime_get_real();
1024 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
1025 idle_time = idle_time_ns;
1026 do_div(idle_time, NSEC_PER_USEC);
1028 /* Tell the scheduler how much we idled: */
1029 sched_clock_idle_wakeup_event(idle_time_ns);
1032 if (cx->entry_method != ACPI_CSTATE_FFH)
1033 current_thread_info()->status |= TS_POLLING;
1037 lapic_timer_state_broadcast(pr, cx, 0);
1038 cx->time += idle_time;
1042 struct cpuidle_driver acpi_idle_driver = {
1043 .name = "acpi_idle",
1044 .owner = THIS_MODULE,
1048 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1049 * @pr: the ACPI processor
1051 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1053 int i, count = CPUIDLE_DRIVER_STATE_START;
1054 struct acpi_processor_cx *cx;
1055 struct cpuidle_state *state;
1056 struct cpuidle_device *dev = &pr->power.dev;
1058 if (!pr->flags.power_setup_done)
1061 if (pr->flags.power == 0) {
1066 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1067 dev->states[i].name[0] = '\0';
1068 dev->states[i].desc[0] = '\0';
1071 if (max_cstate == 0)
1074 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1075 cx = &pr->power.states[i];
1076 state = &dev->states[count];
1081 #ifdef CONFIG_HOTPLUG_CPU
1082 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1083 !pr->flags.has_cst &&
1084 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1087 cpuidle_set_statedata(state, cx);
1089 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1090 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1091 state->exit_latency = cx->latency;
1092 state->target_residency = cx->latency * latency_factor;
1093 state->power_usage = cx->power;
1098 state->flags |= CPUIDLE_FLAG_SHALLOW;
1099 if (cx->entry_method == ACPI_CSTATE_FFH)
1100 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1102 state->enter = acpi_idle_enter_c1;
1103 dev->safe_state = state;
1107 state->flags |= CPUIDLE_FLAG_BALANCED;
1108 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1109 state->enter = acpi_idle_enter_simple;
1110 dev->safe_state = state;
1114 state->flags |= CPUIDLE_FLAG_DEEP;
1115 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1116 state->flags |= CPUIDLE_FLAG_CHECK_BM;
1117 state->enter = pr->flags.bm_check ?
1118 acpi_idle_enter_bm :
1119 acpi_idle_enter_simple;
1124 if (count == CPUIDLE_STATE_MAX)
1128 dev->state_count = count;
1136 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1140 if (boot_option_idle_override)
1150 if (!pr->flags.power_setup_done)
1153 cpuidle_pause_and_lock();
1154 cpuidle_disable_device(&pr->power.dev);
1155 acpi_processor_get_power_info(pr);
1156 if (pr->flags.power) {
1157 acpi_processor_setup_cpuidle(pr);
1158 ret = cpuidle_enable_device(&pr->power.dev);
1160 cpuidle_resume_and_unlock();
1165 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1166 struct acpi_device *device)
1168 acpi_status status = 0;
1169 static int first_run;
1170 #ifdef CONFIG_ACPI_PROCFS
1171 struct proc_dir_entry *entry = NULL;
1174 if (boot_option_idle_override)
1180 * When the boot option of "idle=halt" is added, halt
1181 * is used for CPU IDLE.
1182 * In such case C2/C3 is meaningless. So the max_cstate
1187 dmi_check_system(processor_power_dmi_table);
1188 max_cstate = acpi_processor_cstate_check(max_cstate);
1189 if (max_cstate < ACPI_C_STATES_MAX)
1191 "ACPI: processor limited to max C-state %d\n",
1199 if (acpi_gbl_FADT.cst_control && !nocst) {
1201 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1202 if (ACPI_FAILURE(status)) {
1203 ACPI_EXCEPTION((AE_INFO, status,
1204 "Notifying BIOS of _CST ability failed"));
1208 acpi_processor_get_power_info(pr);
1209 pr->flags.power_setup_done = 1;
1212 * Install the idle handler if processor power management is supported.
1213 * Note that we use previously set idle handler will be used on
1214 * platforms that only support C1.
1216 if (pr->flags.power) {
1217 acpi_processor_setup_cpuidle(pr);
1218 if (cpuidle_register_device(&pr->power.dev))
1221 #ifdef CONFIG_ACPI_PROCFS
1223 entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1224 S_IRUGO, acpi_device_dir(device),
1225 &acpi_processor_power_fops,
1226 acpi_driver_data(device));
1233 int acpi_processor_power_exit(struct acpi_processor *pr,
1234 struct acpi_device *device)
1236 if (boot_option_idle_override)
1239 cpuidle_unregister_device(&pr->power.dev);
1240 pr->flags.power_setup_done = 0;
1242 #ifdef CONFIG_ACPI_PROCFS
1243 if (acpi_device_dir(device))
1244 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1245 acpi_device_dir(device));