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ACPI: fix unused function warning
[~andy/linux] / drivers / acpi / processor_idle.c
1 /*
2  * processor_idle - idle state submodule to the ACPI processor driver
3  *
4  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6  *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7  *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8  *                      - Added processor hotplug support
9  *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10  *                      - Added support for C3 on SMP
11  *
12  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13  *
14  *  This program is free software; you can redistribute it and/or modify
15  *  it under the terms of the GNU General Public License as published by
16  *  the Free Software Foundation; either version 2 of the License, or (at
17  *  your option) any later version.
18  *
19  *  This program is distributed in the hope that it will be useful, but
20  *  WITHOUT ANY WARRANTY; without even the implied warranty of
21  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
22  *  General Public License for more details.
23  *
24  *  You should have received a copy of the GNU General Public License along
25  *  with this program; if not, write to the Free Software Foundation, Inc.,
26  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27  *
28  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29  */
30
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/acpi.h>
39 #include <linux/dmi.h>
40 #include <linux/moduleparam.h>
41 #include <linux/sched.h>        /* need_resched() */
42 #include <linux/pm_qos_params.h>
43 #include <linux/clockchips.h>
44 #include <linux/cpuidle.h>
45 #include <linux/irqflags.h>
46
47 /*
48  * Include the apic definitions for x86 to have the APIC timer related defines
49  * available also for UP (on SMP it gets magically included via linux/smp.h).
50  * asm/acpi.h is not an option, as it would require more include magic. Also
51  * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
52  */
53 #ifdef CONFIG_X86
54 #include <asm/apic.h>
55 #endif
56
57 #include <asm/io.h>
58 #include <asm/uaccess.h>
59
60 #include <acpi/acpi_bus.h>
61 #include <acpi/processor.h>
62 #include <asm/processor.h>
63
64 #define PREFIX "ACPI: "
65
66 #define ACPI_PROCESSOR_CLASS            "processor"
67 #define _COMPONENT              ACPI_PROCESSOR_COMPONENT
68 ACPI_MODULE_NAME("processor_idle");
69 #define ACPI_PROCESSOR_FILE_POWER       "power"
70 #define PM_TIMER_TICK_NS                (1000000000ULL/PM_TIMER_FREQUENCY)
71 #define C2_OVERHEAD                     1       /* 1us */
72 #define C3_OVERHEAD                     1       /* 1us */
73 #define PM_TIMER_TICKS_TO_US(p)         (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
74
75 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
76 module_param(max_cstate, uint, 0000);
77 static unsigned int nocst __read_mostly;
78 module_param(nocst, uint, 0000);
79
80 static unsigned int latency_factor __read_mostly = 2;
81 module_param(latency_factor, uint, 0644);
82
83 #ifdef CONFIG_ACPI_PROCFS
84 static u64 us_to_pm_timer_ticks(s64 t)
85 {
86         return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
87 }
88 #endif
89
90 /*
91  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
92  * For now disable this. Probably a bug somewhere else.
93  *
94  * To skip this limit, boot/load with a large max_cstate limit.
95  */
96 static int set_max_cstate(const struct dmi_system_id *id)
97 {
98         if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
99                 return 0;
100
101         printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
102                " Override with \"processor.max_cstate=%d\"\n", id->ident,
103                (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
104
105         max_cstate = (long)id->driver_data;
106
107         return 0;
108 }
109
110 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
111    callers to only run once -AK */
112 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
113         { set_max_cstate, "Clevo 5600D", {
114           DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
115           DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
116          (void *)2},
117         { set_max_cstate, "Pavilion zv5000", {
118           DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
119           DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
120          (void *)1},
121         { set_max_cstate, "Asus L8400B", {
122           DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
123           DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
124          (void *)1},
125         {},
126 };
127
128
129 /*
130  * Callers should disable interrupts before the call and enable
131  * interrupts after return.
132  */
133 static void acpi_safe_halt(void)
134 {
135         current_thread_info()->status &= ~TS_POLLING;
136         /*
137          * TS_POLLING-cleared state must be visible before we
138          * test NEED_RESCHED:
139          */
140         smp_mb();
141         if (!need_resched()) {
142                 safe_halt();
143                 local_irq_disable();
144         }
145         current_thread_info()->status |= TS_POLLING;
146 }
147
148 #ifdef ARCH_APICTIMER_STOPS_ON_C3
149
150 /*
151  * Some BIOS implementations switch to C3 in the published C2 state.
152  * This seems to be a common problem on AMD boxen, but other vendors
153  * are affected too. We pick the most conservative approach: we assume
154  * that the local APIC stops in both C2 and C3.
155  */
156 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
157                                    struct acpi_processor_cx *cx)
158 {
159         struct acpi_processor_power *pwr = &pr->power;
160         u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
161
162         if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
163                 return;
164
165         if (boot_cpu_has(X86_FEATURE_AMDC1E))
166                 type = ACPI_STATE_C1;
167
168         /*
169          * Check, if one of the previous states already marked the lapic
170          * unstable
171          */
172         if (pwr->timer_broadcast_on_state < state)
173                 return;
174
175         if (cx->type >= type)
176                 pr->power.timer_broadcast_on_state = state;
177 }
178
179 static void __lapic_timer_propagate_broadcast(void *arg)
180 {
181         struct acpi_processor *pr = (struct acpi_processor *) arg;
182         unsigned long reason;
183
184         reason = pr->power.timer_broadcast_on_state < INT_MAX ?
185                 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
186
187         clockevents_notify(reason, &pr->id);
188 }
189
190 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
191 {
192         smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
193                                  (void *)pr, 1);
194 }
195
196 /* Power(C) State timer broadcast control */
197 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
198                                        struct acpi_processor_cx *cx,
199                                        int broadcast)
200 {
201         int state = cx - pr->power.states;
202
203         if (state >= pr->power.timer_broadcast_on_state) {
204                 unsigned long reason;
205
206                 reason = broadcast ?  CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
207                         CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
208                 clockevents_notify(reason, &pr->id);
209         }
210 }
211
212 #else
213
214 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
215                                    struct acpi_processor_cx *cstate) { }
216 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
217 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
218                                        struct acpi_processor_cx *cx,
219                                        int broadcast)
220 {
221 }
222
223 #endif
224
225 /*
226  * Suspend / resume control
227  */
228 static int acpi_idle_suspend;
229 static u32 saved_bm_rld;
230
231 static void acpi_idle_bm_rld_save(void)
232 {
233         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
234 }
235 static void acpi_idle_bm_rld_restore(void)
236 {
237         u32 resumed_bm_rld;
238
239         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
240
241         if (resumed_bm_rld != saved_bm_rld)
242                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
243 }
244
245 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
246 {
247         if (acpi_idle_suspend == 1)
248                 return 0;
249
250         acpi_idle_bm_rld_save();
251         acpi_idle_suspend = 1;
252         return 0;
253 }
254
255 int acpi_processor_resume(struct acpi_device * device)
256 {
257         if (acpi_idle_suspend == 0)
258                 return 0;
259
260         acpi_idle_bm_rld_restore();
261         acpi_idle_suspend = 0;
262         return 0;
263 }
264
265 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
266 static void tsc_check_state(int state)
267 {
268         switch (boot_cpu_data.x86_vendor) {
269         case X86_VENDOR_AMD:
270         case X86_VENDOR_INTEL:
271                 /*
272                  * AMD Fam10h TSC will tick in all
273                  * C/P/S0/S1 states when this bit is set.
274                  */
275                 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
276                         return;
277
278                 /*FALL THROUGH*/
279         default:
280                 /* TSC could halt in idle, so notify users */
281                 if (state > ACPI_STATE_C1)
282                         mark_tsc_unstable("TSC halts in idle");
283         }
284 }
285 #else
286 static void tsc_check_state(int state) { return; }
287 #endif
288
289 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
290 {
291
292         if (!pr)
293                 return -EINVAL;
294
295         if (!pr->pblk)
296                 return -ENODEV;
297
298         /* if info is obtained from pblk/fadt, type equals state */
299         pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
300         pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
301
302 #ifndef CONFIG_HOTPLUG_CPU
303         /*
304          * Check for P_LVL2_UP flag before entering C2 and above on
305          * an SMP system.
306          */
307         if ((num_online_cpus() > 1) &&
308             !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
309                 return -ENODEV;
310 #endif
311
312         /* determine C2 and C3 address from pblk */
313         pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
314         pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
315
316         /* determine latencies from FADT */
317         pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
318         pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
319
320         /*
321          * FADT specified C2 latency must be less than or equal to
322          * 100 microseconds.
323          */
324         if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
325                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
326                         "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
327                 /* invalidate C2 */
328                 pr->power.states[ACPI_STATE_C2].address = 0;
329         }
330
331         /*
332          * FADT supplied C3 latency must be less than or equal to
333          * 1000 microseconds.
334          */
335         if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
336                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
337                         "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
338                 /* invalidate C3 */
339                 pr->power.states[ACPI_STATE_C3].address = 0;
340         }
341
342         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
343                           "lvl2[0x%08x] lvl3[0x%08x]\n",
344                           pr->power.states[ACPI_STATE_C2].address,
345                           pr->power.states[ACPI_STATE_C3].address));
346
347         return 0;
348 }
349
350 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
351 {
352         if (!pr->power.states[ACPI_STATE_C1].valid) {
353                 /* set the first C-State to C1 */
354                 /* all processors need to support C1 */
355                 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
356                 pr->power.states[ACPI_STATE_C1].valid = 1;
357                 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
358         }
359         /* the C0 state only exists as a filler in our array */
360         pr->power.states[ACPI_STATE_C0].valid = 1;
361         return 0;
362 }
363
364 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
365 {
366         acpi_status status = 0;
367         u64 count;
368         int current_count;
369         int i;
370         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
371         union acpi_object *cst;
372
373
374         if (nocst)
375                 return -ENODEV;
376
377         current_count = 0;
378
379         status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
380         if (ACPI_FAILURE(status)) {
381                 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
382                 return -ENODEV;
383         }
384
385         cst = buffer.pointer;
386
387         /* There must be at least 2 elements */
388         if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
389                 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
390                 status = -EFAULT;
391                 goto end;
392         }
393
394         count = cst->package.elements[0].integer.value;
395
396         /* Validate number of power states. */
397         if (count < 1 || count != cst->package.count - 1) {
398                 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
399                 status = -EFAULT;
400                 goto end;
401         }
402
403         /* Tell driver that at least _CST is supported. */
404         pr->flags.has_cst = 1;
405
406         for (i = 1; i <= count; i++) {
407                 union acpi_object *element;
408                 union acpi_object *obj;
409                 struct acpi_power_register *reg;
410                 struct acpi_processor_cx cx;
411
412                 memset(&cx, 0, sizeof(cx));
413
414                 element = &(cst->package.elements[i]);
415                 if (element->type != ACPI_TYPE_PACKAGE)
416                         continue;
417
418                 if (element->package.count != 4)
419                         continue;
420
421                 obj = &(element->package.elements[0]);
422
423                 if (obj->type != ACPI_TYPE_BUFFER)
424                         continue;
425
426                 reg = (struct acpi_power_register *)obj->buffer.pointer;
427
428                 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
429                     (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
430                         continue;
431
432                 /* There should be an easy way to extract an integer... */
433                 obj = &(element->package.elements[1]);
434                 if (obj->type != ACPI_TYPE_INTEGER)
435                         continue;
436
437                 cx.type = obj->integer.value;
438                 /*
439                  * Some buggy BIOSes won't list C1 in _CST -
440                  * Let acpi_processor_get_power_info_default() handle them later
441                  */
442                 if (i == 1 && cx.type != ACPI_STATE_C1)
443                         current_count++;
444
445                 cx.address = reg->address;
446                 cx.index = current_count + 1;
447
448                 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
449                 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
450                         if (acpi_processor_ffh_cstate_probe
451                                         (pr->id, &cx, reg) == 0) {
452                                 cx.entry_method = ACPI_CSTATE_FFH;
453                         } else if (cx.type == ACPI_STATE_C1) {
454                                 /*
455                                  * C1 is a special case where FIXED_HARDWARE
456                                  * can be handled in non-MWAIT way as well.
457                                  * In that case, save this _CST entry info.
458                                  * Otherwise, ignore this info and continue.
459                                  */
460                                 cx.entry_method = ACPI_CSTATE_HALT;
461                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
462                         } else {
463                                 continue;
464                         }
465                         if (cx.type == ACPI_STATE_C1 &&
466                                         (idle_halt || idle_nomwait)) {
467                                 /*
468                                  * In most cases the C1 space_id obtained from
469                                  * _CST object is FIXED_HARDWARE access mode.
470                                  * But when the option of idle=halt is added,
471                                  * the entry_method type should be changed from
472                                  * CSTATE_FFH to CSTATE_HALT.
473                                  * When the option of idle=nomwait is added,
474                                  * the C1 entry_method type should be
475                                  * CSTATE_HALT.
476                                  */
477                                 cx.entry_method = ACPI_CSTATE_HALT;
478                                 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
479                         }
480                 } else {
481                         snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
482                                  cx.address);
483                 }
484
485                 if (cx.type == ACPI_STATE_C1) {
486                         cx.valid = 1;
487                 }
488
489                 obj = &(element->package.elements[2]);
490                 if (obj->type != ACPI_TYPE_INTEGER)
491                         continue;
492
493                 cx.latency = obj->integer.value;
494
495                 obj = &(element->package.elements[3]);
496                 if (obj->type != ACPI_TYPE_INTEGER)
497                         continue;
498
499                 cx.power = obj->integer.value;
500
501                 current_count++;
502                 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
503
504                 /*
505                  * We support total ACPI_PROCESSOR_MAX_POWER - 1
506                  * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
507                  */
508                 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
509                         printk(KERN_WARNING
510                                "Limiting number of power states to max (%d)\n",
511                                ACPI_PROCESSOR_MAX_POWER);
512                         printk(KERN_WARNING
513                                "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
514                         break;
515                 }
516         }
517
518         ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
519                           current_count));
520
521         /* Validate number of power states discovered */
522         if (current_count < 2)
523                 status = -EFAULT;
524
525       end:
526         kfree(buffer.pointer);
527
528         return status;
529 }
530
531 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
532                                            struct acpi_processor_cx *cx)
533 {
534         static int bm_check_flag = -1;
535         static int bm_control_flag = -1;
536
537
538         if (!cx->address)
539                 return;
540
541         /*
542          * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
543          * DMA transfers are used by any ISA device to avoid livelock.
544          * Note that we could disable Type-F DMA (as recommended by
545          * the erratum), but this is known to disrupt certain ISA
546          * devices thus we take the conservative approach.
547          */
548         else if (errata.piix4.fdma) {
549                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
550                                   "C3 not supported on PIIX4 with Type-F DMA\n"));
551                 return;
552         }
553
554         /* All the logic here assumes flags.bm_check is same across all CPUs */
555         if (bm_check_flag == -1) {
556                 /* Determine whether bm_check is needed based on CPU  */
557                 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
558                 bm_check_flag = pr->flags.bm_check;
559                 bm_control_flag = pr->flags.bm_control;
560         } else {
561                 pr->flags.bm_check = bm_check_flag;
562                 pr->flags.bm_control = bm_control_flag;
563         }
564
565         if (pr->flags.bm_check) {
566                 if (!pr->flags.bm_control) {
567                         if (pr->flags.has_cst != 1) {
568                                 /* bus mastering control is necessary */
569                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
570                                         "C3 support requires BM control\n"));
571                                 return;
572                         } else {
573                                 /* Here we enter C3 without bus mastering */
574                                 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
575                                         "C3 support without BM control\n"));
576                         }
577                 }
578         } else {
579                 /*
580                  * WBINVD should be set in fadt, for C3 state to be
581                  * supported on when bm_check is not required.
582                  */
583                 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
584                         ACPI_DEBUG_PRINT((ACPI_DB_INFO,
585                                           "Cache invalidation should work properly"
586                                           " for C3 to be enabled on SMP systems\n"));
587                         return;
588                 }
589         }
590
591         /*
592          * Otherwise we've met all of our C3 requirements.
593          * Normalize the C3 latency to expidite policy.  Enable
594          * checking of bus mastering status (bm_check) so we can
595          * use this in our C3 policy
596          */
597         cx->valid = 1;
598
599         cx->latency_ticks = cx->latency;
600         /*
601          * On older chipsets, BM_RLD needs to be set
602          * in order for Bus Master activity to wake the
603          * system from C3.  Newer chipsets handle DMA
604          * during C3 automatically and BM_RLD is a NOP.
605          * In either case, the proper way to
606          * handle BM_RLD is to set it and leave it set.
607          */
608         acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
609
610         return;
611 }
612
613 static int acpi_processor_power_verify(struct acpi_processor *pr)
614 {
615         unsigned int i;
616         unsigned int working = 0;
617
618         pr->power.timer_broadcast_on_state = INT_MAX;
619
620         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
621                 struct acpi_processor_cx *cx = &pr->power.states[i];
622
623                 switch (cx->type) {
624                 case ACPI_STATE_C1:
625                         cx->valid = 1;
626                         break;
627
628                 case ACPI_STATE_C2:
629                         if (!cx->address)
630                                 break;
631                         cx->valid = 1; 
632                         cx->latency_ticks = cx->latency; /* Normalize latency */
633                         break;
634
635                 case ACPI_STATE_C3:
636                         acpi_processor_power_verify_c3(pr, cx);
637                         break;
638                 }
639                 if (!cx->valid)
640                         continue;
641
642                 lapic_timer_check_state(i, pr, cx);
643                 tsc_check_state(cx->type);
644                 working++;
645         }
646
647         lapic_timer_propagate_broadcast(pr);
648
649         return (working);
650 }
651
652 static int acpi_processor_get_power_info(struct acpi_processor *pr)
653 {
654         unsigned int i;
655         int result;
656
657
658         /* NOTE: the idle thread may not be running while calling
659          * this function */
660
661         /* Zero initialize all the C-states info. */
662         memset(pr->power.states, 0, sizeof(pr->power.states));
663
664         result = acpi_processor_get_power_info_cst(pr);
665         if (result == -ENODEV)
666                 result = acpi_processor_get_power_info_fadt(pr);
667
668         if (result)
669                 return result;
670
671         acpi_processor_get_power_info_default(pr);
672
673         pr->power.count = acpi_processor_power_verify(pr);
674
675         /*
676          * if one state of type C2 or C3 is available, mark this
677          * CPU as being "idle manageable"
678          */
679         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
680                 if (pr->power.states[i].valid) {
681                         pr->power.count = i;
682                         if (pr->power.states[i].type >= ACPI_STATE_C2)
683                                 pr->flags.power = 1;
684                 }
685         }
686
687         return 0;
688 }
689
690 #ifdef CONFIG_ACPI_PROCFS
691 static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
692 {
693         struct acpi_processor *pr = seq->private;
694         unsigned int i;
695
696
697         if (!pr)
698                 goto end;
699
700         seq_printf(seq, "active state:            C%zd\n"
701                    "max_cstate:              C%d\n"
702                    "maximum allowed latency: %d usec\n",
703                    pr->power.state ? pr->power.state - pr->power.states : 0,
704                    max_cstate, pm_qos_request(PM_QOS_CPU_DMA_LATENCY));
705
706         seq_puts(seq, "states:\n");
707
708         for (i = 1; i <= pr->power.count; i++) {
709                 seq_printf(seq, "   %cC%d:                  ",
710                            (&pr->power.states[i] ==
711                             pr->power.state ? '*' : ' '), i);
712
713                 if (!pr->power.states[i].valid) {
714                         seq_puts(seq, "<not supported>\n");
715                         continue;
716                 }
717
718                 switch (pr->power.states[i].type) {
719                 case ACPI_STATE_C1:
720                         seq_printf(seq, "type[C1] ");
721                         break;
722                 case ACPI_STATE_C2:
723                         seq_printf(seq, "type[C2] ");
724                         break;
725                 case ACPI_STATE_C3:
726                         seq_printf(seq, "type[C3] ");
727                         break;
728                 default:
729                         seq_printf(seq, "type[--] ");
730                         break;
731                 }
732
733                 seq_puts(seq, "promotion[--] ");
734
735                 seq_puts(seq, "demotion[--] ");
736
737                 seq_printf(seq, "latency[%03d] usage[%08d] duration[%020Lu]\n",
738                            pr->power.states[i].latency,
739                            pr->power.states[i].usage,
740                            us_to_pm_timer_ticks(pr->power.states[i].time));
741         }
742
743       end:
744         return 0;
745 }
746
747 static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
748 {
749         return single_open(file, acpi_processor_power_seq_show,
750                            PDE(inode)->data);
751 }
752
753 static const struct file_operations acpi_processor_power_fops = {
754         .owner = THIS_MODULE,
755         .open = acpi_processor_power_open_fs,
756         .read = seq_read,
757         .llseek = seq_lseek,
758         .release = single_release,
759 };
760 #endif
761
762 /**
763  * acpi_idle_bm_check - checks if bus master activity was detected
764  */
765 static int acpi_idle_bm_check(void)
766 {
767         u32 bm_status = 0;
768
769         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
770         if (bm_status)
771                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
772         /*
773          * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
774          * the true state of bus mastering activity; forcing us to
775          * manually check the BMIDEA bit of each IDE channel.
776          */
777         else if (errata.piix4.bmisx) {
778                 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
779                     || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
780                         bm_status = 1;
781         }
782         return bm_status;
783 }
784
785 /**
786  * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
787  * @cx: cstate data
788  *
789  * Caller disables interrupt before call and enables interrupt after return.
790  */
791 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
792 {
793         /* Don't trace irqs off for idle */
794         stop_critical_timings();
795         if (cx->entry_method == ACPI_CSTATE_FFH) {
796                 /* Call into architectural FFH based C-state */
797                 acpi_processor_ffh_cstate_enter(cx);
798         } else if (cx->entry_method == ACPI_CSTATE_HALT) {
799                 acpi_safe_halt();
800         } else {
801                 int unused;
802                 /* IO port based C-state */
803                 inb(cx->address);
804                 /* Dummy wait op - must do something useless after P_LVL2 read
805                    because chipsets cannot guarantee that STPCLK# signal
806                    gets asserted in time to freeze execution properly. */
807                 unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
808         }
809         start_critical_timings();
810 }
811
812 /**
813  * acpi_idle_enter_c1 - enters an ACPI C1 state-type
814  * @dev: the target CPU
815  * @state: the state data
816  *
817  * This is equivalent to the HALT instruction.
818  */
819 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
820                               struct cpuidle_state *state)
821 {
822         ktime_t  kt1, kt2;
823         s64 idle_time;
824         struct acpi_processor *pr;
825         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
826
827         pr = __get_cpu_var(processors);
828
829         if (unlikely(!pr))
830                 return 0;
831
832         local_irq_disable();
833
834         /* Do not access any ACPI IO ports in suspend path */
835         if (acpi_idle_suspend) {
836                 local_irq_enable();
837                 cpu_relax();
838                 return 0;
839         }
840
841         lapic_timer_state_broadcast(pr, cx, 1);
842         kt1 = ktime_get_real();
843         acpi_idle_do_entry(cx);
844         kt2 = ktime_get_real();
845         idle_time =  ktime_to_us(ktime_sub(kt2, kt1));
846
847         local_irq_enable();
848         cx->usage++;
849         lapic_timer_state_broadcast(pr, cx, 0);
850
851         return idle_time;
852 }
853
854 /**
855  * acpi_idle_enter_simple - enters an ACPI state without BM handling
856  * @dev: the target CPU
857  * @state: the state data
858  */
859 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
860                                   struct cpuidle_state *state)
861 {
862         struct acpi_processor *pr;
863         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
864         ktime_t  kt1, kt2;
865         s64 idle_time_ns;
866         s64 idle_time;
867
868         pr = __get_cpu_var(processors);
869
870         if (unlikely(!pr))
871                 return 0;
872
873         if (acpi_idle_suspend)
874                 return(acpi_idle_enter_c1(dev, state));
875
876         local_irq_disable();
877
878         if (cx->entry_method != ACPI_CSTATE_FFH) {
879                 current_thread_info()->status &= ~TS_POLLING;
880                 /*
881                  * TS_POLLING-cleared state must be visible before we test
882                  * NEED_RESCHED:
883                  */
884                 smp_mb();
885
886                 if (unlikely(need_resched())) {
887                         current_thread_info()->status |= TS_POLLING;
888                         local_irq_enable();
889                         return 0;
890                 }
891         }
892
893         /*
894          * Must be done before busmaster disable as we might need to
895          * access HPET !
896          */
897         lapic_timer_state_broadcast(pr, cx, 1);
898
899         if (cx->type == ACPI_STATE_C3)
900                 ACPI_FLUSH_CPU_CACHE();
901
902         kt1 = ktime_get_real();
903         /* Tell the scheduler that we are going deep-idle: */
904         sched_clock_idle_sleep_event();
905         acpi_idle_do_entry(cx);
906         kt2 = ktime_get_real();
907         idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
908         idle_time = idle_time_ns;
909         do_div(idle_time, NSEC_PER_USEC);
910
911         /* Tell the scheduler how much we idled: */
912         sched_clock_idle_wakeup_event(idle_time_ns);
913
914         local_irq_enable();
915         if (cx->entry_method != ACPI_CSTATE_FFH)
916                 current_thread_info()->status |= TS_POLLING;
917
918         cx->usage++;
919
920         lapic_timer_state_broadcast(pr, cx, 0);
921         cx->time += idle_time;
922         return idle_time;
923 }
924
925 static int c3_cpu_count;
926 static DEFINE_SPINLOCK(c3_lock);
927
928 /**
929  * acpi_idle_enter_bm - enters C3 with proper BM handling
930  * @dev: the target CPU
931  * @state: the state data
932  *
933  * If BM is detected, the deepest non-C3 idle state is entered instead.
934  */
935 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
936                               struct cpuidle_state *state)
937 {
938         struct acpi_processor *pr;
939         struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
940         ktime_t  kt1, kt2;
941         s64 idle_time_ns;
942         s64 idle_time;
943
944
945         pr = __get_cpu_var(processors);
946
947         if (unlikely(!pr))
948                 return 0;
949
950         if (acpi_idle_suspend)
951                 return(acpi_idle_enter_c1(dev, state));
952
953         if (acpi_idle_bm_check()) {
954                 if (dev->safe_state) {
955                         dev->last_state = dev->safe_state;
956                         return dev->safe_state->enter(dev, dev->safe_state);
957                 } else {
958                         local_irq_disable();
959                         acpi_safe_halt();
960                         local_irq_enable();
961                         return 0;
962                 }
963         }
964
965         local_irq_disable();
966
967         if (cx->entry_method != ACPI_CSTATE_FFH) {
968                 current_thread_info()->status &= ~TS_POLLING;
969                 /*
970                  * TS_POLLING-cleared state must be visible before we test
971                  * NEED_RESCHED:
972                  */
973                 smp_mb();
974
975                 if (unlikely(need_resched())) {
976                         current_thread_info()->status |= TS_POLLING;
977                         local_irq_enable();
978                         return 0;
979                 }
980         }
981
982         acpi_unlazy_tlb(smp_processor_id());
983
984         /* Tell the scheduler that we are going deep-idle: */
985         sched_clock_idle_sleep_event();
986         /*
987          * Must be done before busmaster disable as we might need to
988          * access HPET !
989          */
990         lapic_timer_state_broadcast(pr, cx, 1);
991
992         kt1 = ktime_get_real();
993         /*
994          * disable bus master
995          * bm_check implies we need ARB_DIS
996          * !bm_check implies we need cache flush
997          * bm_control implies whether we can do ARB_DIS
998          *
999          * That leaves a case where bm_check is set and bm_control is
1000          * not set. In that case we cannot do much, we enter C3
1001          * without doing anything.
1002          */
1003         if (pr->flags.bm_check && pr->flags.bm_control) {
1004                 spin_lock(&c3_lock);
1005                 c3_cpu_count++;
1006                 /* Disable bus master arbitration when all CPUs are in C3 */
1007                 if (c3_cpu_count == num_online_cpus())
1008                         acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
1009                 spin_unlock(&c3_lock);
1010         } else if (!pr->flags.bm_check) {
1011                 ACPI_FLUSH_CPU_CACHE();
1012         }
1013
1014         acpi_idle_do_entry(cx);
1015
1016         /* Re-enable bus master arbitration */
1017         if (pr->flags.bm_check && pr->flags.bm_control) {
1018                 spin_lock(&c3_lock);
1019                 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
1020                 c3_cpu_count--;
1021                 spin_unlock(&c3_lock);
1022         }
1023         kt2 = ktime_get_real();
1024         idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
1025         idle_time = idle_time_ns;
1026         do_div(idle_time, NSEC_PER_USEC);
1027
1028         /* Tell the scheduler how much we idled: */
1029         sched_clock_idle_wakeup_event(idle_time_ns);
1030
1031         local_irq_enable();
1032         if (cx->entry_method != ACPI_CSTATE_FFH)
1033                 current_thread_info()->status |= TS_POLLING;
1034
1035         cx->usage++;
1036
1037         lapic_timer_state_broadcast(pr, cx, 0);
1038         cx->time += idle_time;
1039         return idle_time;
1040 }
1041
1042 struct cpuidle_driver acpi_idle_driver = {
1043         .name =         "acpi_idle",
1044         .owner =        THIS_MODULE,
1045 };
1046
1047 /**
1048  * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1049  * @pr: the ACPI processor
1050  */
1051 static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
1052 {
1053         int i, count = CPUIDLE_DRIVER_STATE_START;
1054         struct acpi_processor_cx *cx;
1055         struct cpuidle_state *state;
1056         struct cpuidle_device *dev = &pr->power.dev;
1057
1058         if (!pr->flags.power_setup_done)
1059                 return -EINVAL;
1060
1061         if (pr->flags.power == 0) {
1062                 return -EINVAL;
1063         }
1064
1065         dev->cpu = pr->id;
1066         for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1067                 dev->states[i].name[0] = '\0';
1068                 dev->states[i].desc[0] = '\0';
1069         }
1070
1071         if (max_cstate == 0)
1072                 max_cstate = 1;
1073
1074         for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1075                 cx = &pr->power.states[i];
1076                 state = &dev->states[count];
1077
1078                 if (!cx->valid)
1079                         continue;
1080
1081 #ifdef CONFIG_HOTPLUG_CPU
1082                 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1083                     !pr->flags.has_cst &&
1084                     !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1085                         continue;
1086 #endif
1087                 cpuidle_set_statedata(state, cx);
1088
1089                 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1090                 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1091                 state->exit_latency = cx->latency;
1092                 state->target_residency = cx->latency * latency_factor;
1093                 state->power_usage = cx->power;
1094
1095                 state->flags = 0;
1096                 switch (cx->type) {
1097                         case ACPI_STATE_C1:
1098                         state->flags |= CPUIDLE_FLAG_SHALLOW;
1099                         if (cx->entry_method == ACPI_CSTATE_FFH)
1100                                 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1101
1102                         state->enter = acpi_idle_enter_c1;
1103                         dev->safe_state = state;
1104                         break;
1105
1106                         case ACPI_STATE_C2:
1107                         state->flags |= CPUIDLE_FLAG_BALANCED;
1108                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1109                         state->enter = acpi_idle_enter_simple;
1110                         dev->safe_state = state;
1111                         break;
1112
1113                         case ACPI_STATE_C3:
1114                         state->flags |= CPUIDLE_FLAG_DEEP;
1115                         state->flags |= CPUIDLE_FLAG_TIME_VALID;
1116                         state->flags |= CPUIDLE_FLAG_CHECK_BM;
1117                         state->enter = pr->flags.bm_check ?
1118                                         acpi_idle_enter_bm :
1119                                         acpi_idle_enter_simple;
1120                         break;
1121                 }
1122
1123                 count++;
1124                 if (count == CPUIDLE_STATE_MAX)
1125                         break;
1126         }
1127
1128         dev->state_count = count;
1129
1130         if (!count)
1131                 return -EINVAL;
1132
1133         return 0;
1134 }
1135
1136 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1137 {
1138         int ret = 0;
1139
1140         if (boot_option_idle_override)
1141                 return 0;
1142
1143         if (!pr)
1144                 return -EINVAL;
1145
1146         if (nocst) {
1147                 return -ENODEV;
1148         }
1149
1150         if (!pr->flags.power_setup_done)
1151                 return -ENODEV;
1152
1153         cpuidle_pause_and_lock();
1154         cpuidle_disable_device(&pr->power.dev);
1155         acpi_processor_get_power_info(pr);
1156         if (pr->flags.power) {
1157                 acpi_processor_setup_cpuidle(pr);
1158                 ret = cpuidle_enable_device(&pr->power.dev);
1159         }
1160         cpuidle_resume_and_unlock();
1161
1162         return ret;
1163 }
1164
1165 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1166                               struct acpi_device *device)
1167 {
1168         acpi_status status = 0;
1169         static int first_run;
1170 #ifdef CONFIG_ACPI_PROCFS
1171         struct proc_dir_entry *entry = NULL;
1172 #endif
1173
1174         if (boot_option_idle_override)
1175                 return 0;
1176
1177         if (!first_run) {
1178                 if (idle_halt) {
1179                         /*
1180                          * When the boot option of "idle=halt" is added, halt
1181                          * is used for CPU IDLE.
1182                          * In such case C2/C3 is meaningless. So the max_cstate
1183                          * is set to one.
1184                          */
1185                         max_cstate = 1;
1186                 }
1187                 dmi_check_system(processor_power_dmi_table);
1188                 max_cstate = acpi_processor_cstate_check(max_cstate);
1189                 if (max_cstate < ACPI_C_STATES_MAX)
1190                         printk(KERN_NOTICE
1191                                "ACPI: processor limited to max C-state %d\n",
1192                                max_cstate);
1193                 first_run++;
1194         }
1195
1196         if (!pr)
1197                 return -EINVAL;
1198
1199         if (acpi_gbl_FADT.cst_control && !nocst) {
1200                 status =
1201                     acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1202                 if (ACPI_FAILURE(status)) {
1203                         ACPI_EXCEPTION((AE_INFO, status,
1204                                         "Notifying BIOS of _CST ability failed"));
1205                 }
1206         }
1207
1208         acpi_processor_get_power_info(pr);
1209         pr->flags.power_setup_done = 1;
1210
1211         /*
1212          * Install the idle handler if processor power management is supported.
1213          * Note that we use previously set idle handler will be used on
1214          * platforms that only support C1.
1215          */
1216         if (pr->flags.power) {
1217                 acpi_processor_setup_cpuidle(pr);
1218                 if (cpuidle_register_device(&pr->power.dev))
1219                         return -EIO;
1220         }
1221 #ifdef CONFIG_ACPI_PROCFS
1222         /* 'power' [R] */
1223         entry = proc_create_data(ACPI_PROCESSOR_FILE_POWER,
1224                                  S_IRUGO, acpi_device_dir(device),
1225                                  &acpi_processor_power_fops,
1226                                  acpi_driver_data(device));
1227         if (!entry)
1228                 return -EIO;
1229 #endif
1230         return 0;
1231 }
1232
1233 int acpi_processor_power_exit(struct acpi_processor *pr,
1234                               struct acpi_device *device)
1235 {
1236         if (boot_option_idle_override)
1237                 return 0;
1238
1239         cpuidle_unregister_device(&pr->power.dev);
1240         pr->flags.power_setup_done = 0;
1241
1242 #ifdef CONFIG_ACPI_PROCFS
1243         if (acpi_device_dir(device))
1244                 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
1245                                   acpi_device_dir(device));
1246 #endif
1247
1248         return 0;
1249 }