2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/acpi.h>
37 #include <linux/dmi.h>
38 #include <linux/moduleparam.h>
39 #include <linux/sched.h> /* need_resched() */
40 #include <linux/pm_qos.h>
41 #include <linux/clockchips.h>
42 #include <linux/cpuidle.h>
43 #include <linux/irqflags.h>
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
56 #include <asm/uaccess.h>
58 #include <acpi/acpi_bus.h>
59 #include <acpi/processor.h>
60 #include <asm/processor.h>
62 #define PREFIX "ACPI: "
64 #define ACPI_PROCESSOR_CLASS "processor"
65 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
66 ACPI_MODULE_NAME("processor_idle");
67 #define PM_TIMER_TICK_NS (1000000000ULL/ACPI_PM_TIMER_FREQUENCY)
68 #define C2_OVERHEAD 1 /* 1us */
69 #define C3_OVERHEAD 1 /* 1us */
70 #define PM_TIMER_TICKS_TO_US(p) \
71 (((p) * 1000)/(ACPI_PM_TIMER_FREQUENCY/1000))
73 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
74 module_param(max_cstate, uint, 0000);
75 static unsigned int nocst __read_mostly;
76 module_param(nocst, uint, 0000);
77 static int bm_check_disable __read_mostly;
78 module_param(bm_check_disable, uint, 0000);
80 static unsigned int latency_factor __read_mostly = 2;
81 module_param(latency_factor, uint, 0644);
83 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
85 static int disabled_by_idle_boot_param(void)
87 return boot_option_idle_override == IDLE_POLL ||
88 boot_option_idle_override == IDLE_FORCE_MWAIT ||
89 boot_option_idle_override == IDLE_HALT;
93 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
94 * For now disable this. Probably a bug somewhere else.
96 * To skip this limit, boot/load with a large max_cstate limit.
98 static int set_max_cstate(const struct dmi_system_id *id)
100 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
103 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
104 " Override with \"processor.max_cstate=%d\"\n", id->ident,
105 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
107 max_cstate = (long)id->driver_data;
112 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
113 callers to only run once -AK */
114 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
115 { set_max_cstate, "Clevo 5600D", {
116 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
117 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
119 { set_max_cstate, "Pavilion zv5000", {
120 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
121 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
123 { set_max_cstate, "Asus L8400B", {
124 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
125 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
132 * Callers should disable interrupts before the call and enable
133 * interrupts after return.
135 static void acpi_safe_halt(void)
137 current_thread_info()->status &= ~TS_POLLING;
139 * TS_POLLING-cleared state must be visible before we
143 if (!need_resched()) {
147 current_thread_info()->status |= TS_POLLING;
150 #ifdef ARCH_APICTIMER_STOPS_ON_C3
153 * Some BIOS implementations switch to C3 in the published C2 state.
154 * This seems to be a common problem on AMD boxen, but other vendors
155 * are affected too. We pick the most conservative approach: we assume
156 * that the local APIC stops in both C2 and C3.
158 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
159 struct acpi_processor_cx *cx)
161 struct acpi_processor_power *pwr = &pr->power;
162 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
164 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
167 if (amd_e400_c1e_detected)
168 type = ACPI_STATE_C1;
171 * Check, if one of the previous states already marked the lapic
174 if (pwr->timer_broadcast_on_state < state)
177 if (cx->type >= type)
178 pr->power.timer_broadcast_on_state = state;
181 static void __lapic_timer_propagate_broadcast(void *arg)
183 struct acpi_processor *pr = (struct acpi_processor *) arg;
184 unsigned long reason;
186 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
187 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
189 clockevents_notify(reason, &pr->id);
192 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
194 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
198 /* Power(C) State timer broadcast control */
199 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
200 struct acpi_processor_cx *cx,
203 int state = cx - pr->power.states;
205 if (state >= pr->power.timer_broadcast_on_state) {
206 unsigned long reason;
208 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
209 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
210 clockevents_notify(reason, &pr->id);
216 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
217 struct acpi_processor_cx *cstate) { }
218 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
219 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
220 struct acpi_processor_cx *cx,
227 static u32 saved_bm_rld;
229 static void acpi_idle_bm_rld_save(void)
231 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
233 static void acpi_idle_bm_rld_restore(void)
237 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
239 if (resumed_bm_rld != saved_bm_rld)
240 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
243 int acpi_processor_suspend(struct device *dev)
245 acpi_idle_bm_rld_save();
249 int acpi_processor_resume(struct device *dev)
251 acpi_idle_bm_rld_restore();
255 #if defined(CONFIG_X86)
256 static void tsc_check_state(int state)
258 switch (boot_cpu_data.x86_vendor) {
260 case X86_VENDOR_INTEL:
262 * AMD Fam10h TSC will tick in all
263 * C/P/S0/S1 states when this bit is set.
265 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
270 /* TSC could halt in idle, so notify users */
271 if (state > ACPI_STATE_C1)
272 mark_tsc_unstable("TSC halts in idle");
276 static void tsc_check_state(int state) { return; }
279 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
288 /* if info is obtained from pblk/fadt, type equals state */
289 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
290 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
292 #ifndef CONFIG_HOTPLUG_CPU
294 * Check for P_LVL2_UP flag before entering C2 and above on
297 if ((num_online_cpus() > 1) &&
298 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
302 /* determine C2 and C3 address from pblk */
303 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
304 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
306 /* determine latencies from FADT */
307 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
308 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
311 * FADT specified C2 latency must be less than or equal to
314 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
315 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
316 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
318 pr->power.states[ACPI_STATE_C2].address = 0;
322 * FADT supplied C3 latency must be less than or equal to
325 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
326 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
327 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
329 pr->power.states[ACPI_STATE_C3].address = 0;
332 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
333 "lvl2[0x%08x] lvl3[0x%08x]\n",
334 pr->power.states[ACPI_STATE_C2].address,
335 pr->power.states[ACPI_STATE_C3].address));
340 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
342 if (!pr->power.states[ACPI_STATE_C1].valid) {
343 /* set the first C-State to C1 */
344 /* all processors need to support C1 */
345 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
346 pr->power.states[ACPI_STATE_C1].valid = 1;
347 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
349 /* the C0 state only exists as a filler in our array */
350 pr->power.states[ACPI_STATE_C0].valid = 1;
354 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
356 acpi_status status = 0;
360 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
361 union acpi_object *cst;
369 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
370 if (ACPI_FAILURE(status)) {
371 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
375 cst = buffer.pointer;
377 /* There must be at least 2 elements */
378 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
379 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
384 count = cst->package.elements[0].integer.value;
386 /* Validate number of power states. */
387 if (count < 1 || count != cst->package.count - 1) {
388 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
393 /* Tell driver that at least _CST is supported. */
394 pr->flags.has_cst = 1;
396 for (i = 1; i <= count; i++) {
397 union acpi_object *element;
398 union acpi_object *obj;
399 struct acpi_power_register *reg;
400 struct acpi_processor_cx cx;
402 memset(&cx, 0, sizeof(cx));
404 element = &(cst->package.elements[i]);
405 if (element->type != ACPI_TYPE_PACKAGE)
408 if (element->package.count != 4)
411 obj = &(element->package.elements[0]);
413 if (obj->type != ACPI_TYPE_BUFFER)
416 reg = (struct acpi_power_register *)obj->buffer.pointer;
418 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
419 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
422 /* There should be an easy way to extract an integer... */
423 obj = &(element->package.elements[1]);
424 if (obj->type != ACPI_TYPE_INTEGER)
427 cx.type = obj->integer.value;
429 * Some buggy BIOSes won't list C1 in _CST -
430 * Let acpi_processor_get_power_info_default() handle them later
432 if (i == 1 && cx.type != ACPI_STATE_C1)
435 cx.address = reg->address;
436 cx.index = current_count + 1;
438 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
439 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
440 if (acpi_processor_ffh_cstate_probe
441 (pr->id, &cx, reg) == 0) {
442 cx.entry_method = ACPI_CSTATE_FFH;
443 } else if (cx.type == ACPI_STATE_C1) {
445 * C1 is a special case where FIXED_HARDWARE
446 * can be handled in non-MWAIT way as well.
447 * In that case, save this _CST entry info.
448 * Otherwise, ignore this info and continue.
450 cx.entry_method = ACPI_CSTATE_HALT;
451 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
455 if (cx.type == ACPI_STATE_C1 &&
456 (boot_option_idle_override == IDLE_NOMWAIT)) {
458 * In most cases the C1 space_id obtained from
459 * _CST object is FIXED_HARDWARE access mode.
460 * But when the option of idle=halt is added,
461 * the entry_method type should be changed from
462 * CSTATE_FFH to CSTATE_HALT.
463 * When the option of idle=nomwait is added,
464 * the C1 entry_method type should be
467 cx.entry_method = ACPI_CSTATE_HALT;
468 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
471 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
475 if (cx.type == ACPI_STATE_C1) {
479 obj = &(element->package.elements[2]);
480 if (obj->type != ACPI_TYPE_INTEGER)
483 cx.latency = obj->integer.value;
485 obj = &(element->package.elements[3]);
486 if (obj->type != ACPI_TYPE_INTEGER)
490 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
493 * We support total ACPI_PROCESSOR_MAX_POWER - 1
494 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
496 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
498 "Limiting number of power states to max (%d)\n",
499 ACPI_PROCESSOR_MAX_POWER);
501 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
506 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
509 /* Validate number of power states discovered */
510 if (current_count < 2)
514 kfree(buffer.pointer);
519 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
520 struct acpi_processor_cx *cx)
522 static int bm_check_flag = -1;
523 static int bm_control_flag = -1;
530 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
531 * DMA transfers are used by any ISA device to avoid livelock.
532 * Note that we could disable Type-F DMA (as recommended by
533 * the erratum), but this is known to disrupt certain ISA
534 * devices thus we take the conservative approach.
536 else if (errata.piix4.fdma) {
537 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
538 "C3 not supported on PIIX4 with Type-F DMA\n"));
542 /* All the logic here assumes flags.bm_check is same across all CPUs */
543 if (bm_check_flag == -1) {
544 /* Determine whether bm_check is needed based on CPU */
545 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
546 bm_check_flag = pr->flags.bm_check;
547 bm_control_flag = pr->flags.bm_control;
549 pr->flags.bm_check = bm_check_flag;
550 pr->flags.bm_control = bm_control_flag;
553 if (pr->flags.bm_check) {
554 if (!pr->flags.bm_control) {
555 if (pr->flags.has_cst != 1) {
556 /* bus mastering control is necessary */
557 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
558 "C3 support requires BM control\n"));
561 /* Here we enter C3 without bus mastering */
562 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
563 "C3 support without BM control\n"));
568 * WBINVD should be set in fadt, for C3 state to be
569 * supported on when bm_check is not required.
571 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
572 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
573 "Cache invalidation should work properly"
574 " for C3 to be enabled on SMP systems\n"));
580 * Otherwise we've met all of our C3 requirements.
581 * Normalize the C3 latency to expidite policy. Enable
582 * checking of bus mastering status (bm_check) so we can
583 * use this in our C3 policy
588 * On older chipsets, BM_RLD needs to be set
589 * in order for Bus Master activity to wake the
590 * system from C3. Newer chipsets handle DMA
591 * during C3 automatically and BM_RLD is a NOP.
592 * In either case, the proper way to
593 * handle BM_RLD is to set it and leave it set.
595 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
600 static int acpi_processor_power_verify(struct acpi_processor *pr)
603 unsigned int working = 0;
605 pr->power.timer_broadcast_on_state = INT_MAX;
607 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
608 struct acpi_processor_cx *cx = &pr->power.states[i];
622 acpi_processor_power_verify_c3(pr, cx);
628 lapic_timer_check_state(i, pr, cx);
629 tsc_check_state(cx->type);
633 lapic_timer_propagate_broadcast(pr);
638 static int acpi_processor_get_power_info(struct acpi_processor *pr)
644 /* NOTE: the idle thread may not be running while calling
647 /* Zero initialize all the C-states info. */
648 memset(pr->power.states, 0, sizeof(pr->power.states));
650 result = acpi_processor_get_power_info_cst(pr);
651 if (result == -ENODEV)
652 result = acpi_processor_get_power_info_fadt(pr);
657 acpi_processor_get_power_info_default(pr);
659 pr->power.count = acpi_processor_power_verify(pr);
662 * if one state of type C2 or C3 is available, mark this
663 * CPU as being "idle manageable"
665 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
666 if (pr->power.states[i].valid) {
668 if (pr->power.states[i].type >= ACPI_STATE_C2)
677 * acpi_idle_bm_check - checks if bus master activity was detected
679 static int acpi_idle_bm_check(void)
683 if (bm_check_disable)
686 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
688 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
690 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
691 * the true state of bus mastering activity; forcing us to
692 * manually check the BMIDEA bit of each IDE channel.
694 else if (errata.piix4.bmisx) {
695 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
696 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
703 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
706 * Caller disables interrupt before call and enables interrupt after return.
708 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
710 /* Don't trace irqs off for idle */
711 stop_critical_timings();
712 if (cx->entry_method == ACPI_CSTATE_FFH) {
713 /* Call into architectural FFH based C-state */
714 acpi_processor_ffh_cstate_enter(cx);
715 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
718 /* IO port based C-state */
720 /* Dummy wait op - must do something useless after P_LVL2 read
721 because chipsets cannot guarantee that STPCLK# signal
722 gets asserted in time to freeze execution properly. */
723 inl(acpi_gbl_FADT.xpm_timer_block.address);
725 start_critical_timings();
729 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
730 * @dev: the target CPU
731 * @drv: cpuidle driver containing cpuidle state info
732 * @index: index of target state
734 * This is equivalent to the HALT instruction.
736 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
737 struct cpuidle_driver *drv, int index)
739 struct acpi_processor *pr;
740 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
741 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
743 pr = __this_cpu_read(processors);
748 lapic_timer_state_broadcast(pr, cx, 1);
749 acpi_idle_do_entry(cx);
751 lapic_timer_state_broadcast(pr, cx, 0);
758 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
759 * @dev: the target CPU
760 * @index: the index of suggested state
762 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
764 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
765 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
767 ACPI_FLUSH_CPU_CACHE();
771 if (cx->entry_method == ACPI_CSTATE_HALT)
773 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
775 /* See comment in acpi_idle_do_entry() */
776 inl(acpi_gbl_FADT.xpm_timer_block.address);
786 * acpi_idle_enter_simple - enters an ACPI state without BM handling
787 * @dev: the target CPU
788 * @drv: cpuidle driver with cpuidle state information
789 * @index: the index of suggested state
791 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
792 struct cpuidle_driver *drv, int index)
794 struct acpi_processor *pr;
795 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
796 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
798 pr = __this_cpu_read(processors);
803 if (cx->entry_method != ACPI_CSTATE_FFH) {
804 current_thread_info()->status &= ~TS_POLLING;
806 * TS_POLLING-cleared state must be visible before we test
811 if (unlikely(need_resched())) {
812 current_thread_info()->status |= TS_POLLING;
818 * Must be done before busmaster disable as we might need to
821 lapic_timer_state_broadcast(pr, cx, 1);
823 if (cx->type == ACPI_STATE_C3)
824 ACPI_FLUSH_CPU_CACHE();
826 /* Tell the scheduler that we are going deep-idle: */
827 sched_clock_idle_sleep_event();
828 acpi_idle_do_entry(cx);
830 sched_clock_idle_wakeup_event(0);
832 if (cx->entry_method != ACPI_CSTATE_FFH)
833 current_thread_info()->status |= TS_POLLING;
835 lapic_timer_state_broadcast(pr, cx, 0);
839 static int c3_cpu_count;
840 static DEFINE_RAW_SPINLOCK(c3_lock);
843 * acpi_idle_enter_bm - enters C3 with proper BM handling
844 * @dev: the target CPU
845 * @drv: cpuidle driver containing state data
846 * @index: the index of suggested state
848 * If BM is detected, the deepest non-C3 idle state is entered instead.
850 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
851 struct cpuidle_driver *drv, int index)
853 struct acpi_processor *pr;
854 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
855 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
857 pr = __this_cpu_read(processors);
862 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
863 if (drv->safe_state_index >= 0) {
864 return drv->states[drv->safe_state_index].enter(dev,
865 drv, drv->safe_state_index);
872 if (cx->entry_method != ACPI_CSTATE_FFH) {
873 current_thread_info()->status &= ~TS_POLLING;
875 * TS_POLLING-cleared state must be visible before we test
880 if (unlikely(need_resched())) {
881 current_thread_info()->status |= TS_POLLING;
886 acpi_unlazy_tlb(smp_processor_id());
888 /* Tell the scheduler that we are going deep-idle: */
889 sched_clock_idle_sleep_event();
891 * Must be done before busmaster disable as we might need to
894 lapic_timer_state_broadcast(pr, cx, 1);
898 * bm_check implies we need ARB_DIS
899 * !bm_check implies we need cache flush
900 * bm_control implies whether we can do ARB_DIS
902 * That leaves a case where bm_check is set and bm_control is
903 * not set. In that case we cannot do much, we enter C3
904 * without doing anything.
906 if (pr->flags.bm_check && pr->flags.bm_control) {
907 raw_spin_lock(&c3_lock);
909 /* Disable bus master arbitration when all CPUs are in C3 */
910 if (c3_cpu_count == num_online_cpus())
911 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
912 raw_spin_unlock(&c3_lock);
913 } else if (!pr->flags.bm_check) {
914 ACPI_FLUSH_CPU_CACHE();
917 acpi_idle_do_entry(cx);
919 /* Re-enable bus master arbitration */
920 if (pr->flags.bm_check && pr->flags.bm_control) {
921 raw_spin_lock(&c3_lock);
922 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
924 raw_spin_unlock(&c3_lock);
927 sched_clock_idle_wakeup_event(0);
929 if (cx->entry_method != ACPI_CSTATE_FFH)
930 current_thread_info()->status |= TS_POLLING;
932 lapic_timer_state_broadcast(pr, cx, 0);
936 struct cpuidle_driver acpi_idle_driver = {
938 .owner = THIS_MODULE,
939 .en_core_tk_irqen = 1,
943 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
944 * device i.e. per-cpu data
946 * @pr: the ACPI processor
948 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr)
950 int i, count = CPUIDLE_DRIVER_STATE_START;
951 struct acpi_processor_cx *cx;
952 struct cpuidle_state_usage *state_usage;
953 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
955 if (!pr->flags.power_setup_done)
958 if (pr->flags.power == 0) {
970 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
971 cx = &pr->power.states[i];
972 state_usage = &dev->states_usage[count];
977 #ifdef CONFIG_HOTPLUG_CPU
978 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
979 !pr->flags.has_cst &&
980 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
984 cpuidle_set_statedata(state_usage, cx);
987 if (count == CPUIDLE_STATE_MAX)
991 dev->state_count = count;
1000 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
1001 * global state data i.e. idle routines
1003 * @pr: the ACPI processor
1005 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1007 int i, count = CPUIDLE_DRIVER_STATE_START;
1008 struct acpi_processor_cx *cx;
1009 struct cpuidle_state *state;
1010 struct cpuidle_driver *drv = &acpi_idle_driver;
1012 if (!pr->flags.power_setup_done)
1015 if (pr->flags.power == 0)
1018 drv->safe_state_index = -1;
1019 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1020 drv->states[i].name[0] = '\0';
1021 drv->states[i].desc[0] = '\0';
1024 if (max_cstate == 0)
1027 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1028 cx = &pr->power.states[i];
1033 #ifdef CONFIG_HOTPLUG_CPU
1034 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1035 !pr->flags.has_cst &&
1036 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1040 state = &drv->states[count];
1041 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1042 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1043 state->exit_latency = cx->latency;
1044 state->target_residency = cx->latency * latency_factor;
1049 if (cx->entry_method == ACPI_CSTATE_FFH)
1050 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1052 state->enter = acpi_idle_enter_c1;
1053 state->enter_dead = acpi_idle_play_dead;
1054 drv->safe_state_index = count;
1058 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1059 state->enter = acpi_idle_enter_simple;
1060 state->enter_dead = acpi_idle_play_dead;
1061 drv->safe_state_index = count;
1065 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1066 state->enter = pr->flags.bm_check ?
1067 acpi_idle_enter_bm :
1068 acpi_idle_enter_simple;
1073 if (count == CPUIDLE_STATE_MAX)
1077 drv->state_count = count;
1085 int acpi_processor_hotplug(struct acpi_processor *pr)
1088 struct cpuidle_device *dev;
1090 if (disabled_by_idle_boot_param())
1100 if (!pr->flags.power_setup_done)
1103 dev = per_cpu(acpi_cpuidle_device, pr->id);
1104 cpuidle_pause_and_lock();
1105 cpuidle_disable_device(dev);
1106 acpi_processor_get_power_info(pr);
1107 if (pr->flags.power) {
1108 acpi_processor_setup_cpuidle_cx(pr);
1109 ret = cpuidle_enable_device(dev);
1111 cpuidle_resume_and_unlock();
1116 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1119 struct acpi_processor *_pr;
1120 struct cpuidle_device *dev;
1122 if (disabled_by_idle_boot_param())
1131 if (!pr->flags.power_setup_done)
1135 * FIXME: Design the ACPI notification to make it once per
1136 * system instead of once per-cpu. This condition is a hack
1137 * to make the code that updates C-States be called once.
1140 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1142 cpuidle_pause_and_lock();
1143 /* Protect against cpu-hotplug */
1146 /* Disable all cpuidle devices */
1147 for_each_online_cpu(cpu) {
1148 _pr = per_cpu(processors, cpu);
1149 if (!_pr || !_pr->flags.power_setup_done)
1151 dev = per_cpu(acpi_cpuidle_device, cpu);
1152 cpuidle_disable_device(dev);
1155 /* Populate Updated C-state information */
1156 acpi_processor_get_power_info(pr);
1157 acpi_processor_setup_cpuidle_states(pr);
1159 /* Enable all cpuidle devices */
1160 for_each_online_cpu(cpu) {
1161 _pr = per_cpu(processors, cpu);
1162 if (!_pr || !_pr->flags.power_setup_done)
1164 acpi_processor_get_power_info(_pr);
1165 if (_pr->flags.power) {
1166 acpi_processor_setup_cpuidle_cx(_pr);
1167 dev = per_cpu(acpi_cpuidle_device, cpu);
1168 cpuidle_enable_device(dev);
1172 cpuidle_resume_and_unlock();
1178 static int acpi_processor_registered;
1180 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr)
1182 acpi_status status = 0;
1184 struct cpuidle_device *dev;
1185 static int first_run;
1187 if (disabled_by_idle_boot_param())
1191 dmi_check_system(processor_power_dmi_table);
1192 max_cstate = acpi_processor_cstate_check(max_cstate);
1193 if (max_cstate < ACPI_C_STATES_MAX)
1195 "ACPI: processor limited to max C-state %d\n",
1203 if (acpi_gbl_FADT.cst_control && !nocst) {
1205 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1206 if (ACPI_FAILURE(status)) {
1207 ACPI_EXCEPTION((AE_INFO, status,
1208 "Notifying BIOS of _CST ability failed"));
1212 acpi_processor_get_power_info(pr);
1213 pr->flags.power_setup_done = 1;
1216 * Install the idle handler if processor power management is supported.
1217 * Note that we use previously set idle handler will be used on
1218 * platforms that only support C1.
1220 if (pr->flags.power) {
1221 /* Register acpi_idle_driver if not already registered */
1222 if (!acpi_processor_registered) {
1223 acpi_processor_setup_cpuidle_states(pr);
1224 retval = cpuidle_register_driver(&acpi_idle_driver);
1227 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1228 acpi_idle_driver.name);
1231 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1234 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1236 acpi_processor_setup_cpuidle_cx(pr);
1238 /* Register per-cpu cpuidle_device. Cpuidle driver
1239 * must already be registered before registering device
1241 retval = cpuidle_register_device(dev);
1243 if (acpi_processor_registered == 0)
1244 cpuidle_unregister_driver(&acpi_idle_driver);
1247 acpi_processor_registered++;
1252 int acpi_processor_power_exit(struct acpi_processor *pr)
1254 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1256 if (disabled_by_idle_boot_param())
1259 if (pr->flags.power) {
1260 cpuidle_unregister_device(dev);
1261 acpi_processor_registered--;
1262 if (acpi_processor_registered == 0)
1263 cpuidle_unregister_driver(&acpi_idle_driver);
1266 pr->flags.power_setup_done = 0;