2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/crash_dump.h>
39 #include <linux/root_dev.h>
40 #include <linux/pci.h>
41 #include <linux/acpi.h>
42 #include <linux/kallsyms.h>
43 #include <linux/edd.h>
44 #include <linux/mmzone.h>
45 #include <linux/kexec.h>
46 #include <linux/cpufreq.h>
47 #include <linux/dmi.h>
48 #include <linux/dma-mapping.h>
51 #include <asm/uaccess.h>
52 #include <asm/system.h>
57 #include <video/edid.h>
60 #include <asm/mpspec.h>
61 #include <asm/mmu_context.h>
62 #include <asm/bootsetup.h>
63 #include <asm/proto.h>
64 #include <asm/setup.h>
65 #include <asm/mach_apic.h>
67 #include <asm/swiotlb.h>
68 #include <asm/sections.h>
69 #include <asm/gart-mapping.h>
75 struct cpuinfo_x86 boot_cpu_data __read_mostly;
77 unsigned long mmu_cr4_features;
80 EXPORT_SYMBOL(acpi_disabled);
82 extern int __initdata acpi_ht;
83 extern acpi_interrupt_flags acpi_sci_flags;
84 int __initdata acpi_force = 0;
87 int acpi_numa __initdata;
89 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
92 unsigned long saved_video_mode;
97 struct drive_info_struct { char dummy[32]; } drive_info;
98 struct screen_info screen_info;
99 struct sys_desc_table_struct {
100 unsigned short length;
101 unsigned char table[0];
104 struct edid_info edid_info;
107 extern int root_mountflags;
109 char command_line[COMMAND_LINE_SIZE];
111 struct resource standard_io_resources[] = {
112 { .name = "dma1", .start = 0x00, .end = 0x1f,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "pic1", .start = 0x20, .end = 0x21,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer0", .start = 0x40, .end = 0x43,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "timer1", .start = 0x50, .end = 0x53,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "keyboard", .start = 0x60, .end = 0x6f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "pic2", .start = 0xa0, .end = 0xa1,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "dma2", .start = 0xc0, .end = 0xdf,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "fpu", .start = 0xf0, .end = 0xff,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
132 #define STANDARD_IO_RESOURCES \
133 (sizeof standard_io_resources / sizeof standard_io_resources[0])
135 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
137 struct resource data_resource = {
138 .name = "Kernel data",
141 .flags = IORESOURCE_RAM,
143 struct resource code_resource = {
144 .name = "Kernel code",
147 .flags = IORESOURCE_RAM,
150 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
152 static struct resource system_rom_resource = {
153 .name = "System ROM",
156 .flags = IORESOURCE_ROM,
159 static struct resource extension_rom_resource = {
160 .name = "Extension ROM",
163 .flags = IORESOURCE_ROM,
166 static struct resource adapter_rom_resources[] = {
167 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM }
181 #define ADAPTER_ROM_RESOURCES \
182 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
184 static struct resource video_rom_resource = {
188 .flags = IORESOURCE_ROM,
191 static struct resource video_ram_resource = {
192 .name = "Video RAM area",
195 .flags = IORESOURCE_RAM,
198 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
200 static int __init romchecksum(unsigned char *rom, unsigned long length)
202 unsigned char *p, sum = 0;
204 for (p = rom; p < rom + length; p++)
209 static void __init probe_roms(void)
211 unsigned long start, length, upper;
216 upper = adapter_rom_resources[0].start;
217 for (start = video_rom_resource.start; start < upper; start += 2048) {
218 rom = isa_bus_to_virt(start);
219 if (!romsignature(rom))
222 video_rom_resource.start = start;
224 /* 0 < length <= 0x7f * 512, historically */
225 length = rom[2] * 512;
227 /* if checksum okay, trust length byte */
228 if (length && romchecksum(rom, length))
229 video_rom_resource.end = start + length - 1;
231 request_resource(&iomem_resource, &video_rom_resource);
235 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
240 request_resource(&iomem_resource, &system_rom_resource);
241 upper = system_rom_resource.start;
243 /* check for extension rom (ignore length byte!) */
244 rom = isa_bus_to_virt(extension_rom_resource.start);
245 if (romsignature(rom)) {
246 length = extension_rom_resource.end - extension_rom_resource.start + 1;
247 if (romchecksum(rom, length)) {
248 request_resource(&iomem_resource, &extension_rom_resource);
249 upper = extension_rom_resource.start;
253 /* check for adapter roms on 2k boundaries */
254 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
255 rom = isa_bus_to_virt(start);
256 if (!romsignature(rom))
259 /* 0 < length <= 0x7f * 512, historically */
260 length = rom[2] * 512;
262 /* but accept any length that fits if checksum okay */
263 if (!length || start + length > upper || !romchecksum(rom, length))
266 adapter_rom_resources[i].start = start;
267 adapter_rom_resources[i].end = start + length - 1;
268 request_resource(&iomem_resource, &adapter_rom_resources[i]);
270 start = adapter_rom_resources[i++].end & ~2047UL;
274 static __init void parse_cmdline_early (char ** cmdline_p)
276 char c = ' ', *to = command_line, *from = COMMAND_LINE;
280 /* Save unparsed command line copy for /proc/cmdline */
281 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
282 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
290 * If the BIOS enumerates physical processors before logical,
291 * maxcpus=N at enumeration-time can be used to disable HT.
293 else if (!memcmp(from, "maxcpus=", 8)) {
294 extern unsigned int maxcpus;
296 maxcpus = simple_strtoul(from + 8, NULL, 0);
300 /* "acpi=off" disables both ACPI table parsing and interpreter init */
301 if (!memcmp(from, "acpi=off", 8))
304 if (!memcmp(from, "acpi=force", 10)) {
305 /* add later when we do DMI horrors: */
310 /* acpi=ht just means: do ACPI MADT parsing
311 at bootup, but don't enable the full ACPI interpreter */
312 if (!memcmp(from, "acpi=ht", 7)) {
317 else if (!memcmp(from, "pci=noacpi", 10))
319 else if (!memcmp(from, "acpi=noirq", 10))
322 else if (!memcmp(from, "acpi_sci=edge", 13))
323 acpi_sci_flags.trigger = 1;
324 else if (!memcmp(from, "acpi_sci=level", 14))
325 acpi_sci_flags.trigger = 3;
326 else if (!memcmp(from, "acpi_sci=high", 13))
327 acpi_sci_flags.polarity = 1;
328 else if (!memcmp(from, "acpi_sci=low", 12))
329 acpi_sci_flags.polarity = 3;
331 /* acpi=strict disables out-of-spec workarounds */
332 else if (!memcmp(from, "acpi=strict", 11)) {
335 #ifdef CONFIG_X86_IO_APIC
336 else if (!memcmp(from, "acpi_skip_timer_override", 24))
337 acpi_skip_timer_override = 1;
341 if (!memcmp(from, "disable_timer_pin_1", 19))
342 disable_timer_pin_1 = 1;
343 if (!memcmp(from, "enable_timer_pin_1", 18))
344 disable_timer_pin_1 = -1;
346 if (!memcmp(from, "nolapic", 7) ||
347 !memcmp(from, "disableapic", 11))
350 if (!memcmp(from, "noapic", 6))
351 skip_ioapic_setup = 1;
353 /* Make sure to not confuse with apic= */
354 if (!memcmp(from, "apic", 4) &&
355 (from[4] == ' ' || from[4] == 0)) {
356 skip_ioapic_setup = 0;
360 if (!memcmp(from, "mem=", 4))
361 parse_memopt(from+4, &from);
363 if (!memcmp(from, "memmap=", 7)) {
364 /* exactmap option is for used defined memory */
365 if (!memcmp(from+7, "exactmap", 8)) {
366 #ifdef CONFIG_CRASH_DUMP
367 /* If we are doing a crash dump, we
368 * still need to know the real mem
369 * size before original memory map is
372 saved_max_pfn = e820_end_of_ram();
380 parse_memmapopt(from+7, &from);
386 if (!memcmp(from, "numa=", 5))
390 if (!memcmp(from,"iommu=",6)) {
394 if (!memcmp(from,"oops=panic", 10))
397 if (!memcmp(from, "noexec=", 7))
398 nonx_setup(from + 7);
401 /* crashkernel=size@addr specifies the location to reserve for
402 * a crash kernel. By reserving this memory we guarantee
403 * that linux never set's it up as a DMA target.
404 * Useful for holding code to do something appropriate
405 * after a kernel panic.
407 else if (!memcmp(from, "crashkernel=", 12)) {
408 unsigned long size, base;
409 size = memparse(from+12, &from);
411 base = memparse(from+1, &from);
412 /* FIXME: Do I want a sanity check
413 * to validate the memory range?
415 crashk_res.start = base;
416 crashk_res.end = base + size - 1;
421 #ifdef CONFIG_PROC_VMCORE
422 /* elfcorehdr= specifies the location of elf core header
423 * stored by the crashed kernel. This option will be passed
424 * by kexec loader to the capture kernel.
426 else if(!memcmp(from, "elfcorehdr=", 11))
427 elfcorehdr_addr = memparse(from+11, &from);
433 if (COMMAND_LINE_SIZE <= ++len)
438 printk(KERN_INFO "user-defined physical RAM map:\n");
439 e820_print_map("user");
442 *cmdline_p = command_line;
447 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
449 unsigned long bootmap_size, bootmap;
451 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
452 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
454 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
455 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
456 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
457 reserve_bootmem(bootmap, bootmap_size);
461 /* Use inline assembly to define this because the nops are defined
462 as inline assembly strings in the include files and we cannot
463 get them easily into strings. */
464 asm("\t.data\nk8nops: "
465 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
468 extern unsigned char k8nops[];
469 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
475 k8nops + 1 + 2 + 3 + 4,
476 k8nops + 1 + 2 + 3 + 4 + 5,
477 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
478 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
481 /* Replace instructions with better alternatives for this CPU type.
483 This runs before SMP is initialized to avoid SMP problems with
484 self modifying code. This implies that assymetric systems where
485 APs have less capabilities than the boot processor are not handled.
486 In this case boot with "noreplacement". */
487 void apply_alternatives(void *start, void *end)
491 for (a = start; (void *)a < end; a++) {
492 if (!boot_cpu_has(a->cpuid))
495 BUG_ON(a->replacementlen > a->instrlen);
496 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
497 diff = a->instrlen - a->replacementlen;
499 /* Pad the rest with nops */
500 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
504 __inline_memcpy(a->instr + i, k8_nops[k], k);
509 static int no_replacement __initdata = 0;
511 void __init alternative_instructions(void)
513 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
516 apply_alternatives(__alt_instructions, __alt_instructions_end);
519 static int __init noreplacement_setup(char *s)
525 __setup("noreplacement", noreplacement_setup);
527 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
529 #ifdef CONFIG_EDD_MODULE
533 * copy_edd() - Copy the BIOS EDD information
534 * from boot_params into a safe place.
537 static inline void copy_edd(void)
539 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
540 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
541 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
542 edd.edd_info_nr = EDD_NR;
545 static inline void copy_edd(void)
550 #define EBDA_ADDR_POINTER 0x40E
551 static void __init reserve_ebda_region(void)
555 * there is a real-mode segmented pointer pointing to the
556 * 4K EBDA area at 0x40E
558 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
561 reserve_bootmem_generic(addr, PAGE_SIZE);
564 void __init setup_arch(char **cmdline_p)
566 unsigned long kernel_end;
568 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
569 drive_info = DRIVE_INFO;
570 screen_info = SCREEN_INFO;
571 edid_info = EDID_INFO;
572 saved_video_mode = SAVED_VIDEO_MODE;
573 bootloader_type = LOADER_TYPE;
575 #ifdef CONFIG_BLK_DEV_RAM
576 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
577 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
578 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
580 setup_memory_region();
583 if (!MOUNT_ROOT_RDONLY)
584 root_mountflags &= ~MS_RDONLY;
585 init_mm.start_code = (unsigned long) &_text;
586 init_mm.end_code = (unsigned long) &_etext;
587 init_mm.end_data = (unsigned long) &_edata;
588 init_mm.brk = (unsigned long) &_end;
590 code_resource.start = virt_to_phys(&_text);
591 code_resource.end = virt_to_phys(&_etext)-1;
592 data_resource.start = virt_to_phys(&_etext);
593 data_resource.end = virt_to_phys(&_edata)-1;
595 parse_cmdline_early(cmdline_p);
597 early_identify_cpu(&boot_cpu_data);
600 * partially used pages are not usable - thus
601 * we are rounding upwards:
603 end_pfn = e820_end_of_ram();
607 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
613 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
614 * Call this early for SRAT node setup.
616 acpi_boot_table_init();
619 #ifdef CONFIG_ACPI_NUMA
621 * Parse SRAT to discover nodes.
627 numa_initmem_init(0, end_pfn);
629 contig_initmem_init(0, end_pfn);
632 /* Reserve direct mapping */
633 reserve_bootmem_generic(table_start << PAGE_SHIFT,
634 (table_end - table_start) << PAGE_SHIFT);
637 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
638 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
641 * reserve physical page 0 - it's a special BIOS page on many boxes,
642 * enabling clean reboots, SMP operation, laptop functions.
644 reserve_bootmem_generic(0, PAGE_SIZE);
646 /* reserve ebda region */
647 reserve_ebda_region();
651 * But first pinch a few for the stack/trampoline stuff
652 * FIXME: Don't need the extra page at 4K, but need to fix
653 * trampoline before removing it. (see the GDT stuff)
655 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
657 /* Reserve SMP trampoline */
658 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
661 #ifdef CONFIG_ACPI_SLEEP
663 * Reserve low memory region for sleep support.
665 acpi_reserve_bootmem();
667 #ifdef CONFIG_X86_LOCAL_APIC
669 * Find and reserve possible boot-time SMP configuration:
673 #ifdef CONFIG_BLK_DEV_INITRD
674 if (LOADER_TYPE && INITRD_START) {
675 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
676 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
678 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
679 initrd_end = initrd_start+INITRD_SIZE;
682 printk(KERN_ERR "initrd extends beyond end of memory "
683 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
684 (unsigned long)(INITRD_START + INITRD_SIZE),
685 (unsigned long)(end_pfn << PAGE_SHIFT));
691 if (crashk_res.start != crashk_res.end) {
692 reserve_bootmem(crashk_res.start,
693 crashk_res.end - crashk_res.start + 1);
703 * Read APIC and some other early information from ACPI tables.
708 #ifdef CONFIG_X86_LOCAL_APIC
710 * get boot-time SMP configuration:
712 if (smp_found_config)
714 init_apic_mappings();
718 * Request address space for all standard RAM and ROM resources
719 * and also for regions reported as reserved by the e820.
722 e820_reserve_resources();
724 request_resource(&iomem_resource, &video_ram_resource);
728 /* request I/O space for devices used on all i[345]86 PCs */
729 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
730 request_resource(&ioport_resource, &standard_io_resources[i]);
735 #ifdef CONFIG_GART_IOMMU
740 #if defined(CONFIG_VGA_CONSOLE)
741 conswitchp = &vga_con;
742 #elif defined(CONFIG_DUMMY_CONSOLE)
743 conswitchp = &dummy_con;
748 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
752 if (c->extended_cpuid_level < 0x80000004)
755 v = (unsigned int *) c->x86_model_id;
756 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
757 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
758 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
759 c->x86_model_id[48] = 0;
764 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
766 unsigned int n, dummy, eax, ebx, ecx, edx;
768 n = c->extended_cpuid_level;
770 if (n >= 0x80000005) {
771 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
772 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
773 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
774 c->x86_cache_size=(ecx>>24)+(edx>>24);
775 /* On K8 L1 TLB is inclusive, so don't count it */
779 if (n >= 0x80000006) {
780 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
781 ecx = cpuid_ecx(0x80000006);
782 c->x86_cache_size = ecx >> 16;
783 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
785 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
786 c->x86_cache_size, ecx & 0xFF);
790 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
791 if (n >= 0x80000008) {
792 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
793 c->x86_virt_bits = (eax >> 8) & 0xff;
794 c->x86_phys_bits = eax & 0xff;
799 static int nearby_node(int apicid)
802 for (i = apicid - 1; i >= 0; i--) {
803 int node = apicid_to_node[i];
804 if (node != NUMA_NO_NODE && node_online(node))
807 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
808 int node = apicid_to_node[i];
809 if (node != NUMA_NO_NODE && node_online(node))
812 return first_node(node_online_map); /* Shouldn't happen */
817 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
818 * Assumes number of cores is a power of two.
820 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
823 int cpu = smp_processor_id();
827 unsigned apicid = phys_proc_id[cpu];
831 while ((1 << bits) < c->x86_max_cores)
834 /* Low order bits define the core id (index of core in socket) */
835 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
836 /* Convert the APIC ID into the socket ID */
837 phys_proc_id[cpu] >>= bits;
840 node = phys_proc_id[cpu];
841 if (apicid_to_node[apicid] != NUMA_NO_NODE)
842 node = apicid_to_node[apicid];
843 if (!node_online(node)) {
844 /* Two possibilities here:
845 - The CPU is missing memory and no node was created.
846 In that case try picking one from a nearby CPU
847 - The APIC IDs differ from the HyperTransport node IDs
848 which the K8 northbridge parsing fills in.
849 Assume they are all increased by a constant offset,
850 but in the same order as the HT nodeids.
851 If that doesn't result in a usable node fall back to the
852 path for the previous case. */
853 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
854 if (ht_nodeid >= 0 &&
855 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
856 node = apicid_to_node[ht_nodeid];
857 /* Pick a nearby node */
858 if (!node_online(node))
859 node = nearby_node(apicid);
861 numa_set_node(cpu, node);
863 printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
864 cpu, c->x86_max_cores, node, cpu_core_id[cpu]);
869 static int __init init_amd(struct cpuinfo_x86 *c)
878 * Disable TLB flush filter by setting HWCR.FFDIS on K8
879 * bit 6 of msr C001_0015
881 * Errata 63 for SH-B3 steppings
882 * Errata 122 for all steppings (F+ have it disabled by default)
885 rdmsrl(MSR_K8_HWCR, value);
887 wrmsrl(MSR_K8_HWCR, value);
891 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
892 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
893 clear_bit(0*32+31, &c->x86_capability);
896 level = cpuid_eax(1);
897 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
898 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
900 r = get_model_name(c);
904 /* Should distinguish Models here, but this is only
905 a fallback anyways. */
906 strcpy(c->x86_model_id, "Hammer");
910 display_cacheinfo(c);
912 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
913 if (c->x86_power & (1<<8))
914 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
916 if (c->extended_cpuid_level >= 0x80000008) {
917 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
918 if (c->x86_max_cores & (c->x86_max_cores - 1))
919 c->x86_max_cores = 1;
927 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
930 u32 eax, ebx, ecx, edx;
931 int index_msb, core_bits;
932 int cpu = smp_processor_id();
934 cpuid(1, &eax, &ebx, &ecx, &edx);
936 c->apicid = phys_pkg_id(0);
938 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
941 smp_num_siblings = (ebx & 0xff0000) >> 16;
943 if (smp_num_siblings == 1) {
944 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
945 } else if (smp_num_siblings > 1 ) {
947 if (smp_num_siblings > NR_CPUS) {
948 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
949 smp_num_siblings = 1;
953 index_msb = get_count_order(smp_num_siblings);
954 phys_proc_id[cpu] = phys_pkg_id(index_msb);
956 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
959 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
961 index_msb = get_count_order(smp_num_siblings) ;
963 core_bits = get_count_order(c->x86_max_cores);
965 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
966 ((1 << core_bits) - 1);
968 if (c->x86_max_cores > 1)
969 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
976 * find out the number of processor cores on the die
978 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
982 if (c->cpuid_level < 4)
991 return ((eax >> 26) + 1);
996 static void srat_detect_node(void)
1000 int cpu = smp_processor_id();
1002 /* Don't do the funky fallback heuristics the AMD version employs
1004 node = apicid_to_node[hard_smp_processor_id()];
1005 if (node == NUMA_NO_NODE)
1007 numa_set_node(cpu, node);
1010 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
1014 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1019 init_intel_cacheinfo(c);
1020 n = c->extended_cpuid_level;
1021 if (n >= 0x80000008) {
1022 unsigned eax = cpuid_eax(0x80000008);
1023 c->x86_virt_bits = (eax >> 8) & 0xff;
1024 c->x86_phys_bits = eax & 0xff;
1025 /* CPUID workaround for Intel 0F34 CPU */
1026 if (c->x86_vendor == X86_VENDOR_INTEL &&
1027 c->x86 == 0xF && c->x86_model == 0x3 &&
1029 c->x86_phys_bits = 36;
1033 c->x86_cache_alignment = c->x86_clflush_size * 2;
1034 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1035 (c->x86 == 0x6 && c->x86_model >= 0x0e))
1036 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1037 c->x86_max_cores = intel_num_cpu_cores(c);
1042 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1044 char *v = c->x86_vendor_id;
1046 if (!strcmp(v, "AuthenticAMD"))
1047 c->x86_vendor = X86_VENDOR_AMD;
1048 else if (!strcmp(v, "GenuineIntel"))
1049 c->x86_vendor = X86_VENDOR_INTEL;
1051 c->x86_vendor = X86_VENDOR_UNKNOWN;
1054 struct cpu_model_info {
1057 char *model_names[16];
1060 /* Do some early cpuid on the boot CPU to get some parameter that are
1061 needed before check_bugs. Everything advanced is in identify_cpu
1063 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1067 c->loops_per_jiffy = loops_per_jiffy;
1068 c->x86_cache_size = -1;
1069 c->x86_vendor = X86_VENDOR_UNKNOWN;
1070 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1071 c->x86_vendor_id[0] = '\0'; /* Unset */
1072 c->x86_model_id[0] = '\0'; /* Unset */
1073 c->x86_clflush_size = 64;
1074 c->x86_cache_alignment = c->x86_clflush_size;
1075 c->x86_max_cores = 1;
1076 c->extended_cpuid_level = 0;
1077 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1079 /* Get vendor name */
1080 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1081 (unsigned int *)&c->x86_vendor_id[0],
1082 (unsigned int *)&c->x86_vendor_id[8],
1083 (unsigned int *)&c->x86_vendor_id[4]);
1087 /* Initialize the standard set of capabilities */
1088 /* Note that the vendor-specific code below might override */
1090 /* Intel-defined flags: level 0x00000001 */
1091 if (c->cpuid_level >= 0x00000001) {
1093 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1094 &c->x86_capability[0]);
1095 c->x86 = (tfms >> 8) & 0xf;
1096 c->x86_model = (tfms >> 4) & 0xf;
1097 c->x86_mask = tfms & 0xf;
1099 c->x86 += (tfms >> 20) & 0xff;
1101 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1102 if (c->x86_capability[0] & (1<<19))
1103 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1105 /* Have CPUID level 0 only - unheard of */
1110 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1115 * This does the hard work of actually picking apart the CPU stuff...
1117 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1122 early_identify_cpu(c);
1124 /* AMD-defined flags: level 0x80000001 */
1125 xlvl = cpuid_eax(0x80000000);
1126 c->extended_cpuid_level = xlvl;
1127 if ((xlvl & 0xffff0000) == 0x80000000) {
1128 if (xlvl >= 0x80000001) {
1129 c->x86_capability[1] = cpuid_edx(0x80000001);
1130 c->x86_capability[6] = cpuid_ecx(0x80000001);
1132 if (xlvl >= 0x80000004)
1133 get_model_name(c); /* Default name */
1136 /* Transmeta-defined flags: level 0x80860001 */
1137 xlvl = cpuid_eax(0x80860000);
1138 if ((xlvl & 0xffff0000) == 0x80860000) {
1139 /* Don't set x86_cpuid_level here for now to not confuse. */
1140 if (xlvl >= 0x80860001)
1141 c->x86_capability[2] = cpuid_edx(0x80860001);
1145 * Vendor-specific initialization. In this section we
1146 * canonicalize the feature flags, meaning if there are
1147 * features a certain CPU supports which CPUID doesn't
1148 * tell us, CPUID claiming incorrect flags, or other bugs,
1149 * we handle them here.
1151 * At the end of this section, c->x86_capability better
1152 * indicate the features this CPU genuinely supports!
1154 switch (c->x86_vendor) {
1155 case X86_VENDOR_AMD:
1159 case X86_VENDOR_INTEL:
1163 case X86_VENDOR_UNKNOWN:
1165 display_cacheinfo(c);
1169 select_idle_routine(c);
1173 * On SMP, boot_cpu_data holds the common feature set between
1174 * all CPUs; so make sure that we indicate which features are
1175 * common between the CPUs. The first time this routine gets
1176 * executed, c == &boot_cpu_data.
1178 if (c != &boot_cpu_data) {
1179 /* AND the already accumulated flags with these */
1180 for (i = 0 ; i < NCAPINTS ; i++)
1181 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1184 #ifdef CONFIG_X86_MCE
1187 if (c == &boot_cpu_data)
1192 numa_add_cpu(smp_processor_id());
1197 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1199 if (c->x86_model_id[0])
1200 printk("%s", c->x86_model_id);
1202 if (c->x86_mask || c->cpuid_level >= 0)
1203 printk(" stepping %02x\n", c->x86_mask);
1209 * Get CPU information for use by the procfs.
1212 static int show_cpuinfo(struct seq_file *m, void *v)
1214 struct cpuinfo_x86 *c = v;
1217 * These flag bits must match the definitions in <asm/cpufeature.h>.
1218 * NULL means this bit is undefined or reserved; either way it doesn't
1219 * have meaning as far as Linux is concerned. Note that it's important
1220 * to realize there is a difference between this table and CPUID -- if
1221 * applications want to get the raw CPUID data, they should access
1222 * /dev/cpu/<cpu_nr>/cpuid instead.
1224 static char *x86_cap_flags[] = {
1226 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1227 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1228 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1229 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1232 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1233 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1234 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1235 NULL, "fxsr_opt", "rdtscp", NULL, NULL, "lm", "3dnowext", "3dnow",
1237 /* Transmeta-defined */
1238 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1239 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1240 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1241 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1243 /* Other (Linux-defined) */
1244 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1245 "constant_tsc", NULL, NULL,
1246 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1247 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1248 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1250 /* Intel-defined (#2) */
1251 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1252 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1253 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1254 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1256 /* VIA/Cyrix/Centaur-defined */
1257 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1258 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1259 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1260 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1262 /* AMD-defined (#2) */
1263 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1264 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1265 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1266 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1268 static char *x86_power_flags[] = {
1269 "ts", /* temperature sensor */
1270 "fid", /* frequency id control */
1271 "vid", /* voltage id control */
1272 "ttp", /* thermal trip */
1276 /* nothing */ /* constant_tsc - moved to flags */
1281 if (!cpu_online(c-cpu_data))
1285 seq_printf(m,"processor\t: %u\n"
1287 "cpu family\t: %d\n"
1289 "model name\t: %s\n",
1290 (unsigned)(c-cpu_data),
1291 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1294 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1296 if (c->x86_mask || c->cpuid_level >= 0)
1297 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1299 seq_printf(m, "stepping\t: unknown\n");
1301 if (cpu_has(c,X86_FEATURE_TSC)) {
1302 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1305 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1306 freq / 1000, (freq % 1000));
1310 if (c->x86_cache_size >= 0)
1311 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1314 if (smp_num_siblings * c->x86_max_cores > 1) {
1315 int cpu = c - cpu_data;
1316 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1317 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1318 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1319 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1325 "fpu_exception\t: yes\n"
1326 "cpuid level\t: %d\n"
1333 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1334 if ( test_bit(i, &c->x86_capability) &&
1335 x86_cap_flags[i] != NULL )
1336 seq_printf(m, " %s", x86_cap_flags[i]);
1339 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1340 c->loops_per_jiffy/(500000/HZ),
1341 (c->loops_per_jiffy/(5000/HZ)) % 100);
1343 if (c->x86_tlbsize > 0)
1344 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1345 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1346 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1348 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1349 c->x86_phys_bits, c->x86_virt_bits);
1351 seq_printf(m, "power management:");
1354 for (i = 0; i < 32; i++)
1355 if (c->x86_power & (1 << i)) {
1356 if (i < ARRAY_SIZE(x86_power_flags) &&
1358 seq_printf(m, "%s%s",
1359 x86_power_flags[i][0]?" ":"",
1360 x86_power_flags[i]);
1362 seq_printf(m, " [%d]", i);
1366 seq_printf(m, "\n\n");
1371 static void *c_start(struct seq_file *m, loff_t *pos)
1373 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1376 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1379 return c_start(m, pos);
1382 static void c_stop(struct seq_file *m, void *v)
1386 struct seq_operations cpuinfo_op = {
1390 .show = show_cpuinfo,
1393 static int __init run_dmi_scan(void)
1398 core_initcall(run_dmi_scan);