2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
89 static void process_nmi(struct kvm_vcpu *vcpu);
91 struct kvm_x86_ops *kvm_x86_ops;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
94 static bool ignore_msrs = 0;
95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
97 bool kvm_has_tsc_control;
98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
99 u32 kvm_max_guest_tsc_khz;
100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
103 static u32 tsc_tolerance_ppm = 250;
104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
106 #define KVM_NR_SHARED_MSRS 16
108 struct kvm_shared_msrs_global {
110 u32 msrs[KVM_NR_SHARED_MSRS];
113 struct kvm_shared_msrs {
114 struct user_return_notifier urn;
116 struct kvm_shared_msr_values {
119 } values[KVM_NR_SHARED_MSRS];
122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
123 static struct kvm_shared_msrs __percpu *shared_msrs;
125 struct kvm_stats_debugfs_item debugfs_entries[] = {
126 { "pf_fixed", VCPU_STAT(pf_fixed) },
127 { "pf_guest", VCPU_STAT(pf_guest) },
128 { "tlb_flush", VCPU_STAT(tlb_flush) },
129 { "invlpg", VCPU_STAT(invlpg) },
130 { "exits", VCPU_STAT(exits) },
131 { "io_exits", VCPU_STAT(io_exits) },
132 { "mmio_exits", VCPU_STAT(mmio_exits) },
133 { "signal_exits", VCPU_STAT(signal_exits) },
134 { "irq_window", VCPU_STAT(irq_window_exits) },
135 { "nmi_window", VCPU_STAT(nmi_window_exits) },
136 { "halt_exits", VCPU_STAT(halt_exits) },
137 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
138 { "hypercalls", VCPU_STAT(hypercalls) },
139 { "request_irq", VCPU_STAT(request_irq_exits) },
140 { "irq_exits", VCPU_STAT(irq_exits) },
141 { "host_state_reload", VCPU_STAT(host_state_reload) },
142 { "efer_reload", VCPU_STAT(efer_reload) },
143 { "fpu_reload", VCPU_STAT(fpu_reload) },
144 { "insn_emulation", VCPU_STAT(insn_emulation) },
145 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
146 { "irq_injections", VCPU_STAT(irq_injections) },
147 { "nmi_injections", VCPU_STAT(nmi_injections) },
148 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
149 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
150 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
151 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
152 { "mmu_flooded", VM_STAT(mmu_flooded) },
153 { "mmu_recycled", VM_STAT(mmu_recycled) },
154 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
155 { "mmu_unsync", VM_STAT(mmu_unsync) },
156 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
157 { "largepages", VM_STAT(lpages) },
161 u64 __read_mostly host_xcr0;
163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
168 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
169 vcpu->arch.apf.gfns[i] = ~0;
172 static void kvm_on_user_return(struct user_return_notifier *urn)
175 struct kvm_shared_msrs *locals
176 = container_of(urn, struct kvm_shared_msrs, urn);
177 struct kvm_shared_msr_values *values;
179 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
180 values = &locals->values[slot];
181 if (values->host != values->curr) {
182 wrmsrl(shared_msrs_global.msrs[slot], values->host);
183 values->curr = values->host;
186 locals->registered = false;
187 user_return_notifier_unregister(urn);
190 static void shared_msr_update(unsigned slot, u32 msr)
193 unsigned int cpu = smp_processor_id();
194 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
196 /* only read, and nobody should modify it at this time,
197 * so don't need lock */
198 if (slot >= shared_msrs_global.nr) {
199 printk(KERN_ERR "kvm: invalid MSR slot!");
202 rdmsrl_safe(msr, &value);
203 smsr->values[slot].host = value;
204 smsr->values[slot].curr = value;
207 void kvm_define_shared_msr(unsigned slot, u32 msr)
209 if (slot >= shared_msrs_global.nr)
210 shared_msrs_global.nr = slot + 1;
211 shared_msrs_global.msrs[slot] = msr;
212 /* we need ensured the shared_msr_global have been updated */
215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
217 static void kvm_shared_msr_cpu_online(void)
221 for (i = 0; i < shared_msrs_global.nr; ++i)
222 shared_msr_update(i, shared_msrs_global.msrs[i]);
225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
227 unsigned int cpu = smp_processor_id();
228 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
230 if (((value ^ smsr->values[slot].curr) & mask) == 0)
232 smsr->values[slot].curr = value;
233 wrmsrl(shared_msrs_global.msrs[slot], value);
234 if (!smsr->registered) {
235 smsr->urn.on_user_return = kvm_on_user_return;
236 user_return_notifier_register(&smsr->urn);
237 smsr->registered = true;
240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
242 static void drop_user_return_notifiers(void *ignore)
244 unsigned int cpu = smp_processor_id();
245 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
247 if (smsr->registered)
248 kvm_on_user_return(&smsr->urn);
251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
253 return vcpu->arch.apic_base;
255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
259 /* TODO: reserve bits check */
260 kvm_lapic_set_base(vcpu, data);
262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
264 asmlinkage void kvm_spurious_fault(void)
266 /* Fault while not rebooting. We want the trace. */
269 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
271 #define EXCPT_BENIGN 0
272 #define EXCPT_CONTRIBUTORY 1
275 static int exception_class(int vector)
285 return EXCPT_CONTRIBUTORY;
292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
293 unsigned nr, bool has_error, u32 error_code,
299 kvm_make_request(KVM_REQ_EVENT, vcpu);
301 if (!vcpu->arch.exception.pending) {
303 vcpu->arch.exception.pending = true;
304 vcpu->arch.exception.has_error_code = has_error;
305 vcpu->arch.exception.nr = nr;
306 vcpu->arch.exception.error_code = error_code;
307 vcpu->arch.exception.reinject = reinject;
311 /* to check exception */
312 prev_nr = vcpu->arch.exception.nr;
313 if (prev_nr == DF_VECTOR) {
314 /* triple fault -> shutdown */
315 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
318 class1 = exception_class(prev_nr);
319 class2 = exception_class(nr);
320 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
321 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
322 /* generate double fault per SDM Table 5-5 */
323 vcpu->arch.exception.pending = true;
324 vcpu->arch.exception.has_error_code = true;
325 vcpu->arch.exception.nr = DF_VECTOR;
326 vcpu->arch.exception.error_code = 0;
328 /* replace previous exception with a new one in a hope
329 that instruction re-execution will regenerate lost
334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
336 kvm_multiple_exception(vcpu, nr, false, 0, false);
338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
340 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
342 kvm_multiple_exception(vcpu, nr, false, 0, true);
344 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
346 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
349 kvm_inject_gp(vcpu, 0);
351 kvm_x86_ops->skip_emulated_instruction(vcpu);
353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
355 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
357 ++vcpu->stat.pf_guest;
358 vcpu->arch.cr2 = fault->address;
359 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
363 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
365 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
366 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
368 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
371 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
373 atomic_inc(&vcpu->arch.nmi_queued);
374 kvm_make_request(KVM_REQ_NMI, vcpu);
376 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
378 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
380 kvm_multiple_exception(vcpu, nr, true, error_code, false);
382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
384 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
386 kvm_multiple_exception(vcpu, nr, true, error_code, true);
388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
391 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
392 * a #GP and return false.
394 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
396 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
398 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
401 EXPORT_SYMBOL_GPL(kvm_require_cpl);
404 * This function will be used to read from the physical memory of the currently
405 * running guest. The difference to kvm_read_guest_page is that this function
406 * can read from guest physical or from the guest's guest physical memory.
408 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
409 gfn_t ngfn, void *data, int offset, int len,
415 ngpa = gfn_to_gpa(ngfn);
416 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
417 if (real_gfn == UNMAPPED_GVA)
420 real_gfn = gpa_to_gfn(real_gfn);
422 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
426 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
427 void *data, int offset, int len, u32 access)
429 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
430 data, offset, len, access);
434 * Load the pae pdptrs. Return true is they are all valid.
436 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
438 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
439 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
442 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
444 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
445 offset * sizeof(u64), sizeof(pdpte),
446 PFERR_USER_MASK|PFERR_WRITE_MASK);
451 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
452 if (is_present_gpte(pdpte[i]) &&
453 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
460 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
461 __set_bit(VCPU_EXREG_PDPTR,
462 (unsigned long *)&vcpu->arch.regs_avail);
463 __set_bit(VCPU_EXREG_PDPTR,
464 (unsigned long *)&vcpu->arch.regs_dirty);
469 EXPORT_SYMBOL_GPL(load_pdptrs);
471 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
473 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
479 if (is_long_mode(vcpu) || !is_pae(vcpu))
482 if (!test_bit(VCPU_EXREG_PDPTR,
483 (unsigned long *)&vcpu->arch.regs_avail))
486 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
487 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
488 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
489 PFERR_USER_MASK | PFERR_WRITE_MASK);
492 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
498 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
500 unsigned long old_cr0 = kvm_read_cr0(vcpu);
501 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
502 X86_CR0_CD | X86_CR0_NW;
507 if (cr0 & 0xffffffff00000000UL)
511 cr0 &= ~CR0_RESERVED_BITS;
513 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
516 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
519 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
521 if ((vcpu->arch.efer & EFER_LME)) {
526 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
531 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
536 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
539 kvm_x86_ops->set_cr0(vcpu, cr0);
541 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
542 kvm_clear_async_pf_completion_queue(vcpu);
543 kvm_async_pf_hash_reset(vcpu);
546 if ((cr0 ^ old_cr0) & update_bits)
547 kvm_mmu_reset_context(vcpu);
550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
554 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
556 EXPORT_SYMBOL_GPL(kvm_lmsw);
558 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
560 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
561 !vcpu->guest_xcr0_loaded) {
562 /* kvm_set_xcr() also depends on this */
563 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
564 vcpu->guest_xcr0_loaded = 1;
568 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
570 if (vcpu->guest_xcr0_loaded) {
571 if (vcpu->arch.xcr0 != host_xcr0)
572 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
573 vcpu->guest_xcr0_loaded = 0;
577 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
581 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
582 if (index != XCR_XFEATURE_ENABLED_MASK)
585 if (!(xcr0 & XSTATE_FP))
587 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
589 if (xcr0 & ~host_xcr0)
591 kvm_put_guest_xcr0(vcpu);
592 vcpu->arch.xcr0 = xcr0;
596 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
598 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
599 __kvm_set_xcr(vcpu, index, xcr)) {
600 kvm_inject_gp(vcpu, 0);
605 EXPORT_SYMBOL_GPL(kvm_set_xcr);
607 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
609 unsigned long old_cr4 = kvm_read_cr4(vcpu);
610 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
611 X86_CR4_PAE | X86_CR4_SMEP;
612 if (cr4 & CR4_RESERVED_BITS)
615 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
618 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
621 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
624 if (is_long_mode(vcpu)) {
625 if (!(cr4 & X86_CR4_PAE))
627 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
628 && ((cr4 ^ old_cr4) & pdptr_bits)
629 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
633 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
634 if (!guest_cpuid_has_pcid(vcpu))
637 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
638 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
642 if (kvm_x86_ops->set_cr4(vcpu, cr4))
645 if (((cr4 ^ old_cr4) & pdptr_bits) ||
646 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
647 kvm_mmu_reset_context(vcpu);
649 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
650 kvm_update_cpuid(vcpu);
654 EXPORT_SYMBOL_GPL(kvm_set_cr4);
656 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
658 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
659 kvm_mmu_sync_roots(vcpu);
660 kvm_mmu_flush_tlb(vcpu);
664 if (is_long_mode(vcpu)) {
665 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
666 if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
669 if (cr3 & CR3_L_MODE_RESERVED_BITS)
673 if (cr3 & CR3_PAE_RESERVED_BITS)
675 if (is_paging(vcpu) &&
676 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
680 * We don't check reserved bits in nonpae mode, because
681 * this isn't enforced, and VMware depends on this.
686 * Does the new cr3 value map to physical memory? (Note, we
687 * catch an invalid cr3 even in real-mode, because it would
688 * cause trouble later on when we turn on paging anyway.)
690 * A real CPU would silently accept an invalid cr3 and would
691 * attempt to use it - with largely undefined (and often hard
692 * to debug) behavior on the guest side.
694 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
696 vcpu->arch.cr3 = cr3;
697 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
698 vcpu->arch.mmu.new_cr3(vcpu);
701 EXPORT_SYMBOL_GPL(kvm_set_cr3);
703 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
705 if (cr8 & CR8_RESERVED_BITS)
707 if (irqchip_in_kernel(vcpu->kvm))
708 kvm_lapic_set_tpr(vcpu, cr8);
710 vcpu->arch.cr8 = cr8;
713 EXPORT_SYMBOL_GPL(kvm_set_cr8);
715 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
717 if (irqchip_in_kernel(vcpu->kvm))
718 return kvm_lapic_get_cr8(vcpu);
720 return vcpu->arch.cr8;
722 EXPORT_SYMBOL_GPL(kvm_get_cr8);
724 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
728 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
729 dr7 = vcpu->arch.guest_debug_dr7;
731 dr7 = vcpu->arch.dr7;
732 kvm_x86_ops->set_dr7(vcpu, dr7);
733 vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
736 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
740 vcpu->arch.db[dr] = val;
741 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
742 vcpu->arch.eff_db[dr] = val;
745 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
749 if (val & 0xffffffff00000000ULL)
751 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
754 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
758 if (val & 0xffffffff00000000ULL)
760 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
761 kvm_update_dr7(vcpu);
768 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
772 res = __kvm_set_dr(vcpu, dr, val);
774 kvm_queue_exception(vcpu, UD_VECTOR);
776 kvm_inject_gp(vcpu, 0);
780 EXPORT_SYMBOL_GPL(kvm_set_dr);
782 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
786 *val = vcpu->arch.db[dr];
789 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
793 *val = vcpu->arch.dr6;
796 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
800 *val = vcpu->arch.dr7;
807 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
809 if (_kvm_get_dr(vcpu, dr, val)) {
810 kvm_queue_exception(vcpu, UD_VECTOR);
815 EXPORT_SYMBOL_GPL(kvm_get_dr);
817 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
819 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
823 err = kvm_pmu_read_pmc(vcpu, ecx, &data);
826 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
827 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
830 EXPORT_SYMBOL_GPL(kvm_rdpmc);
833 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
834 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
836 * This list is modified at module load time to reflect the
837 * capabilities of the host cpu. This capabilities test skips MSRs that are
838 * kvm-specific. Those are put in the beginning of the list.
841 #define KVM_SAVE_MSRS_BEGIN 10
842 static u32 msrs_to_save[] = {
843 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
844 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
845 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
846 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
848 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
851 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
853 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
854 MSR_IA32_FEATURE_CONTROL
857 static unsigned num_msrs_to_save;
859 static const u32 emulated_msrs[] = {
861 MSR_IA32_TSCDEADLINE,
862 MSR_IA32_MISC_ENABLE,
867 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
869 if (efer & efer_reserved_bits)
872 if (efer & EFER_FFXSR) {
873 struct kvm_cpuid_entry2 *feat;
875 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
876 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
880 if (efer & EFER_SVME) {
881 struct kvm_cpuid_entry2 *feat;
883 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
884 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
890 EXPORT_SYMBOL_GPL(kvm_valid_efer);
892 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
894 u64 old_efer = vcpu->arch.efer;
896 if (!kvm_valid_efer(vcpu, efer))
900 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
904 efer |= vcpu->arch.efer & EFER_LMA;
906 kvm_x86_ops->set_efer(vcpu, efer);
908 /* Update reserved bits */
909 if ((efer ^ old_efer) & EFER_NX)
910 kvm_mmu_reset_context(vcpu);
915 void kvm_enable_efer_bits(u64 mask)
917 efer_reserved_bits &= ~mask;
919 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
923 * Writes msr value into into the appropriate "register".
924 * Returns 0 on success, non-0 otherwise.
925 * Assumes vcpu_load() was already called.
927 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
929 return kvm_x86_ops->set_msr(vcpu, msr);
933 * Adapt set_msr() to msr_io()'s calling convention
935 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
941 msr.host_initiated = true;
942 return kvm_set_msr(vcpu, &msr);
946 struct pvclock_gtod_data {
949 struct { /* extract of a clocksource struct */
957 /* open coded 'struct timespec' */
958 u64 monotonic_time_snsec;
959 time_t monotonic_time_sec;
962 static struct pvclock_gtod_data pvclock_gtod_data;
964 static void update_pvclock_gtod(struct timekeeper *tk)
966 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
968 write_seqcount_begin(&vdata->seq);
970 /* copy pvclock gtod data */
971 vdata->clock.vclock_mode = tk->clock->archdata.vclock_mode;
972 vdata->clock.cycle_last = tk->clock->cycle_last;
973 vdata->clock.mask = tk->clock->mask;
974 vdata->clock.mult = tk->mult;
975 vdata->clock.shift = tk->shift;
977 vdata->monotonic_time_sec = tk->xtime_sec
978 + tk->wall_to_monotonic.tv_sec;
979 vdata->monotonic_time_snsec = tk->xtime_nsec
980 + (tk->wall_to_monotonic.tv_nsec
982 while (vdata->monotonic_time_snsec >=
983 (((u64)NSEC_PER_SEC) << tk->shift)) {
984 vdata->monotonic_time_snsec -=
985 ((u64)NSEC_PER_SEC) << tk->shift;
986 vdata->monotonic_time_sec++;
989 write_seqcount_end(&vdata->seq);
994 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
998 struct pvclock_wall_clock wc;
999 struct timespec boot;
1004 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1009 ++version; /* first time write, random junk */
1013 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1016 * The guest calculates current wall clock time by adding
1017 * system time (updated by kvm_guest_time_update below) to the
1018 * wall clock specified here. guest system time equals host
1019 * system time for us, thus we must fill in host boot time here.
1023 if (kvm->arch.kvmclock_offset) {
1024 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1025 boot = timespec_sub(boot, ts);
1027 wc.sec = boot.tv_sec;
1028 wc.nsec = boot.tv_nsec;
1029 wc.version = version;
1031 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1034 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1037 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1039 uint32_t quotient, remainder;
1041 /* Don't try to replace with do_div(), this one calculates
1042 * "(dividend << 32) / divisor" */
1044 : "=a" (quotient), "=d" (remainder)
1045 : "0" (0), "1" (dividend), "r" (divisor) );
1049 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1050 s8 *pshift, u32 *pmultiplier)
1057 tps64 = base_khz * 1000LL;
1058 scaled64 = scaled_khz * 1000LL;
1059 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1064 tps32 = (uint32_t)tps64;
1065 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1066 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1074 *pmultiplier = div_frac(scaled64, tps32);
1076 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1077 __func__, base_khz, scaled_khz, shift, *pmultiplier);
1080 static inline u64 get_kernel_ns(void)
1084 WARN_ON(preemptible());
1086 monotonic_to_bootbased(&ts);
1087 return timespec_to_ns(&ts);
1090 #ifdef CONFIG_X86_64
1091 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1094 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1095 unsigned long max_tsc_khz;
1097 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1099 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1100 vcpu->arch.virtual_tsc_shift);
1103 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1105 u64 v = (u64)khz * (1000000 + ppm);
1110 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1112 u32 thresh_lo, thresh_hi;
1113 int use_scaling = 0;
1115 /* tsc_khz can be zero if TSC calibration fails */
1116 if (this_tsc_khz == 0)
1119 /* Compute a scale to convert nanoseconds in TSC cycles */
1120 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1121 &vcpu->arch.virtual_tsc_shift,
1122 &vcpu->arch.virtual_tsc_mult);
1123 vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1126 * Compute the variation in TSC rate which is acceptable
1127 * within the range of tolerance and decide if the
1128 * rate being applied is within that bounds of the hardware
1129 * rate. If so, no scaling or compensation need be done.
1131 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1132 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1133 if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1134 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1137 kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1140 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1142 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1143 vcpu->arch.virtual_tsc_mult,
1144 vcpu->arch.virtual_tsc_shift);
1145 tsc += vcpu->arch.this_tsc_write;
1149 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1151 #ifdef CONFIG_X86_64
1153 bool do_request = false;
1154 struct kvm_arch *ka = &vcpu->kvm->arch;
1155 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1157 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1158 atomic_read(&vcpu->kvm->online_vcpus));
1160 if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1161 if (!ka->use_master_clock)
1164 if (!vcpus_matched && ka->use_master_clock)
1168 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1170 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1171 atomic_read(&vcpu->kvm->online_vcpus),
1172 ka->use_master_clock, gtod->clock.vclock_mode);
1176 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1178 u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1179 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1182 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1184 struct kvm *kvm = vcpu->kvm;
1185 u64 offset, ns, elapsed;
1186 unsigned long flags;
1189 u64 data = msr->data;
1191 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1192 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1193 ns = get_kernel_ns();
1194 elapsed = ns - kvm->arch.last_tsc_nsec;
1196 if (vcpu->arch.virtual_tsc_khz) {
1199 /* n.b - signed multiplication and division required */
1200 usdiff = data - kvm->arch.last_tsc_write;
1201 #ifdef CONFIG_X86_64
1202 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1204 /* do_div() only does unsigned */
1205 asm("1: idivl %[divisor]\n"
1206 "2: xor %%edx, %%edx\n"
1207 " movl $0, %[faulted]\n"
1209 ".section .fixup,\"ax\"\n"
1210 "4: movl $1, %[faulted]\n"
1214 _ASM_EXTABLE(1b, 4b)
1216 : "=A"(usdiff), [faulted] "=r" (faulted)
1217 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1220 do_div(elapsed, 1000);
1225 /* idivl overflow => difference is larger than USEC_PER_SEC */
1227 usdiff = USEC_PER_SEC;
1229 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1232 * Special case: TSC write with a small delta (1 second) of virtual
1233 * cycle time against real time is interpreted as an attempt to
1234 * synchronize the CPU.
1236 * For a reliable TSC, we can match TSC offsets, and for an unstable
1237 * TSC, we add elapsed time in this computation. We could let the
1238 * compensation code attempt to catch up if we fall behind, but
1239 * it's better to try to match offsets from the beginning.
1241 if (usdiff < USEC_PER_SEC &&
1242 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1243 if (!check_tsc_unstable()) {
1244 offset = kvm->arch.cur_tsc_offset;
1245 pr_debug("kvm: matched tsc offset for %llu\n", data);
1247 u64 delta = nsec_to_cycles(vcpu, elapsed);
1249 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1250 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1255 * We split periods of matched TSC writes into generations.
1256 * For each generation, we track the original measured
1257 * nanosecond time, offset, and write, so if TSCs are in
1258 * sync, we can match exact offset, and if not, we can match
1259 * exact software computation in compute_guest_tsc()
1261 * These values are tracked in kvm->arch.cur_xxx variables.
1263 kvm->arch.cur_tsc_generation++;
1264 kvm->arch.cur_tsc_nsec = ns;
1265 kvm->arch.cur_tsc_write = data;
1266 kvm->arch.cur_tsc_offset = offset;
1268 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1269 kvm->arch.cur_tsc_generation, data);
1273 * We also track th most recent recorded KHZ, write and time to
1274 * allow the matching interval to be extended at each write.
1276 kvm->arch.last_tsc_nsec = ns;
1277 kvm->arch.last_tsc_write = data;
1278 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1280 /* Reset of TSC must disable overshoot protection below */
1281 vcpu->arch.hv_clock.tsc_timestamp = 0;
1282 vcpu->arch.last_guest_tsc = data;
1284 /* Keep track of which generation this VCPU has synchronized to */
1285 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1286 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1287 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1289 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1290 update_ia32_tsc_adjust_msr(vcpu, offset);
1291 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1292 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1294 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1296 kvm->arch.nr_vcpus_matched_tsc++;
1298 kvm->arch.nr_vcpus_matched_tsc = 0;
1300 kvm_track_tsc_matching(vcpu);
1301 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1304 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1306 #ifdef CONFIG_X86_64
1308 static cycle_t read_tsc(void)
1314 * Empirically, a fence (of type that depends on the CPU)
1315 * before rdtsc is enough to ensure that rdtsc is ordered
1316 * with respect to loads. The various CPU manuals are unclear
1317 * as to whether rdtsc can be reordered with later loads,
1318 * but no one has ever seen it happen.
1321 ret = (cycle_t)vget_cycles();
1323 last = pvclock_gtod_data.clock.cycle_last;
1325 if (likely(ret >= last))
1329 * GCC likes to generate cmov here, but this branch is extremely
1330 * predictable (it's just a funciton of time and the likely is
1331 * very likely) and there's a data dependence, so force GCC
1332 * to generate a branch instead. I don't barrier() because
1333 * we don't actually need a barrier, and if this function
1334 * ever gets inlined it will generate worse code.
1340 static inline u64 vgettsc(cycle_t *cycle_now)
1343 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1345 *cycle_now = read_tsc();
1347 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1348 return v * gtod->clock.mult;
1351 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1356 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1360 seq = read_seqcount_begin(>od->seq);
1361 mode = gtod->clock.vclock_mode;
1362 ts->tv_sec = gtod->monotonic_time_sec;
1363 ns = gtod->monotonic_time_snsec;
1364 ns += vgettsc(cycle_now);
1365 ns >>= gtod->clock.shift;
1366 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1367 timespec_add_ns(ts, ns);
1372 /* returns true if host is using tsc clocksource */
1373 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1377 /* checked again under seqlock below */
1378 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1381 if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1384 monotonic_to_bootbased(&ts);
1385 *kernel_ns = timespec_to_ns(&ts);
1393 * Assuming a stable TSC across physical CPUS, and a stable TSC
1394 * across virtual CPUs, the following condition is possible.
1395 * Each numbered line represents an event visible to both
1396 * CPUs at the next numbered event.
1398 * "timespecX" represents host monotonic time. "tscX" represents
1401 * VCPU0 on CPU0 | VCPU1 on CPU1
1403 * 1. read timespec0,tsc0
1404 * 2. | timespec1 = timespec0 + N
1406 * 3. transition to guest | transition to guest
1407 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1408 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1409 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1411 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1414 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1416 * - 0 < N - M => M < N
1418 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1419 * always the case (the difference between two distinct xtime instances
1420 * might be smaller then the difference between corresponding TSC reads,
1421 * when updating guest vcpus pvclock areas).
1423 * To avoid that problem, do not allow visibility of distinct
1424 * system_timestamp/tsc_timestamp values simultaneously: use a master
1425 * copy of host monotonic time values. Update that master copy
1428 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1432 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1434 #ifdef CONFIG_X86_64
1435 struct kvm_arch *ka = &kvm->arch;
1437 bool host_tsc_clocksource, vcpus_matched;
1439 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1440 atomic_read(&kvm->online_vcpus));
1443 * If the host uses TSC clock, then passthrough TSC as stable
1446 host_tsc_clocksource = kvm_get_time_and_clockread(
1447 &ka->master_kernel_ns,
1448 &ka->master_cycle_now);
1450 ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1452 if (ka->use_master_clock)
1453 atomic_set(&kvm_guest_has_master_clock, 1);
1455 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1456 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1461 static int kvm_guest_time_update(struct kvm_vcpu *v)
1463 unsigned long flags, this_tsc_khz;
1464 struct kvm_vcpu_arch *vcpu = &v->arch;
1465 struct kvm_arch *ka = &v->kvm->arch;
1466 s64 kernel_ns, max_kernel_ns;
1467 u64 tsc_timestamp, host_tsc;
1468 struct pvclock_vcpu_time_info guest_hv_clock;
1470 bool use_master_clock;
1476 * If the host uses TSC clock, then passthrough TSC as stable
1479 spin_lock(&ka->pvclock_gtod_sync_lock);
1480 use_master_clock = ka->use_master_clock;
1481 if (use_master_clock) {
1482 host_tsc = ka->master_cycle_now;
1483 kernel_ns = ka->master_kernel_ns;
1485 spin_unlock(&ka->pvclock_gtod_sync_lock);
1487 /* Keep irq disabled to prevent changes to the clock */
1488 local_irq_save(flags);
1489 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1490 if (unlikely(this_tsc_khz == 0)) {
1491 local_irq_restore(flags);
1492 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1495 if (!use_master_clock) {
1496 host_tsc = native_read_tsc();
1497 kernel_ns = get_kernel_ns();
1500 tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1503 * We may have to catch up the TSC to match elapsed wall clock
1504 * time for two reasons, even if kvmclock is used.
1505 * 1) CPU could have been running below the maximum TSC rate
1506 * 2) Broken TSC compensation resets the base at each VCPU
1507 * entry to avoid unknown leaps of TSC even when running
1508 * again on the same CPU. This may cause apparent elapsed
1509 * time to disappear, and the guest to stand still or run
1512 if (vcpu->tsc_catchup) {
1513 u64 tsc = compute_guest_tsc(v, kernel_ns);
1514 if (tsc > tsc_timestamp) {
1515 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1516 tsc_timestamp = tsc;
1520 local_irq_restore(flags);
1522 if (!vcpu->pv_time_enabled)
1526 * Time as measured by the TSC may go backwards when resetting the base
1527 * tsc_timestamp. The reason for this is that the TSC resolution is
1528 * higher than the resolution of the other clock scales. Thus, many
1529 * possible measurments of the TSC correspond to one measurement of any
1530 * other clock, and so a spread of values is possible. This is not a
1531 * problem for the computation of the nanosecond clock; with TSC rates
1532 * around 1GHZ, there can only be a few cycles which correspond to one
1533 * nanosecond value, and any path through this code will inevitably
1534 * take longer than that. However, with the kernel_ns value itself,
1535 * the precision may be much lower, down to HZ granularity. If the
1536 * first sampling of TSC against kernel_ns ends in the low part of the
1537 * range, and the second in the high end of the range, we can get:
1539 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1541 * As the sampling errors potentially range in the thousands of cycles,
1542 * it is possible such a time value has already been observed by the
1543 * guest. To protect against this, we must compute the system time as
1544 * observed by the guest and ensure the new system time is greater.
1547 if (vcpu->hv_clock.tsc_timestamp) {
1548 max_kernel_ns = vcpu->last_guest_tsc -
1549 vcpu->hv_clock.tsc_timestamp;
1550 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1551 vcpu->hv_clock.tsc_to_system_mul,
1552 vcpu->hv_clock.tsc_shift);
1553 max_kernel_ns += vcpu->last_kernel_ns;
1556 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1557 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1558 &vcpu->hv_clock.tsc_shift,
1559 &vcpu->hv_clock.tsc_to_system_mul);
1560 vcpu->hw_tsc_khz = this_tsc_khz;
1563 /* with a master <monotonic time, tsc value> tuple,
1564 * pvclock clock reads always increase at the (scaled) rate
1565 * of guest TSC - no need to deal with sampling errors.
1567 if (!use_master_clock) {
1568 if (max_kernel_ns > kernel_ns)
1569 kernel_ns = max_kernel_ns;
1571 /* With all the info we got, fill in the values */
1572 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1573 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1574 vcpu->last_kernel_ns = kernel_ns;
1575 vcpu->last_guest_tsc = tsc_timestamp;
1578 * The interface expects us to write an even number signaling that the
1579 * update is finished. Since the guest won't see the intermediate
1580 * state, we just increase by 2 at the end.
1582 vcpu->hv_clock.version += 2;
1584 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1585 &guest_hv_clock, sizeof(guest_hv_clock))))
1588 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1589 pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1591 if (vcpu->pvclock_set_guest_stopped_request) {
1592 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1593 vcpu->pvclock_set_guest_stopped_request = false;
1596 /* If the host uses TSC clocksource, then it is stable */
1597 if (use_master_clock)
1598 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1600 vcpu->hv_clock.flags = pvclock_flags;
1602 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1604 sizeof(vcpu->hv_clock));
1609 * kvmclock updates which are isolated to a given vcpu, such as
1610 * vcpu->cpu migration, should not allow system_timestamp from
1611 * the rest of the vcpus to remain static. Otherwise ntp frequency
1612 * correction applies to one vcpu's system_timestamp but not
1615 * So in those cases, request a kvmclock update for all vcpus.
1616 * The worst case for a remote vcpu to update its kvmclock
1617 * is then bounded by maximum nohz sleep latency.
1620 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1623 struct kvm *kvm = v->kvm;
1624 struct kvm_vcpu *vcpu;
1626 kvm_for_each_vcpu(i, vcpu, kvm) {
1627 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1628 kvm_vcpu_kick(vcpu);
1632 static bool msr_mtrr_valid(unsigned msr)
1635 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1636 case MSR_MTRRfix64K_00000:
1637 case MSR_MTRRfix16K_80000:
1638 case MSR_MTRRfix16K_A0000:
1639 case MSR_MTRRfix4K_C0000:
1640 case MSR_MTRRfix4K_C8000:
1641 case MSR_MTRRfix4K_D0000:
1642 case MSR_MTRRfix4K_D8000:
1643 case MSR_MTRRfix4K_E0000:
1644 case MSR_MTRRfix4K_E8000:
1645 case MSR_MTRRfix4K_F0000:
1646 case MSR_MTRRfix4K_F8000:
1647 case MSR_MTRRdefType:
1648 case MSR_IA32_CR_PAT:
1656 static bool valid_pat_type(unsigned t)
1658 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1661 static bool valid_mtrr_type(unsigned t)
1663 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1666 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1670 if (!msr_mtrr_valid(msr))
1673 if (msr == MSR_IA32_CR_PAT) {
1674 for (i = 0; i < 8; i++)
1675 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1678 } else if (msr == MSR_MTRRdefType) {
1681 return valid_mtrr_type(data & 0xff);
1682 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1683 for (i = 0; i < 8 ; i++)
1684 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1689 /* variable MTRRs */
1690 return valid_mtrr_type(data & 0xff);
1693 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1695 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1697 if (!mtrr_valid(vcpu, msr, data))
1700 if (msr == MSR_MTRRdefType) {
1701 vcpu->arch.mtrr_state.def_type = data;
1702 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1703 } else if (msr == MSR_MTRRfix64K_00000)
1705 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1706 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1707 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1708 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1709 else if (msr == MSR_IA32_CR_PAT)
1710 vcpu->arch.pat = data;
1711 else { /* Variable MTRRs */
1712 int idx, is_mtrr_mask;
1715 idx = (msr - 0x200) / 2;
1716 is_mtrr_mask = msr - 0x200 - 2 * idx;
1719 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1722 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1726 kvm_mmu_reset_context(vcpu);
1730 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1732 u64 mcg_cap = vcpu->arch.mcg_cap;
1733 unsigned bank_num = mcg_cap & 0xff;
1736 case MSR_IA32_MCG_STATUS:
1737 vcpu->arch.mcg_status = data;
1739 case MSR_IA32_MCG_CTL:
1740 if (!(mcg_cap & MCG_CTL_P))
1742 if (data != 0 && data != ~(u64)0)
1744 vcpu->arch.mcg_ctl = data;
1747 if (msr >= MSR_IA32_MC0_CTL &&
1748 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1749 u32 offset = msr - MSR_IA32_MC0_CTL;
1750 /* only 0 or all 1s can be written to IA32_MCi_CTL
1751 * some Linux kernels though clear bit 10 in bank 4 to
1752 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1753 * this to avoid an uncatched #GP in the guest
1755 if ((offset & 0x3) == 0 &&
1756 data != 0 && (data | (1 << 10)) != ~(u64)0)
1758 vcpu->arch.mce_banks[offset] = data;
1766 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1768 struct kvm *kvm = vcpu->kvm;
1769 int lm = is_long_mode(vcpu);
1770 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1771 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1772 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1773 : kvm->arch.xen_hvm_config.blob_size_32;
1774 u32 page_num = data & ~PAGE_MASK;
1775 u64 page_addr = data & PAGE_MASK;
1780 if (page_num >= blob_size)
1783 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1788 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1797 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1799 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1802 static bool kvm_hv_msr_partition_wide(u32 msr)
1806 case HV_X64_MSR_GUEST_OS_ID:
1807 case HV_X64_MSR_HYPERCALL:
1815 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1817 struct kvm *kvm = vcpu->kvm;
1820 case HV_X64_MSR_GUEST_OS_ID:
1821 kvm->arch.hv_guest_os_id = data;
1822 /* setting guest os id to zero disables hypercall page */
1823 if (!kvm->arch.hv_guest_os_id)
1824 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1826 case HV_X64_MSR_HYPERCALL: {
1831 /* if guest os id is not set hypercall should remain disabled */
1832 if (!kvm->arch.hv_guest_os_id)
1834 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1835 kvm->arch.hv_hypercall = data;
1838 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1839 addr = gfn_to_hva(kvm, gfn);
1840 if (kvm_is_error_hva(addr))
1842 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1843 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1844 if (__copy_to_user((void __user *)addr, instructions, 4))
1846 kvm->arch.hv_hypercall = data;
1850 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1851 "data 0x%llx\n", msr, data);
1857 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1860 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1863 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1864 vcpu->arch.hv_vapic = data;
1867 addr = gfn_to_hva(vcpu->kvm, data >>
1868 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1869 if (kvm_is_error_hva(addr))
1871 if (__clear_user((void __user *)addr, PAGE_SIZE))
1873 vcpu->arch.hv_vapic = data;
1876 case HV_X64_MSR_EOI:
1877 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1878 case HV_X64_MSR_ICR:
1879 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1880 case HV_X64_MSR_TPR:
1881 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1883 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1884 "data 0x%llx\n", msr, data);
1891 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1893 gpa_t gpa = data & ~0x3f;
1895 /* Bits 2:5 are reserved, Should be zero */
1899 vcpu->arch.apf.msr_val = data;
1901 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1902 kvm_clear_async_pf_completion_queue(vcpu);
1903 kvm_async_pf_hash_reset(vcpu);
1907 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1911 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1912 kvm_async_pf_wakeup_all(vcpu);
1916 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1918 vcpu->arch.pv_time_enabled = false;
1921 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1925 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1928 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1929 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1930 vcpu->arch.st.accum_steal = delta;
1933 static void record_steal_time(struct kvm_vcpu *vcpu)
1935 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1938 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1939 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1942 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1943 vcpu->arch.st.steal.version += 2;
1944 vcpu->arch.st.accum_steal = 0;
1946 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1947 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1950 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1953 u32 msr = msr_info->index;
1954 u64 data = msr_info->data;
1957 case MSR_AMD64_NB_CFG:
1958 case MSR_IA32_UCODE_REV:
1959 case MSR_IA32_UCODE_WRITE:
1960 case MSR_VM_HSAVE_PA:
1961 case MSR_AMD64_PATCH_LOADER:
1962 case MSR_AMD64_BU_CFG2:
1966 return set_efer(vcpu, data);
1968 data &= ~(u64)0x40; /* ignore flush filter disable */
1969 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1970 data &= ~(u64)0x8; /* ignore TLB cache disable */
1972 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1977 case MSR_FAM10H_MMIO_CONF_BASE:
1979 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1984 case MSR_IA32_DEBUGCTLMSR:
1986 /* We support the non-activated case already */
1988 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1989 /* Values other than LBR and BTF are vendor-specific,
1990 thus reserved and should throw a #GP */
1993 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1996 case 0x200 ... 0x2ff:
1997 return set_msr_mtrr(vcpu, msr, data);
1998 case MSR_IA32_APICBASE:
1999 kvm_set_apic_base(vcpu, data);
2001 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2002 return kvm_x2apic_msr_write(vcpu, msr, data);
2003 case MSR_IA32_TSCDEADLINE:
2004 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2006 case MSR_IA32_TSC_ADJUST:
2007 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2008 if (!msr_info->host_initiated) {
2009 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2010 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2012 vcpu->arch.ia32_tsc_adjust_msr = data;
2015 case MSR_IA32_MISC_ENABLE:
2016 vcpu->arch.ia32_misc_enable_msr = data;
2018 case MSR_KVM_WALL_CLOCK_NEW:
2019 case MSR_KVM_WALL_CLOCK:
2020 vcpu->kvm->arch.wall_clock = data;
2021 kvm_write_wall_clock(vcpu->kvm, data);
2023 case MSR_KVM_SYSTEM_TIME_NEW:
2024 case MSR_KVM_SYSTEM_TIME: {
2026 kvmclock_reset(vcpu);
2028 vcpu->arch.time = data;
2029 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2031 /* we verify if the enable bit is set... */
2035 gpa_offset = data & ~(PAGE_MASK | 1);
2037 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2038 &vcpu->arch.pv_time, data & ~1ULL,
2039 sizeof(struct pvclock_vcpu_time_info)))
2040 vcpu->arch.pv_time_enabled = false;
2042 vcpu->arch.pv_time_enabled = true;
2046 case MSR_KVM_ASYNC_PF_EN:
2047 if (kvm_pv_enable_async_pf(vcpu, data))
2050 case MSR_KVM_STEAL_TIME:
2052 if (unlikely(!sched_info_on()))
2055 if (data & KVM_STEAL_RESERVED_MASK)
2058 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2059 data & KVM_STEAL_VALID_BITS,
2060 sizeof(struct kvm_steal_time)))
2063 vcpu->arch.st.msr_val = data;
2065 if (!(data & KVM_MSR_ENABLED))
2068 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2071 accumulate_steal_time(vcpu);
2074 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2077 case MSR_KVM_PV_EOI_EN:
2078 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2082 case MSR_IA32_MCG_CTL:
2083 case MSR_IA32_MCG_STATUS:
2084 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2085 return set_msr_mce(vcpu, msr, data);
2087 /* Performance counters are not protected by a CPUID bit,
2088 * so we should check all of them in the generic path for the sake of
2089 * cross vendor migration.
2090 * Writing a zero into the event select MSRs disables them,
2091 * which we perfectly emulate ;-). Any other value should be at least
2092 * reported, some guests depend on them.
2094 case MSR_K7_EVNTSEL0:
2095 case MSR_K7_EVNTSEL1:
2096 case MSR_K7_EVNTSEL2:
2097 case MSR_K7_EVNTSEL3:
2099 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2100 "0x%x data 0x%llx\n", msr, data);
2102 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2103 * so we ignore writes to make it happy.
2105 case MSR_K7_PERFCTR0:
2106 case MSR_K7_PERFCTR1:
2107 case MSR_K7_PERFCTR2:
2108 case MSR_K7_PERFCTR3:
2109 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2110 "0x%x data 0x%llx\n", msr, data);
2112 case MSR_P6_PERFCTR0:
2113 case MSR_P6_PERFCTR1:
2115 case MSR_P6_EVNTSEL0:
2116 case MSR_P6_EVNTSEL1:
2117 if (kvm_pmu_msr(vcpu, msr))
2118 return kvm_pmu_set_msr(vcpu, msr_info);
2120 if (pr || data != 0)
2121 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2122 "0x%x data 0x%llx\n", msr, data);
2124 case MSR_K7_CLK_CTL:
2126 * Ignore all writes to this no longer documented MSR.
2127 * Writes are only relevant for old K7 processors,
2128 * all pre-dating SVM, but a recommended workaround from
2129 * AMD for these chips. It is possible to specify the
2130 * affected processor models on the command line, hence
2131 * the need to ignore the workaround.
2134 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2135 if (kvm_hv_msr_partition_wide(msr)) {
2137 mutex_lock(&vcpu->kvm->lock);
2138 r = set_msr_hyperv_pw(vcpu, msr, data);
2139 mutex_unlock(&vcpu->kvm->lock);
2142 return set_msr_hyperv(vcpu, msr, data);
2144 case MSR_IA32_BBL_CR_CTL3:
2145 /* Drop writes to this legacy MSR -- see rdmsr
2146 * counterpart for further detail.
2148 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2150 case MSR_AMD64_OSVW_ID_LENGTH:
2151 if (!guest_cpuid_has_osvw(vcpu))
2153 vcpu->arch.osvw.length = data;
2155 case MSR_AMD64_OSVW_STATUS:
2156 if (!guest_cpuid_has_osvw(vcpu))
2158 vcpu->arch.osvw.status = data;
2161 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2162 return xen_hvm_config(vcpu, data);
2163 if (kvm_pmu_msr(vcpu, msr))
2164 return kvm_pmu_set_msr(vcpu, msr_info);
2166 vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2170 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2177 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2181 * Reads an msr value (of 'msr_index') into 'pdata'.
2182 * Returns 0 on success, non-0 otherwise.
2183 * Assumes vcpu_load() was already called.
2185 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2187 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2190 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2192 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2194 if (!msr_mtrr_valid(msr))
2197 if (msr == MSR_MTRRdefType)
2198 *pdata = vcpu->arch.mtrr_state.def_type +
2199 (vcpu->arch.mtrr_state.enabled << 10);
2200 else if (msr == MSR_MTRRfix64K_00000)
2202 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2203 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2204 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2205 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2206 else if (msr == MSR_IA32_CR_PAT)
2207 *pdata = vcpu->arch.pat;
2208 else { /* Variable MTRRs */
2209 int idx, is_mtrr_mask;
2212 idx = (msr - 0x200) / 2;
2213 is_mtrr_mask = msr - 0x200 - 2 * idx;
2216 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2219 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2226 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2229 u64 mcg_cap = vcpu->arch.mcg_cap;
2230 unsigned bank_num = mcg_cap & 0xff;
2233 case MSR_IA32_P5_MC_ADDR:
2234 case MSR_IA32_P5_MC_TYPE:
2237 case MSR_IA32_MCG_CAP:
2238 data = vcpu->arch.mcg_cap;
2240 case MSR_IA32_MCG_CTL:
2241 if (!(mcg_cap & MCG_CTL_P))
2243 data = vcpu->arch.mcg_ctl;
2245 case MSR_IA32_MCG_STATUS:
2246 data = vcpu->arch.mcg_status;
2249 if (msr >= MSR_IA32_MC0_CTL &&
2250 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2251 u32 offset = msr - MSR_IA32_MC0_CTL;
2252 data = vcpu->arch.mce_banks[offset];
2261 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2264 struct kvm *kvm = vcpu->kvm;
2267 case HV_X64_MSR_GUEST_OS_ID:
2268 data = kvm->arch.hv_guest_os_id;
2270 case HV_X64_MSR_HYPERCALL:
2271 data = kvm->arch.hv_hypercall;
2274 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2282 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2287 case HV_X64_MSR_VP_INDEX: {
2290 kvm_for_each_vcpu(r, v, vcpu->kvm)
2295 case HV_X64_MSR_EOI:
2296 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2297 case HV_X64_MSR_ICR:
2298 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2299 case HV_X64_MSR_TPR:
2300 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2301 case HV_X64_MSR_APIC_ASSIST_PAGE:
2302 data = vcpu->arch.hv_vapic;
2305 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2312 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2317 case MSR_IA32_PLATFORM_ID:
2318 case MSR_IA32_EBL_CR_POWERON:
2319 case MSR_IA32_DEBUGCTLMSR:
2320 case MSR_IA32_LASTBRANCHFROMIP:
2321 case MSR_IA32_LASTBRANCHTOIP:
2322 case MSR_IA32_LASTINTFROMIP:
2323 case MSR_IA32_LASTINTTOIP:
2326 case MSR_VM_HSAVE_PA:
2327 case MSR_K7_EVNTSEL0:
2328 case MSR_K7_PERFCTR0:
2329 case MSR_K8_INT_PENDING_MSG:
2330 case MSR_AMD64_NB_CFG:
2331 case MSR_FAM10H_MMIO_CONF_BASE:
2332 case MSR_AMD64_BU_CFG2:
2335 case MSR_P6_PERFCTR0:
2336 case MSR_P6_PERFCTR1:
2337 case MSR_P6_EVNTSEL0:
2338 case MSR_P6_EVNTSEL1:
2339 if (kvm_pmu_msr(vcpu, msr))
2340 return kvm_pmu_get_msr(vcpu, msr, pdata);
2343 case MSR_IA32_UCODE_REV:
2344 data = 0x100000000ULL;
2347 data = 0x500 | KVM_NR_VAR_MTRR;
2349 case 0x200 ... 0x2ff:
2350 return get_msr_mtrr(vcpu, msr, pdata);
2351 case 0xcd: /* fsb frequency */
2355 * MSR_EBC_FREQUENCY_ID
2356 * Conservative value valid for even the basic CPU models.
2357 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2358 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2359 * and 266MHz for model 3, or 4. Set Core Clock
2360 * Frequency to System Bus Frequency Ratio to 1 (bits
2361 * 31:24) even though these are only valid for CPU
2362 * models > 2, however guests may end up dividing or
2363 * multiplying by zero otherwise.
2365 case MSR_EBC_FREQUENCY_ID:
2368 case MSR_IA32_APICBASE:
2369 data = kvm_get_apic_base(vcpu);
2371 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2372 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2374 case MSR_IA32_TSCDEADLINE:
2375 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2377 case MSR_IA32_TSC_ADJUST:
2378 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2380 case MSR_IA32_MISC_ENABLE:
2381 data = vcpu->arch.ia32_misc_enable_msr;
2383 case MSR_IA32_PERF_STATUS:
2384 /* TSC increment by tick */
2386 /* CPU multiplier */
2387 data |= (((uint64_t)4ULL) << 40);
2390 data = vcpu->arch.efer;
2392 case MSR_KVM_WALL_CLOCK:
2393 case MSR_KVM_WALL_CLOCK_NEW:
2394 data = vcpu->kvm->arch.wall_clock;
2396 case MSR_KVM_SYSTEM_TIME:
2397 case MSR_KVM_SYSTEM_TIME_NEW:
2398 data = vcpu->arch.time;
2400 case MSR_KVM_ASYNC_PF_EN:
2401 data = vcpu->arch.apf.msr_val;
2403 case MSR_KVM_STEAL_TIME:
2404 data = vcpu->arch.st.msr_val;
2406 case MSR_KVM_PV_EOI_EN:
2407 data = vcpu->arch.pv_eoi.msr_val;
2409 case MSR_IA32_P5_MC_ADDR:
2410 case MSR_IA32_P5_MC_TYPE:
2411 case MSR_IA32_MCG_CAP:
2412 case MSR_IA32_MCG_CTL:
2413 case MSR_IA32_MCG_STATUS:
2414 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2415 return get_msr_mce(vcpu, msr, pdata);
2416 case MSR_K7_CLK_CTL:
2418 * Provide expected ramp-up count for K7. All other
2419 * are set to zero, indicating minimum divisors for
2422 * This prevents guest kernels on AMD host with CPU
2423 * type 6, model 8 and higher from exploding due to
2424 * the rdmsr failing.
2428 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2429 if (kvm_hv_msr_partition_wide(msr)) {
2431 mutex_lock(&vcpu->kvm->lock);
2432 r = get_msr_hyperv_pw(vcpu, msr, pdata);
2433 mutex_unlock(&vcpu->kvm->lock);
2436 return get_msr_hyperv(vcpu, msr, pdata);
2438 case MSR_IA32_BBL_CR_CTL3:
2439 /* This legacy MSR exists but isn't fully documented in current
2440 * silicon. It is however accessed by winxp in very narrow
2441 * scenarios where it sets bit #19, itself documented as
2442 * a "reserved" bit. Best effort attempt to source coherent
2443 * read data here should the balance of the register be
2444 * interpreted by the guest:
2446 * L2 cache control register 3: 64GB range, 256KB size,
2447 * enabled, latency 0x1, configured
2451 case MSR_AMD64_OSVW_ID_LENGTH:
2452 if (!guest_cpuid_has_osvw(vcpu))
2454 data = vcpu->arch.osvw.length;
2456 case MSR_AMD64_OSVW_STATUS:
2457 if (!guest_cpuid_has_osvw(vcpu))
2459 data = vcpu->arch.osvw.status;
2462 if (kvm_pmu_msr(vcpu, msr))
2463 return kvm_pmu_get_msr(vcpu, msr, pdata);
2465 vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2468 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2476 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2479 * Read or write a bunch of msrs. All parameters are kernel addresses.
2481 * @return number of msrs set successfully.
2483 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2484 struct kvm_msr_entry *entries,
2485 int (*do_msr)(struct kvm_vcpu *vcpu,
2486 unsigned index, u64 *data))
2490 idx = srcu_read_lock(&vcpu->kvm->srcu);
2491 for (i = 0; i < msrs->nmsrs; ++i)
2492 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2494 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2500 * Read or write a bunch of msrs. Parameters are user addresses.
2502 * @return number of msrs set successfully.
2504 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2505 int (*do_msr)(struct kvm_vcpu *vcpu,
2506 unsigned index, u64 *data),
2509 struct kvm_msrs msrs;
2510 struct kvm_msr_entry *entries;
2515 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2519 if (msrs.nmsrs >= MAX_IO_MSRS)
2522 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2523 entries = memdup_user(user_msrs->entries, size);
2524 if (IS_ERR(entries)) {
2525 r = PTR_ERR(entries);
2529 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2534 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2545 int kvm_dev_ioctl_check_extension(long ext)
2550 case KVM_CAP_IRQCHIP:
2552 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2553 case KVM_CAP_SET_TSS_ADDR:
2554 case KVM_CAP_EXT_CPUID:
2555 case KVM_CAP_CLOCKSOURCE:
2557 case KVM_CAP_NOP_IO_DELAY:
2558 case KVM_CAP_MP_STATE:
2559 case KVM_CAP_SYNC_MMU:
2560 case KVM_CAP_USER_NMI:
2561 case KVM_CAP_REINJECT_CONTROL:
2562 case KVM_CAP_IRQ_INJECT_STATUS:
2564 case KVM_CAP_IOEVENTFD:
2566 case KVM_CAP_PIT_STATE2:
2567 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2568 case KVM_CAP_XEN_HVM:
2569 case KVM_CAP_ADJUST_CLOCK:
2570 case KVM_CAP_VCPU_EVENTS:
2571 case KVM_CAP_HYPERV:
2572 case KVM_CAP_HYPERV_VAPIC:
2573 case KVM_CAP_HYPERV_SPIN:
2574 case KVM_CAP_PCI_SEGMENT:
2575 case KVM_CAP_DEBUGREGS:
2576 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2578 case KVM_CAP_ASYNC_PF:
2579 case KVM_CAP_GET_TSC_KHZ:
2580 case KVM_CAP_KVMCLOCK_CTRL:
2581 case KVM_CAP_READONLY_MEM:
2582 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2583 case KVM_CAP_ASSIGN_DEV_IRQ:
2584 case KVM_CAP_PCI_2_3:
2588 case KVM_CAP_COALESCED_MMIO:
2589 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2592 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2594 case KVM_CAP_NR_VCPUS:
2595 r = KVM_SOFT_MAX_VCPUS;
2597 case KVM_CAP_MAX_VCPUS:
2600 case KVM_CAP_NR_MEMSLOTS:
2601 r = KVM_USER_MEM_SLOTS;
2603 case KVM_CAP_PV_MMU: /* obsolete */
2606 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2608 r = iommu_present(&pci_bus_type);
2612 r = KVM_MAX_MCE_BANKS;
2617 case KVM_CAP_TSC_CONTROL:
2618 r = kvm_has_tsc_control;
2620 case KVM_CAP_TSC_DEADLINE_TIMER:
2621 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2631 long kvm_arch_dev_ioctl(struct file *filp,
2632 unsigned int ioctl, unsigned long arg)
2634 void __user *argp = (void __user *)arg;
2638 case KVM_GET_MSR_INDEX_LIST: {
2639 struct kvm_msr_list __user *user_msr_list = argp;
2640 struct kvm_msr_list msr_list;
2644 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2647 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2648 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2651 if (n < msr_list.nmsrs)
2654 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2655 num_msrs_to_save * sizeof(u32)))
2657 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2659 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2664 case KVM_GET_SUPPORTED_CPUID: {
2665 struct kvm_cpuid2 __user *cpuid_arg = argp;
2666 struct kvm_cpuid2 cpuid;
2669 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2671 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2672 cpuid_arg->entries);
2677 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2682 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2685 mce_cap = KVM_MCE_CAP_SUPPORTED;
2687 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2699 static void wbinvd_ipi(void *garbage)
2704 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2706 return vcpu->kvm->arch.iommu_domain &&
2707 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2710 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2712 /* Address WBINVD may be executed by guest */
2713 if (need_emulate_wbinvd(vcpu)) {
2714 if (kvm_x86_ops->has_wbinvd_exit())
2715 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2716 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2717 smp_call_function_single(vcpu->cpu,
2718 wbinvd_ipi, NULL, 1);
2721 kvm_x86_ops->vcpu_load(vcpu, cpu);
2723 /* Apply any externally detected TSC adjustments (due to suspend) */
2724 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2725 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2726 vcpu->arch.tsc_offset_adjustment = 0;
2727 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2730 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2731 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2732 native_read_tsc() - vcpu->arch.last_host_tsc;
2734 mark_tsc_unstable("KVM discovered backwards TSC");
2735 if (check_tsc_unstable()) {
2736 u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2737 vcpu->arch.last_guest_tsc);
2738 kvm_x86_ops->write_tsc_offset(vcpu, offset);
2739 vcpu->arch.tsc_catchup = 1;
2742 * On a host with synchronized TSC, there is no need to update
2743 * kvmclock on vcpu->cpu migration
2745 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2746 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2747 if (vcpu->cpu != cpu)
2748 kvm_migrate_timers(vcpu);
2752 accumulate_steal_time(vcpu);
2753 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2756 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2758 kvm_x86_ops->vcpu_put(vcpu);
2759 kvm_put_guest_fpu(vcpu);
2760 vcpu->arch.last_host_tsc = native_read_tsc();
2763 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2764 struct kvm_lapic_state *s)
2766 kvm_x86_ops->sync_pir_to_irr(vcpu);
2767 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2772 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2773 struct kvm_lapic_state *s)
2775 kvm_apic_post_state_restore(vcpu, s);
2776 update_cr8_intercept(vcpu);
2781 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2782 struct kvm_interrupt *irq)
2784 if (irq->irq >= KVM_NR_INTERRUPTS)
2786 if (irqchip_in_kernel(vcpu->kvm))
2789 kvm_queue_interrupt(vcpu, irq->irq, false);
2790 kvm_make_request(KVM_REQ_EVENT, vcpu);
2795 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2797 kvm_inject_nmi(vcpu);
2802 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2803 struct kvm_tpr_access_ctl *tac)
2807 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2811 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2815 unsigned bank_num = mcg_cap & 0xff, bank;
2818 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2820 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2823 vcpu->arch.mcg_cap = mcg_cap;
2824 /* Init IA32_MCG_CTL to all 1s */
2825 if (mcg_cap & MCG_CTL_P)
2826 vcpu->arch.mcg_ctl = ~(u64)0;
2827 /* Init IA32_MCi_CTL to all 1s */
2828 for (bank = 0; bank < bank_num; bank++)
2829 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2834 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2835 struct kvm_x86_mce *mce)
2837 u64 mcg_cap = vcpu->arch.mcg_cap;
2838 unsigned bank_num = mcg_cap & 0xff;
2839 u64 *banks = vcpu->arch.mce_banks;
2841 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2844 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2845 * reporting is disabled
2847 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2848 vcpu->arch.mcg_ctl != ~(u64)0)
2850 banks += 4 * mce->bank;
2852 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2853 * reporting is disabled for the bank
2855 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2857 if (mce->status & MCI_STATUS_UC) {
2858 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2859 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2860 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2863 if (banks[1] & MCI_STATUS_VAL)
2864 mce->status |= MCI_STATUS_OVER;
2865 banks[2] = mce->addr;
2866 banks[3] = mce->misc;
2867 vcpu->arch.mcg_status = mce->mcg_status;
2868 banks[1] = mce->status;
2869 kvm_queue_exception(vcpu, MC_VECTOR);
2870 } else if (!(banks[1] & MCI_STATUS_VAL)
2871 || !(banks[1] & MCI_STATUS_UC)) {
2872 if (banks[1] & MCI_STATUS_VAL)
2873 mce->status |= MCI_STATUS_OVER;
2874 banks[2] = mce->addr;
2875 banks[3] = mce->misc;
2876 banks[1] = mce->status;
2878 banks[1] |= MCI_STATUS_OVER;
2882 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2883 struct kvm_vcpu_events *events)
2886 events->exception.injected =
2887 vcpu->arch.exception.pending &&
2888 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2889 events->exception.nr = vcpu->arch.exception.nr;
2890 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2891 events->exception.pad = 0;
2892 events->exception.error_code = vcpu->arch.exception.error_code;
2894 events->interrupt.injected =
2895 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2896 events->interrupt.nr = vcpu->arch.interrupt.nr;
2897 events->interrupt.soft = 0;
2898 events->interrupt.shadow =
2899 kvm_x86_ops->get_interrupt_shadow(vcpu,
2900 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2902 events->nmi.injected = vcpu->arch.nmi_injected;
2903 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2904 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2905 events->nmi.pad = 0;
2907 events->sipi_vector = 0; /* never valid when reporting to user space */
2909 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2910 | KVM_VCPUEVENT_VALID_SHADOW);
2911 memset(&events->reserved, 0, sizeof(events->reserved));
2914 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2915 struct kvm_vcpu_events *events)
2917 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2918 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2919 | KVM_VCPUEVENT_VALID_SHADOW))
2923 vcpu->arch.exception.pending = events->exception.injected;
2924 vcpu->arch.exception.nr = events->exception.nr;
2925 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2926 vcpu->arch.exception.error_code = events->exception.error_code;
2928 vcpu->arch.interrupt.pending = events->interrupt.injected;
2929 vcpu->arch.interrupt.nr = events->interrupt.nr;
2930 vcpu->arch.interrupt.soft = events->interrupt.soft;
2931 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2932 kvm_x86_ops->set_interrupt_shadow(vcpu,
2933 events->interrupt.shadow);
2935 vcpu->arch.nmi_injected = events->nmi.injected;
2936 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2937 vcpu->arch.nmi_pending = events->nmi.pending;
2938 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2940 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2941 kvm_vcpu_has_lapic(vcpu))
2942 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2944 kvm_make_request(KVM_REQ_EVENT, vcpu);
2949 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2950 struct kvm_debugregs *dbgregs)
2952 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2953 dbgregs->dr6 = vcpu->arch.dr6;
2954 dbgregs->dr7 = vcpu->arch.dr7;
2956 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2959 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2960 struct kvm_debugregs *dbgregs)
2965 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2966 vcpu->arch.dr6 = dbgregs->dr6;
2967 vcpu->arch.dr7 = dbgregs->dr7;
2972 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2973 struct kvm_xsave *guest_xsave)
2976 memcpy(guest_xsave->region,
2977 &vcpu->arch.guest_fpu.state->xsave,
2980 memcpy(guest_xsave->region,
2981 &vcpu->arch.guest_fpu.state->fxsave,
2982 sizeof(struct i387_fxsave_struct));
2983 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2988 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2989 struct kvm_xsave *guest_xsave)
2992 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2995 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2996 guest_xsave->region, xstate_size);
2998 if (xstate_bv & ~XSTATE_FPSSE)
3000 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3001 guest_xsave->region, sizeof(struct i387_fxsave_struct));
3006 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3007 struct kvm_xcrs *guest_xcrs)
3009 if (!cpu_has_xsave) {
3010 guest_xcrs->nr_xcrs = 0;
3014 guest_xcrs->nr_xcrs = 1;
3015 guest_xcrs->flags = 0;
3016 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3017 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3020 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3021 struct kvm_xcrs *guest_xcrs)
3028 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3031 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3032 /* Only support XCR0 currently */
3033 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3034 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3035 guest_xcrs->xcrs[0].value);
3044 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3045 * stopped by the hypervisor. This function will be called from the host only.
3046 * EINVAL is returned when the host attempts to set the flag for a guest that
3047 * does not support pv clocks.
3049 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3051 if (!vcpu->arch.pv_time_enabled)
3053 vcpu->arch.pvclock_set_guest_stopped_request = true;
3054 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3058 long kvm_arch_vcpu_ioctl(struct file *filp,
3059 unsigned int ioctl, unsigned long arg)
3061 struct kvm_vcpu *vcpu = filp->private_data;
3062 void __user *argp = (void __user *)arg;
3065 struct kvm_lapic_state *lapic;
3066 struct kvm_xsave *xsave;
3067 struct kvm_xcrs *xcrs;
3073 case KVM_GET_LAPIC: {
3075 if (!vcpu->arch.apic)
3077 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3082 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3086 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3091 case KVM_SET_LAPIC: {
3093 if (!vcpu->arch.apic)
3095 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3096 if (IS_ERR(u.lapic))
3097 return PTR_ERR(u.lapic);
3099 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3102 case KVM_INTERRUPT: {
3103 struct kvm_interrupt irq;
3106 if (copy_from_user(&irq, argp, sizeof irq))
3108 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3112 r = kvm_vcpu_ioctl_nmi(vcpu);
3115 case KVM_SET_CPUID: {
3116 struct kvm_cpuid __user *cpuid_arg = argp;
3117 struct kvm_cpuid cpuid;
3120 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3122 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3125 case KVM_SET_CPUID2: {
3126 struct kvm_cpuid2 __user *cpuid_arg = argp;
3127 struct kvm_cpuid2 cpuid;
3130 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3132 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3133 cpuid_arg->entries);
3136 case KVM_GET_CPUID2: {
3137 struct kvm_cpuid2 __user *cpuid_arg = argp;
3138 struct kvm_cpuid2 cpuid;
3141 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3143 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3144 cpuid_arg->entries);
3148 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3154 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3157 r = msr_io(vcpu, argp, do_set_msr, 0);
3159 case KVM_TPR_ACCESS_REPORTING: {
3160 struct kvm_tpr_access_ctl tac;
3163 if (copy_from_user(&tac, argp, sizeof tac))
3165 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3169 if (copy_to_user(argp, &tac, sizeof tac))
3174 case KVM_SET_VAPIC_ADDR: {
3175 struct kvm_vapic_addr va;
3178 if (!irqchip_in_kernel(vcpu->kvm))
3181 if (copy_from_user(&va, argp, sizeof va))
3184 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3187 case KVM_X86_SETUP_MCE: {
3191 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3193 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3196 case KVM_X86_SET_MCE: {
3197 struct kvm_x86_mce mce;
3200 if (copy_from_user(&mce, argp, sizeof mce))
3202 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3205 case KVM_GET_VCPU_EVENTS: {
3206 struct kvm_vcpu_events events;
3208 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3211 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3216 case KVM_SET_VCPU_EVENTS: {
3217 struct kvm_vcpu_events events;
3220 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3223 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3226 case KVM_GET_DEBUGREGS: {
3227 struct kvm_debugregs dbgregs;
3229 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3232 if (copy_to_user(argp, &dbgregs,
3233 sizeof(struct kvm_debugregs)))
3238 case KVM_SET_DEBUGREGS: {
3239 struct kvm_debugregs dbgregs;
3242 if (copy_from_user(&dbgregs, argp,
3243 sizeof(struct kvm_debugregs)))
3246 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3249 case KVM_GET_XSAVE: {
3250 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3255 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3258 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3263 case KVM_SET_XSAVE: {
3264 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3265 if (IS_ERR(u.xsave))
3266 return PTR_ERR(u.xsave);
3268 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3271 case KVM_GET_XCRS: {
3272 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3277 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3280 if (copy_to_user(argp, u.xcrs,
3281 sizeof(struct kvm_xcrs)))
3286 case KVM_SET_XCRS: {
3287 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3289 return PTR_ERR(u.xcrs);
3291 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3294 case KVM_SET_TSC_KHZ: {
3298 user_tsc_khz = (u32)arg;
3300 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3303 if (user_tsc_khz == 0)
3304 user_tsc_khz = tsc_khz;
3306 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3311 case KVM_GET_TSC_KHZ: {
3312 r = vcpu->arch.virtual_tsc_khz;
3315 case KVM_KVMCLOCK_CTRL: {
3316 r = kvm_set_guest_paused(vcpu);
3327 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3329 return VM_FAULT_SIGBUS;
3332 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3336 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3338 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3342 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3345 kvm->arch.ept_identity_map_addr = ident_addr;
3349 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3350 u32 kvm_nr_mmu_pages)
3352 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3355 mutex_lock(&kvm->slots_lock);
3357 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3358 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3360 mutex_unlock(&kvm->slots_lock);
3364 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3366 return kvm->arch.n_max_mmu_pages;
3369 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3374 switch (chip->chip_id) {
3375 case KVM_IRQCHIP_PIC_MASTER:
3376 memcpy(&chip->chip.pic,
3377 &pic_irqchip(kvm)->pics[0],
3378 sizeof(struct kvm_pic_state));
3380 case KVM_IRQCHIP_PIC_SLAVE:
3381 memcpy(&chip->chip.pic,
3382 &pic_irqchip(kvm)->pics[1],
3383 sizeof(struct kvm_pic_state));
3385 case KVM_IRQCHIP_IOAPIC:
3386 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3395 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3400 switch (chip->chip_id) {
3401 case KVM_IRQCHIP_PIC_MASTER:
3402 spin_lock(&pic_irqchip(kvm)->lock);
3403 memcpy(&pic_irqchip(kvm)->pics[0],
3405 sizeof(struct kvm_pic_state));
3406 spin_unlock(&pic_irqchip(kvm)->lock);
3408 case KVM_IRQCHIP_PIC_SLAVE:
3409 spin_lock(&pic_irqchip(kvm)->lock);
3410 memcpy(&pic_irqchip(kvm)->pics[1],
3412 sizeof(struct kvm_pic_state));
3413 spin_unlock(&pic_irqchip(kvm)->lock);
3415 case KVM_IRQCHIP_IOAPIC:
3416 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3422 kvm_pic_update_irq(pic_irqchip(kvm));
3426 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3430 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3431 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3432 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3436 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3440 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3441 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3442 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3443 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3447 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3451 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3452 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3453 sizeof(ps->channels));
3454 ps->flags = kvm->arch.vpit->pit_state.flags;
3455 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456 memset(&ps->reserved, 0, sizeof(ps->reserved));
3460 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3462 int r = 0, start = 0;
3463 u32 prev_legacy, cur_legacy;
3464 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3465 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3466 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3467 if (!prev_legacy && cur_legacy)
3469 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3470 sizeof(kvm->arch.vpit->pit_state.channels));
3471 kvm->arch.vpit->pit_state.flags = ps->flags;
3472 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3473 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3477 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3478 struct kvm_reinject_control *control)
3480 if (!kvm->arch.vpit)
3482 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3483 kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3484 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3489 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3490 * @kvm: kvm instance
3491 * @log: slot id and address to which we copy the log
3493 * We need to keep it in mind that VCPU threads can write to the bitmap
3494 * concurrently. So, to avoid losing data, we keep the following order for
3497 * 1. Take a snapshot of the bit and clear it if needed.
3498 * 2. Write protect the corresponding page.
3499 * 3. Flush TLB's if needed.
3500 * 4. Copy the snapshot to the userspace.
3502 * Between 2 and 3, the guest may write to the page using the remaining TLB
3503 * entry. This is not a problem because the page will be reported dirty at
3504 * step 4 using the snapshot taken before and step 3 ensures that successive
3505 * writes will be logged for the next call.
3507 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3510 struct kvm_memory_slot *memslot;
3512 unsigned long *dirty_bitmap;
3513 unsigned long *dirty_bitmap_buffer;
3514 bool is_dirty = false;
3516 mutex_lock(&kvm->slots_lock);
3519 if (log->slot >= KVM_USER_MEM_SLOTS)
3522 memslot = id_to_memslot(kvm->memslots, log->slot);
3524 dirty_bitmap = memslot->dirty_bitmap;
3529 n = kvm_dirty_bitmap_bytes(memslot);
3531 dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3532 memset(dirty_bitmap_buffer, 0, n);
3534 spin_lock(&kvm->mmu_lock);
3536 for (i = 0; i < n / sizeof(long); i++) {
3540 if (!dirty_bitmap[i])
3545 mask = xchg(&dirty_bitmap[i], 0);
3546 dirty_bitmap_buffer[i] = mask;
3548 offset = i * BITS_PER_LONG;
3549 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3552 kvm_flush_remote_tlbs(kvm);
3554 spin_unlock(&kvm->mmu_lock);
3557 if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3562 mutex_unlock(&kvm->slots_lock);
3566 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3569 if (!irqchip_in_kernel(kvm))
3572 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3573 irq_event->irq, irq_event->level,
3578 long kvm_arch_vm_ioctl(struct file *filp,
3579 unsigned int ioctl, unsigned long arg)
3581 struct kvm *kvm = filp->private_data;
3582 void __user *argp = (void __user *)arg;
3585 * This union makes it completely explicit to gcc-3.x
3586 * that these two variables' stack usage should be
3587 * combined, not added together.
3590 struct kvm_pit_state ps;
3591 struct kvm_pit_state2 ps2;
3592 struct kvm_pit_config pit_config;
3596 case KVM_SET_TSS_ADDR:
3597 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3599 case KVM_SET_IDENTITY_MAP_ADDR: {
3603 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3605 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3608 case KVM_SET_NR_MMU_PAGES:
3609 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3611 case KVM_GET_NR_MMU_PAGES:
3612 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3614 case KVM_CREATE_IRQCHIP: {
3615 struct kvm_pic *vpic;
3617 mutex_lock(&kvm->lock);
3620 goto create_irqchip_unlock;
3622 if (atomic_read(&kvm->online_vcpus))
3623 goto create_irqchip_unlock;
3625 vpic = kvm_create_pic(kvm);
3627 r = kvm_ioapic_init(kvm);
3629 mutex_lock(&kvm->slots_lock);
3630 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3632 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3634 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3636 mutex_unlock(&kvm->slots_lock);
3638 goto create_irqchip_unlock;
3641 goto create_irqchip_unlock;
3643 kvm->arch.vpic = vpic;
3645 r = kvm_setup_default_irq_routing(kvm);
3647 mutex_lock(&kvm->slots_lock);
3648 mutex_lock(&kvm->irq_lock);
3649 kvm_ioapic_destroy(kvm);
3650 kvm_destroy_pic(kvm);
3651 mutex_unlock(&kvm->irq_lock);
3652 mutex_unlock(&kvm->slots_lock);
3654 create_irqchip_unlock:
3655 mutex_unlock(&kvm->lock);
3658 case KVM_CREATE_PIT:
3659 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3661 case KVM_CREATE_PIT2:
3663 if (copy_from_user(&u.pit_config, argp,
3664 sizeof(struct kvm_pit_config)))
3667 mutex_lock(&kvm->slots_lock);
3670 goto create_pit_unlock;
3672 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3676 mutex_unlock(&kvm->slots_lock);
3678 case KVM_GET_IRQCHIP: {
3679 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3680 struct kvm_irqchip *chip;
3682 chip = memdup_user(argp, sizeof(*chip));
3689 if (!irqchip_in_kernel(kvm))
3690 goto get_irqchip_out;
3691 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3693 goto get_irqchip_out;
3695 if (copy_to_user(argp, chip, sizeof *chip))
3696 goto get_irqchip_out;
3702 case KVM_SET_IRQCHIP: {
3703 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3704 struct kvm_irqchip *chip;
3706 chip = memdup_user(argp, sizeof(*chip));
3713 if (!irqchip_in_kernel(kvm))
3714 goto set_irqchip_out;
3715 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3717 goto set_irqchip_out;
3725 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3728 if (!kvm->arch.vpit)
3730 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3734 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3741 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3744 if (!kvm->arch.vpit)
3746 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3749 case KVM_GET_PIT2: {
3751 if (!kvm->arch.vpit)
3753 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3757 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3762 case KVM_SET_PIT2: {
3764 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3767 if (!kvm->arch.vpit)
3769 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3772 case KVM_REINJECT_CONTROL: {
3773 struct kvm_reinject_control control;
3775 if (copy_from_user(&control, argp, sizeof(control)))
3777 r = kvm_vm_ioctl_reinject(kvm, &control);
3780 case KVM_XEN_HVM_CONFIG: {
3782 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3783 sizeof(struct kvm_xen_hvm_config)))
3786 if (kvm->arch.xen_hvm_config.flags)
3791 case KVM_SET_CLOCK: {
3792 struct kvm_clock_data user_ns;
3797 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3805 local_irq_disable();
3806 now_ns = get_kernel_ns();
3807 delta = user_ns.clock - now_ns;
3809 kvm->arch.kvmclock_offset = delta;
3812 case KVM_GET_CLOCK: {
3813 struct kvm_clock_data user_ns;
3816 local_irq_disable();
3817 now_ns = get_kernel_ns();
3818 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3821 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3824 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3837 static void kvm_init_msr_list(void)
3842 /* skip the first msrs in the list. KVM-specific */
3843 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3844 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3847 msrs_to_save[j] = msrs_to_save[i];
3850 num_msrs_to_save = j;
3853 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3861 if (!(vcpu->arch.apic &&
3862 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3863 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3874 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3881 if (!(vcpu->arch.apic &&
3882 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3883 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3885 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3895 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3896 struct kvm_segment *var, int seg)
3898 kvm_x86_ops->set_segment(vcpu, var, seg);
3901 void kvm_get_segment(struct kvm_vcpu *vcpu,
3902 struct kvm_segment *var, int seg)
3904 kvm_x86_ops->get_segment(vcpu, var, seg);
3907 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3910 struct x86_exception exception;
3912 BUG_ON(!mmu_is_nested(vcpu));
3914 /* NPT walks are always user-walks */
3915 access |= PFERR_USER_MASK;
3916 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3921 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3922 struct x86_exception *exception)
3924 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3925 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3928 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3929 struct x86_exception *exception)
3931 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3932 access |= PFERR_FETCH_MASK;
3933 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3936 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3937 struct x86_exception *exception)
3939 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3940 access |= PFERR_WRITE_MASK;
3941 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3944 /* uses this to access any guest's mapped memory without checking CPL */
3945 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3946 struct x86_exception *exception)
3948 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3951 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3952 struct kvm_vcpu *vcpu, u32 access,
3953 struct x86_exception *exception)
3956 int r = X86EMUL_CONTINUE;
3959 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3961 unsigned offset = addr & (PAGE_SIZE-1);
3962 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3965 if (gpa == UNMAPPED_GVA)
3966 return X86EMUL_PROPAGATE_FAULT;
3967 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3969 r = X86EMUL_IO_NEEDED;
3981 /* used for instruction fetching */
3982 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3983 gva_t addr, void *val, unsigned int bytes,
3984 struct x86_exception *exception)
3986 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3987 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3989 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3990 access | PFERR_FETCH_MASK,
3994 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3995 gva_t addr, void *val, unsigned int bytes,
3996 struct x86_exception *exception)
3998 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3999 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4001 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4004 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4006 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4007 gva_t addr, void *val, unsigned int bytes,
4008 struct x86_exception *exception)
4010 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4011 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4014 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4015 gva_t addr, void *val,
4017 struct x86_exception *exception)
4019 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4021 int r = X86EMUL_CONTINUE;
4024 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4027 unsigned offset = addr & (PAGE_SIZE-1);
4028 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4031 if (gpa == UNMAPPED_GVA)
4032 return X86EMUL_PROPAGATE_FAULT;
4033 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4035 r = X86EMUL_IO_NEEDED;
4046 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4048 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4049 gpa_t *gpa, struct x86_exception *exception,
4052 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4053 | (write ? PFERR_WRITE_MASK : 0);
4055 if (vcpu_match_mmio_gva(vcpu, gva)
4056 && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4057 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4058 (gva & (PAGE_SIZE - 1));
4059 trace_vcpu_match_mmio(gva, *gpa, write, false);
4063 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4065 if (*gpa == UNMAPPED_GVA)
4068 /* For APIC access vmexit */
4069 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4072 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4073 trace_vcpu_match_mmio(gva, *gpa, write, true);
4080 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4081 const void *val, int bytes)
4085 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4088 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4092 struct read_write_emulator_ops {
4093 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4095 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4096 void *val, int bytes);
4097 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4098 int bytes, void *val);
4099 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4100 void *val, int bytes);
4104 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4106 if (vcpu->mmio_read_completed) {
4107 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4108 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4109 vcpu->mmio_read_completed = 0;
4116 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4117 void *val, int bytes)
4119 return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4122 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4123 void *val, int bytes)
4125 return emulator_write_phys(vcpu, gpa, val, bytes);
4128 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4130 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4131 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4134 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4135 void *val, int bytes)
4137 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4138 return X86EMUL_IO_NEEDED;
4141 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4142 void *val, int bytes)
4144 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4146 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4147 return X86EMUL_CONTINUE;
4150 static const struct read_write_emulator_ops read_emultor = {
4151 .read_write_prepare = read_prepare,
4152 .read_write_emulate = read_emulate,
4153 .read_write_mmio = vcpu_mmio_read,
4154 .read_write_exit_mmio = read_exit_mmio,
4157 static const struct read_write_emulator_ops write_emultor = {
4158 .read_write_emulate = write_emulate,
4159 .read_write_mmio = write_mmio,
4160 .read_write_exit_mmio = write_exit_mmio,
4164 static int emulator_read_write_onepage(unsigned long addr, void *val,
4166 struct x86_exception *exception,
4167 struct kvm_vcpu *vcpu,
4168 const struct read_write_emulator_ops *ops)
4172 bool write = ops->write;
4173 struct kvm_mmio_fragment *frag;
4175 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4178 return X86EMUL_PROPAGATE_FAULT;
4180 /* For APIC access vmexit */
4184 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4185 return X86EMUL_CONTINUE;
4189 * Is this MMIO handled locally?
4191 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4192 if (handled == bytes)
4193 return X86EMUL_CONTINUE;
4199 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4200 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4204 return X86EMUL_CONTINUE;
4207 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4208 void *val, unsigned int bytes,
4209 struct x86_exception *exception,
4210 const struct read_write_emulator_ops *ops)
4212 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4216 if (ops->read_write_prepare &&
4217 ops->read_write_prepare(vcpu, val, bytes))
4218 return X86EMUL_CONTINUE;
4220 vcpu->mmio_nr_fragments = 0;
4222 /* Crossing a page boundary? */
4223 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4226 now = -addr & ~PAGE_MASK;
4227 rc = emulator_read_write_onepage(addr, val, now, exception,
4230 if (rc != X86EMUL_CONTINUE)
4237 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4239 if (rc != X86EMUL_CONTINUE)
4242 if (!vcpu->mmio_nr_fragments)
4245 gpa = vcpu->mmio_fragments[0].gpa;
4247 vcpu->mmio_needed = 1;
4248 vcpu->mmio_cur_fragment = 0;
4250 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4251 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4252 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4253 vcpu->run->mmio.phys_addr = gpa;
4255 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4258 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4262 struct x86_exception *exception)
4264 return emulator_read_write(ctxt, addr, val, bytes,
4265 exception, &read_emultor);
4268 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4272 struct x86_exception *exception)
4274 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4275 exception, &write_emultor);
4278 #define CMPXCHG_TYPE(t, ptr, old, new) \
4279 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4281 #ifdef CONFIG_X86_64
4282 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4284 # define CMPXCHG64(ptr, old, new) \
4285 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4288 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4293 struct x86_exception *exception)
4295 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4301 /* guests cmpxchg8b have to be emulated atomically */
4302 if (bytes > 8 || (bytes & (bytes - 1)))
4305 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4307 if (gpa == UNMAPPED_GVA ||
4308 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4311 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4314 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4315 if (is_error_page(page))
4318 kaddr = kmap_atomic(page);
4319 kaddr += offset_in_page(gpa);
4322 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4325 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4328 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4331 exchanged = CMPXCHG64(kaddr, old, new);
4336 kunmap_atomic(kaddr);
4337 kvm_release_page_dirty(page);
4340 return X86EMUL_CMPXCHG_FAILED;
4342 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4344 return X86EMUL_CONTINUE;
4347 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4349 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4352 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4354 /* TODO: String I/O for in kernel device */
4357 if (vcpu->arch.pio.in)
4358 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4359 vcpu->arch.pio.size, pd);
4361 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4362 vcpu->arch.pio.port, vcpu->arch.pio.size,
4367 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4368 unsigned short port, void *val,
4369 unsigned int count, bool in)
4371 trace_kvm_pio(!in, port, size, count);
4373 vcpu->arch.pio.port = port;
4374 vcpu->arch.pio.in = in;
4375 vcpu->arch.pio.count = count;
4376 vcpu->arch.pio.size = size;
4378 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4379 vcpu->arch.pio.count = 0;
4383 vcpu->run->exit_reason = KVM_EXIT_IO;
4384 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4385 vcpu->run->io.size = size;
4386 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4387 vcpu->run->io.count = count;
4388 vcpu->run->io.port = port;
4393 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4394 int size, unsigned short port, void *val,
4397 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4400 if (vcpu->arch.pio.count)
4403 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4406 memcpy(val, vcpu->arch.pio_data, size * count);
4407 vcpu->arch.pio.count = 0;
4414 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4415 int size, unsigned short port,
4416 const void *val, unsigned int count)
4418 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4420 memcpy(vcpu->arch.pio_data, val, size * count);
4421 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4424 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4426 return kvm_x86_ops->get_segment_base(vcpu, seg);
4429 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4431 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4434 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4436 if (!need_emulate_wbinvd(vcpu))
4437 return X86EMUL_CONTINUE;
4439 if (kvm_x86_ops->has_wbinvd_exit()) {
4440 int cpu = get_cpu();
4442 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4443 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4444 wbinvd_ipi, NULL, 1);
4446 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4449 return X86EMUL_CONTINUE;
4451 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4453 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4455 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4458 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4460 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4463 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4466 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4469 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4471 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4474 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4476 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4477 unsigned long value;
4481 value = kvm_read_cr0(vcpu);
4484 value = vcpu->arch.cr2;
4487 value = kvm_read_cr3(vcpu);
4490 value = kvm_read_cr4(vcpu);
4493 value = kvm_get_cr8(vcpu);
4496 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4503 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4505 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4510 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4513 vcpu->arch.cr2 = val;
4516 res = kvm_set_cr3(vcpu, val);
4519 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4522 res = kvm_set_cr8(vcpu, val);
4525 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4532 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4534 kvm_set_rflags(emul_to_vcpu(ctxt), val);
4537 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4539 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4542 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4544 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4547 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4549 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4552 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4554 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4557 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4559 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4562 static unsigned long emulator_get_cached_segment_base(
4563 struct x86_emulate_ctxt *ctxt, int seg)
4565 return get_segment_base(emul_to_vcpu(ctxt), seg);
4568 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4569 struct desc_struct *desc, u32 *base3,
4572 struct kvm_segment var;
4574 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4575 *selector = var.selector;
4578 memset(desc, 0, sizeof(*desc));
4584 set_desc_limit(desc, var.limit);
4585 set_desc_base(desc, (unsigned long)var.base);
4586 #ifdef CONFIG_X86_64
4588 *base3 = var.base >> 32;
4590 desc->type = var.type;
4592 desc->dpl = var.dpl;
4593 desc->p = var.present;
4594 desc->avl = var.avl;
4602 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4603 struct desc_struct *desc, u32 base3,
4606 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4607 struct kvm_segment var;
4609 var.selector = selector;
4610 var.base = get_desc_base(desc);
4611 #ifdef CONFIG_X86_64
4612 var.base |= ((u64)base3) << 32;
4614 var.limit = get_desc_limit(desc);
4616 var.limit = (var.limit << 12) | 0xfff;
4617 var.type = desc->type;
4618 var.present = desc->p;
4619 var.dpl = desc->dpl;
4624 var.avl = desc->avl;
4625 var.present = desc->p;
4626 var.unusable = !var.present;
4629 kvm_set_segment(vcpu, &var, seg);
4633 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4634 u32 msr_index, u64 *pdata)
4636 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4639 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4640 u32 msr_index, u64 data)
4642 struct msr_data msr;
4645 msr.index = msr_index;
4646 msr.host_initiated = false;
4647 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4650 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4651 u32 pmc, u64 *pdata)
4653 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4656 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4658 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4661 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4664 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4666 * CR0.TS may reference the host fpu state, not the guest fpu state,
4667 * so it may be clear at this point.
4672 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4677 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4678 struct x86_instruction_info *info,
4679 enum x86_intercept_stage stage)
4681 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4684 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4685 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4687 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4690 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4692 return kvm_register_read(emul_to_vcpu(ctxt), reg);
4695 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4697 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4700 static const struct x86_emulate_ops emulate_ops = {
4701 .read_gpr = emulator_read_gpr,
4702 .write_gpr = emulator_write_gpr,
4703 .read_std = kvm_read_guest_virt_system,
4704 .write_std = kvm_write_guest_virt_system,
4705 .fetch = kvm_fetch_guest_virt,
4706 .read_emulated = emulator_read_emulated,
4707 .write_emulated = emulator_write_emulated,
4708 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4709 .invlpg = emulator_invlpg,
4710 .pio_in_emulated = emulator_pio_in_emulated,
4711 .pio_out_emulated = emulator_pio_out_emulated,
4712 .get_segment = emulator_get_segment,
4713 .set_segment = emulator_set_segment,
4714 .get_cached_segment_base = emulator_get_cached_segment_base,
4715 .get_gdt = emulator_get_gdt,
4716 .get_idt = emulator_get_idt,
4717 .set_gdt = emulator_set_gdt,
4718 .set_idt = emulator_set_idt,
4719 .get_cr = emulator_get_cr,
4720 .set_cr = emulator_set_cr,
4721 .set_rflags = emulator_set_rflags,
4722 .cpl = emulator_get_cpl,
4723 .get_dr = emulator_get_dr,
4724 .set_dr = emulator_set_dr,
4725 .set_msr = emulator_set_msr,
4726 .get_msr = emulator_get_msr,
4727 .read_pmc = emulator_read_pmc,
4728 .halt = emulator_halt,
4729 .wbinvd = emulator_wbinvd,
4730 .fix_hypercall = emulator_fix_hypercall,
4731 .get_fpu = emulator_get_fpu,
4732 .put_fpu = emulator_put_fpu,
4733 .intercept = emulator_intercept,
4734 .get_cpuid = emulator_get_cpuid,
4737 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4739 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4741 * an sti; sti; sequence only disable interrupts for the first
4742 * instruction. So, if the last instruction, be it emulated or
4743 * not, left the system with the INT_STI flag enabled, it
4744 * means that the last instruction is an sti. We should not
4745 * leave the flag on in this case. The same goes for mov ss
4747 if (!(int_shadow & mask))
4748 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4751 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4753 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4754 if (ctxt->exception.vector == PF_VECTOR)
4755 kvm_propagate_fault(vcpu, &ctxt->exception);
4756 else if (ctxt->exception.error_code_valid)
4757 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4758 ctxt->exception.error_code);
4760 kvm_queue_exception(vcpu, ctxt->exception.vector);
4763 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4765 memset(&ctxt->twobyte, 0,
4766 (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4768 ctxt->fetch.start = 0;
4769 ctxt->fetch.end = 0;
4770 ctxt->io_read.pos = 0;
4771 ctxt->io_read.end = 0;
4772 ctxt->mem_read.pos = 0;
4773 ctxt->mem_read.end = 0;
4776 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4778 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4781 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4783 ctxt->eflags = kvm_get_rflags(vcpu);
4784 ctxt->eip = kvm_rip_read(vcpu);
4785 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4786 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
4787 cs_l ? X86EMUL_MODE_PROT64 :
4788 cs_db ? X86EMUL_MODE_PROT32 :
4789 X86EMUL_MODE_PROT16;
4790 ctxt->guest_mode = is_guest_mode(vcpu);
4792 init_decode_cache(ctxt);
4793 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4796 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4798 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4801 init_emulate_ctxt(vcpu);
4805 ctxt->_eip = ctxt->eip + inc_eip;
4806 ret = emulate_int_real(ctxt, irq);
4808 if (ret != X86EMUL_CONTINUE)
4809 return EMULATE_FAIL;
4811 ctxt->eip = ctxt->_eip;
4812 kvm_rip_write(vcpu, ctxt->eip);
4813 kvm_set_rflags(vcpu, ctxt->eflags);
4815 if (irq == NMI_VECTOR)
4816 vcpu->arch.nmi_pending = 0;
4818 vcpu->arch.interrupt.pending = false;
4820 return EMULATE_DONE;
4822 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4824 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4826 int r = EMULATE_DONE;
4828 ++vcpu->stat.insn_emulation_fail;
4829 trace_kvm_emulate_insn_failed(vcpu);
4830 if (!is_guest_mode(vcpu)) {
4831 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4832 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4833 vcpu->run->internal.ndata = 0;
4836 kvm_queue_exception(vcpu, UD_VECTOR);
4841 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4842 bool write_fault_to_shadow_pgtable,
4848 if (emulation_type & EMULTYPE_NO_REEXECUTE)
4851 if (!vcpu->arch.mmu.direct_map) {
4853 * Write permission should be allowed since only
4854 * write access need to be emulated.
4856 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4859 * If the mapping is invalid in guest, let cpu retry
4860 * it to generate fault.
4862 if (gpa == UNMAPPED_GVA)
4867 * Do not retry the unhandleable instruction if it faults on the
4868 * readonly host memory, otherwise it will goto a infinite loop:
4869 * retry instruction -> write #PF -> emulation fail -> retry
4870 * instruction -> ...
4872 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4875 * If the instruction failed on the error pfn, it can not be fixed,
4876 * report the error to userspace.
4878 if (is_error_noslot_pfn(pfn))
4881 kvm_release_pfn_clean(pfn);
4883 /* The instructions are well-emulated on direct mmu. */
4884 if (vcpu->arch.mmu.direct_map) {
4885 unsigned int indirect_shadow_pages;
4887 spin_lock(&vcpu->kvm->mmu_lock);
4888 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4889 spin_unlock(&vcpu->kvm->mmu_lock);
4891 if (indirect_shadow_pages)
4892 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4898 * if emulation was due to access to shadowed page table
4899 * and it failed try to unshadow page and re-enter the
4900 * guest to let CPU execute the instruction.
4902 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4905 * If the access faults on its page table, it can not
4906 * be fixed by unprotecting shadow page and it should
4907 * be reported to userspace.
4909 return !write_fault_to_shadow_pgtable;
4912 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4913 unsigned long cr2, int emulation_type)
4915 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4916 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4918 last_retry_eip = vcpu->arch.last_retry_eip;
4919 last_retry_addr = vcpu->arch.last_retry_addr;
4922 * If the emulation is caused by #PF and it is non-page_table
4923 * writing instruction, it means the VM-EXIT is caused by shadow
4924 * page protected, we can zap the shadow page and retry this
4925 * instruction directly.
4927 * Note: if the guest uses a non-page-table modifying instruction
4928 * on the PDE that points to the instruction, then we will unmap
4929 * the instruction and go to an infinite loop. So, we cache the
4930 * last retried eip and the last fault address, if we meet the eip
4931 * and the address again, we can break out of the potential infinite
4934 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4936 if (!(emulation_type & EMULTYPE_RETRY))
4939 if (x86_page_table_writing_insn(ctxt))
4942 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4945 vcpu->arch.last_retry_eip = ctxt->eip;
4946 vcpu->arch.last_retry_addr = cr2;
4948 if (!vcpu->arch.mmu.direct_map)
4949 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4951 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4956 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4957 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4959 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4966 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4967 bool writeback = true;
4968 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4971 * Clear write_fault_to_shadow_pgtable here to ensure it is
4974 vcpu->arch.write_fault_to_shadow_pgtable = false;
4975 kvm_clear_exception_queue(vcpu);
4977 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4978 init_emulate_ctxt(vcpu);
4979 ctxt->interruptibility = 0;
4980 ctxt->have_exception = false;
4981 ctxt->perm_ok = false;
4983 ctxt->only_vendor_specific_insn
4984 = emulation_type & EMULTYPE_TRAP_UD;
4986 r = x86_decode_insn(ctxt, insn, insn_len);
4988 trace_kvm_emulate_insn_start(vcpu);
4989 ++vcpu->stat.insn_emulation;
4990 if (r != EMULATION_OK) {
4991 if (emulation_type & EMULTYPE_TRAP_UD)
4992 return EMULATE_FAIL;
4993 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4995 return EMULATE_DONE;
4996 if (emulation_type & EMULTYPE_SKIP)
4997 return EMULATE_FAIL;
4998 return handle_emulation_failure(vcpu);
5002 if (emulation_type & EMULTYPE_SKIP) {
5003 kvm_rip_write(vcpu, ctxt->_eip);
5004 return EMULATE_DONE;
5007 if (retry_instruction(ctxt, cr2, emulation_type))
5008 return EMULATE_DONE;
5010 /* this is needed for vmware backdoor interface to work since it
5011 changes registers values during IO operation */
5012 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5013 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5014 emulator_invalidate_register_cache(ctxt);
5018 r = x86_emulate_insn(ctxt);
5020 if (r == EMULATION_INTERCEPTED)
5021 return EMULATE_DONE;
5023 if (r == EMULATION_FAILED) {
5024 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5026 return EMULATE_DONE;
5028 return handle_emulation_failure(vcpu);
5031 if (ctxt->have_exception) {
5032 inject_emulated_exception(vcpu);
5034 } else if (vcpu->arch.pio.count) {
5035 if (!vcpu->arch.pio.in)
5036 vcpu->arch.pio.count = 0;
5039 vcpu->arch.complete_userspace_io = complete_emulated_pio;
5041 r = EMULATE_DO_MMIO;
5042 } else if (vcpu->mmio_needed) {
5043 if (!vcpu->mmio_is_write)
5045 r = EMULATE_DO_MMIO;
5046 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5047 } else if (r == EMULATION_RESTART)
5053 toggle_interruptibility(vcpu, ctxt->interruptibility);
5054 kvm_set_rflags(vcpu, ctxt->eflags);
5055 kvm_make_request(KVM_REQ_EVENT, vcpu);
5056 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5057 kvm_rip_write(vcpu, ctxt->eip);
5059 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5063 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5065 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5067 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5068 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5069 size, port, &val, 1);
5070 /* do not return to emulator after return from userspace */
5071 vcpu->arch.pio.count = 0;
5074 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5076 static void tsc_bad(void *info)
5078 __this_cpu_write(cpu_tsc_khz, 0);
5081 static void tsc_khz_changed(void *data)
5083 struct cpufreq_freqs *freq = data;
5084 unsigned long khz = 0;
5088 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5089 khz = cpufreq_quick_get(raw_smp_processor_id());
5092 __this_cpu_write(cpu_tsc_khz, khz);
5095 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5098 struct cpufreq_freqs *freq = data;
5100 struct kvm_vcpu *vcpu;
5101 int i, send_ipi = 0;
5104 * We allow guests to temporarily run on slowing clocks,
5105 * provided we notify them after, or to run on accelerating
5106 * clocks, provided we notify them before. Thus time never
5109 * However, we have a problem. We can't atomically update
5110 * the frequency of a given CPU from this function; it is
5111 * merely a notifier, which can be called from any CPU.
5112 * Changing the TSC frequency at arbitrary points in time
5113 * requires a recomputation of local variables related to
5114 * the TSC for each VCPU. We must flag these local variables
5115 * to be updated and be sure the update takes place with the
5116 * new frequency before any guests proceed.
5118 * Unfortunately, the combination of hotplug CPU and frequency
5119 * change creates an intractable locking scenario; the order
5120 * of when these callouts happen is undefined with respect to
5121 * CPU hotplug, and they can race with each other. As such,
5122 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5123 * undefined; you can actually have a CPU frequency change take
5124 * place in between the computation of X and the setting of the
5125 * variable. To protect against this problem, all updates of
5126 * the per_cpu tsc_khz variable are done in an interrupt
5127 * protected IPI, and all callers wishing to update the value
5128 * must wait for a synchronous IPI to complete (which is trivial
5129 * if the caller is on the CPU already). This establishes the
5130 * necessary total order on variable updates.
5132 * Note that because a guest time update may take place
5133 * anytime after the setting of the VCPU's request bit, the
5134 * correct TSC value must be set before the request. However,
5135 * to ensure the update actually makes it to any guest which
5136 * starts running in hardware virtualization between the set
5137 * and the acquisition of the spinlock, we must also ping the
5138 * CPU after setting the request bit.
5142 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5144 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5147 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5149 raw_spin_lock(&kvm_lock);
5150 list_for_each_entry(kvm, &vm_list, vm_list) {
5151 kvm_for_each_vcpu(i, vcpu, kvm) {
5152 if (vcpu->cpu != freq->cpu)
5154 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5155 if (vcpu->cpu != smp_processor_id())
5159 raw_spin_unlock(&kvm_lock);
5161 if (freq->old < freq->new && send_ipi) {
5163 * We upscale the frequency. Must make the guest
5164 * doesn't see old kvmclock values while running with
5165 * the new frequency, otherwise we risk the guest sees
5166 * time go backwards.
5168 * In case we update the frequency for another cpu
5169 * (which might be in guest context) send an interrupt
5170 * to kick the cpu out of guest context. Next time
5171 * guest context is entered kvmclock will be updated,
5172 * so the guest will not see stale values.
5174 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5179 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5180 .notifier_call = kvmclock_cpufreq_notifier
5183 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5184 unsigned long action, void *hcpu)
5186 unsigned int cpu = (unsigned long)hcpu;
5190 case CPU_DOWN_FAILED:
5191 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5193 case CPU_DOWN_PREPARE:
5194 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5200 static struct notifier_block kvmclock_cpu_notifier_block = {
5201 .notifier_call = kvmclock_cpu_notifier,
5202 .priority = -INT_MAX
5205 static void kvm_timer_init(void)
5209 max_tsc_khz = tsc_khz;
5210 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5211 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5212 #ifdef CONFIG_CPU_FREQ
5213 struct cpufreq_policy policy;
5214 memset(&policy, 0, sizeof(policy));
5216 cpufreq_get_policy(&policy, cpu);
5217 if (policy.cpuinfo.max_freq)
5218 max_tsc_khz = policy.cpuinfo.max_freq;
5221 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5222 CPUFREQ_TRANSITION_NOTIFIER);
5224 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5225 for_each_online_cpu(cpu)
5226 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5229 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5231 int kvm_is_in_guest(void)
5233 return __this_cpu_read(current_vcpu) != NULL;
5236 static int kvm_is_user_mode(void)
5240 if (__this_cpu_read(current_vcpu))
5241 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5243 return user_mode != 0;
5246 static unsigned long kvm_get_guest_ip(void)
5248 unsigned long ip = 0;
5250 if (__this_cpu_read(current_vcpu))
5251 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5256 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5257 .is_in_guest = kvm_is_in_guest,
5258 .is_user_mode = kvm_is_user_mode,
5259 .get_guest_ip = kvm_get_guest_ip,
5262 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5264 __this_cpu_write(current_vcpu, vcpu);
5266 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5268 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5270 __this_cpu_write(current_vcpu, NULL);
5272 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5274 static void kvm_set_mmio_spte_mask(void)
5277 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5280 * Set the reserved bits and the present bit of an paging-structure
5281 * entry to generate page fault with PFER.RSV = 1.
5283 /* Mask the reserved physical address bits. */
5284 mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5286 /* Bit 62 is always reserved for 32bit host. */
5287 mask |= 0x3ull << 62;
5289 /* Set the present bit. */
5292 #ifdef CONFIG_X86_64
5294 * If reserved bit is not supported, clear the present bit to disable
5297 if (maxphyaddr == 52)
5301 kvm_mmu_set_mmio_spte_mask(mask);
5304 #ifdef CONFIG_X86_64
5305 static void pvclock_gtod_update_fn(struct work_struct *work)
5309 struct kvm_vcpu *vcpu;
5312 raw_spin_lock(&kvm_lock);
5313 list_for_each_entry(kvm, &vm_list, vm_list)
5314 kvm_for_each_vcpu(i, vcpu, kvm)
5315 set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5316 atomic_set(&kvm_guest_has_master_clock, 0);
5317 raw_spin_unlock(&kvm_lock);
5320 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5323 * Notification about pvclock gtod data update.
5325 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5328 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5329 struct timekeeper *tk = priv;
5331 update_pvclock_gtod(tk);
5333 /* disable master clock if host does not trust, or does not
5334 * use, TSC clocksource
5336 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5337 atomic_read(&kvm_guest_has_master_clock) != 0)
5338 queue_work(system_long_wq, &pvclock_gtod_work);
5343 static struct notifier_block pvclock_gtod_notifier = {
5344 .notifier_call = pvclock_gtod_notify,
5348 int kvm_arch_init(void *opaque)
5351 struct kvm_x86_ops *ops = opaque;
5354 printk(KERN_ERR "kvm: already loaded the other module\n");
5359 if (!ops->cpu_has_kvm_support()) {
5360 printk(KERN_ERR "kvm: no hardware support\n");
5364 if (ops->disabled_by_bios()) {
5365 printk(KERN_ERR "kvm: disabled by bios\n");
5371 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5373 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5377 r = kvm_mmu_module_init();
5379 goto out_free_percpu;
5381 kvm_set_mmio_spte_mask();
5382 kvm_init_msr_list();
5385 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5386 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5390 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5393 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5396 #ifdef CONFIG_X86_64
5397 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5403 free_percpu(shared_msrs);
5408 void kvm_arch_exit(void)
5410 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5412 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5413 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5414 CPUFREQ_TRANSITION_NOTIFIER);
5415 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5416 #ifdef CONFIG_X86_64
5417 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5420 kvm_mmu_module_exit();
5421 free_percpu(shared_msrs);
5424 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5426 ++vcpu->stat.halt_exits;
5427 if (irqchip_in_kernel(vcpu->kvm)) {
5428 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5431 vcpu->run->exit_reason = KVM_EXIT_HLT;
5435 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5437 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5439 u64 param, ingpa, outgpa, ret;
5440 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5441 bool fast, longmode;
5445 * hypercall generates UD from non zero cpl and real mode
5448 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5449 kvm_queue_exception(vcpu, UD_VECTOR);
5453 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5454 longmode = is_long_mode(vcpu) && cs_l == 1;
5457 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5458 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5459 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5460 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5461 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5462 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5464 #ifdef CONFIG_X86_64
5466 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5467 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5468 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5472 code = param & 0xffff;
5473 fast = (param >> 16) & 0x1;
5474 rep_cnt = (param >> 32) & 0xfff;
5475 rep_idx = (param >> 48) & 0xfff;
5477 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5480 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5481 kvm_vcpu_on_spin(vcpu);
5484 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5488 ret = res | (((u64)rep_done & 0xfff) << 32);
5490 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5492 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5493 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5499 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5501 unsigned long nr, a0, a1, a2, a3, ret;
5504 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5505 return kvm_hv_hypercall(vcpu);
5507 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5508 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5509 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5510 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5511 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5513 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5515 if (!is_long_mode(vcpu)) {
5523 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5529 case KVM_HC_VAPIC_POLL_IRQ:
5537 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5538 ++vcpu->stat.hypercalls;
5541 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5543 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5545 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5546 char instruction[3];
5547 unsigned long rip = kvm_rip_read(vcpu);
5549 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5551 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5555 * Check if userspace requested an interrupt window, and that the
5556 * interrupt window is open.
5558 * No need to exit to userspace if we already have an interrupt queued.
5560 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5562 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5563 vcpu->run->request_interrupt_window &&
5564 kvm_arch_interrupt_allowed(vcpu));
5567 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5569 struct kvm_run *kvm_run = vcpu->run;
5571 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5572 kvm_run->cr8 = kvm_get_cr8(vcpu);
5573 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5574 if (irqchip_in_kernel(vcpu->kvm))
5575 kvm_run->ready_for_interrupt_injection = 1;
5577 kvm_run->ready_for_interrupt_injection =
5578 kvm_arch_interrupt_allowed(vcpu) &&
5579 !kvm_cpu_has_interrupt(vcpu) &&
5580 !kvm_event_needs_reinjection(vcpu);
5583 static int vapic_enter(struct kvm_vcpu *vcpu)
5585 struct kvm_lapic *apic = vcpu->arch.apic;
5588 if (!apic || !apic->vapic_addr)
5591 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5592 if (is_error_page(page))
5595 vcpu->arch.apic->vapic_page = page;
5599 static void vapic_exit(struct kvm_vcpu *vcpu)
5601 struct kvm_lapic *apic = vcpu->arch.apic;
5604 if (!apic || !apic->vapic_addr)
5607 idx = srcu_read_lock(&vcpu->kvm->srcu);
5608 kvm_release_page_dirty(apic->vapic_page);
5609 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5610 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5613 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5617 if (!kvm_x86_ops->update_cr8_intercept)
5620 if (!vcpu->arch.apic)
5623 if (!vcpu->arch.apic->vapic_addr)
5624 max_irr = kvm_lapic_find_highest_irr(vcpu);
5631 tpr = kvm_lapic_get_cr8(vcpu);
5633 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5636 static void inject_pending_event(struct kvm_vcpu *vcpu)
5638 /* try to reinject previous events if any */
5639 if (vcpu->arch.exception.pending) {
5640 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5641 vcpu->arch.exception.has_error_code,
5642 vcpu->arch.exception.error_code);
5643 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5644 vcpu->arch.exception.has_error_code,
5645 vcpu->arch.exception.error_code,
5646 vcpu->arch.exception.reinject);
5650 if (vcpu->arch.nmi_injected) {
5651 kvm_x86_ops->set_nmi(vcpu);
5655 if (vcpu->arch.interrupt.pending) {
5656 kvm_x86_ops->set_irq(vcpu);
5660 /* try to inject new event if pending */
5661 if (vcpu->arch.nmi_pending) {
5662 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5663 --vcpu->arch.nmi_pending;
5664 vcpu->arch.nmi_injected = true;
5665 kvm_x86_ops->set_nmi(vcpu);
5667 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5668 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5669 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5671 kvm_x86_ops->set_irq(vcpu);
5676 static void process_nmi(struct kvm_vcpu *vcpu)
5681 * x86 is limited to one NMI running, and one NMI pending after it.
5682 * If an NMI is already in progress, limit further NMIs to just one.
5683 * Otherwise, allow two (and we'll inject the first one immediately).
5685 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5688 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5689 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5690 kvm_make_request(KVM_REQ_EVENT, vcpu);
5693 static void kvm_gen_update_masterclock(struct kvm *kvm)
5695 #ifdef CONFIG_X86_64
5697 struct kvm_vcpu *vcpu;
5698 struct kvm_arch *ka = &kvm->arch;
5700 spin_lock(&ka->pvclock_gtod_sync_lock);
5701 kvm_make_mclock_inprogress_request(kvm);
5702 /* no guest entries from this point */
5703 pvclock_update_vm_gtod_copy(kvm);
5705 kvm_for_each_vcpu(i, vcpu, kvm)
5706 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5708 /* guest entries allowed */
5709 kvm_for_each_vcpu(i, vcpu, kvm)
5710 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5712 spin_unlock(&ka->pvclock_gtod_sync_lock);
5716 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5718 u64 eoi_exit_bitmap[4];
5721 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5724 memset(eoi_exit_bitmap, 0, 32);
5727 kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5728 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5729 kvm_apic_update_tmr(vcpu, tmr);
5732 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5735 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5736 vcpu->run->request_interrupt_window;
5737 bool req_immediate_exit = false;
5739 if (vcpu->requests) {
5740 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5741 kvm_mmu_unload(vcpu);
5742 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5743 __kvm_migrate_timers(vcpu);
5744 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5745 kvm_gen_update_masterclock(vcpu->kvm);
5746 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5747 kvm_gen_kvmclock_update(vcpu);
5748 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5749 r = kvm_guest_time_update(vcpu);
5753 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5754 kvm_mmu_sync_roots(vcpu);
5755 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5756 kvm_x86_ops->tlb_flush(vcpu);
5757 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5758 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5762 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5763 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5767 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5768 vcpu->fpu_active = 0;
5769 kvm_x86_ops->fpu_deactivate(vcpu);
5771 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5772 /* Page is swapped out. Do synthetic halt */
5773 vcpu->arch.apf.halted = true;
5777 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5778 record_steal_time(vcpu);
5779 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5781 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5782 kvm_handle_pmu_event(vcpu);
5783 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5784 kvm_deliver_pmi(vcpu);
5785 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5786 vcpu_scan_ioapic(vcpu);
5789 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5790 kvm_apic_accept_events(vcpu);
5791 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5796 inject_pending_event(vcpu);
5798 /* enable NMI/IRQ window open exits if needed */
5799 if (vcpu->arch.nmi_pending)
5800 req_immediate_exit =
5801 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5802 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5803 req_immediate_exit =
5804 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5806 if (kvm_lapic_enabled(vcpu)) {
5808 * Update architecture specific hints for APIC
5809 * virtual interrupt delivery.
5811 if (kvm_x86_ops->hwapic_irr_update)
5812 kvm_x86_ops->hwapic_irr_update(vcpu,
5813 kvm_lapic_find_highest_irr(vcpu));
5814 update_cr8_intercept(vcpu);
5815 kvm_lapic_sync_to_vapic(vcpu);
5819 r = kvm_mmu_reload(vcpu);
5821 goto cancel_injection;
5826 kvm_x86_ops->prepare_guest_switch(vcpu);
5827 if (vcpu->fpu_active)
5828 kvm_load_guest_fpu(vcpu);
5829 kvm_load_guest_xcr0(vcpu);
5831 vcpu->mode = IN_GUEST_MODE;
5833 /* We should set ->mode before check ->requests,
5834 * see the comment in make_all_cpus_request.
5838 local_irq_disable();
5840 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5841 || need_resched() || signal_pending(current)) {
5842 vcpu->mode = OUTSIDE_GUEST_MODE;
5847 goto cancel_injection;
5850 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5852 if (req_immediate_exit)
5853 smp_send_reschedule(vcpu->cpu);
5857 if (unlikely(vcpu->arch.switch_db_regs)) {
5859 set_debugreg(vcpu->arch.eff_db[0], 0);
5860 set_debugreg(vcpu->arch.eff_db[1], 1);
5861 set_debugreg(vcpu->arch.eff_db[2], 2);
5862 set_debugreg(vcpu->arch.eff_db[3], 3);
5865 trace_kvm_entry(vcpu->vcpu_id);
5866 kvm_x86_ops->run(vcpu);
5869 * If the guest has used debug registers, at least dr7
5870 * will be disabled while returning to the host.
5871 * If we don't have active breakpoints in the host, we don't
5872 * care about the messed up debug address registers. But if
5873 * we have some of them active, restore the old state.
5875 if (hw_breakpoint_active())
5876 hw_breakpoint_restore();
5878 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5881 vcpu->mode = OUTSIDE_GUEST_MODE;
5884 /* Interrupt is enabled by handle_external_intr() */
5885 kvm_x86_ops->handle_external_intr(vcpu);
5890 * We must have an instruction between local_irq_enable() and
5891 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5892 * the interrupt shadow. The stat.exits increment will do nicely.
5893 * But we need to prevent reordering, hence this barrier():
5901 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5904 * Profile KVM exit RIPs:
5906 if (unlikely(prof_on == KVM_PROFILING)) {
5907 unsigned long rip = kvm_rip_read(vcpu);
5908 profile_hit(KVM_PROFILING, (void *)rip);
5911 if (unlikely(vcpu->arch.tsc_always_catchup))
5912 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5914 if (vcpu->arch.apic_attention)
5915 kvm_lapic_sync_from_vapic(vcpu);
5917 r = kvm_x86_ops->handle_exit(vcpu);
5921 kvm_x86_ops->cancel_injection(vcpu);
5922 if (unlikely(vcpu->arch.apic_attention))
5923 kvm_lapic_sync_from_vapic(vcpu);
5929 static int __vcpu_run(struct kvm_vcpu *vcpu)
5932 struct kvm *kvm = vcpu->kvm;
5934 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5935 r = vapic_enter(vcpu);
5937 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5943 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5944 !vcpu->arch.apf.halted)
5945 r = vcpu_enter_guest(vcpu);
5947 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5948 kvm_vcpu_block(vcpu);
5949 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5950 if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
5951 kvm_apic_accept_events(vcpu);
5952 switch(vcpu->arch.mp_state) {
5953 case KVM_MP_STATE_HALTED:
5954 vcpu->arch.mp_state =
5955 KVM_MP_STATE_RUNNABLE;
5956 case KVM_MP_STATE_RUNNABLE:
5957 vcpu->arch.apf.halted = false;
5959 case KVM_MP_STATE_INIT_RECEIVED:
5971 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5972 if (kvm_cpu_has_pending_timer(vcpu))
5973 kvm_inject_pending_timer_irqs(vcpu);
5975 if (dm_request_for_irq_injection(vcpu)) {
5977 vcpu->run->exit_reason = KVM_EXIT_INTR;
5978 ++vcpu->stat.request_irq_exits;
5981 kvm_check_async_pf_completion(vcpu);
5983 if (signal_pending(current)) {
5985 vcpu->run->exit_reason = KVM_EXIT_INTR;
5986 ++vcpu->stat.signal_exits;
5988 if (need_resched()) {
5989 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5991 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5995 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6002 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6005 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6006 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6007 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6008 if (r != EMULATE_DONE)
6013 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6015 BUG_ON(!vcpu->arch.pio.count);
6017 return complete_emulated_io(vcpu);
6021 * Implements the following, as a state machine:
6025 * for each mmio piece in the fragment
6033 * for each mmio piece in the fragment
6038 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6040 struct kvm_run *run = vcpu->run;
6041 struct kvm_mmio_fragment *frag;
6044 BUG_ON(!vcpu->mmio_needed);
6046 /* Complete previous fragment */
6047 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6048 len = min(8u, frag->len);
6049 if (!vcpu->mmio_is_write)
6050 memcpy(frag->data, run->mmio.data, len);
6052 if (frag->len <= 8) {
6053 /* Switch to the next fragment. */
6055 vcpu->mmio_cur_fragment++;
6057 /* Go forward to the next mmio piece. */
6063 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6064 vcpu->mmio_needed = 0;
6065 if (vcpu->mmio_is_write)
6067 vcpu->mmio_read_completed = 1;
6068 return complete_emulated_io(vcpu);
6071 run->exit_reason = KVM_EXIT_MMIO;
6072 run->mmio.phys_addr = frag->gpa;
6073 if (vcpu->mmio_is_write)
6074 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6075 run->mmio.len = min(8u, frag->len);
6076 run->mmio.is_write = vcpu->mmio_is_write;
6077 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6082 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6087 if (!tsk_used_math(current) && init_fpu(current))
6090 if (vcpu->sigset_active)
6091 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6093 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6094 kvm_vcpu_block(vcpu);
6095 kvm_apic_accept_events(vcpu);
6096 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6101 /* re-sync apic's tpr */
6102 if (!irqchip_in_kernel(vcpu->kvm)) {
6103 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6109 if (unlikely(vcpu->arch.complete_userspace_io)) {
6110 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6111 vcpu->arch.complete_userspace_io = NULL;
6116 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6118 r = __vcpu_run(vcpu);
6121 post_kvm_run_save(vcpu);
6122 if (vcpu->sigset_active)
6123 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6128 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6130 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6132 * We are here if userspace calls get_regs() in the middle of
6133 * instruction emulation. Registers state needs to be copied
6134 * back from emulation context to vcpu. Userspace shouldn't do
6135 * that usually, but some bad designed PV devices (vmware
6136 * backdoor interface) need this to work
6138 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6139 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6141 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6142 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6143 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6144 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6145 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6146 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6147 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6148 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6149 #ifdef CONFIG_X86_64
6150 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6151 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6152 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6153 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6154 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6155 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6156 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6157 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6160 regs->rip = kvm_rip_read(vcpu);
6161 regs->rflags = kvm_get_rflags(vcpu);
6166 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6168 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6169 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6171 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6172 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6173 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6174 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6175 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6176 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6177 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6178 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6179 #ifdef CONFIG_X86_64
6180 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6181 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6182 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6183 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6184 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6185 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6186 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6187 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6190 kvm_rip_write(vcpu, regs->rip);
6191 kvm_set_rflags(vcpu, regs->rflags);
6193 vcpu->arch.exception.pending = false;
6195 kvm_make_request(KVM_REQ_EVENT, vcpu);
6200 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6202 struct kvm_segment cs;
6204 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6208 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6210 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6211 struct kvm_sregs *sregs)
6215 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6216 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6217 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6218 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6219 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6220 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6222 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6223 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6225 kvm_x86_ops->get_idt(vcpu, &dt);
6226 sregs->idt.limit = dt.size;
6227 sregs->idt.base = dt.address;
6228 kvm_x86_ops->get_gdt(vcpu, &dt);
6229 sregs->gdt.limit = dt.size;
6230 sregs->gdt.base = dt.address;
6232 sregs->cr0 = kvm_read_cr0(vcpu);
6233 sregs->cr2 = vcpu->arch.cr2;
6234 sregs->cr3 = kvm_read_cr3(vcpu);
6235 sregs->cr4 = kvm_read_cr4(vcpu);
6236 sregs->cr8 = kvm_get_cr8(vcpu);
6237 sregs->efer = vcpu->arch.efer;
6238 sregs->apic_base = kvm_get_apic_base(vcpu);
6240 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6242 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6243 set_bit(vcpu->arch.interrupt.nr,
6244 (unsigned long *)sregs->interrupt_bitmap);
6249 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6250 struct kvm_mp_state *mp_state)
6252 kvm_apic_accept_events(vcpu);
6253 mp_state->mp_state = vcpu->arch.mp_state;
6257 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6258 struct kvm_mp_state *mp_state)
6260 if (!kvm_vcpu_has_lapic(vcpu) &&
6261 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6264 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6265 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6266 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6268 vcpu->arch.mp_state = mp_state->mp_state;
6269 kvm_make_request(KVM_REQ_EVENT, vcpu);
6273 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6274 int reason, bool has_error_code, u32 error_code)
6276 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6279 init_emulate_ctxt(vcpu);
6281 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6282 has_error_code, error_code);
6285 return EMULATE_FAIL;
6287 kvm_rip_write(vcpu, ctxt->eip);
6288 kvm_set_rflags(vcpu, ctxt->eflags);
6289 kvm_make_request(KVM_REQ_EVENT, vcpu);
6290 return EMULATE_DONE;
6292 EXPORT_SYMBOL_GPL(kvm_task_switch);
6294 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6295 struct kvm_sregs *sregs)
6297 int mmu_reset_needed = 0;
6298 int pending_vec, max_bits, idx;
6301 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6304 dt.size = sregs->idt.limit;
6305 dt.address = sregs->idt.base;
6306 kvm_x86_ops->set_idt(vcpu, &dt);
6307 dt.size = sregs->gdt.limit;
6308 dt.address = sregs->gdt.base;
6309 kvm_x86_ops->set_gdt(vcpu, &dt);
6311 vcpu->arch.cr2 = sregs->cr2;
6312 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6313 vcpu->arch.cr3 = sregs->cr3;
6314 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6316 kvm_set_cr8(vcpu, sregs->cr8);
6318 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6319 kvm_x86_ops->set_efer(vcpu, sregs->efer);
6320 kvm_set_apic_base(vcpu, sregs->apic_base);
6322 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6323 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6324 vcpu->arch.cr0 = sregs->cr0;
6326 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6327 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6328 if (sregs->cr4 & X86_CR4_OSXSAVE)
6329 kvm_update_cpuid(vcpu);
6331 idx = srcu_read_lock(&vcpu->kvm->srcu);
6332 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6333 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6334 mmu_reset_needed = 1;
6336 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6338 if (mmu_reset_needed)
6339 kvm_mmu_reset_context(vcpu);
6341 max_bits = KVM_NR_INTERRUPTS;
6342 pending_vec = find_first_bit(
6343 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6344 if (pending_vec < max_bits) {
6345 kvm_queue_interrupt(vcpu, pending_vec, false);
6346 pr_debug("Set back pending irq %d\n", pending_vec);
6349 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6350 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6351 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6352 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6353 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6354 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6356 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6357 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6359 update_cr8_intercept(vcpu);
6361 /* Older userspace won't unhalt the vcpu on reset. */
6362 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6363 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6365 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6367 kvm_make_request(KVM_REQ_EVENT, vcpu);
6372 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6373 struct kvm_guest_debug *dbg)
6375 unsigned long rflags;
6378 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6380 if (vcpu->arch.exception.pending)
6382 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6383 kvm_queue_exception(vcpu, DB_VECTOR);
6385 kvm_queue_exception(vcpu, BP_VECTOR);
6389 * Read rflags as long as potentially injected trace flags are still
6392 rflags = kvm_get_rflags(vcpu);
6394 vcpu->guest_debug = dbg->control;
6395 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6396 vcpu->guest_debug = 0;
6398 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6399 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6400 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6401 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6403 for (i = 0; i < KVM_NR_DB_REGS; i++)
6404 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6406 kvm_update_dr7(vcpu);
6408 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6409 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6410 get_segment_base(vcpu, VCPU_SREG_CS);
6413 * Trigger an rflags update that will inject or remove the trace
6416 kvm_set_rflags(vcpu, rflags);
6418 kvm_x86_ops->update_db_bp_intercept(vcpu);
6428 * Translate a guest virtual address to a guest physical address.
6430 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6431 struct kvm_translation *tr)
6433 unsigned long vaddr = tr->linear_address;
6437 idx = srcu_read_lock(&vcpu->kvm->srcu);
6438 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6439 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6440 tr->physical_address = gpa;
6441 tr->valid = gpa != UNMAPPED_GVA;
6448 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6450 struct i387_fxsave_struct *fxsave =
6451 &vcpu->arch.guest_fpu.state->fxsave;
6453 memcpy(fpu->fpr, fxsave->st_space, 128);
6454 fpu->fcw = fxsave->cwd;
6455 fpu->fsw = fxsave->swd;
6456 fpu->ftwx = fxsave->twd;
6457 fpu->last_opcode = fxsave->fop;
6458 fpu->last_ip = fxsave->rip;
6459 fpu->last_dp = fxsave->rdp;
6460 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6465 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6467 struct i387_fxsave_struct *fxsave =
6468 &vcpu->arch.guest_fpu.state->fxsave;
6470 memcpy(fxsave->st_space, fpu->fpr, 128);
6471 fxsave->cwd = fpu->fcw;
6472 fxsave->swd = fpu->fsw;
6473 fxsave->twd = fpu->ftwx;
6474 fxsave->fop = fpu->last_opcode;
6475 fxsave->rip = fpu->last_ip;
6476 fxsave->rdp = fpu->last_dp;
6477 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6482 int fx_init(struct kvm_vcpu *vcpu)
6486 err = fpu_alloc(&vcpu->arch.guest_fpu);
6490 fpu_finit(&vcpu->arch.guest_fpu);
6493 * Ensure guest xcr0 is valid for loading
6495 vcpu->arch.xcr0 = XSTATE_FP;
6497 vcpu->arch.cr0 |= X86_CR0_ET;
6501 EXPORT_SYMBOL_GPL(fx_init);
6503 static void fx_free(struct kvm_vcpu *vcpu)
6505 fpu_free(&vcpu->arch.guest_fpu);
6508 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6510 if (vcpu->guest_fpu_loaded)
6514 * Restore all possible states in the guest,
6515 * and assume host would use all available bits.
6516 * Guest xcr0 would be loaded later.
6518 kvm_put_guest_xcr0(vcpu);
6519 vcpu->guest_fpu_loaded = 1;
6520 __kernel_fpu_begin();
6521 fpu_restore_checking(&vcpu->arch.guest_fpu);
6525 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6527 kvm_put_guest_xcr0(vcpu);
6529 if (!vcpu->guest_fpu_loaded)
6532 vcpu->guest_fpu_loaded = 0;
6533 fpu_save_init(&vcpu->arch.guest_fpu);
6535 ++vcpu->stat.fpu_reload;
6536 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6540 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6542 kvmclock_reset(vcpu);
6544 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6546 kvm_x86_ops->vcpu_free(vcpu);
6549 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6552 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6553 printk_once(KERN_WARNING
6554 "kvm: SMP vm created on host with unstable TSC; "
6555 "guest TSC will not be reliable\n");
6556 return kvm_x86_ops->vcpu_create(kvm, id);
6559 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6563 vcpu->arch.mtrr_state.have_fixed = 1;
6564 r = vcpu_load(vcpu);
6567 kvm_vcpu_reset(vcpu);
6568 r = kvm_mmu_setup(vcpu);
6574 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6577 struct msr_data msr;
6579 r = vcpu_load(vcpu);
6583 msr.index = MSR_IA32_TSC;
6584 msr.host_initiated = true;
6585 kvm_write_tsc(vcpu, &msr);
6591 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6594 vcpu->arch.apf.msr_val = 0;
6596 r = vcpu_load(vcpu);
6598 kvm_mmu_unload(vcpu);
6602 kvm_x86_ops->vcpu_free(vcpu);
6605 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6607 atomic_set(&vcpu->arch.nmi_queued, 0);
6608 vcpu->arch.nmi_pending = 0;
6609 vcpu->arch.nmi_injected = false;
6611 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6612 vcpu->arch.dr6 = DR6_FIXED_1;
6613 vcpu->arch.dr7 = DR7_FIXED_1;
6614 kvm_update_dr7(vcpu);
6616 kvm_make_request(KVM_REQ_EVENT, vcpu);
6617 vcpu->arch.apf.msr_val = 0;
6618 vcpu->arch.st.msr_val = 0;
6620 kvmclock_reset(vcpu);
6622 kvm_clear_async_pf_completion_queue(vcpu);
6623 kvm_async_pf_hash_reset(vcpu);
6624 vcpu->arch.apf.halted = false;
6626 kvm_pmu_reset(vcpu);
6628 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6629 vcpu->arch.regs_avail = ~0;
6630 vcpu->arch.regs_dirty = ~0;
6632 kvm_x86_ops->vcpu_reset(vcpu);
6635 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6637 struct kvm_segment cs;
6639 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6640 cs.selector = vector << 8;
6641 cs.base = vector << 12;
6642 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6643 kvm_rip_write(vcpu, 0);
6646 int kvm_arch_hardware_enable(void *garbage)
6649 struct kvm_vcpu *vcpu;
6654 bool stable, backwards_tsc = false;
6656 kvm_shared_msr_cpu_online();
6657 ret = kvm_x86_ops->hardware_enable(garbage);
6661 local_tsc = native_read_tsc();
6662 stable = !check_tsc_unstable();
6663 list_for_each_entry(kvm, &vm_list, vm_list) {
6664 kvm_for_each_vcpu(i, vcpu, kvm) {
6665 if (!stable && vcpu->cpu == smp_processor_id())
6666 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6667 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6668 backwards_tsc = true;
6669 if (vcpu->arch.last_host_tsc > max_tsc)
6670 max_tsc = vcpu->arch.last_host_tsc;
6676 * Sometimes, even reliable TSCs go backwards. This happens on
6677 * platforms that reset TSC during suspend or hibernate actions, but
6678 * maintain synchronization. We must compensate. Fortunately, we can
6679 * detect that condition here, which happens early in CPU bringup,
6680 * before any KVM threads can be running. Unfortunately, we can't
6681 * bring the TSCs fully up to date with real time, as we aren't yet far
6682 * enough into CPU bringup that we know how much real time has actually
6683 * elapsed; our helper function, get_kernel_ns() will be using boot
6684 * variables that haven't been updated yet.
6686 * So we simply find the maximum observed TSC above, then record the
6687 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6688 * the adjustment will be applied. Note that we accumulate
6689 * adjustments, in case multiple suspend cycles happen before some VCPU
6690 * gets a chance to run again. In the event that no KVM threads get a
6691 * chance to run, we will miss the entire elapsed period, as we'll have
6692 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6693 * loose cycle time. This isn't too big a deal, since the loss will be
6694 * uniform across all VCPUs (not to mention the scenario is extremely
6695 * unlikely). It is possible that a second hibernate recovery happens
6696 * much faster than a first, causing the observed TSC here to be
6697 * smaller; this would require additional padding adjustment, which is
6698 * why we set last_host_tsc to the local tsc observed here.
6700 * N.B. - this code below runs only on platforms with reliable TSC,
6701 * as that is the only way backwards_tsc is set above. Also note
6702 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6703 * have the same delta_cyc adjustment applied if backwards_tsc
6704 * is detected. Note further, this adjustment is only done once,
6705 * as we reset last_host_tsc on all VCPUs to stop this from being
6706 * called multiple times (one for each physical CPU bringup).
6708 * Platforms with unreliable TSCs don't have to deal with this, they
6709 * will be compensated by the logic in vcpu_load, which sets the TSC to
6710 * catchup mode. This will catchup all VCPUs to real time, but cannot
6711 * guarantee that they stay in perfect synchronization.
6713 if (backwards_tsc) {
6714 u64 delta_cyc = max_tsc - local_tsc;
6715 list_for_each_entry(kvm, &vm_list, vm_list) {
6716 kvm_for_each_vcpu(i, vcpu, kvm) {
6717 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6718 vcpu->arch.last_host_tsc = local_tsc;
6719 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6724 * We have to disable TSC offset matching.. if you were
6725 * booting a VM while issuing an S4 host suspend....
6726 * you may have some problem. Solving this issue is
6727 * left as an exercise to the reader.
6729 kvm->arch.last_tsc_nsec = 0;
6730 kvm->arch.last_tsc_write = 0;
6737 void kvm_arch_hardware_disable(void *garbage)
6739 kvm_x86_ops->hardware_disable(garbage);
6740 drop_user_return_notifiers(garbage);
6743 int kvm_arch_hardware_setup(void)
6745 return kvm_x86_ops->hardware_setup();
6748 void kvm_arch_hardware_unsetup(void)
6750 kvm_x86_ops->hardware_unsetup();
6753 void kvm_arch_check_processor_compat(void *rtn)
6755 kvm_x86_ops->check_processor_compatibility(rtn);
6758 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6760 return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6763 struct static_key kvm_no_apic_vcpu __read_mostly;
6765 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6771 BUG_ON(vcpu->kvm == NULL);
6774 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6775 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6776 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6778 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6780 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6785 vcpu->arch.pio_data = page_address(page);
6787 kvm_set_tsc_khz(vcpu, max_tsc_khz);
6789 r = kvm_mmu_create(vcpu);
6791 goto fail_free_pio_data;
6793 if (irqchip_in_kernel(kvm)) {
6794 r = kvm_create_lapic(vcpu);
6796 goto fail_mmu_destroy;
6798 static_key_slow_inc(&kvm_no_apic_vcpu);
6800 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6802 if (!vcpu->arch.mce_banks) {
6804 goto fail_free_lapic;
6806 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6808 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6810 goto fail_free_mce_banks;
6815 goto fail_free_wbinvd_dirty_mask;
6817 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6818 vcpu->arch.pv_time_enabled = false;
6819 kvm_async_pf_hash_reset(vcpu);
6823 fail_free_wbinvd_dirty_mask:
6824 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6825 fail_free_mce_banks:
6826 kfree(vcpu->arch.mce_banks);
6828 kvm_free_lapic(vcpu);
6830 kvm_mmu_destroy(vcpu);
6832 free_page((unsigned long)vcpu->arch.pio_data);
6837 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6841 kvm_pmu_destroy(vcpu);
6842 kfree(vcpu->arch.mce_banks);
6843 kvm_free_lapic(vcpu);
6844 idx = srcu_read_lock(&vcpu->kvm->srcu);
6845 kvm_mmu_destroy(vcpu);
6846 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6847 free_page((unsigned long)vcpu->arch.pio_data);
6848 if (!irqchip_in_kernel(vcpu->kvm))
6849 static_key_slow_dec(&kvm_no_apic_vcpu);
6852 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6857 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6858 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6859 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6861 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6862 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6863 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6864 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6865 &kvm->arch.irq_sources_bitmap);
6867 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6868 mutex_init(&kvm->arch.apic_map_lock);
6869 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6871 pvclock_update_vm_gtod_copy(kvm);
6876 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6879 r = vcpu_load(vcpu);
6881 kvm_mmu_unload(vcpu);
6885 static void kvm_free_vcpus(struct kvm *kvm)
6888 struct kvm_vcpu *vcpu;
6891 * Unpin any mmu pages first.
6893 kvm_for_each_vcpu(i, vcpu, kvm) {
6894 kvm_clear_async_pf_completion_queue(vcpu);
6895 kvm_unload_vcpu_mmu(vcpu);
6897 kvm_for_each_vcpu(i, vcpu, kvm)
6898 kvm_arch_vcpu_free(vcpu);
6900 mutex_lock(&kvm->lock);
6901 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6902 kvm->vcpus[i] = NULL;
6904 atomic_set(&kvm->online_vcpus, 0);
6905 mutex_unlock(&kvm->lock);
6908 void kvm_arch_sync_events(struct kvm *kvm)
6910 kvm_free_all_assigned_devices(kvm);
6914 void kvm_arch_destroy_vm(struct kvm *kvm)
6916 if (current->mm == kvm->mm) {
6918 * Free memory regions allocated on behalf of userspace,
6919 * unless the the memory map has changed due to process exit
6922 struct kvm_userspace_memory_region mem;
6923 memset(&mem, 0, sizeof(mem));
6924 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
6925 kvm_set_memory_region(kvm, &mem);
6927 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
6928 kvm_set_memory_region(kvm, &mem);
6930 mem.slot = TSS_PRIVATE_MEMSLOT;
6931 kvm_set_memory_region(kvm, &mem);
6933 kvm_iommu_unmap_guest(kvm);
6934 kfree(kvm->arch.vpic);
6935 kfree(kvm->arch.vioapic);
6936 kvm_free_vcpus(kvm);
6937 if (kvm->arch.apic_access_page)
6938 put_page(kvm->arch.apic_access_page);
6939 if (kvm->arch.ept_identity_pagetable)
6940 put_page(kvm->arch.ept_identity_pagetable);
6941 kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6944 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6945 struct kvm_memory_slot *dont)
6949 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6950 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6951 kvm_kvfree(free->arch.rmap[i]);
6952 free->arch.rmap[i] = NULL;
6957 if (!dont || free->arch.lpage_info[i - 1] !=
6958 dont->arch.lpage_info[i - 1]) {
6959 kvm_kvfree(free->arch.lpage_info[i - 1]);
6960 free->arch.lpage_info[i - 1] = NULL;
6965 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6969 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6974 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6975 slot->base_gfn, level) + 1;
6977 slot->arch.rmap[i] =
6978 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6979 if (!slot->arch.rmap[i])
6984 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6985 sizeof(*slot->arch.lpage_info[i - 1]));
6986 if (!slot->arch.lpage_info[i - 1])
6989 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6990 slot->arch.lpage_info[i - 1][0].write_count = 1;
6991 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6992 slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6993 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6995 * If the gfn and userspace address are not aligned wrt each
6996 * other, or if explicitly asked to, disable large page
6997 * support for this slot
6999 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7000 !kvm_largepages_enabled()) {
7003 for (j = 0; j < lpages; ++j)
7004 slot->arch.lpage_info[i - 1][j].write_count = 1;
7011 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7012 kvm_kvfree(slot->arch.rmap[i]);
7013 slot->arch.rmap[i] = NULL;
7017 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7018 slot->arch.lpage_info[i - 1] = NULL;
7023 void kvm_arch_memslots_updated(struct kvm *kvm)
7026 * memslots->generation has been incremented.
7027 * mmio generation may have reached its maximum value.
7029 kvm_mmu_invalidate_mmio_sptes(kvm);
7032 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7033 struct kvm_memory_slot *memslot,
7034 struct kvm_userspace_memory_region *mem,
7035 enum kvm_mr_change change)
7038 * Only private memory slots need to be mapped here since
7039 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7041 if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7042 unsigned long userspace_addr;
7045 * MAP_SHARED to prevent internal slot pages from being moved
7048 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7049 PROT_READ | PROT_WRITE,
7050 MAP_SHARED | MAP_ANONYMOUS, 0);
7052 if (IS_ERR((void *)userspace_addr))
7053 return PTR_ERR((void *)userspace_addr);
7055 memslot->userspace_addr = userspace_addr;
7061 void kvm_arch_commit_memory_region(struct kvm *kvm,
7062 struct kvm_userspace_memory_region *mem,
7063 const struct kvm_memory_slot *old,
7064 enum kvm_mr_change change)
7067 int nr_mmu_pages = 0;
7069 if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7072 ret = vm_munmap(old->userspace_addr,
7073 old->npages * PAGE_SIZE);
7076 "kvm_vm_ioctl_set_memory_region: "
7077 "failed to munmap memory\n");
7080 if (!kvm->arch.n_requested_mmu_pages)
7081 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7084 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7086 * Write protect all pages for dirty logging.
7087 * Existing largepage mappings are destroyed here and new ones will
7088 * not be created until the end of the logging.
7090 if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7091 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7094 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7096 kvm_mmu_invalidate_zap_all_pages(kvm);
7099 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7100 struct kvm_memory_slot *slot)
7102 kvm_mmu_invalidate_zap_all_pages(kvm);
7105 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7107 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7108 !vcpu->arch.apf.halted)
7109 || !list_empty_careful(&vcpu->async_pf.done)
7110 || kvm_apic_has_events(vcpu)
7111 || atomic_read(&vcpu->arch.nmi_queued) ||
7112 (kvm_arch_interrupt_allowed(vcpu) &&
7113 kvm_cpu_has_interrupt(vcpu));
7116 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7118 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7121 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7123 return kvm_x86_ops->interrupt_allowed(vcpu);
7126 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7128 unsigned long current_rip = kvm_rip_read(vcpu) +
7129 get_segment_base(vcpu, VCPU_SREG_CS);
7131 return current_rip == linear_rip;
7133 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7135 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7137 unsigned long rflags;
7139 rflags = kvm_x86_ops->get_rflags(vcpu);
7140 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7141 rflags &= ~X86_EFLAGS_TF;
7144 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7146 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7148 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7149 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7150 rflags |= X86_EFLAGS_TF;
7151 kvm_x86_ops->set_rflags(vcpu, rflags);
7152 kvm_make_request(KVM_REQ_EVENT, vcpu);
7154 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7156 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7160 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7161 is_error_page(work->page))
7164 r = kvm_mmu_reload(vcpu);
7168 if (!vcpu->arch.mmu.direct_map &&
7169 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7172 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7175 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7177 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7180 static inline u32 kvm_async_pf_next_probe(u32 key)
7182 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7185 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7187 u32 key = kvm_async_pf_hash_fn(gfn);
7189 while (vcpu->arch.apf.gfns[key] != ~0)
7190 key = kvm_async_pf_next_probe(key);
7192 vcpu->arch.apf.gfns[key] = gfn;
7195 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7198 u32 key = kvm_async_pf_hash_fn(gfn);
7200 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7201 (vcpu->arch.apf.gfns[key] != gfn &&
7202 vcpu->arch.apf.gfns[key] != ~0); i++)
7203 key = kvm_async_pf_next_probe(key);
7208 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7210 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7213 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7217 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7219 vcpu->arch.apf.gfns[i] = ~0;
7221 j = kvm_async_pf_next_probe(j);
7222 if (vcpu->arch.apf.gfns[j] == ~0)
7224 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7226 * k lies cyclically in ]i,j]
7228 * |....j i.k.| or |.k..j i...|
7230 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7231 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7236 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7239 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7243 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7244 struct kvm_async_pf *work)
7246 struct x86_exception fault;
7248 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7249 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7251 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7252 (vcpu->arch.apf.send_user_only &&
7253 kvm_x86_ops->get_cpl(vcpu) == 0))
7254 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7255 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7256 fault.vector = PF_VECTOR;
7257 fault.error_code_valid = true;
7258 fault.error_code = 0;
7259 fault.nested_page_fault = false;
7260 fault.address = work->arch.token;
7261 kvm_inject_page_fault(vcpu, &fault);
7265 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7266 struct kvm_async_pf *work)
7268 struct x86_exception fault;
7270 trace_kvm_async_pf_ready(work->arch.token, work->gva);
7271 if (is_error_page(work->page))
7272 work->arch.token = ~0; /* broadcast wakeup */
7274 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7276 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7277 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7278 fault.vector = PF_VECTOR;
7279 fault.error_code_valid = true;
7280 fault.error_code = 0;
7281 fault.nested_page_fault = false;
7282 fault.address = work->arch.token;
7283 kvm_inject_page_fault(vcpu, &fault);
7285 vcpu->arch.apf.halted = false;
7286 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7289 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7291 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7294 return !kvm_event_needs_reinjection(vcpu) &&
7295 kvm_x86_ops->interrupt_allowed(vcpu);
7298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7309 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7310 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);