Pileus Git - ~andy/linux/blob - arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/fpu-internal.h> /* Ugh! */
  61 #include <asm/xcr.h>
  62 #include <asm/pvclock.h>
  63 #include <asm/div64.h>
  64
  65 #define MAX_IO_MSRS 256
  66 #define KVM_MAX_MCE_BANKS 32
  67 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  68
  69 #define emul_to_vcpu(ctxt) \
  70         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  71
  72 /* EFER defaults:
  73  * - enable syscall per default because its emulated by KVM
  74  * - enable LME and LMA per default on 64 bit KVM
  75  */
  76 #ifdef CONFIG_X86_64
  77 static
  78 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  79 #else
  80 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  81 #endif
  82
  83 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  84 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  85
  86 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 static bool ignore_msrs = 0;
  93 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 bool kvm_has_tsc_control;
  96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  97 u32  kvm_max_guest_tsc_khz;
  98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  99
 100 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 101 static u32 tsc_tolerance_ppm = 250;
 102 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 103
 104 #define KVM_NR_SHARED_MSRS 16
 105
 106 struct kvm_shared_msrs_global {
 107         int nr;
 108         u32 msrs[KVM_NR_SHARED_MSRS];
 109 };
 110
 111 struct kvm_shared_msrs {
 112         struct user_return_notifier urn;
 113         bool registered;
 114         struct kvm_shared_msr_values {
 115                 u64 host;
 116                 u64 curr;
 117         } values[KVM_NR_SHARED_MSRS];
 118 };
 119
 120 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 121 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 122
 123 struct kvm_stats_debugfs_item debugfs_entries[] = {
 124         { "pf_fixed", VCPU_STAT(pf_fixed) },
 125         { "pf_guest", VCPU_STAT(pf_guest) },
 126         { "tlb_flush", VCPU_STAT(tlb_flush) },
 127         { "invlpg", VCPU_STAT(invlpg) },
 128         { "exits", VCPU_STAT(exits) },
 129         { "io_exits", VCPU_STAT(io_exits) },
 130         { "mmio_exits", VCPU_STAT(mmio_exits) },
 131         { "signal_exits", VCPU_STAT(signal_exits) },
 132         { "irq_window", VCPU_STAT(irq_window_exits) },
 133         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 134         { "halt_exits", VCPU_STAT(halt_exits) },
 135         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 136         { "hypercalls", VCPU_STAT(hypercalls) },
 137         { "request_irq", VCPU_STAT(request_irq_exits) },
 138         { "irq_exits", VCPU_STAT(irq_exits) },
 139         { "host_state_reload", VCPU_STAT(host_state_reload) },
 140         { "efer_reload", VCPU_STAT(efer_reload) },
 141         { "fpu_reload", VCPU_STAT(fpu_reload) },
 142         { "insn_emulation", VCPU_STAT(insn_emulation) },
 143         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 144         { "irq_injections", VCPU_STAT(irq_injections) },
 145         { "nmi_injections", VCPU_STAT(nmi_injections) },
 146         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 147         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 148         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 149         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 150         { "mmu_flooded", VM_STAT(mmu_flooded) },
 151         { "mmu_recycled", VM_STAT(mmu_recycled) },
 152         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 153         { "mmu_unsync", VM_STAT(mmu_unsync) },
 154         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 155         { "largepages", VM_STAT(lpages) },
 156         { NULL }
 157 };
 158
 159 u64 __read_mostly host_xcr0;
 160
 161 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 162
 163 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 164 {
 165         int i;
 166         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 167                 vcpu->arch.apf.gfns[i] = ~0;
 168 }
 169
 170 static void kvm_on_user_return(struct user_return_notifier *urn)
 171 {
 172         unsigned slot;
 173         struct kvm_shared_msrs *locals
 174                 = container_of(urn, struct kvm_shared_msrs, urn);
 175         struct kvm_shared_msr_values *values;
 176
 177         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 178                 values = &locals->values[slot];
 179                 if (values->host != values->curr) {
 180                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 181                         values->curr = values->host;
 182                 }
 183         }
 184         locals->registered = false;
 185         user_return_notifier_unregister(urn);
 186 }
 187
 188 static void shared_msr_update(unsigned slot, u32 msr)
 189 {
 190         struct kvm_shared_msrs *smsr;
 191         u64 value;
 192
 193         smsr = &__get_cpu_var(shared_msrs);
 194         /* only read, and nobody should modify it at this time,
 195          * so don't need lock */
 196         if (slot >= shared_msrs_global.nr) {
 197                 printk(KERN_ERR "kvm: invalid MSR slot!");
 198                 return;
 199         }
 200         rdmsrl_safe(msr, &value);
 201         smsr->values[slot].host = value;
 202         smsr->values[slot].curr = value;
 203 }
 204
 205 void kvm_define_shared_msr(unsigned slot, u32 msr)
 206 {
 207         if (slot >= shared_msrs_global.nr)
 208                 shared_msrs_global.nr = slot + 1;
 209         shared_msrs_global.msrs[slot] = msr;
 210         /* we need ensured the shared_msr_global have been updated */
 211         smp_wmb();
 212 }
 213 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 214
 215 static void kvm_shared_msr_cpu_online(void)
 216 {
 217         unsigned i;
 218
 219         for (i = 0; i < shared_msrs_global.nr; ++i)
 220                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 221 }
 222
 223 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 224 {
 225         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 226
 227         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 228                 return;
 229         smsr->values[slot].curr = value;
 230         wrmsrl(shared_msrs_global.msrs[slot], value);
 231         if (!smsr->registered) {
 232                 smsr->urn.on_user_return = kvm_on_user_return;
 233                 user_return_notifier_register(&smsr->urn);
 234                 smsr->registered = true;
 235         }
 236 }
 237 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 238
 239 static void drop_user_return_notifiers(void *ignore)
 240 {
 241         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 242
 243         if (smsr->registered)
 244                 kvm_on_user_return(&smsr->urn);
 245 }
 246
 247 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 248 {
 249         if (irqchip_in_kernel(vcpu->kvm))
 250                 return vcpu->arch.apic_base;
 251         else
 252                 return vcpu->arch.apic_base;
 253 }
 254 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 255
 256 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 257 {
 258         /* TODO: reserve bits check */
 259         if (irqchip_in_kernel(vcpu->kvm))
 260                 kvm_lapic_set_base(vcpu, data);
 261         else
 262                 vcpu->arch.apic_base = data;
 263 }
 264 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 265
 266 #define EXCPT_BENIGN            0
 267 #define EXCPT_CONTRIBUTORY      1
 268 #define EXCPT_PF                2
 269
 270 static int exception_class(int vector)
 271 {
 272         switch (vector) {
 273         case PF_VECTOR:
 274                 return EXCPT_PF;
 275         case DE_VECTOR:
 276         case TS_VECTOR:
 277         case NP_VECTOR:
 278         case SS_VECTOR:
 279         case GP_VECTOR:
 280                 return EXCPT_CONTRIBUTORY;
 281         default:
 282                 break;
 283         }
 284         return EXCPT_BENIGN;
 285 }
 286
 287 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 288                 unsigned nr, bool has_error, u32 error_code,
 289                 bool reinject)
 290 {
 291         u32 prev_nr;
 292         int class1, class2;
 293
 294         kvm_make_request(KVM_REQ_EVENT, vcpu);
 295
 296         if (!vcpu->arch.exception.pending) {
 297         queue:
 298                 vcpu->arch.exception.pending = true;
 299                 vcpu->arch.exception.has_error_code = has_error;
 300                 vcpu->arch.exception.nr = nr;
 301                 vcpu->arch.exception.error_code = error_code;
 302                 vcpu->arch.exception.reinject = reinject;
 303                 return;
 304         }
 305
 306         /* to check exception */
 307         prev_nr = vcpu->arch.exception.nr;
 308         if (prev_nr == DF_VECTOR) {
 309                 /* triple fault -> shutdown */
 310                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 311                 return;
 312         }
 313         class1 = exception_class(prev_nr);
 314         class2 = exception_class(nr);
 315         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 316                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 317                 /* generate double fault per SDM Table 5-5 */
 318                 vcpu->arch.exception.pending = true;
 319                 vcpu->arch.exception.has_error_code = true;
 320                 vcpu->arch.exception.nr = DF_VECTOR;
 321                 vcpu->arch.exception.error_code = 0;
 322         } else
 323                 /* replace previous exception with a new one in a hope
 324                    that instruction re-execution will regenerate lost
 325                    exception */
 326                 goto queue;
 327 }
 328
 329 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, false);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 334
 335 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 336 {
 337         kvm_multiple_exception(vcpu, nr, false, 0, true);
 338 }
 339 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 340
 341 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 342 {
 343         if (err)
 344                 kvm_inject_gp(vcpu, 0);
 345         else
 346                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 349
 350 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 351 {
 352         ++vcpu->stat.pf_guest;
 353         vcpu->arch.cr2 = fault->address;
 354         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 357
 358 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 359 {
 360         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 361                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 362         else
 363                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 364 }
 365
 366 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 367 {
 368         atomic_inc(&vcpu->arch.nmi_queued);
 369         kvm_make_request(KVM_REQ_NMI, vcpu);
 370 }
 371 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 372
 373 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 374 {
 375         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 376 }
 377 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 378
 379 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 380 {
 381         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 382 }
 383 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 384
 385 /*
 386  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 387  * a #GP and return false.
 388  */
 389 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 390 {
 391         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 392                 return true;
 393         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 394         return false;
 395 }
 396 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 397
 398 /*
 399  * This function will be used to read from the physical memory of the currently
 400  * running guest. The difference to kvm_read_guest_page is that this function
 401  * can read from guest physical or from the guest's guest physical memory.
 402  */
 403 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 404                             gfn_t ngfn, void *data, int offset, int len,
 405                             u32 access)
 406 {
 407         gfn_t real_gfn;
 408         gpa_t ngpa;
 409
 410         ngpa     = gfn_to_gpa(ngfn);
 411         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 412         if (real_gfn == UNMAPPED_GVA)
 413                 return -EFAULT;
 414
 415         real_gfn = gpa_to_gfn(real_gfn);
 416
 417         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 420
 421 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 422                                void *data, int offset, int len, u32 access)
 423 {
 424         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 425                                        data, offset, len, access);
 426 }
 427
 428 /*
 429  * Load the pae pdptrs.  Return true is they are all valid.
 430  */
 431 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 432 {
 433         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 434         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 435         int i;
 436         int ret;
 437         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 438
 439         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 440                                       offset * sizeof(u64), sizeof(pdpte),
 441                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 442         if (ret < 0) {
 443                 ret = 0;
 444                 goto out;
 445         }
 446         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 447                 if (is_present_gpte(pdpte[i]) &&
 448                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 449                         ret = 0;
 450                         goto out;
 451                 }
 452         }
 453         ret = 1;
 454
 455         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 456         __set_bit(VCPU_EXREG_PDPTR,
 457                   (unsigned long *)&vcpu->arch.regs_avail);
 458         __set_bit(VCPU_EXREG_PDPTR,
 459                   (unsigned long *)&vcpu->arch.regs_dirty);
 460 out:
 461
 462         return ret;
 463 }
 464 EXPORT_SYMBOL_GPL(load_pdptrs);
 465
 466 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 467 {
 468         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 469         bool changed = true;
 470         int offset;
 471         gfn_t gfn;
 472         int r;
 473
 474         if (is_long_mode(vcpu) || !is_pae(vcpu))
 475                 return false;
 476
 477         if (!test_bit(VCPU_EXREG_PDPTR,
 478                       (unsigned long *)&vcpu->arch.regs_avail))
 479                 return true;
 480
 481         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 482         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 483         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 484                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 485         if (r < 0)
 486                 goto out;
 487         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 488 out:
 489
 490         return changed;
 491 }
 492
 493 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 494 {
 495         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 496         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 497                                     X86_CR0_CD | X86_CR0_NW;
 498
 499         cr0 |= X86_CR0_ET;
 500
 501 #ifdef CONFIG_X86_64
 502         if (cr0 & 0xffffffff00000000UL)
 503                 return 1;
 504 #endif
 505
 506         cr0 &= ~CR0_RESERVED_BITS;
 507
 508         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 509                 return 1;
 510
 511         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 512                 return 1;
 513
 514         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 515 #ifdef CONFIG_X86_64
 516                 if ((vcpu->arch.efer & EFER_LME)) {
 517                         int cs_db, cs_l;
 518
 519                         if (!is_pae(vcpu))
 520                                 return 1;
 521                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 522                         if (cs_l)
 523                                 return 1;
 524                 } else
 525 #endif
 526                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 527                                                  kvm_read_cr3(vcpu)))
 528                         return 1;
 529         }
 530
 531         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 532                 return 1;
 533
 534         kvm_x86_ops->set_cr0(vcpu, cr0);
 535
 536         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 537                 kvm_clear_async_pf_completion_queue(vcpu);
 538                 kvm_async_pf_hash_reset(vcpu);
 539         }
 540
 541         if ((cr0 ^ old_cr0) & update_bits)
 542                 kvm_mmu_reset_context(vcpu);
 543         return 0;
 544 }
 545 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 546
 547 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 548 {
 549         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 550 }
 551 EXPORT_SYMBOL_GPL(kvm_lmsw);
 552
 553 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 554 {
 555         u64 xcr0;
 556
 557         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 558         if (index != XCR_XFEATURE_ENABLED_MASK)
 559                 return 1;
 560         xcr0 = xcr;
 561         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 562                 return 1;
 563         if (!(xcr0 & XSTATE_FP))
 564                 return 1;
 565         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 566                 return 1;
 567         if (xcr0 & ~host_xcr0)
 568                 return 1;
 569         vcpu->arch.xcr0 = xcr0;
 570         vcpu->guest_xcr0_loaded = 0;
 571         return 0;
 572 }
 573
 574 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 575 {
 576         if (__kvm_set_xcr(vcpu, index, xcr)) {
 577                 kvm_inject_gp(vcpu, 0);
 578                 return 1;
 579         }
 580         return 0;
 581 }
 582 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 583
 584 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 585 {
 586         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 587         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 588                                    X86_CR4_PAE | X86_CR4_SMEP;
 589         if (cr4 & CR4_RESERVED_BITS)
 590                 return 1;
 591
 592         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 593                 return 1;
 594
 595         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 596                 return 1;
 597
 598         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 599                 return 1;
 600
 601         if (is_long_mode(vcpu)) {
 602                 if (!(cr4 & X86_CR4_PAE))
 603                         return 1;
 604         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 605                    && ((cr4 ^ old_cr4) & pdptr_bits)
 606                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 607                                    kvm_read_cr3(vcpu)))
 608                 return 1;
 609
 610         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 611                 if (!guest_cpuid_has_pcid(vcpu))
 612                         return 1;
 613
 614                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 615                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 616                         return 1;
 617         }
 618
 619         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 620                 return 1;
 621
 622         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 623             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 624                 kvm_mmu_reset_context(vcpu);
 625
 626         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 627                 kvm_update_cpuid(vcpu);
 628
 629         return 0;
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 632
 633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 634 {
 635         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 636                 kvm_mmu_sync_roots(vcpu);
 637                 kvm_mmu_flush_tlb(vcpu);
 638                 return 0;
 639         }
 640
 641         if (is_long_mode(vcpu)) {
 642                 if (kvm_read_cr4(vcpu) & X86_CR4_PCIDE) {
 643                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 644                                 return 1;
 645                 } else
 646                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 647                                 return 1;
 648         } else {
 649                 if (is_pae(vcpu)) {
 650                         if (cr3 & CR3_PAE_RESERVED_BITS)
 651                                 return 1;
 652                         if (is_paging(vcpu) &&
 653                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 654                                 return 1;
 655                 }
 656                 /*
 657                  * We don't check reserved bits in nonpae mode, because
 658                  * this isn't enforced, and VMware depends on this.
 659                  */
 660         }
 661
 662         /*
 663          * Does the new cr3 value map to physical memory? (Note, we
 664          * catch an invalid cr3 even in real-mode, because it would
 665          * cause trouble later on when we turn on paging anyway.)
 666          *
 667          * A real CPU would silently accept an invalid cr3 and would
 668          * attempt to use it - with largely undefined (and often hard
 669          * to debug) behavior on the guest side.
 670          */
 671         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 672                 return 1;
 673         vcpu->arch.cr3 = cr3;
 674         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 675         vcpu->arch.mmu.new_cr3(vcpu);
 676         return 0;
 677 }
 678 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 679
 680 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 681 {
 682         if (cr8 & CR8_RESERVED_BITS)
 683                 return 1;
 684         if (irqchip_in_kernel(vcpu->kvm))
 685                 kvm_lapic_set_tpr(vcpu, cr8);
 686         else
 687                 vcpu->arch.cr8 = cr8;
 688         return 0;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 691
 692 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 693 {
 694         if (irqchip_in_kernel(vcpu->kvm))
 695                 return kvm_lapic_get_cr8(vcpu);
 696         else
 697                 return vcpu->arch.cr8;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 700
 701 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 702 {
 703         switch (dr) {
 704         case 0 ... 3:
 705                 vcpu->arch.db[dr] = val;
 706                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 707                         vcpu->arch.eff_db[dr] = val;
 708                 break;
 709         case 4:
 710                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 711                         return 1; /* #UD */
 712                 /* fall through */
 713         case 6:
 714                 if (val & 0xffffffff00000000ULL)
 715                         return -1; /* #GP */
 716                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 717                 break;
 718         case 5:
 719                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 720                         return 1; /* #UD */
 721                 /* fall through */
 722         default: /* 7 */
 723                 if (val & 0xffffffff00000000ULL)
 724                         return -1; /* #GP */
 725                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 726                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 727                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 728                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 729                 }
 730                 break;
 731         }
 732
 733         return 0;
 734 }
 735
 736 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 737 {
 738         int res;
 739
 740         res = __kvm_set_dr(vcpu, dr, val);
 741         if (res > 0)
 742                 kvm_queue_exception(vcpu, UD_VECTOR);
 743         else if (res < 0)
 744                 kvm_inject_gp(vcpu, 0);
 745
 746         return res;
 747 }
 748 EXPORT_SYMBOL_GPL(kvm_set_dr);
 749
 750 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 751 {
 752         switch (dr) {
 753         case 0 ... 3:
 754                 *val = vcpu->arch.db[dr];
 755                 break;
 756         case 4:
 757                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 758                         return 1;
 759                 /* fall through */
 760         case 6:
 761                 *val = vcpu->arch.dr6;
 762                 break;
 763         case 5:
 764                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 765                         return 1;
 766                 /* fall through */
 767         default: /* 7 */
 768                 *val = vcpu->arch.dr7;
 769                 break;
 770         }
 771
 772         return 0;
 773 }
 774
 775 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 776 {
 777         if (_kvm_get_dr(vcpu, dr, val)) {
 778                 kvm_queue_exception(vcpu, UD_VECTOR);
 779                 return 1;
 780         }
 781         return 0;
 782 }
 783 EXPORT_SYMBOL_GPL(kvm_get_dr);
 784
 785 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 786 {
 787         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 788         u64 data;
 789         int err;
 790
 791         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 792         if (err)
 793                 return err;
 794         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 795         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 796         return err;
 797 }
 798 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 799
 800 /*
 801  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 802  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 803  *
 804  * This list is modified at module load time to reflect the
 805  * capabilities of the host cpu. This capabilities test skips MSRs that are
 806  * kvm-specific. Those are put in the beginning of the list.
 807  */
 808
 809 #define KVM_SAVE_MSRS_BEGIN     9
 810 static u32 msrs_to_save[] = {
 811         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 812         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 813         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 814         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 815         MSR_KVM_PV_EOI_EN,
 816         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 817         MSR_STAR,
 818 #ifdef CONFIG_X86_64
 819         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 820 #endif
 821         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 822 };
 823
 824 static unsigned num_msrs_to_save;
 825
 826 static u32 emulated_msrs[] = {
 827         MSR_IA32_TSCDEADLINE,
 828         MSR_IA32_MISC_ENABLE,
 829         MSR_IA32_MCG_STATUS,
 830         MSR_IA32_MCG_CTL,
 831 };
 832
 833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 834 {
 835         u64 old_efer = vcpu->arch.efer;
 836
 837         if (efer & efer_reserved_bits)
 838                 return 1;
 839
 840         if (is_paging(vcpu)
 841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 842                 return 1;
 843
 844         if (efer & EFER_FFXSR) {
 845                 struct kvm_cpuid_entry2 *feat;
 846
 847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 849                         return 1;
 850         }
 851
 852         if (efer & EFER_SVME) {
 853                 struct kvm_cpuid_entry2 *feat;
 854
 855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 857                         return 1;
 858         }
 859
 860         efer &= ~EFER_LMA;
 861         efer |= vcpu->arch.efer & EFER_LMA;
 862
 863         kvm_x86_ops->set_efer(vcpu, efer);
 864
 865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 866
 867         /* Update reserved bits */
 868         if ((efer ^ old_efer) & EFER_NX)
 869                 kvm_mmu_reset_context(vcpu);
 870
 871         return 0;
 872 }
 873
 874 void kvm_enable_efer_bits(u64 mask)
 875 {
 876        efer_reserved_bits &= ~mask;
 877 }
 878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 879
 880
 881 /*
 882  * Writes msr value into into the appropriate "register".
 883  * Returns 0 on success, non-0 otherwise.
 884  * Assumes vcpu_load() was already called.
 885  */
 886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 887 {
 888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 889 }
 890
 891 /*
 892  * Adapt set_msr() to msr_io()'s calling convention
 893  */
 894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 895 {
 896         return kvm_set_msr(vcpu, index, *data);
 897 }
 898
 899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 900 {
 901         int version;
 902         int r;
 903         struct pvclock_wall_clock wc;
 904         struct timespec boot;
 905
 906         if (!wall_clock)
 907                 return;
 908
 909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 910         if (r)
 911                 return;
 912
 913         if (version & 1)
 914                 ++version;  /* first time write, random junk */
 915
 916         ++version;
 917
 918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 919
 920         /*
 921          * The guest calculates current wall clock time by adding
 922          * system time (updated by kvm_guest_time_update below) to the
 923          * wall clock specified here.  guest system time equals host
 924          * system time for us, thus we must fill in host boot time here.
 925          */
 926         getboottime(&boot);
 927
 928         wc.sec = boot.tv_sec;
 929         wc.nsec = boot.tv_nsec;
 930         wc.version = version;
 931
 932         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 933
 934         version++;
 935         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 936 }
 937
 938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 939 {
 940         uint32_t quotient, remainder;
 941
 942         /* Don't try to replace with do_div(), this one calculates
 943          * "(dividend << 32) / divisor" */
 944         __asm__ ( "divl %4"
 945                   : "=a" (quotient), "=d" (remainder)
 946                   : "0" (0), "1" (dividend), "r" (divisor) );
 947         return quotient;
 948 }
 949
 950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 951                                s8 *pshift, u32 *pmultiplier)
 952 {
 953         uint64_t scaled64;
 954         int32_t  shift = 0;
 955         uint64_t tps64;
 956         uint32_t tps32;
 957
 958         tps64 = base_khz * 1000LL;
 959         scaled64 = scaled_khz * 1000LL;
 960         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 961                 tps64 >>= 1;
 962                 shift--;
 963         }
 964
 965         tps32 = (uint32_t)tps64;
 966         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 967                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 968                         scaled64 >>= 1;
 969                 else
 970                         tps32 <<= 1;
 971                 shift++;
 972         }
 973
 974         *pshift = shift;
 975         *pmultiplier = div_frac(scaled64, tps32);
 976
 977         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 978                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 979 }
 980
 981 static inline u64 get_kernel_ns(void)
 982 {
 983         struct timespec ts;
 984
 985         WARN_ON(preemptible());
 986         ktime_get_ts(&ts);
 987         monotonic_to_bootbased(&ts);
 988         return timespec_to_ns(&ts);
 989 }
 990
 991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 992 unsigned long max_tsc_khz;
 993
 994 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 995 {
 996         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
 997                                    vcpu->arch.virtual_tsc_shift);
 998 }
 999
1000 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1001 {
1002         u64 v = (u64)khz * (1000000 + ppm);
1003         do_div(v, 1000000);
1004         return v;
1005 }
1006
1007 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1008 {
1009         u32 thresh_lo, thresh_hi;
1010         int use_scaling = 0;
1011
1012         /* Compute a scale to convert nanoseconds in TSC cycles */
1013         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1014                            &vcpu->arch.virtual_tsc_shift,
1015                            &vcpu->arch.virtual_tsc_mult);
1016         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1017
1018         /*
1019          * Compute the variation in TSC rate which is acceptable
1020          * within the range of tolerance and decide if the
1021          * rate being applied is within that bounds of the hardware
1022          * rate.  If so, no scaling or compensation need be done.
1023          */
1024         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1025         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1026         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1027                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1028                 use_scaling = 1;
1029         }
1030         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1031 }
1032
1033 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1034 {
1035         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1036                                       vcpu->arch.virtual_tsc_mult,
1037                                       vcpu->arch.virtual_tsc_shift);
1038         tsc += vcpu->arch.this_tsc_write;
1039         return tsc;
1040 }
1041
1042 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1043 {
1044         struct kvm *kvm = vcpu->kvm;
1045         u64 offset, ns, elapsed;
1046         unsigned long flags;
1047         s64 usdiff;
1048
1049         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1050         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1051         ns = get_kernel_ns();
1052         elapsed = ns - kvm->arch.last_tsc_nsec;
1053
1054         /* n.b - signed multiplication and division required */
1055         usdiff = data - kvm->arch.last_tsc_write;
1056 #ifdef CONFIG_X86_64
1057         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1058 #else
1059         /* do_div() only does unsigned */
1060         asm("idivl %2; xor %%edx, %%edx"
1061             : "=A"(usdiff)
1062             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1063 #endif
1064         do_div(elapsed, 1000);
1065         usdiff -= elapsed;
1066         if (usdiff < 0)
1067                 usdiff = -usdiff;
1068
1069         /*
1070          * Special case: TSC write with a small delta (1 second) of virtual
1071          * cycle time against real time is interpreted as an attempt to
1072          * synchronize the CPU.
1073          *
1074          * For a reliable TSC, we can match TSC offsets, and for an unstable
1075          * TSC, we add elapsed time in this computation.  We could let the
1076          * compensation code attempt to catch up if we fall behind, but
1077          * it's better to try to match offsets from the beginning.
1078          */
1079         if (usdiff < USEC_PER_SEC &&
1080             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1081                 if (!check_tsc_unstable()) {
1082                         offset = kvm->arch.cur_tsc_offset;
1083                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1084                 } else {
1085                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1086                         data += delta;
1087                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1088                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1089                 }
1090         } else {
1091                 /*
1092                  * We split periods of matched TSC writes into generations.
1093                  * For each generation, we track the original measured
1094                  * nanosecond time, offset, and write, so if TSCs are in
1095                  * sync, we can match exact offset, and if not, we can match
1096                  * exact software computaion in compute_guest_tsc()
1097                  *
1098                  * These values are tracked in kvm->arch.cur_xxx variables.
1099                  */
1100                 kvm->arch.cur_tsc_generation++;
1101                 kvm->arch.cur_tsc_nsec = ns;
1102                 kvm->arch.cur_tsc_write = data;
1103                 kvm->arch.cur_tsc_offset = offset;
1104                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1105                          kvm->arch.cur_tsc_generation, data);
1106         }
1107
1108         /*
1109          * We also track th most recent recorded KHZ, write and time to
1110          * allow the matching interval to be extended at each write.
1111          */
1112         kvm->arch.last_tsc_nsec = ns;
1113         kvm->arch.last_tsc_write = data;
1114         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1115
1116         /* Reset of TSC must disable overshoot protection below */
1117         vcpu->arch.hv_clock.tsc_timestamp = 0;
1118         vcpu->arch.last_guest_tsc = data;
1119
1120         /* Keep track of which generation this VCPU has synchronized to */
1121         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1122         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1123         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1124
1125         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1126         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1127 }
1128
1129 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1130
1131 static int kvm_guest_time_update(struct kvm_vcpu *v)
1132 {
1133         unsigned long flags;
1134         struct kvm_vcpu_arch *vcpu = &v->arch;
1135         void *shared_kaddr;
1136         unsigned long this_tsc_khz;
1137         s64 kernel_ns, max_kernel_ns;
1138         u64 tsc_timestamp;
1139
1140         /* Keep irq disabled to prevent changes to the clock */
1141         local_irq_save(flags);
1142         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1143         kernel_ns = get_kernel_ns();
1144         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1145         if (unlikely(this_tsc_khz == 0)) {
1146                 local_irq_restore(flags);
1147                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1148                 return 1;
1149         }
1150
1151         /*
1152          * We may have to catch up the TSC to match elapsed wall clock
1153          * time for two reasons, even if kvmclock is used.
1154          *   1) CPU could have been running below the maximum TSC rate
1155          *   2) Broken TSC compensation resets the base at each VCPU
1156          *      entry to avoid unknown leaps of TSC even when running
1157          *      again on the same CPU.  This may cause apparent elapsed
1158          *      time to disappear, and the guest to stand still or run
1159          *      very slowly.
1160          */
1161         if (vcpu->tsc_catchup) {
1162                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1163                 if (tsc > tsc_timestamp) {
1164                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1165                         tsc_timestamp = tsc;
1166                 }
1167         }
1168
1169         local_irq_restore(flags);
1170
1171         if (!vcpu->time_page)
1172                 return 0;
1173
1174         /*
1175          * Time as measured by the TSC may go backwards when resetting the base
1176          * tsc_timestamp.  The reason for this is that the TSC resolution is
1177          * higher than the resolution of the other clock scales.  Thus, many
1178          * possible measurments of the TSC correspond to one measurement of any
1179          * other clock, and so a spread of values is possible.  This is not a
1180          * problem for the computation of the nanosecond clock; with TSC rates
1181          * around 1GHZ, there can only be a few cycles which correspond to one
1182          * nanosecond value, and any path through this code will inevitably
1183          * take longer than that.  However, with the kernel_ns value itself,
1184          * the precision may be much lower, down to HZ granularity.  If the
1185          * first sampling of TSC against kernel_ns ends in the low part of the
1186          * range, and the second in the high end of the range, we can get:
1187          *
1188          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1189          *
1190          * As the sampling errors potentially range in the thousands of cycles,
1191          * it is possible such a time value has already been observed by the
1192          * guest.  To protect against this, we must compute the system time as
1193          * observed by the guest and ensure the new system time is greater.
1194          */
1195         max_kernel_ns = 0;
1196         if (vcpu->hv_clock.tsc_timestamp) {
1197                 max_kernel_ns = vcpu->last_guest_tsc -
1198                                 vcpu->hv_clock.tsc_timestamp;
1199                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1200                                     vcpu->hv_clock.tsc_to_system_mul,
1201                                     vcpu->hv_clock.tsc_shift);
1202                 max_kernel_ns += vcpu->last_kernel_ns;
1203         }
1204
1205         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1206                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1207                                    &vcpu->hv_clock.tsc_shift,
1208                                    &vcpu->hv_clock.tsc_to_system_mul);
1209                 vcpu->hw_tsc_khz = this_tsc_khz;
1210         }
1211
1212         if (max_kernel_ns > kernel_ns)
1213                 kernel_ns = max_kernel_ns;
1214
1215         /* With all the info we got, fill in the values */
1216         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1217         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1218         vcpu->last_kernel_ns = kernel_ns;
1219         vcpu->last_guest_tsc = tsc_timestamp;
1220         vcpu->hv_clock.flags = 0;
1221
1222         /*
1223          * The interface expects us to write an even number signaling that the
1224          * update is finished. Since the guest won't see the intermediate
1225          * state, we just increase by 2 at the end.
1226          */
1227         vcpu->hv_clock.version += 2;
1228
1229         shared_kaddr = kmap_atomic(vcpu->time_page);
1230
1231         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1232                sizeof(vcpu->hv_clock));
1233
1234         kunmap_atomic(shared_kaddr);
1235
1236         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1237         return 0;
1238 }
1239
1240 static bool msr_mtrr_valid(unsigned msr)
1241 {
1242         switch (msr) {
1243         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1244         case MSR_MTRRfix64K_00000:
1245         case MSR_MTRRfix16K_80000:
1246         case MSR_MTRRfix16K_A0000:
1247         case MSR_MTRRfix4K_C0000:
1248         case MSR_MTRRfix4K_C8000:
1249         case MSR_MTRRfix4K_D0000:
1250         case MSR_MTRRfix4K_D8000:
1251         case MSR_MTRRfix4K_E0000:
1252         case MSR_MTRRfix4K_E8000:
1253         case MSR_MTRRfix4K_F0000:
1254         case MSR_MTRRfix4K_F8000:
1255         case MSR_MTRRdefType:
1256         case MSR_IA32_CR_PAT:
1257                 return true;
1258         case 0x2f8:
1259                 return true;
1260         }
1261         return false;
1262 }
1263
1264 static bool valid_pat_type(unsigned t)
1265 {
1266         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1267 }
1268
1269 static bool valid_mtrr_type(unsigned t)
1270 {
1271         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1272 }
1273
1274 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1275 {
1276         int i;
1277
1278         if (!msr_mtrr_valid(msr))
1279                 return false;
1280
1281         if (msr == MSR_IA32_CR_PAT) {
1282                 for (i = 0; i < 8; i++)
1283                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1284                                 return false;
1285                 return true;
1286         } else if (msr == MSR_MTRRdefType) {
1287                 if (data & ~0xcff)
1288                         return false;
1289                 return valid_mtrr_type(data & 0xff);
1290         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1291                 for (i = 0; i < 8 ; i++)
1292                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1293                                 return false;
1294                 return true;
1295         }
1296
1297         /* variable MTRRs */
1298         return valid_mtrr_type(data & 0xff);
1299 }
1300
1301 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1302 {
1303         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1304
1305         if (!mtrr_valid(vcpu, msr, data))
1306                 return 1;
1307
1308         if (msr == MSR_MTRRdefType) {
1309                 vcpu->arch.mtrr_state.def_type = data;
1310                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1311         } else if (msr == MSR_MTRRfix64K_00000)
1312                 p[0] = data;
1313         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1314                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1315         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1316                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1317         else if (msr == MSR_IA32_CR_PAT)
1318                 vcpu->arch.pat = data;
1319         else {  /* Variable MTRRs */
1320                 int idx, is_mtrr_mask;
1321                 u64 *pt;
1322
1323                 idx = (msr - 0x200) / 2;
1324                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1325                 if (!is_mtrr_mask)
1326                         pt =
1327                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1328                 else
1329                         pt =
1330                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1331                 *pt = data;
1332         }
1333
1334         kvm_mmu_reset_context(vcpu);
1335         return 0;
1336 }
1337
1338 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1339 {
1340         u64 mcg_cap = vcpu->arch.mcg_cap;
1341         unsigned bank_num = mcg_cap & 0xff;
1342
1343         switch (msr) {
1344         case MSR_IA32_MCG_STATUS:
1345                 vcpu->arch.mcg_status = data;
1346                 break;
1347         case MSR_IA32_MCG_CTL:
1348                 if (!(mcg_cap & MCG_CTL_P))
1349                         return 1;
1350                 if (data != 0 && data != ~(u64)0)
1351                         return -1;
1352                 vcpu->arch.mcg_ctl = data;
1353                 break;
1354         default:
1355                 if (msr >= MSR_IA32_MC0_CTL &&
1356                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1357                         u32 offset = msr - MSR_IA32_MC0_CTL;
1358                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1359                          * some Linux kernels though clear bit 10 in bank 4 to
1360                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1361                          * this to avoid an uncatched #GP in the guest
1362                          */
1363                         if ((offset & 0x3) == 0 &&
1364                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1365                                 return -1;
1366                         vcpu->arch.mce_banks[offset] = data;
1367                         break;
1368                 }
1369                 return 1;
1370         }
1371         return 0;
1372 }
1373
1374 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1375 {
1376         struct kvm *kvm = vcpu->kvm;
1377         int lm = is_long_mode(vcpu);
1378         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1379                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1380         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1381                 : kvm->arch.xen_hvm_config.blob_size_32;
1382         u32 page_num = data & ~PAGE_MASK;
1383         u64 page_addr = data & PAGE_MASK;
1384         u8 *page;
1385         int r;
1386
1387         r = -E2BIG;
1388         if (page_num >= blob_size)
1389                 goto out;
1390         r = -ENOMEM;
1391         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1392         if (IS_ERR(page)) {
1393                 r = PTR_ERR(page);
1394                 goto out;
1395         }
1396         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1397                 goto out_free;
1398         r = 0;
1399 out_free:
1400         kfree(page);
1401 out:
1402         return r;
1403 }
1404
1405 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1406 {
1407         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1408 }
1409
1410 static bool kvm_hv_msr_partition_wide(u32 msr)
1411 {
1412         bool r = false;
1413         switch (msr) {
1414         case HV_X64_MSR_GUEST_OS_ID:
1415         case HV_X64_MSR_HYPERCALL:
1416                 r = true;
1417                 break;
1418         }
1419
1420         return r;
1421 }
1422
1423 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1424 {
1425         struct kvm *kvm = vcpu->kvm;
1426
1427         switch (msr) {
1428         case HV_X64_MSR_GUEST_OS_ID:
1429                 kvm->arch.hv_guest_os_id = data;
1430                 /* setting guest os id to zero disables hypercall page */
1431                 if (!kvm->arch.hv_guest_os_id)
1432                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1433                 break;
1434         case HV_X64_MSR_HYPERCALL: {
1435                 u64 gfn;
1436                 unsigned long addr;
1437                 u8 instructions[4];
1438
1439                 /* if guest os id is not set hypercall should remain disabled */
1440                 if (!kvm->arch.hv_guest_os_id)
1441                         break;
1442                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1443                         kvm->arch.hv_hypercall = data;
1444                         break;
1445                 }
1446                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1447                 addr = gfn_to_hva(kvm, gfn);
1448                 if (kvm_is_error_hva(addr))
1449                         return 1;
1450                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1451                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1452                 if (__copy_to_user((void __user *)addr, instructions, 4))
1453                         return 1;
1454                 kvm->arch.hv_hypercall = data;
1455                 break;
1456         }
1457         default:
1458                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1459                             "data 0x%llx\n", msr, data);
1460                 return 1;
1461         }
1462         return 0;
1463 }
1464
1465 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1466 {
1467         switch (msr) {
1468         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1469                 unsigned long addr;
1470
1471                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1472                         vcpu->arch.hv_vapic = data;
1473                         break;
1474                 }
1475                 addr = gfn_to_hva(vcpu->kvm, data >>
1476                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1477                 if (kvm_is_error_hva(addr))
1478                         return 1;
1479                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1480                         return 1;
1481                 vcpu->arch.hv_vapic = data;
1482                 break;
1483         }
1484         case HV_X64_MSR_EOI:
1485                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1486         case HV_X64_MSR_ICR:
1487                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1488         case HV_X64_MSR_TPR:
1489                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1490         default:
1491                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1492                             "data 0x%llx\n", msr, data);
1493                 return 1;
1494         }
1495
1496         return 0;
1497 }
1498
1499 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1500 {
1501         gpa_t gpa = data & ~0x3f;
1502
1503         /* Bits 2:5 are resrved, Should be zero */
1504         if (data & 0x3c)
1505                 return 1;
1506
1507         vcpu->arch.apf.msr_val = data;
1508
1509         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1510                 kvm_clear_async_pf_completion_queue(vcpu);
1511                 kvm_async_pf_hash_reset(vcpu);
1512                 return 0;
1513         }
1514
1515         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1516                 return 1;
1517
1518         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1519         kvm_async_pf_wakeup_all(vcpu);
1520         return 0;
1521 }
1522
1523 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1524 {
1525         if (vcpu->arch.time_page) {
1526                 kvm_release_page_dirty(vcpu->arch.time_page);
1527                 vcpu->arch.time_page = NULL;
1528         }
1529 }
1530
1531 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1532 {
1533         u64 delta;
1534
1535         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1536                 return;
1537
1538         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1539         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1540         vcpu->arch.st.accum_steal = delta;
1541 }
1542
1543 static void record_steal_time(struct kvm_vcpu *vcpu)
1544 {
1545         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1546                 return;
1547
1548         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1549                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1550                 return;
1551
1552         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1553         vcpu->arch.st.steal.version += 2;
1554         vcpu->arch.st.accum_steal = 0;
1555
1556         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1557                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1558 }
1559
1560 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1561 {
1562         bool pr = false;
1563
1564         switch (msr) {
1565         case MSR_EFER:
1566                 return set_efer(vcpu, data);
1567         case MSR_K7_HWCR:
1568                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1569                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1570                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1571                 if (data != 0) {
1572                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1573                                     data);
1574                         return 1;
1575                 }
1576                 break;
1577         case MSR_FAM10H_MMIO_CONF_BASE:
1578                 if (data != 0) {
1579                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1580                                     "0x%llx\n", data);
1581                         return 1;
1582                 }
1583                 break;
1584         case MSR_AMD64_NB_CFG:
1585                 break;
1586         case MSR_IA32_DEBUGCTLMSR:
1587                 if (!data) {
1588                         /* We support the non-activated case already */
1589                         break;
1590                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1591                         /* Values other than LBR and BTF are vendor-specific,
1592                            thus reserved and should throw a #GP */
1593                         return 1;
1594                 }
1595                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1596                             __func__, data);
1597                 break;
1598         case MSR_IA32_UCODE_REV:
1599         case MSR_IA32_UCODE_WRITE:
1600         case MSR_VM_HSAVE_PA:
1601         case MSR_AMD64_PATCH_LOADER:
1602                 break;
1603         case 0x200 ... 0x2ff:
1604                 return set_msr_mtrr(vcpu, msr, data);
1605         case MSR_IA32_APICBASE:
1606                 kvm_set_apic_base(vcpu, data);
1607                 break;
1608         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1609                 return kvm_x2apic_msr_write(vcpu, msr, data);
1610         case MSR_IA32_TSCDEADLINE:
1611                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1612                 break;
1613         case MSR_IA32_MISC_ENABLE:
1614                 vcpu->arch.ia32_misc_enable_msr = data;
1615                 break;
1616         case MSR_KVM_WALL_CLOCK_NEW:
1617         case MSR_KVM_WALL_CLOCK:
1618                 vcpu->kvm->arch.wall_clock = data;
1619                 kvm_write_wall_clock(vcpu->kvm, data);
1620                 break;
1621         case MSR_KVM_SYSTEM_TIME_NEW:
1622         case MSR_KVM_SYSTEM_TIME: {
1623                 kvmclock_reset(vcpu);
1624
1625                 vcpu->arch.time = data;
1626                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1627
1628                 /* we verify if the enable bit is set... */
1629                 if (!(data & 1))
1630                         break;
1631
1632                 /* ...but clean it before doing the actual write */
1633                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1634
1635                 vcpu->arch.time_page =
1636                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1637
1638                 if (is_error_page(vcpu->arch.time_page)) {
1639                         kvm_release_page_clean(vcpu->arch.time_page);
1640                         vcpu->arch.time_page = NULL;
1641                 }
1642                 break;
1643         }
1644         case MSR_KVM_ASYNC_PF_EN:
1645                 if (kvm_pv_enable_async_pf(vcpu, data))
1646                         return 1;
1647                 break;
1648         case MSR_KVM_STEAL_TIME:
1649
1650                 if (unlikely(!sched_info_on()))
1651                         return 1;
1652
1653                 if (data & KVM_STEAL_RESERVED_MASK)
1654                         return 1;
1655
1656                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1657                                                         data & KVM_STEAL_VALID_BITS))
1658                         return 1;
1659
1660                 vcpu->arch.st.msr_val = data;
1661
1662                 if (!(data & KVM_MSR_ENABLED))
1663                         break;
1664
1665                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1666
1667                 preempt_disable();
1668                 accumulate_steal_time(vcpu);
1669                 preempt_enable();
1670
1671                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1672
1673                 break;
1674         case MSR_KVM_PV_EOI_EN:
1675                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
1676                         return 1;
1677                 break;
1678
1679         case MSR_IA32_MCG_CTL:
1680         case MSR_IA32_MCG_STATUS:
1681         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1682                 return set_msr_mce(vcpu, msr, data);
1683
1684         /* Performance counters are not protected by a CPUID bit,
1685          * so we should check all of them in the generic path for the sake of
1686          * cross vendor migration.
1687          * Writing a zero into the event select MSRs disables them,
1688          * which we perfectly emulate ;-). Any other value should be at least
1689          * reported, some guests depend on them.
1690          */
1691         case MSR_K7_EVNTSEL0:
1692         case MSR_K7_EVNTSEL1:
1693         case MSR_K7_EVNTSEL2:
1694         case MSR_K7_EVNTSEL3:
1695                 if (data != 0)
1696                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1697                                     "0x%x data 0x%llx\n", msr, data);
1698                 break;
1699         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1700          * so we ignore writes to make it happy.
1701          */
1702         case MSR_K7_PERFCTR0:
1703         case MSR_K7_PERFCTR1:
1704         case MSR_K7_PERFCTR2:
1705         case MSR_K7_PERFCTR3:
1706                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1707                             "0x%x data 0x%llx\n", msr, data);
1708                 break;
1709         case MSR_P6_PERFCTR0:
1710         case MSR_P6_PERFCTR1:
1711                 pr = true;
1712         case MSR_P6_EVNTSEL0:
1713         case MSR_P6_EVNTSEL1:
1714                 if (kvm_pmu_msr(vcpu, msr))
1715                         return kvm_pmu_set_msr(vcpu, msr, data);
1716
1717                 if (pr || data != 0)
1718                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
1719                                     "0x%x data 0x%llx\n", msr, data);
1720                 break;
1721         case MSR_K7_CLK_CTL:
1722                 /*
1723                  * Ignore all writes to this no longer documented MSR.
1724                  * Writes are only relevant for old K7 processors,
1725                  * all pre-dating SVM, but a recommended workaround from
1726                  * AMD for these chips. It is possible to speicify the
1727                  * affected processor models on the command line, hence
1728                  * the need to ignore the workaround.
1729                  */
1730                 break;
1731         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1732                 if (kvm_hv_msr_partition_wide(msr)) {
1733                         int r;
1734                         mutex_lock(&vcpu->kvm->lock);
1735                         r = set_msr_hyperv_pw(vcpu, msr, data);
1736                         mutex_unlock(&vcpu->kvm->lock);
1737                         return r;
1738                 } else
1739                         return set_msr_hyperv(vcpu, msr, data);
1740                 break;
1741         case MSR_IA32_BBL_CR_CTL3:
1742                 /* Drop writes to this legacy MSR -- see rdmsr
1743                  * counterpart for further detail.
1744                  */
1745                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1746                 break;
1747         case MSR_AMD64_OSVW_ID_LENGTH:
1748                 if (!guest_cpuid_has_osvw(vcpu))
1749                         return 1;
1750                 vcpu->arch.osvw.length = data;
1751                 break;
1752         case MSR_AMD64_OSVW_STATUS:
1753                 if (!guest_cpuid_has_osvw(vcpu))
1754                         return 1;
1755                 vcpu->arch.osvw.status = data;
1756                 break;
1757         default:
1758                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1759                         return xen_hvm_config(vcpu, data);
1760                 if (kvm_pmu_msr(vcpu, msr))
1761                         return kvm_pmu_set_msr(vcpu, msr, data);
1762                 if (!ignore_msrs) {
1763                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1764                                     msr, data);
1765                         return 1;
1766                 } else {
1767                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1768                                     msr, data);
1769                         break;
1770                 }
1771         }
1772         return 0;
1773 }
1774 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1775
1776
1777 /*
1778  * Reads an msr value (of 'msr_index') into 'pdata'.
1779  * Returns 0 on success, non-0 otherwise.
1780  * Assumes vcpu_load() was already called.
1781  */
1782 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1783 {
1784         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1785 }
1786
1787 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1788 {
1789         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1790
1791         if (!msr_mtrr_valid(msr))
1792                 return 1;
1793
1794         if (msr == MSR_MTRRdefType)
1795                 *pdata = vcpu->arch.mtrr_state.def_type +
1796                          (vcpu->arch.mtrr_state.enabled << 10);
1797         else if (msr == MSR_MTRRfix64K_00000)
1798                 *pdata = p[0];
1799         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1800                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1801         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1802                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1803         else if (msr == MSR_IA32_CR_PAT)
1804                 *pdata = vcpu->arch.pat;
1805         else {  /* Variable MTRRs */
1806                 int idx, is_mtrr_mask;
1807                 u64 *pt;
1808
1809                 idx = (msr - 0x200) / 2;
1810                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1811                 if (!is_mtrr_mask)
1812                         pt =
1813                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1814                 else
1815                         pt =
1816                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1817                 *pdata = *pt;
1818         }
1819
1820         return 0;
1821 }
1822
1823 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1824 {
1825         u64 data;
1826         u64 mcg_cap = vcpu->arch.mcg_cap;
1827         unsigned bank_num = mcg_cap & 0xff;
1828
1829         switch (msr) {
1830         case MSR_IA32_P5_MC_ADDR:
1831         case MSR_IA32_P5_MC_TYPE:
1832                 data = 0;
1833                 break;
1834         case MSR_IA32_MCG_CAP:
1835                 data = vcpu->arch.mcg_cap;
1836                 break;
1837         case MSR_IA32_MCG_CTL:
1838                 if (!(mcg_cap & MCG_CTL_P))
1839                         return 1;
1840                 data = vcpu->arch.mcg_ctl;
1841                 break;
1842         case MSR_IA32_MCG_STATUS:
1843                 data = vcpu->arch.mcg_status;
1844                 break;
1845         default:
1846                 if (msr >= MSR_IA32_MC0_CTL &&
1847                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1848                         u32 offset = msr - MSR_IA32_MC0_CTL;
1849                         data = vcpu->arch.mce_banks[offset];
1850                         break;
1851                 }
1852                 return 1;
1853         }
1854         *pdata = data;
1855         return 0;
1856 }
1857
1858 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1859 {
1860         u64 data = 0;
1861         struct kvm *kvm = vcpu->kvm;
1862
1863         switch (msr) {
1864         case HV_X64_MSR_GUEST_OS_ID:
1865                 data = kvm->arch.hv_guest_os_id;
1866                 break;
1867         case HV_X64_MSR_HYPERCALL:
1868                 data = kvm->arch.hv_hypercall;
1869                 break;
1870         default:
1871                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1872                 return 1;
1873         }
1874
1875         *pdata = data;
1876         return 0;
1877 }
1878
1879 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1880 {
1881         u64 data = 0;
1882
1883         switch (msr) {
1884         case HV_X64_MSR_VP_INDEX: {
1885                 int r;
1886                 struct kvm_vcpu *v;
1887                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1888                         if (v == vcpu)
1889                                 data = r;
1890                 break;
1891         }
1892         case HV_X64_MSR_EOI:
1893                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1894         case HV_X64_MSR_ICR:
1895                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1896         case HV_X64_MSR_TPR:
1897                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1898         case HV_X64_MSR_APIC_ASSIST_PAGE:
1899                 data = vcpu->arch.hv_vapic;
1900                 break;
1901         default:
1902                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1903                 return 1;
1904         }
1905         *pdata = data;
1906         return 0;
1907 }
1908
1909 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1910 {
1911         u64 data;
1912
1913         switch (msr) {
1914         case MSR_IA32_PLATFORM_ID:
1915         case MSR_IA32_EBL_CR_POWERON:
1916         case MSR_IA32_DEBUGCTLMSR:
1917         case MSR_IA32_LASTBRANCHFROMIP:
1918         case MSR_IA32_LASTBRANCHTOIP:
1919         case MSR_IA32_LASTINTFROMIP:
1920         case MSR_IA32_LASTINTTOIP:
1921         case MSR_K8_SYSCFG:
1922         case MSR_K7_HWCR:
1923         case MSR_VM_HSAVE_PA:
1924         case MSR_K7_EVNTSEL0:
1925         case MSR_K7_PERFCTR0:
1926         case MSR_K8_INT_PENDING_MSG:
1927         case MSR_AMD64_NB_CFG:
1928         case MSR_FAM10H_MMIO_CONF_BASE:
1929                 data = 0;
1930                 break;
1931         case MSR_P6_PERFCTR0:
1932         case MSR_P6_PERFCTR1:
1933         case MSR_P6_EVNTSEL0:
1934         case MSR_P6_EVNTSEL1:
1935                 if (kvm_pmu_msr(vcpu, msr))
1936                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1937                 data = 0;
1938                 break;
1939         case MSR_IA32_UCODE_REV:
1940                 data = 0x100000000ULL;
1941                 break;
1942         case MSR_MTRRcap:
1943                 data = 0x500 | KVM_NR_VAR_MTRR;
1944                 break;
1945         case 0x200 ... 0x2ff:
1946                 return get_msr_mtrr(vcpu, msr, pdata);
1947         case 0xcd: /* fsb frequency */
1948                 data = 3;
1949                 break;
1950                 /*
1951                  * MSR_EBC_FREQUENCY_ID
1952                  * Conservative value valid for even the basic CPU models.
1953                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1954                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1955                  * and 266MHz for model 3, or 4. Set Core Clock
1956                  * Frequency to System Bus Frequency Ratio to 1 (bits
1957                  * 31:24) even though these are only valid for CPU
1958                  * models > 2, however guests may end up dividing or
1959                  * multiplying by zero otherwise.
1960                  */
1961         case MSR_EBC_FREQUENCY_ID:
1962                 data = 1 << 24;
1963                 break;
1964         case MSR_IA32_APICBASE:
1965                 data = kvm_get_apic_base(vcpu);
1966                 break;
1967         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1968                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1969                 break;
1970         case MSR_IA32_TSCDEADLINE:
1971                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1972                 break;
1973         case MSR_IA32_MISC_ENABLE:
1974                 data = vcpu->arch.ia32_misc_enable_msr;
1975                 break;
1976         case MSR_IA32_PERF_STATUS:
1977                 /* TSC increment by tick */
1978                 data = 1000ULL;
1979                 /* CPU multiplier */
1980                 data |= (((uint64_t)4ULL) << 40);
1981                 break;
1982         case MSR_EFER:
1983                 data = vcpu->arch.efer;
1984                 break;
1985         case MSR_KVM_WALL_CLOCK:
1986         case MSR_KVM_WALL_CLOCK_NEW:
1987                 data = vcpu->kvm->arch.wall_clock;
1988                 break;
1989         case MSR_KVM_SYSTEM_TIME:
1990         case MSR_KVM_SYSTEM_TIME_NEW:
1991                 data = vcpu->arch.time;
1992                 break;
1993         case MSR_KVM_ASYNC_PF_EN:
1994                 data = vcpu->arch.apf.msr_val;
1995                 break;
1996         case MSR_KVM_STEAL_TIME:
1997                 data = vcpu->arch.st.msr_val;
1998                 break;
1999         case MSR_IA32_P5_MC_ADDR:
2000         case MSR_IA32_P5_MC_TYPE:
2001         case MSR_IA32_MCG_CAP:
2002         case MSR_IA32_MCG_CTL:
2003         case MSR_IA32_MCG_STATUS:
2004         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2005                 return get_msr_mce(vcpu, msr, pdata);
2006         case MSR_K7_CLK_CTL:
2007                 /*
2008                  * Provide expected ramp-up count for K7. All other
2009                  * are set to zero, indicating minimum divisors for
2010                  * every field.
2011                  *
2012                  * This prevents guest kernels on AMD host with CPU
2013                  * type 6, model 8 and higher from exploding due to
2014                  * the rdmsr failing.
2015                  */
2016                 data = 0x20000000;
2017                 break;
2018         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2019                 if (kvm_hv_msr_partition_wide(msr)) {
2020                         int r;
2021                         mutex_lock(&vcpu->kvm->lock);
2022                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2023                         mutex_unlock(&vcpu->kvm->lock);
2024                         return r;
2025                 } else
2026                         return get_msr_hyperv(vcpu, msr, pdata);
2027                 break;
2028         case MSR_IA32_BBL_CR_CTL3:
2029                 /* This legacy MSR exists but isn't fully documented in current
2030                  * silicon.  It is however accessed by winxp in very narrow
2031                  * scenarios where it sets bit #19, itself documented as
2032                  * a "reserved" bit.  Best effort attempt to source coherent
2033                  * read data here should the balance of the register be
2034                  * interpreted by the guest:
2035                  *
2036                  * L2 cache control register 3: 64GB range, 256KB size,
2037                  * enabled, latency 0x1, configured
2038                  */
2039                 data = 0xbe702111;
2040                 break;
2041         case MSR_AMD64_OSVW_ID_LENGTH:
2042                 if (!guest_cpuid_has_osvw(vcpu))
2043                         return 1;
2044                 data = vcpu->arch.osvw.length;
2045                 break;
2046         case MSR_AMD64_OSVW_STATUS:
2047                 if (!guest_cpuid_has_osvw(vcpu))
2048                         return 1;
2049                 data = vcpu->arch.osvw.status;
2050                 break;
2051         default:
2052                 if (kvm_pmu_msr(vcpu, msr))
2053                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2054                 if (!ignore_msrs) {
2055                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2056                         return 1;
2057                 } else {
2058                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2059                         data = 0;
2060                 }
2061                 break;
2062         }
2063         *pdata = data;
2064         return 0;
2065 }
2066 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2067
2068 /*
2069  * Read or write a bunch of msrs. All parameters are kernel addresses.
2070  *
2071  * @return number of msrs set successfully.
2072  */
2073 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2074                     struct kvm_msr_entry *entries,
2075                     int (*do_msr)(struct kvm_vcpu *vcpu,
2076                                   unsigned index, u64 *data))
2077 {
2078         int i, idx;
2079
2080         idx = srcu_read_lock(&vcpu->kvm->srcu);
2081         for (i = 0; i < msrs->nmsrs; ++i)
2082                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2083                         break;
2084         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2085
2086         return i;
2087 }
2088
2089 /*
2090  * Read or write a bunch of msrs. Parameters are user addresses.
2091  *
2092  * @return number of msrs set successfully.
2093  */
2094 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2095                   int (*do_msr)(struct kvm_vcpu *vcpu,
2096                                 unsigned index, u64 *data),
2097                   int writeback)
2098 {
2099         struct kvm_msrs msrs;
2100         struct kvm_msr_entry *entries;
2101         int r, n;
2102         unsigned size;
2103
2104         r = -EFAULT;
2105         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2106                 goto out;
2107
2108         r = -E2BIG;
2109         if (msrs.nmsrs >= MAX_IO_MSRS)
2110                 goto out;
2111
2112         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2113         entries = memdup_user(user_msrs->entries, size);
2114         if (IS_ERR(entries)) {
2115                 r = PTR_ERR(entries);
2116                 goto out;
2117         }
2118
2119         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2120         if (r < 0)
2121                 goto out_free;
2122
2123         r = -EFAULT;
2124         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2125                 goto out_free;
2126
2127         r = n;
2128
2129 out_free:
2130         kfree(entries);
2131 out:
2132         return r;
2133 }
2134
2135 int kvm_dev_ioctl_check_extension(long ext)
2136 {
2137         int r;
2138
2139         switch (ext) {
2140         case KVM_CAP_IRQCHIP:
2141         case KVM_CAP_HLT:
2142         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2143         case KVM_CAP_SET_TSS_ADDR:
2144         case KVM_CAP_EXT_CPUID:
2145         case KVM_CAP_CLOCKSOURCE:
2146         case KVM_CAP_PIT:
2147         case KVM_CAP_NOP_IO_DELAY:
2148         case KVM_CAP_MP_STATE:
2149         case KVM_CAP_SYNC_MMU:
2150         case KVM_CAP_USER_NMI:
2151         case KVM_CAP_REINJECT_CONTROL:
2152         case KVM_CAP_IRQ_INJECT_STATUS:
2153         case KVM_CAP_ASSIGN_DEV_IRQ:
2154         case KVM_CAP_IRQFD:
2155         case KVM_CAP_IOEVENTFD:
2156         case KVM_CAP_PIT2:
2157         case KVM_CAP_PIT_STATE2:
2158         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2159         case KVM_CAP_XEN_HVM:
2160         case KVM_CAP_ADJUST_CLOCK:
2161         case KVM_CAP_VCPU_EVENTS:
2162         case KVM_CAP_HYPERV:
2163         case KVM_CAP_HYPERV_VAPIC:
2164         case KVM_CAP_HYPERV_SPIN:
2165         case KVM_CAP_PCI_SEGMENT:
2166         case KVM_CAP_DEBUGREGS:
2167         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2168         case KVM_CAP_XSAVE:
2169         case KVM_CAP_ASYNC_PF:
2170         case KVM_CAP_GET_TSC_KHZ:
2171         case KVM_CAP_PCI_2_3:
2172         case KVM_CAP_KVMCLOCK_CTRL:
2173                 r = 1;
2174                 break;
2175         case KVM_CAP_COALESCED_MMIO:
2176                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2177                 break;
2178         case KVM_CAP_VAPIC:
2179                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2180                 break;
2181         case KVM_CAP_NR_VCPUS:
2182                 r = KVM_SOFT_MAX_VCPUS;
2183                 break;
2184         case KVM_CAP_MAX_VCPUS:
2185                 r = KVM_MAX_VCPUS;
2186                 break;
2187         case KVM_CAP_NR_MEMSLOTS:
2188                 r = KVM_MEMORY_SLOTS;
2189                 break;
2190         case KVM_CAP_PV_MMU:    /* obsolete */
2191                 r = 0;
2192                 break;
2193         case KVM_CAP_IOMMU:
2194                 r = iommu_present(&pci_bus_type);
2195                 break;
2196         case KVM_CAP_MCE:
2197                 r = KVM_MAX_MCE_BANKS;
2198                 break;
2199         case KVM_CAP_XCRS:
2200                 r = cpu_has_xsave;
2201                 break;
2202         case KVM_CAP_TSC_CONTROL:
2203                 r = kvm_has_tsc_control;
2204                 break;
2205         case KVM_CAP_TSC_DEADLINE_TIMER:
2206                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2207                 break;
2208         default:
2209                 r = 0;
2210                 break;
2211         }
2212         return r;
2213
2214 }
2215
2216 long kvm_arch_dev_ioctl(struct file *filp,
2217                         unsigned int ioctl, unsigned long arg)
2218 {
2219         void __user *argp = (void __user *)arg;
2220         long r;
2221
2222         switch (ioctl) {
2223         case KVM_GET_MSR_INDEX_LIST: {
2224                 struct kvm_msr_list __user *user_msr_list = argp;
2225                 struct kvm_msr_list msr_list;
2226                 unsigned n;
2227
2228                 r = -EFAULT;
2229                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2230                         goto out;
2231                 n = msr_list.nmsrs;
2232                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2233                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2234                         goto out;
2235                 r = -E2BIG;
2236                 if (n < msr_list.nmsrs)
2237                         goto out;
2238                 r = -EFAULT;
2239                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2240                                  num_msrs_to_save * sizeof(u32)))
2241                         goto out;
2242                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2243                                  &emulated_msrs,
2244                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2245                         goto out;
2246                 r = 0;
2247                 break;
2248         }
2249         case KVM_GET_SUPPORTED_CPUID: {
2250                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2251                 struct kvm_cpuid2 cpuid;
2252
2253                 r = -EFAULT;
2254                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2255                         goto out;
2256                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2257                                                       cpuid_arg->entries);
2258                 if (r)
2259                         goto out;
2260
2261                 r = -EFAULT;
2262                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2263                         goto out;
2264                 r = 0;
2265                 break;
2266         }
2267         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2268                 u64 mce_cap;
2269
2270                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2271                 r = -EFAULT;
2272                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2273                         goto out;
2274                 r = 0;
2275                 break;
2276         }
2277         default:
2278                 r = -EINVAL;
2279         }
2280 out:
2281         return r;
2282 }
2283
2284 static void wbinvd_ipi(void *garbage)
2285 {
2286         wbinvd();
2287 }
2288
2289 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2290 {
2291         return vcpu->kvm->arch.iommu_domain &&
2292                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2293 }
2294
2295 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2296 {
2297         /* Address WBINVD may be executed by guest */
2298         if (need_emulate_wbinvd(vcpu)) {
2299                 if (kvm_x86_ops->has_wbinvd_exit())
2300                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2301                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2302                         smp_call_function_single(vcpu->cpu,
2303                                         wbinvd_ipi, NULL, 1);
2304         }
2305
2306         kvm_x86_ops->vcpu_load(vcpu, cpu);
2307
2308         /* Apply any externally detected TSC adjustments (due to suspend) */
2309         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2310                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2311                 vcpu->arch.tsc_offset_adjustment = 0;
2312                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2313         }
2314
2315         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2316                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2317                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2318                 if (tsc_delta < 0)
2319                         mark_tsc_unstable("KVM discovered backwards TSC");
2320                 if (check_tsc_unstable()) {
2321                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2322                                                 vcpu->arch.last_guest_tsc);
2323                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2324                         vcpu->arch.tsc_catchup = 1;
2325                 }
2326                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2327                 if (vcpu->cpu != cpu)
2328                         kvm_migrate_timers(vcpu);
2329                 vcpu->cpu = cpu;
2330         }
2331
2332         accumulate_steal_time(vcpu);
2333         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2334 }
2335
2336 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2337 {
2338         kvm_x86_ops->vcpu_put(vcpu);
2339         kvm_put_guest_fpu(vcpu);
2340         vcpu->arch.last_host_tsc = native_read_tsc();
2341 }
2342
2343 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2344                                     struct kvm_lapic_state *s)
2345 {
2346         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2347
2348         return 0;
2349 }
2350
2351 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2352                                     struct kvm_lapic_state *s)
2353 {
2354         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2355         kvm_apic_post_state_restore(vcpu);
2356         update_cr8_intercept(vcpu);
2357
2358         return 0;
2359 }
2360
2361 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2362                                     struct kvm_interrupt *irq)
2363 {
2364         if (irq->irq < 0 || irq->irq >= 256)
2365                 return -EINVAL;
2366         if (irqchip_in_kernel(vcpu->kvm))
2367                 return -ENXIO;
2368
2369         kvm_queue_interrupt(vcpu, irq->irq, false);
2370         kvm_make_request(KVM_REQ_EVENT, vcpu);
2371
2372         return 0;
2373 }
2374
2375 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2376 {
2377         kvm_inject_nmi(vcpu);
2378
2379         return 0;
2380 }
2381
2382 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2383                                            struct kvm_tpr_access_ctl *tac)
2384 {
2385         if (tac->flags)
2386                 return -EINVAL;
2387         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2388         return 0;
2389 }
2390
2391 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2392                                         u64 mcg_cap)
2393 {
2394         int r;
2395         unsigned bank_num = mcg_cap & 0xff, bank;
2396
2397         r = -EINVAL;
2398         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2399                 goto out;
2400         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2401                 goto out;
2402         r = 0;
2403         vcpu->arch.mcg_cap = mcg_cap;
2404         /* Init IA32_MCG_CTL to all 1s */
2405         if (mcg_cap & MCG_CTL_P)
2406                 vcpu->arch.mcg_ctl = ~(u64)0;
2407         /* Init IA32_MCi_CTL to all 1s */
2408         for (bank = 0; bank < bank_num; bank++)
2409                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2410 out:
2411         return r;
2412 }
2413
2414 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2415                                       struct kvm_x86_mce *mce)
2416 {
2417         u64 mcg_cap = vcpu->arch.mcg_cap;
2418         unsigned bank_num = mcg_cap & 0xff;
2419         u64 *banks = vcpu->arch.mce_banks;
2420
2421         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2422                 return -EINVAL;
2423         /*
2424          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2425          * reporting is disabled
2426          */
2427         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2428             vcpu->arch.mcg_ctl != ~(u64)0)
2429                 return 0;
2430         banks += 4 * mce->bank;
2431         /*
2432          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2433          * reporting is disabled for the bank
2434          */
2435         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2436                 return 0;
2437         if (mce->status & MCI_STATUS_UC) {
2438                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2439                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2440                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2441                         return 0;
2442                 }
2443                 if (banks[1] & MCI_STATUS_VAL)
2444                         mce->status |= MCI_STATUS_OVER;
2445                 banks[2] = mce->addr;
2446                 banks[3] = mce->misc;
2447                 vcpu->arch.mcg_status = mce->mcg_status;
2448                 banks[1] = mce->status;
2449                 kvm_queue_exception(vcpu, MC_VECTOR);
2450         } else if (!(banks[1] & MCI_STATUS_VAL)
2451                    || !(banks[1] & MCI_STATUS_UC)) {
2452                 if (banks[1] & MCI_STATUS_VAL)
2453                         mce->status |= MCI_STATUS_OVER;
2454                 banks[2] = mce->addr;
2455                 banks[3] = mce->misc;
2456                 banks[1] = mce->status;
2457         } else
2458                 banks[1] |= MCI_STATUS_OVER;
2459         return 0;
2460 }
2461
2462 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2463                                                struct kvm_vcpu_events *events)
2464 {
2465         process_nmi(vcpu);
2466         events->exception.injected =
2467                 vcpu->arch.exception.pending &&
2468                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2469         events->exception.nr = vcpu->arch.exception.nr;
2470         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2471         events->exception.pad = 0;
2472         events->exception.error_code = vcpu->arch.exception.error_code;
2473
2474         events->interrupt.injected =
2475                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2476         events->interrupt.nr = vcpu->arch.interrupt.nr;
2477         events->interrupt.soft = 0;
2478         events->interrupt.shadow =
2479                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2480                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2481
2482         events->nmi.injected = vcpu->arch.nmi_injected;
2483         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2484         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2485         events->nmi.pad = 0;
2486
2487         events->sipi_vector = vcpu->arch.sipi_vector;
2488
2489         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2490                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2491                          | KVM_VCPUEVENT_VALID_SHADOW);
2492         memset(&events->reserved, 0, sizeof(events->reserved));
2493 }
2494
2495 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2496                                               struct kvm_vcpu_events *events)
2497 {
2498         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2499                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2500                               | KVM_VCPUEVENT_VALID_SHADOW))
2501                 return -EINVAL;
2502
2503         process_nmi(vcpu);
2504         vcpu->arch.exception.pending = events->exception.injected;
2505         vcpu->arch.exception.nr = events->exception.nr;
2506         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2507         vcpu->arch.exception.error_code = events->exception.error_code;
2508
2509         vcpu->arch.interrupt.pending = events->interrupt.injected;
2510         vcpu->arch.interrupt.nr = events->interrupt.nr;
2511         vcpu->arch.interrupt.soft = events->interrupt.soft;
2512         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2513                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2514                                                   events->interrupt.shadow);
2515
2516         vcpu->arch.nmi_injected = events->nmi.injected;
2517         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2518                 vcpu->arch.nmi_pending = events->nmi.pending;
2519         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2520
2521         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2522                 vcpu->arch.sipi_vector = events->sipi_vector;
2523
2524         kvm_make_request(KVM_REQ_EVENT, vcpu);
2525
2526         return 0;
2527 }
2528
2529 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2530                                              struct kvm_debugregs *dbgregs)
2531 {
2532         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2533         dbgregs->dr6 = vcpu->arch.dr6;
2534         dbgregs->dr7 = vcpu->arch.dr7;
2535         dbgregs->flags = 0;
2536         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2537 }
2538
2539 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2540                                             struct kvm_debugregs *dbgregs)
2541 {
2542         if (dbgregs->flags)
2543                 return -EINVAL;
2544
2545         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2546         vcpu->arch.dr6 = dbgregs->dr6;
2547         vcpu->arch.dr7 = dbgregs->dr7;
2548
2549         return 0;
2550 }
2551
2552 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2553                                          struct kvm_xsave *guest_xsave)
2554 {
2555         if (cpu_has_xsave)
2556                 memcpy(guest_xsave->region,
2557                         &vcpu->arch.guest_fpu.state->xsave,
2558                         xstate_size);
2559         else {
2560                 memcpy(guest_xsave->region,
2561                         &vcpu->arch.guest_fpu.state->fxsave,
2562                         sizeof(struct i387_fxsave_struct));
2563                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2564                         XSTATE_FPSSE;
2565         }
2566 }
2567
2568 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2569                                         struct kvm_xsave *guest_xsave)
2570 {
2571         u64 xstate_bv =
2572                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2573
2574         if (cpu_has_xsave)
2575                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2576                         guest_xsave->region, xstate_size);
2577         else {
2578                 if (xstate_bv & ~XSTATE_FPSSE)
2579                         return -EINVAL;
2580                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2581                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2582         }
2583         return 0;
2584 }
2585
2586 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2587                                         struct kvm_xcrs *guest_xcrs)
2588 {
2589         if (!cpu_has_xsave) {
2590                 guest_xcrs->nr_xcrs = 0;
2591                 return;
2592         }
2593
2594         guest_xcrs->nr_xcrs = 1;
2595         guest_xcrs->flags = 0;
2596         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2597         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2598 }
2599
2600 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2601                                        struct kvm_xcrs *guest_xcrs)
2602 {
2603         int i, r = 0;
2604
2605         if (!cpu_has_xsave)
2606                 return -EINVAL;
2607
2608         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2609                 return -EINVAL;
2610
2611         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2612                 /* Only support XCR0 currently */
2613                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2614                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2615                                 guest_xcrs->xcrs[0].value);
2616                         break;
2617                 }
2618         if (r)
2619                 r = -EINVAL;
2620         return r;
2621 }
2622
2623 /*
2624  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2625  * stopped by the hypervisor.  This function will be called from the host only.
2626  * EINVAL is returned when the host attempts to set the flag for a guest that
2627  * does not support pv clocks.
2628  */
2629 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2630 {
2631         struct pvclock_vcpu_time_info *src = &vcpu->arch.hv_clock;
2632         if (!vcpu->arch.time_page)
2633                 return -EINVAL;
2634         src->flags |= PVCLOCK_GUEST_STOPPED;
2635         mark_page_dirty(vcpu->kvm, vcpu->arch.time >> PAGE_SHIFT);
2636         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2637         return 0;
2638 }
2639
2640 long kvm_arch_vcpu_ioctl(struct file *filp,
2641                          unsigned int ioctl, unsigned long arg)
2642 {
2643         struct kvm_vcpu *vcpu = filp->private_data;
2644         void __user *argp = (void __user *)arg;
2645         int r;
2646         union {
2647                 struct kvm_lapic_state *lapic;
2648                 struct kvm_xsave *xsave;
2649                 struct kvm_xcrs *xcrs;
2650                 void *buffer;
2651         } u;
2652
2653         u.buffer = NULL;
2654         switch (ioctl) {
2655         case KVM_GET_LAPIC: {
2656                 r = -EINVAL;
2657                 if (!vcpu->arch.apic)
2658                         goto out;
2659                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2660
2661                 r = -ENOMEM;
2662                 if (!u.lapic)
2663                         goto out;
2664                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2665                 if (r)
2666                         goto out;
2667                 r = -EFAULT;
2668                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2669                         goto out;
2670                 r = 0;
2671                 break;
2672         }
2673         case KVM_SET_LAPIC: {
2674                 r = -EINVAL;
2675                 if (!vcpu->arch.apic)
2676                         goto out;
2677                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2678                 if (IS_ERR(u.lapic)) {
2679                         r = PTR_ERR(u.lapic);
2680                         goto out;
2681                 }
2682
2683                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2684                 if (r)
2685                         goto out;
2686                 r = 0;
2687                 break;
2688         }
2689         case KVM_INTERRUPT: {
2690                 struct kvm_interrupt irq;
2691
2692                 r = -EFAULT;
2693                 if (copy_from_user(&irq, argp, sizeof irq))
2694                         goto out;
2695                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2696                 if (r)
2697                         goto out;
2698                 r = 0;
2699                 break;
2700         }
2701         case KVM_NMI: {
2702                 r = kvm_vcpu_ioctl_nmi(vcpu);
2703                 if (r)
2704                         goto out;
2705                 r = 0;
2706                 break;
2707         }
2708         case KVM_SET_CPUID: {
2709                 struct kvm_cpuid __user *cpuid_arg = argp;
2710                 struct kvm_cpuid cpuid;
2711
2712                 r = -EFAULT;
2713                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2714                         goto out;
2715                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2716                 if (r)
2717                         goto out;
2718                 break;
2719         }
2720         case KVM_SET_CPUID2: {
2721                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2722                 struct kvm_cpuid2 cpuid;
2723
2724                 r = -EFAULT;
2725                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2726                         goto out;
2727                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2728                                               cpuid_arg->entries);
2729                 if (r)
2730                         goto out;
2731                 break;
2732         }
2733         case KVM_GET_CPUID2: {
2734                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2735                 struct kvm_cpuid2 cpuid;
2736
2737                 r = -EFAULT;
2738                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2739                         goto out;
2740                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2741                                               cpuid_arg->entries);
2742                 if (r)
2743                         goto out;
2744                 r = -EFAULT;
2745                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2746                         goto out;
2747                 r = 0;
2748                 break;
2749         }
2750         case KVM_GET_MSRS:
2751                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2752                 break;
2753         case KVM_SET_MSRS:
2754                 r = msr_io(vcpu, argp, do_set_msr, 0);
2755                 break;
2756         case KVM_TPR_ACCESS_REPORTING: {
2757                 struct kvm_tpr_access_ctl tac;
2758
2759                 r = -EFAULT;
2760                 if (copy_from_user(&tac, argp, sizeof tac))
2761                         goto out;
2762                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2763                 if (r)
2764                         goto out;
2765                 r = -EFAULT;
2766                 if (copy_to_user(argp, &tac, sizeof tac))
2767                         goto out;
2768                 r = 0;
2769                 break;
2770         };
2771         case KVM_SET_VAPIC_ADDR: {
2772                 struct kvm_vapic_addr va;
2773
2774                 r = -EINVAL;
2775                 if (!irqchip_in_kernel(vcpu->kvm))
2776                         goto out;
2777                 r = -EFAULT;
2778                 if (copy_from_user(&va, argp, sizeof va))
2779                         goto out;
2780                 r = 0;
2781                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2782                 break;
2783         }
2784         case KVM_X86_SETUP_MCE: {
2785                 u64 mcg_cap;
2786
2787                 r = -EFAULT;
2788                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2789                         goto out;
2790                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2791                 break;
2792         }
2793         case KVM_X86_SET_MCE: {
2794                 struct kvm_x86_mce mce;
2795
2796                 r = -EFAULT;
2797                 if (copy_from_user(&mce, argp, sizeof mce))
2798                         goto out;
2799                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2800                 break;
2801         }
2802         case KVM_GET_VCPU_EVENTS: {
2803                 struct kvm_vcpu_events events;
2804
2805                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2806
2807                 r = -EFAULT;
2808                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2809                         break;
2810                 r = 0;
2811                 break;
2812         }
2813         case KVM_SET_VCPU_EVENTS: {
2814                 struct kvm_vcpu_events events;
2815
2816                 r = -EFAULT;
2817                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2818                         break;
2819
2820                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2821                 break;
2822         }
2823         case KVM_GET_DEBUGREGS: {
2824                 struct kvm_debugregs dbgregs;
2825
2826                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2827
2828                 r = -EFAULT;
2829                 if (copy_to_user(argp, &dbgregs,
2830                                  sizeof(struct kvm_debugregs)))
2831                         break;
2832                 r = 0;
2833                 break;
2834         }
2835         case KVM_SET_DEBUGREGS: {
2836                 struct kvm_debugregs dbgregs;
2837
2838                 r = -EFAULT;
2839                 if (copy_from_user(&dbgregs, argp,
2840                                    sizeof(struct kvm_debugregs)))
2841                         break;
2842
2843                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2844                 break;
2845         }
2846         case KVM_GET_XSAVE: {
2847                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2848                 r = -ENOMEM;
2849                 if (!u.xsave)
2850                         break;
2851
2852                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2853
2854                 r = -EFAULT;
2855                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2856                         break;
2857                 r = 0;
2858                 break;
2859         }
2860         case KVM_SET_XSAVE: {
2861                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2862                 if (IS_ERR(u.xsave)) {
2863                         r = PTR_ERR(u.xsave);
2864                         goto out;
2865                 }
2866
2867                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2868                 break;
2869         }
2870         case KVM_GET_XCRS: {
2871                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2872                 r = -ENOMEM;
2873                 if (!u.xcrs)
2874                         break;
2875
2876                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2877
2878                 r = -EFAULT;
2879                 if (copy_to_user(argp, u.xcrs,
2880                                  sizeof(struct kvm_xcrs)))
2881                         break;
2882                 r = 0;
2883                 break;
2884         }
2885         case KVM_SET_XCRS: {
2886                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2887                 if (IS_ERR(u.xcrs)) {
2888                         r = PTR_ERR(u.xcrs);
2889                         goto out;
2890                 }
2891
2892                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2893                 break;
2894         }
2895         case KVM_SET_TSC_KHZ: {
2896                 u32 user_tsc_khz;
2897
2898                 r = -EINVAL;
2899                 user_tsc_khz = (u32)arg;
2900
2901                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2902                         goto out;
2903
2904                 if (user_tsc_khz == 0)
2905                         user_tsc_khz = tsc_khz;
2906
2907                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2908
2909                 r = 0;
2910                 goto out;
2911         }
2912         case KVM_GET_TSC_KHZ: {
2913                 r = vcpu->arch.virtual_tsc_khz;
2914                 goto out;
2915         }
2916         case KVM_KVMCLOCK_CTRL: {
2917                 r = kvm_set_guest_paused(vcpu);
2918                 goto out;
2919         }
2920         default:
2921                 r = -EINVAL;
2922         }
2923 out:
2924         kfree(u.buffer);
2925         return r;
2926 }
2927
2928 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2929 {
2930         return VM_FAULT_SIGBUS;
2931 }
2932
2933 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2934 {
2935         int ret;
2936
2937         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2938                 return -1;
2939         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2940         return ret;
2941 }
2942
2943 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2944                                               u64 ident_addr)
2945 {
2946         kvm->arch.ept_identity_map_addr = ident_addr;
2947         return 0;
2948 }
2949
2950 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2951                                           u32 kvm_nr_mmu_pages)
2952 {
2953         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2954                 return -EINVAL;
2955
2956         mutex_lock(&kvm->slots_lock);
2957         spin_lock(&kvm->mmu_lock);
2958
2959         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2960         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2961
2962         spin_unlock(&kvm->mmu_lock);
2963         mutex_unlock(&kvm->slots_lock);
2964         return 0;
2965 }
2966
2967 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2968 {
2969         return kvm->arch.n_max_mmu_pages;
2970 }
2971
2972 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2973 {
2974         int r;
2975
2976         r = 0;
2977         switch (chip->chip_id) {
2978         case KVM_IRQCHIP_PIC_MASTER:
2979                 memcpy(&chip->chip.pic,
2980                         &pic_irqchip(kvm)->pics[0],
2981                         sizeof(struct kvm_pic_state));
2982                 break;
2983         case KVM_IRQCHIP_PIC_SLAVE:
2984                 memcpy(&chip->chip.pic,
2985                         &pic_irqchip(kvm)->pics[1],
2986                         sizeof(struct kvm_pic_state));
2987                 break;
2988         case KVM_IRQCHIP_IOAPIC:
2989                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2990                 break;
2991         default:
2992                 r = -EINVAL;
2993                 break;
2994         }
2995         return r;
2996 }
2997
2998 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2999 {
3000         int r;
3001
3002         r = 0;
3003         switch (chip->chip_id) {
3004         case KVM_IRQCHIP_PIC_MASTER:
3005                 spin_lock(&pic_irqchip(kvm)->lock);
3006                 memcpy(&pic_irqchip(kvm)->pics[0],
3007                         &chip->chip.pic,
3008                         sizeof(struct kvm_pic_state));
3009                 spin_unlock(&pic_irqchip(kvm)->lock);
3010                 break;
3011         case KVM_IRQCHIP_PIC_SLAVE:
3012                 spin_lock(&pic_irqchip(kvm)->lock);
3013                 memcpy(&pic_irqchip(kvm)->pics[1],
3014                         &chip->chip.pic,
3015                         sizeof(struct kvm_pic_state));
3016                 spin_unlock(&pic_irqchip(kvm)->lock);
3017                 break;
3018         case KVM_IRQCHIP_IOAPIC:
3019                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3020                 break;
3021         default:
3022                 r = -EINVAL;
3023                 break;
3024         }
3025         kvm_pic_update_irq(pic_irqchip(kvm));
3026         return r;
3027 }
3028
3029 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3030 {
3031         int r = 0;
3032
3033         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3034         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3035         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3036         return r;
3037 }
3038
3039 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3040 {
3041         int r = 0;
3042
3043         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3044         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3045         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3046         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3047         return r;
3048 }
3049
3050 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3051 {
3052         int r = 0;
3053
3054         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3055         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3056                 sizeof(ps->channels));
3057         ps->flags = kvm->arch.vpit->pit_state.flags;
3058         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3059         memset(&ps->reserved, 0, sizeof(ps->reserved));
3060         return r;
3061 }
3062
3063 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3064 {
3065         int r = 0, start = 0;
3066         u32 prev_legacy, cur_legacy;
3067         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3068         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3069         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3070         if (!prev_legacy && cur_legacy)
3071                 start = 1;
3072         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3073                sizeof(kvm->arch.vpit->pit_state.channels));
3074         kvm->arch.vpit->pit_state.flags = ps->flags;
3075         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3076         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3077         return r;
3078 }
3079
3080 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3081                                  struct kvm_reinject_control *control)
3082 {
3083         if (!kvm->arch.vpit)
3084                 return -ENXIO;
3085         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3086         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3087         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3088         return 0;
3089 }
3090
3091 /**
3092  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3093  * @kvm: kvm instance
3094  * @log: slot id and address to which we copy the log
3095  *
3096  * We need to keep it in mind that VCPU threads can write to the bitmap
3097  * concurrently.  So, to avoid losing data, we keep the following order for
3098  * each bit:
3099  *
3100  *   1. Take a snapshot of the bit and clear it if needed.
3101  *   2. Write protect the corresponding page.
3102  *   3. Flush TLB's if needed.
3103  *   4. Copy the snapshot to the userspace.
3104  *
3105  * Between 2 and 3, the guest may write to the page using the remaining TLB
3106  * entry.  This is not a problem because the page will be reported dirty at
3107  * step 4 using the snapshot taken before and step 3 ensures that successive
3108  * writes will be logged for the next call.
3109  */
3110 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3111 {
3112         int r;
3113         struct kvm_memory_slot *memslot;
3114         unsigned long n, i;
3115         unsigned long *dirty_bitmap;
3116         unsigned long *dirty_bitmap_buffer;
3117         bool is_dirty = false;
3118
3119         mutex_lock(&kvm->slots_lock);
3120
3121         r = -EINVAL;
3122         if (log->slot >= KVM_MEMORY_SLOTS)
3123                 goto out;
3124
3125         memslot = id_to_memslot(kvm->memslots, log->slot);
3126
3127         dirty_bitmap = memslot->dirty_bitmap;
3128         r = -ENOENT;
3129         if (!dirty_bitmap)
3130                 goto out;
3131
3132         n = kvm_dirty_bitmap_bytes(memslot);
3133
3134         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3135         memset(dirty_bitmap_buffer, 0, n);
3136
3137         spin_lock(&kvm->mmu_lock);
3138
3139         for (i = 0; i < n / sizeof(long); i++) {
3140                 unsigned long mask;
3141                 gfn_t offset;
3142
3143                 if (!dirty_bitmap[i])
3144                         continue;
3145
3146                 is_dirty = true;
3147
3148                 mask = xchg(&dirty_bitmap[i], 0);
3149                 dirty_bitmap_buffer[i] = mask;
3150
3151                 offset = i * BITS_PER_LONG;
3152                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3153         }
3154         if (is_dirty)
3155                 kvm_flush_remote_tlbs(kvm);
3156
3157         spin_unlock(&kvm->mmu_lock);
3158
3159         r = -EFAULT;
3160         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3161                 goto out;
3162
3163         r = 0;
3164 out:
3165         mutex_unlock(&kvm->slots_lock);
3166         return r;
3167 }
3168
3169 long kvm_arch_vm_ioctl(struct file *filp,
3170                        unsigned int ioctl, unsigned long arg)
3171 {
3172         struct kvm *kvm = filp->private_data;
3173         void __user *argp = (void __user *)arg;
3174         int r = -ENOTTY;
3175         /*
3176          * This union makes it completely explicit to gcc-3.x
3177          * that these two variables' stack usage should be
3178          * combined, not added together.
3179          */
3180         union {
3181                 struct kvm_pit_state ps;
3182                 struct kvm_pit_state2 ps2;
3183                 struct kvm_pit_config pit_config;
3184         } u;
3185
3186         switch (ioctl) {
3187         case KVM_SET_TSS_ADDR:
3188                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3189                 if (r < 0)
3190                         goto out;
3191                 break;
3192         case KVM_SET_IDENTITY_MAP_ADDR: {
3193                 u64 ident_addr;
3194
3195                 r = -EFAULT;
3196                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3197                         goto out;
3198                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3199                 if (r < 0)
3200                         goto out;
3201                 break;
3202         }
3203         case KVM_SET_NR_MMU_PAGES:
3204                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3205                 if (r)
3206                         goto out;
3207                 break;
3208         case KVM_GET_NR_MMU_PAGES:
3209                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3210                 break;
3211         case KVM_CREATE_IRQCHIP: {
3212                 struct kvm_pic *vpic;
3213
3214                 mutex_lock(&kvm->lock);
3215                 r = -EEXIST;
3216                 if (kvm->arch.vpic)
3217                         goto create_irqchip_unlock;
3218                 r = -EINVAL;
3219                 if (atomic_read(&kvm->online_vcpus))
3220                         goto create_irqchip_unlock;
3221                 r = -ENOMEM;
3222                 vpic = kvm_create_pic(kvm);
3223                 if (vpic) {
3224                         r = kvm_ioapic_init(kvm);
3225                         if (r) {
3226                                 mutex_lock(&kvm->slots_lock);
3227                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3228                                                           &vpic->dev_master);
3229                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3230                                                           &vpic->dev_slave);
3231                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3232                                                           &vpic->dev_eclr);
3233                                 mutex_unlock(&kvm->slots_lock);
3234                                 kfree(vpic);
3235                                 goto create_irqchip_unlock;
3236                         }
3237                 } else
3238                         goto create_irqchip_unlock;
3239                 smp_wmb();
3240                 kvm->arch.vpic = vpic;
3241                 smp_wmb();
3242                 r = kvm_setup_default_irq_routing(kvm);
3243                 if (r) {
3244                         mutex_lock(&kvm->slots_lock);
3245                         mutex_lock(&kvm->irq_lock);
3246                         kvm_ioapic_destroy(kvm);
3247                         kvm_destroy_pic(kvm);
3248                         mutex_unlock(&kvm->irq_lock);
3249                         mutex_unlock(&kvm->slots_lock);
3250                 }
3251         create_irqchip_unlock:
3252                 mutex_unlock(&kvm->lock);
3253                 break;
3254         }
3255         case KVM_CREATE_PIT:
3256                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3257                 goto create_pit;
3258         case KVM_CREATE_PIT2:
3259                 r = -EFAULT;
3260                 if (copy_from_user(&u.pit_config, argp,
3261                                    sizeof(struct kvm_pit_config)))
3262                         goto out;
3263         create_pit:
3264                 mutex_lock(&kvm->slots_lock);
3265                 r = -EEXIST;
3266                 if (kvm->arch.vpit)
3267                         goto create_pit_unlock;
3268                 r = -ENOMEM;
3269                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3270                 if (kvm->arch.vpit)
3271                         r = 0;
3272         create_pit_unlock:
3273                 mutex_unlock(&kvm->slots_lock);
3274                 break;
3275         case KVM_IRQ_LINE_STATUS:
3276         case KVM_IRQ_LINE: {
3277                 struct kvm_irq_level irq_event;
3278
3279                 r = -EFAULT;
3280                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3281                         goto out;
3282                 r = -ENXIO;
3283                 if (irqchip_in_kernel(kvm)) {
3284                         __s32 status;
3285                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3286                                         irq_event.irq, irq_event.level);
3287                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3288                                 r = -EFAULT;
3289                                 irq_event.status = status;
3290                                 if (copy_to_user(argp, &irq_event,
3291                                                         sizeof irq_event))
3292                                         goto out;
3293                         }
3294                         r = 0;
3295                 }
3296                 break;
3297         }
3298         case KVM_GET_IRQCHIP: {
3299                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3300                 struct kvm_irqchip *chip;
3301
3302                 chip = memdup_user(argp, sizeof(*chip));
3303                 if (IS_ERR(chip)) {
3304                         r = PTR_ERR(chip);
3305                         goto out;
3306                 }
3307
3308                 r = -ENXIO;
3309                 if (!irqchip_in_kernel(kvm))
3310                         goto get_irqchip_out;
3311                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3312                 if (r)
3313                         goto get_irqchip_out;
3314                 r = -EFAULT;
3315                 if (copy_to_user(argp, chip, sizeof *chip))
3316                         goto get_irqchip_out;
3317                 r = 0;
3318         get_irqchip_out:
3319                 kfree(chip);
3320                 if (r)
3321                         goto out;
3322                 break;
3323         }
3324         case KVM_SET_IRQCHIP: {
3325                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3326                 struct kvm_irqchip *chip;
3327
3328                 chip = memdup_user(argp, sizeof(*chip));
3329                 if (IS_ERR(chip)) {
3330                         r = PTR_ERR(chip);
3331                         goto out;
3332                 }
3333
3334                 r = -ENXIO;
3335                 if (!irqchip_in_kernel(kvm))
3336                         goto set_irqchip_out;
3337                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3338                 if (r)
3339                         goto set_irqchip_out;
3340                 r = 0;
3341         set_irqchip_out:
3342                 kfree(chip);
3343                 if (r)
3344                         goto out;
3345                 break;
3346         }
3347         case KVM_GET_PIT: {
3348                 r = -EFAULT;
3349                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3350                         goto out;
3351                 r = -ENXIO;
3352                 if (!kvm->arch.vpit)
3353                         goto out;
3354                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3355                 if (r)
3356                         goto out;
3357                 r = -EFAULT;
3358                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3359                         goto out;
3360                 r = 0;
3361                 break;
3362         }
3363         case KVM_SET_PIT: {
3364                 r = -EFAULT;
3365                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3366                         goto out;
3367                 r = -ENXIO;
3368                 if (!kvm->arch.vpit)
3369                         goto out;
3370                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3371                 if (r)
3372                         goto out;
3373                 r = 0;
3374                 break;
3375         }
3376         case KVM_GET_PIT2: {
3377                 r = -ENXIO;
3378                 if (!kvm->arch.vpit)
3379                         goto out;
3380                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3381                 if (r)
3382                         goto out;
3383                 r = -EFAULT;
3384                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3385                         goto out;
3386                 r = 0;
3387                 break;
3388         }
3389         case KVM_SET_PIT2: {
3390                 r = -EFAULT;
3391                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3392                         goto out;
3393                 r = -ENXIO;
3394                 if (!kvm->arch.vpit)
3395                         goto out;
3396                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3397                 if (r)
3398                         goto out;
3399                 r = 0;
3400                 break;
3401         }
3402         case KVM_REINJECT_CONTROL: {
3403                 struct kvm_reinject_control control;
3404                 r =  -EFAULT;
3405                 if (copy_from_user(&control, argp, sizeof(control)))
3406                         goto out;
3407                 r = kvm_vm_ioctl_reinject(kvm, &control);
3408                 if (r)
3409                         goto out;
3410                 r = 0;
3411                 break;
3412         }
3413         case KVM_XEN_HVM_CONFIG: {
3414                 r = -EFAULT;
3415                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3416                                    sizeof(struct kvm_xen_hvm_config)))
3417                         goto out;
3418                 r = -EINVAL;
3419                 if (kvm->arch.xen_hvm_config.flags)
3420                         goto out;
3421                 r = 0;
3422                 break;
3423         }
3424         case KVM_SET_CLOCK: {
3425                 struct kvm_clock_data user_ns;
3426                 u64 now_ns;
3427                 s64 delta;
3428
3429                 r = -EFAULT;
3430                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3431                         goto out;
3432
3433                 r = -EINVAL;
3434                 if (user_ns.flags)
3435                         goto out;
3436
3437                 r = 0;
3438                 local_irq_disable();
3439                 now_ns = get_kernel_ns();
3440                 delta = user_ns.clock - now_ns;
3441                 local_irq_enable();
3442                 kvm->arch.kvmclock_offset = delta;
3443                 break;
3444         }
3445         case KVM_GET_CLOCK: {
3446                 struct kvm_clock_data user_ns;
3447                 u64 now_ns;
3448
3449                 local_irq_disable();
3450                 now_ns = get_kernel_ns();
3451                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3452                 local_irq_enable();
3453                 user_ns.flags = 0;
3454                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3455
3456                 r = -EFAULT;
3457                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3458                         goto out;
3459                 r = 0;
3460                 break;
3461         }
3462
3463         default:
3464                 ;
3465         }
3466 out:
3467         return r;
3468 }
3469
3470 static void kvm_init_msr_list(void)
3471 {
3472         u32 dummy[2];
3473         unsigned i, j;
3474
3475         /* skip the first msrs in the list. KVM-specific */
3476         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3477                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3478                         continue;
3479                 if (j < i)
3480                         msrs_to_save[j] = msrs_to_save[i];
3481                 j++;
3482         }
3483         num_msrs_to_save = j;
3484 }
3485
3486 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3487                            const void *v)
3488 {
3489         int handled = 0;
3490         int n;
3491
3492         do {
3493                 n = min(len, 8);
3494                 if (!(vcpu->arch.apic &&
3495                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3496                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3497                         break;
3498                 handled += n;
3499                 addr += n;
3500                 len -= n;
3501                 v += n;
3502         } while (len);
3503
3504         return handled;
3505 }
3506
3507 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3508 {
3509         int handled = 0;
3510         int n;
3511
3512         do {
3513                 n = min(len, 8);
3514                 if (!(vcpu->arch.apic &&
3515                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3516                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3517                         break;
3518                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3519                 handled += n;
3520                 addr += n;
3521                 len -= n;
3522                 v += n;
3523         } while (len);
3524
3525         return handled;
3526 }
3527
3528 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3529                         struct kvm_segment *var, int seg)
3530 {
3531         kvm_x86_ops->set_segment(vcpu, var, seg);
3532 }
3533
3534 void kvm_get_segment(struct kvm_vcpu *vcpu,
3535                      struct kvm_segment *var, int seg)
3536 {
3537         kvm_x86_ops->get_segment(vcpu, var, seg);
3538 }
3539
3540 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3541 {
3542         gpa_t t_gpa;
3543         struct x86_exception exception;
3544
3545         BUG_ON(!mmu_is_nested(vcpu));
3546
3547         /* NPT walks are always user-walks */
3548         access |= PFERR_USER_MASK;
3549         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3550
3551         return t_gpa;
3552 }
3553
3554 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3555                               struct x86_exception *exception)
3556 {
3557         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3558         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3559 }
3560
3561  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3562                                 struct x86_exception *exception)
3563 {
3564         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3565         access |= PFERR_FETCH_MASK;
3566         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3567 }
3568
3569 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3570                                struct x86_exception *exception)
3571 {
3572         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3573         access |= PFERR_WRITE_MASK;
3574         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3575 }
3576
3577 /* uses this to access any guest's mapped memory without checking CPL */
3578 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3579                                 struct x86_exception *exception)
3580 {
3581         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3582 }
3583
3584 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3585                                       struct kvm_vcpu *vcpu, u32 access,
3586                                       struct x86_exception *exception)
3587 {
3588         void *data = val;
3589         int r = X86EMUL_CONTINUE;
3590
3591         while (bytes) {
3592                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3593                                                             exception);
3594                 unsigned offset = addr & (PAGE_SIZE-1);
3595                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3596                 int ret;
3597
3598                 if (gpa == UNMAPPED_GVA)
3599                         return X86EMUL_PROPAGATE_FAULT;
3600                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3601                 if (ret < 0) {
3602                         r = X86EMUL_IO_NEEDED;
3603                         goto out;
3604                 }
3605
3606                 bytes -= toread;
3607                 data += toread;
3608                 addr += toread;
3609         }
3610 out:
3611         return r;
3612 }
3613
3614 /* used for instruction fetching */
3615 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3616                                 gva_t addr, void *val, unsigned int bytes,
3617                                 struct x86_exception *exception)
3618 {
3619         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3620         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3621
3622         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3623                                           access | PFERR_FETCH_MASK,
3624                                           exception);
3625 }
3626
3627 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3628                                gva_t addr, void *val, unsigned int bytes,
3629                                struct x86_exception *exception)
3630 {
3631         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3632         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3633
3634         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3635                                           exception);
3636 }
3637 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3638
3639 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3640                                       gva_t addr, void *val, unsigned int bytes,
3641                                       struct x86_exception *exception)
3642 {
3643         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3644         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3645 }
3646
3647 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3648                                        gva_t addr, void *val,
3649                                        unsigned int bytes,
3650                                        struct x86_exception *exception)
3651 {
3652         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3653         void *data = val;
3654         int r = X86EMUL_CONTINUE;
3655
3656         while (bytes) {
3657                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3658                                                              PFERR_WRITE_MASK,
3659                                                              exception);
3660                 unsigned offset = addr & (PAGE_SIZE-1);
3661                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3662                 int ret;
3663
3664                 if (gpa == UNMAPPED_GVA)
3665                         return X86EMUL_PROPAGATE_FAULT;
3666                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3667                 if (ret < 0) {
3668                         r = X86EMUL_IO_NEEDED;
3669                         goto out;
3670                 }
3671
3672                 bytes -= towrite;
3673                 data += towrite;
3674                 addr += towrite;
3675         }
3676 out:
3677         return r;
3678 }
3679 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3680
3681 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3682                                 gpa_t *gpa, struct x86_exception *exception,
3683                                 bool write)
3684 {
3685         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3686
3687         if (vcpu_match_mmio_gva(vcpu, gva) &&
3688                   check_write_user_access(vcpu, write, access,
3689                   vcpu->arch.access)) {
3690                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3691                                         (gva & (PAGE_SIZE - 1));
3692                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3693                 return 1;
3694         }
3695
3696         if (write)
3697                 access |= PFERR_WRITE_MASK;
3698
3699         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3700
3701         if (*gpa == UNMAPPED_GVA)
3702                 return -1;
3703
3704         /* For APIC access vmexit */
3705         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3706                 return 1;
3707
3708         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3709                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3710                 return 1;
3711         }
3712
3713         return 0;
3714 }
3715
3716 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3717                         const void *val, int bytes)
3718 {
3719         int ret;
3720
3721         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3722         if (ret < 0)
3723                 return 0;
3724         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3725         return 1;
3726 }
3727
3728 struct read_write_emulator_ops {
3729         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3730                                   int bytes);
3731         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3732                                   void *val, int bytes);
3733         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3734                                int bytes, void *val);
3735         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3736                                     void *val, int bytes);
3737         bool write;
3738 };
3739
3740 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3741 {
3742         if (vcpu->mmio_read_completed) {
3743                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3744                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
3745                 vcpu->mmio_read_completed = 0;
3746                 return 1;
3747         }
3748
3749         return 0;
3750 }
3751
3752 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3753                         void *val, int bytes)
3754 {
3755         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3756 }
3757
3758 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3759                          void *val, int bytes)
3760 {
3761         return emulator_write_phys(vcpu, gpa, val, bytes);
3762 }
3763
3764 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3765 {
3766         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3767         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3768 }
3769
3770 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3771                           void *val, int bytes)
3772 {
3773         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3774         return X86EMUL_IO_NEEDED;
3775 }
3776
3777 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3778                            void *val, int bytes)
3779 {
3780         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
3781
3782         memcpy(vcpu->run->mmio.data, frag->data, frag->len);
3783         return X86EMUL_CONTINUE;
3784 }
3785
3786 static struct read_write_emulator_ops read_emultor = {
3787         .read_write_prepare = read_prepare,
3788         .read_write_emulate = read_emulate,
3789         .read_write_mmio = vcpu_mmio_read,
3790         .read_write_exit_mmio = read_exit_mmio,
3791 };
3792
3793 static struct read_write_emulator_ops write_emultor = {
3794         .read_write_emulate = write_emulate,
3795         .read_write_mmio = write_mmio,
3796         .read_write_exit_mmio = write_exit_mmio,
3797         .write = true,
3798 };
3799
3800 static int emulator_read_write_onepage(unsigned long addr, void *val,
3801                                        unsigned int bytes,
3802                                        struct x86_exception *exception,
3803                                        struct kvm_vcpu *vcpu,
3804                                        struct read_write_emulator_ops *ops)
3805 {
3806         gpa_t gpa;
3807         int handled, ret;
3808         bool write = ops->write;
3809         struct kvm_mmio_fragment *frag;
3810
3811         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3812
3813         if (ret < 0)
3814                 return X86EMUL_PROPAGATE_FAULT;
3815
3816         /* For APIC access vmexit */
3817         if (ret)
3818                 goto mmio;
3819
3820         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3821                 return X86EMUL_CONTINUE;
3822
3823 mmio:
3824         /*
3825          * Is this MMIO handled locally?
3826          */
3827         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3828         if (handled == bytes)
3829                 return X86EMUL_CONTINUE;
3830
3831         gpa += handled;
3832         bytes -= handled;
3833         val += handled;
3834
3835         while (bytes) {
3836                 unsigned now = min(bytes, 8U);
3837
3838                 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
3839                 frag->gpa = gpa;
3840                 frag->data = val;
3841                 frag->len = now;
3842
3843                 gpa += now;
3844                 val += now;
3845                 bytes -= now;
3846         }
3847         return X86EMUL_CONTINUE;
3848 }
3849
3850 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3851                         void *val, unsigned int bytes,
3852                         struct x86_exception *exception,
3853                         struct read_write_emulator_ops *ops)
3854 {
3855         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3856         gpa_t gpa;
3857         int rc;
3858
3859         if (ops->read_write_prepare &&
3860                   ops->read_write_prepare(vcpu, val, bytes))
3861                 return X86EMUL_CONTINUE;
3862
3863         vcpu->mmio_nr_fragments = 0;
3864
3865         /* Crossing a page boundary? */
3866         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3867                 int now;
3868
3869                 now = -addr & ~PAGE_MASK;
3870                 rc = emulator_read_write_onepage(addr, val, now, exception,
3871                                                  vcpu, ops);
3872
3873                 if (rc != X86EMUL_CONTINUE)
3874                         return rc;
3875                 addr += now;
3876                 val += now;
3877                 bytes -= now;
3878         }
3879
3880         rc = emulator_read_write_onepage(addr, val, bytes, exception,
3881                                          vcpu, ops);
3882         if (rc != X86EMUL_CONTINUE)
3883                 return rc;
3884
3885         if (!vcpu->mmio_nr_fragments)
3886                 return rc;
3887
3888         gpa = vcpu->mmio_fragments[0].gpa;
3889
3890         vcpu->mmio_needed = 1;
3891         vcpu->mmio_cur_fragment = 0;
3892
3893         vcpu->run->mmio.len = vcpu->mmio_fragments[0].len;
3894         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
3895         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3896         vcpu->run->mmio.phys_addr = gpa;
3897
3898         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3899 }
3900
3901 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3902                                   unsigned long addr,
3903                                   void *val,
3904                                   unsigned int bytes,
3905                                   struct x86_exception *exception)
3906 {
3907         return emulator_read_write(ctxt, addr, val, bytes,
3908                                    exception, &read_emultor);
3909 }
3910
3911 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3912                             unsigned long addr,
3913                             const void *val,
3914                             unsigned int bytes,
3915                             struct x86_exception *exception)
3916 {
3917         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3918                                    exception, &write_emultor);
3919 }
3920
3921 #define CMPXCHG_TYPE(t, ptr, old, new) \
3922         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3923
3924 #ifdef CONFIG_X86_64
3925 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3926 #else
3927 #  define CMPXCHG64(ptr, old, new) \
3928         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3929 #endif
3930
3931 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3932                                      unsigned long addr,
3933                                      const void *old,
3934                                      const void *new,
3935                                      unsigned int bytes,
3936                                      struct x86_exception *exception)
3937 {
3938         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3939         gpa_t gpa;
3940         struct page *page;
3941         char *kaddr;
3942         bool exchanged;
3943
3944         /* guests cmpxchg8b have to be emulated atomically */
3945         if (bytes > 8 || (bytes & (bytes - 1)))
3946                 goto emul_write;
3947
3948         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3949
3950         if (gpa == UNMAPPED_GVA ||
3951             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3952                 goto emul_write;
3953
3954         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3955                 goto emul_write;
3956
3957         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3958         if (is_error_page(page)) {
3959                 kvm_release_page_clean(page);
3960                 goto emul_write;
3961         }
3962
3963         kaddr = kmap_atomic(page);
3964         kaddr += offset_in_page(gpa);
3965         switch (bytes) {
3966         case 1:
3967                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3968                 break;
3969         case 2:
3970                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3971                 break;
3972         case 4:
3973                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3974                 break;
3975         case 8:
3976                 exchanged = CMPXCHG64(kaddr, old, new);
3977                 break;
3978         default:
3979                 BUG();
3980         }
3981         kunmap_atomic(kaddr);
3982         kvm_release_page_dirty(page);
3983
3984         if (!exchanged)
3985                 return X86EMUL_CMPXCHG_FAILED;
3986
3987         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3988
3989         return X86EMUL_CONTINUE;
3990
3991 emul_write:
3992         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3993
3994         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3995 }
3996
3997 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3998 {
3999         /* TODO: String I/O for in kernel device */
4000         int r;
4001
4002         if (vcpu->arch.pio.in)
4003                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4004                                     vcpu->arch.pio.size, pd);
4005         else
4006                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4007                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4008                                      pd);
4009         return r;
4010 }
4011
4012 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4013                                unsigned short port, void *val,
4014                                unsigned int count, bool in)
4015 {
4016         trace_kvm_pio(!in, port, size, count);
4017
4018         vcpu->arch.pio.port = port;
4019         vcpu->arch.pio.in = in;
4020         vcpu->arch.pio.count  = count;
4021         vcpu->arch.pio.size = size;
4022
4023         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4024                 vcpu->arch.pio.count = 0;
4025                 return 1;
4026         }
4027
4028         vcpu->run->exit_reason = KVM_EXIT_IO;
4029         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4030         vcpu->run->io.size = size;
4031         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4032         vcpu->run->io.count = count;
4033         vcpu->run->io.port = port;
4034
4035         return 0;
4036 }
4037
4038 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4039                                     int size, unsigned short port, void *val,
4040                                     unsigned int count)
4041 {
4042         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4043         int ret;
4044
4045         if (vcpu->arch.pio.count)
4046                 goto data_avail;
4047
4048         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4049         if (ret) {
4050 data_avail:
4051                 memcpy(val, vcpu->arch.pio_data, size * count);
4052                 vcpu->arch.pio.count = 0;
4053                 return 1;
4054         }
4055
4056         return 0;
4057 }
4058
4059 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4060                                      int size, unsigned short port,
4061                                      const void *val, unsigned int count)
4062 {
4063         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4064
4065         memcpy(vcpu->arch.pio_data, val, size * count);
4066         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4067 }
4068
4069 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4070 {
4071         return kvm_x86_ops->get_segment_base(vcpu, seg);
4072 }
4073
4074 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4075 {
4076         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4077 }
4078
4079 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4080 {
4081         if (!need_emulate_wbinvd(vcpu))
4082                 return X86EMUL_CONTINUE;
4083
4084         if (kvm_x86_ops->has_wbinvd_exit()) {
4085                 int cpu = get_cpu();
4086
4087                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4088                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4089                                 wbinvd_ipi, NULL, 1);
4090                 put_cpu();
4091                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4092         } else
4093                 wbinvd();
4094         return X86EMUL_CONTINUE;
4095 }
4096 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4097
4098 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4099 {
4100         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4101 }
4102
4103 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4104 {
4105         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4106 }
4107
4108 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4109 {
4110
4111         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4112 }
4113
4114 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4115 {
4116         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4117 }
4118
4119 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4120 {
4121         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4122         unsigned long value;
4123
4124         switch (cr) {
4125         case 0:
4126                 value = kvm_read_cr0(vcpu);
4127                 break;
4128         case 2:
4129                 value = vcpu->arch.cr2;
4130                 break;
4131         case 3:
4132                 value = kvm_read_cr3(vcpu);
4133                 break;
4134         case 4:
4135                 value = kvm_read_cr4(vcpu);
4136                 break;
4137         case 8:
4138                 value = kvm_get_cr8(vcpu);
4139                 break;
4140         default:
4141                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4142                 return 0;
4143         }
4144
4145         return value;
4146 }
4147
4148 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4149 {
4150         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4151         int res = 0;
4152
4153         switch (cr) {
4154         case 0:
4155                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4156                 break;
4157         case 2:
4158                 vcpu->arch.cr2 = val;
4159                 break;
4160         case 3:
4161                 res = kvm_set_cr3(vcpu, val);
4162                 break;
4163         case 4:
4164                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4165                 break;
4166         case 8:
4167                 res = kvm_set_cr8(vcpu, val);
4168                 break;
4169         default:
4170                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4171                 res = -1;
4172         }
4173
4174         return res;
4175 }
4176
4177 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4178 {
4179         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4180 }
4181
4182 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4183 {
4184         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4185 }
4186
4187 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4188 {
4189         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4190 }
4191
4192 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4193 {
4194         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4195 }
4196
4197 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4198 {
4199         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4200 }
4201
4202 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4203 {
4204         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4205 }
4206
4207 static unsigned long emulator_get_cached_segment_base(
4208         struct x86_emulate_ctxt *ctxt, int seg)
4209 {
4210         return get_segment_base(emul_to_vcpu(ctxt), seg);
4211 }
4212
4213 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4214                                  struct desc_struct *desc, u32 *base3,
4215                                  int seg)
4216 {
4217         struct kvm_segment var;
4218
4219         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4220         *selector = var.selector;
4221
4222         if (var.unusable)
4223                 return false;
4224
4225         if (var.g)
4226                 var.limit >>= 12;
4227         set_desc_limit(desc, var.limit);
4228         set_desc_base(desc, (unsigned long)var.base);
4229 #ifdef CONFIG_X86_64
4230         if (base3)
4231                 *base3 = var.base >> 32;
4232 #endif
4233         desc->type = var.type;
4234         desc->s = var.s;
4235         desc->dpl = var.dpl;
4236         desc->p = var.present;
4237         desc->avl = var.avl;
4238         desc->l = var.l;
4239         desc->d = var.db;
4240         desc->g = var.g;
4241
4242         return true;
4243 }
4244
4245 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4246                                  struct desc_struct *desc, u32 base3,
4247                                  int seg)
4248 {
4249         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4250         struct kvm_segment var;
4251
4252         var.selector = selector;
4253         var.base = get_desc_base(desc);
4254 #ifdef CONFIG_X86_64
4255         var.base |= ((u64)base3) << 32;
4256 #endif
4257         var.limit = get_desc_limit(desc);
4258         if (desc->g)
4259                 var.limit = (var.limit << 12) | 0xfff;
4260         var.type = desc->type;
4261         var.present = desc->p;
4262         var.dpl = desc->dpl;
4263         var.db = desc->d;
4264         var.s = desc->s;
4265         var.l = desc->l;
4266         var.g = desc->g;
4267         var.avl = desc->avl;
4268         var.present = desc->p;
4269         var.unusable = !var.present;
4270         var.padding = 0;
4271
4272         kvm_set_segment(vcpu, &var, seg);
4273         return;
4274 }
4275
4276 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4277                             u32 msr_index, u64 *pdata)
4278 {
4279         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4280 }
4281
4282 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4283                             u32 msr_index, u64 data)
4284 {
4285         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4286 }
4287
4288 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4289                              u32 pmc, u64 *pdata)
4290 {
4291         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4292 }
4293
4294 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4295 {
4296         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4297 }
4298
4299 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4300 {
4301         preempt_disable();
4302         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4303         /*
4304          * CR0.TS may reference the host fpu state, not the guest fpu state,
4305          * so it may be clear at this point.
4306          */
4307         clts();
4308 }
4309
4310 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4311 {
4312         preempt_enable();
4313 }
4314
4315 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4316                               struct x86_instruction_info *info,
4317                               enum x86_intercept_stage stage)
4318 {
4319         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4320 }
4321
4322 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4323                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4324 {
4325         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4326 }
4327
4328 static struct x86_emulate_ops emulate_ops = {
4329         .read_std            = kvm_read_guest_virt_system,
4330         .write_std           = kvm_write_guest_virt_system,
4331         .fetch               = kvm_fetch_guest_virt,
4332         .read_emulated       = emulator_read_emulated,
4333         .write_emulated      = emulator_write_emulated,
4334         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4335         .invlpg              = emulator_invlpg,
4336         .pio_in_emulated     = emulator_pio_in_emulated,
4337         .pio_out_emulated    = emulator_pio_out_emulated,
4338         .get_segment         = emulator_get_segment,
4339         .set_segment         = emulator_set_segment,
4340         .get_cached_segment_base = emulator_get_cached_segment_base,
4341         .get_gdt             = emulator_get_gdt,
4342         .get_idt             = emulator_get_idt,
4343         .set_gdt             = emulator_set_gdt,
4344         .set_idt             = emulator_set_idt,
4345         .get_cr              = emulator_get_cr,
4346         .set_cr              = emulator_set_cr,
4347         .set_rflags          = emulator_set_rflags,
4348         .cpl                 = emulator_get_cpl,
4349         .get_dr              = emulator_get_dr,
4350         .set_dr              = emulator_set_dr,
4351         .set_msr             = emulator_set_msr,
4352         .get_msr             = emulator_get_msr,
4353         .read_pmc            = emulator_read_pmc,
4354         .halt                = emulator_halt,
4355         .wbinvd              = emulator_wbinvd,
4356         .fix_hypercall       = emulator_fix_hypercall,
4357         .get_fpu             = emulator_get_fpu,
4358         .put_fpu             = emulator_put_fpu,
4359         .intercept           = emulator_intercept,
4360         .get_cpuid           = emulator_get_cpuid,
4361 };
4362
4363 static void cache_all_regs(struct kvm_vcpu *vcpu)
4364 {
4365         kvm_register_read(vcpu, VCPU_REGS_RAX);
4366         kvm_register_read(vcpu, VCPU_REGS_RSP);
4367         kvm_register_read(vcpu, VCPU_REGS_RIP);
4368         vcpu->arch.regs_dirty = ~0;
4369 }
4370
4371 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4372 {
4373         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4374         /*
4375          * an sti; sti; sequence only disable interrupts for the first
4376          * instruction. So, if the last instruction, be it emulated or
4377          * not, left the system with the INT_STI flag enabled, it
4378          * means that the last instruction is an sti. We should not
4379          * leave the flag on in this case. The same goes for mov ss
4380          */
4381         if (!(int_shadow & mask))
4382                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4383 }
4384
4385 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4386 {
4387         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4388         if (ctxt->exception.vector == PF_VECTOR)
4389                 kvm_propagate_fault(vcpu, &ctxt->exception);
4390         else if (ctxt->exception.error_code_valid)
4391                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4392                                       ctxt->exception.error_code);
4393         else
4394                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4395 }
4396
4397 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4398                               const unsigned long *regs)
4399 {
4400         memset(&ctxt->twobyte, 0,
4401                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4402         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4403
4404         ctxt->fetch.start = 0;
4405         ctxt->fetch.end = 0;
4406         ctxt->io_read.pos = 0;
4407         ctxt->io_read.end = 0;
4408         ctxt->mem_read.pos = 0;
4409         ctxt->mem_read.end = 0;
4410 }
4411
4412 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4413 {
4414         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4415         int cs_db, cs_l;
4416
4417         /*
4418          * TODO: fix emulate.c to use guest_read/write_register
4419          * instead of direct ->regs accesses, can save hundred cycles
4420          * on Intel for instructions that don't read/change RSP, for
4421          * for example.
4422          */
4423         cache_all_regs(vcpu);
4424
4425         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4426
4427         ctxt->eflags = kvm_get_rflags(vcpu);
4428         ctxt->eip = kvm_rip_read(vcpu);
4429         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4430                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4431                      cs_l                               ? X86EMUL_MODE_PROT64 :
4432                      cs_db                              ? X86EMUL_MODE_PROT32 :
4433                                                           X86EMUL_MODE_PROT16;
4434         ctxt->guest_mode = is_guest_mode(vcpu);
4435
4436         init_decode_cache(ctxt, vcpu->arch.regs);
4437         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4438 }
4439
4440 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4441 {
4442         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4443         int ret;
4444
4445         init_emulate_ctxt(vcpu);
4446
4447         ctxt->op_bytes = 2;
4448         ctxt->ad_bytes = 2;
4449         ctxt->_eip = ctxt->eip + inc_eip;
4450         ret = emulate_int_real(ctxt, irq);
4451
4452         if (ret != X86EMUL_CONTINUE)
4453                 return EMULATE_FAIL;
4454
4455         ctxt->eip = ctxt->_eip;
4456         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4457         kvm_rip_write(vcpu, ctxt->eip);
4458         kvm_set_rflags(vcpu, ctxt->eflags);
4459
4460         if (irq == NMI_VECTOR)
4461                 vcpu->arch.nmi_pending = 0;
4462         else
4463                 vcpu->arch.interrupt.pending = false;
4464
4465         return EMULATE_DONE;
4466 }
4467 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4468
4469 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4470 {
4471         int r = EMULATE_DONE;
4472
4473         ++vcpu->stat.insn_emulation_fail;
4474         trace_kvm_emulate_insn_failed(vcpu);
4475         if (!is_guest_mode(vcpu)) {
4476                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4477                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4478                 vcpu->run->internal.ndata = 0;
4479                 r = EMULATE_FAIL;
4480         }
4481         kvm_queue_exception(vcpu, UD_VECTOR);
4482
4483         return r;
4484 }
4485
4486 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4487 {
4488         gpa_t gpa;
4489
4490         if (tdp_enabled)
4491                 return false;
4492
4493         /*
4494          * if emulation was due to access to shadowed page table
4495          * and it failed try to unshadow page and re-entetr the
4496          * guest to let CPU execute the instruction.
4497          */
4498         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4499                 return true;
4500
4501         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4502
4503         if (gpa == UNMAPPED_GVA)
4504                 return true; /* let cpu generate fault */
4505
4506         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4507                 return true;
4508
4509         return false;
4510 }
4511
4512 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4513                               unsigned long cr2,  int emulation_type)
4514 {
4515         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4516         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4517
4518         last_retry_eip = vcpu->arch.last_retry_eip;
4519         last_retry_addr = vcpu->arch.last_retry_addr;
4520
4521         /*
4522          * If the emulation is caused by #PF and it is non-page_table
4523          * writing instruction, it means the VM-EXIT is caused by shadow
4524          * page protected, we can zap the shadow page and retry this
4525          * instruction directly.
4526          *
4527          * Note: if the guest uses a non-page-table modifying instruction
4528          * on the PDE that points to the instruction, then we will unmap
4529          * the instruction and go to an infinite loop. So, we cache the
4530          * last retried eip and the last fault address, if we meet the eip
4531          * and the address again, we can break out of the potential infinite
4532          * loop.
4533          */
4534         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4535
4536         if (!(emulation_type & EMULTYPE_RETRY))
4537                 return false;
4538
4539         if (x86_page_table_writing_insn(ctxt))
4540                 return false;
4541
4542         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4543                 return false;
4544
4545         vcpu->arch.last_retry_eip = ctxt->eip;
4546         vcpu->arch.last_retry_addr = cr2;
4547
4548         if (!vcpu->arch.mmu.direct_map)
4549                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4550
4551         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4552
4553         return true;
4554 }
4555
4556 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4557                             unsigned long cr2,
4558                             int emulation_type,
4559                             void *insn,
4560                             int insn_len)
4561 {
4562         int r;
4563         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4564         bool writeback = true;
4565
4566         kvm_clear_exception_queue(vcpu);
4567
4568         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4569                 init_emulate_ctxt(vcpu);
4570                 ctxt->interruptibility = 0;
4571                 ctxt->have_exception = false;
4572                 ctxt->perm_ok = false;
4573
4574                 ctxt->only_vendor_specific_insn
4575                         = emulation_type & EMULTYPE_TRAP_UD;
4576
4577                 r = x86_decode_insn(ctxt, insn, insn_len);
4578
4579                 trace_kvm_emulate_insn_start(vcpu);
4580                 ++vcpu->stat.insn_emulation;
4581                 if (r != EMULATION_OK)  {
4582                         if (emulation_type & EMULTYPE_TRAP_UD)
4583                                 return EMULATE_FAIL;
4584                         if (reexecute_instruction(vcpu, cr2))
4585                                 return EMULATE_DONE;
4586                         if (emulation_type & EMULTYPE_SKIP)
4587                                 return EMULATE_FAIL;
4588                         return handle_emulation_failure(vcpu);
4589                 }
4590         }
4591
4592         if (emulation_type & EMULTYPE_SKIP) {
4593                 kvm_rip_write(vcpu, ctxt->_eip);
4594                 return EMULATE_DONE;
4595         }
4596
4597         if (retry_instruction(ctxt, cr2, emulation_type))
4598                 return EMULATE_DONE;
4599
4600         /* this is needed for vmware backdoor interface to work since it
4601            changes registers values  during IO operation */
4602         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4603                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4604                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4605         }
4606
4607 restart:
4608         r = x86_emulate_insn(ctxt);
4609
4610         if (r == EMULATION_INTERCEPTED)
4611                 return EMULATE_DONE;
4612
4613         if (r == EMULATION_FAILED) {
4614                 if (reexecute_instruction(vcpu, cr2))
4615                         return EMULATE_DONE;
4616
4617                 return handle_emulation_failure(vcpu);
4618         }
4619
4620         if (ctxt->have_exception) {
4621                 inject_emulated_exception(vcpu);
4622                 r = EMULATE_DONE;
4623         } else if (vcpu->arch.pio.count) {
4624                 if (!vcpu->arch.pio.in)
4625                         vcpu->arch.pio.count = 0;
4626                 else
4627                         writeback = false;
4628                 r = EMULATE_DO_MMIO;
4629         } else if (vcpu->mmio_needed) {
4630                 if (!vcpu->mmio_is_write)
4631                         writeback = false;
4632                 r = EMULATE_DO_MMIO;
4633         } else if (r == EMULATION_RESTART)
4634                 goto restart;
4635         else
4636                 r = EMULATE_DONE;
4637
4638         if (writeback) {
4639                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4640                 kvm_set_rflags(vcpu, ctxt->eflags);
4641                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4642                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4643                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4644                 kvm_rip_write(vcpu, ctxt->eip);
4645         } else
4646                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4647
4648         return r;
4649 }
4650 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4651
4652 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4653 {
4654         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4655         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4656                                             size, port, &val, 1);
4657         /* do not return to emulator after return from userspace */
4658         vcpu->arch.pio.count = 0;
4659         return ret;
4660 }
4661 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4662
4663 static void tsc_bad(void *info)
4664 {
4665         __this_cpu_write(cpu_tsc_khz, 0);
4666 }
4667
4668 static void tsc_khz_changed(void *data)
4669 {
4670         struct cpufreq_freqs *freq = data;
4671         unsigned long khz = 0;
4672
4673         if (data)
4674                 khz = freq->new;
4675         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4676                 khz = cpufreq_quick_get(raw_smp_processor_id());
4677         if (!khz)
4678                 khz = tsc_khz;
4679         __this_cpu_write(cpu_tsc_khz, khz);
4680 }
4681
4682 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4683                                      void *data)
4684 {
4685         struct cpufreq_freqs *freq = data;
4686         struct kvm *kvm;
4687         struct kvm_vcpu *vcpu;
4688         int i, send_ipi = 0;
4689
4690         /*
4691          * We allow guests to temporarily run on slowing clocks,
4692          * provided we notify them after, or to run on accelerating
4693          * clocks, provided we notify them before.  Thus time never
4694          * goes backwards.
4695          *
4696          * However, we have a problem.  We can't atomically update
4697          * the frequency of a given CPU from this function; it is
4698          * merely a notifier, which can be called from any CPU.
4699          * Changing the TSC frequency at arbitrary points in time
4700          * requires a recomputation of local variables related to
4701          * the TSC for each VCPU.  We must flag these local variables
4702          * to be updated and be sure the update takes place with the
4703          * new frequency before any guests proceed.
4704          *
4705          * Unfortunately, the combination of hotplug CPU and frequency
4706          * change creates an intractable locking scenario; the order
4707          * of when these callouts happen is undefined with respect to
4708          * CPU hotplug, and they can race with each other.  As such,
4709          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4710          * undefined; you can actually have a CPU frequency change take
4711          * place in between the computation of X and the setting of the
4712          * variable.  To protect against this problem, all updates of
4713          * the per_cpu tsc_khz variable are done in an interrupt
4714          * protected IPI, and all callers wishing to update the value
4715          * must wait for a synchronous IPI to complete (which is trivial
4716          * if the caller is on the CPU already).  This establishes the
4717          * necessary total order on variable updates.
4718          *
4719          * Note that because a guest time update may take place
4720          * anytime after the setting of the VCPU's request bit, the
4721          * correct TSC value must be set before the request.  However,
4722          * to ensure the update actually makes it to any guest which
4723          * starts running in hardware virtualization between the set
4724          * and the acquisition of the spinlock, we must also ping the
4725          * CPU after setting the request bit.
4726          *
4727          */
4728
4729         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4730                 return 0;
4731         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4732                 return 0;
4733
4734         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4735
4736         raw_spin_lock(&kvm_lock);
4737         list_for_each_entry(kvm, &vm_list, vm_list) {
4738                 kvm_for_each_vcpu(i, vcpu, kvm) {
4739                         if (vcpu->cpu != freq->cpu)
4740                                 continue;
4741                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4742                         if (vcpu->cpu != smp_processor_id())
4743                                 send_ipi = 1;
4744                 }
4745         }
4746         raw_spin_unlock(&kvm_lock);
4747
4748         if (freq->old < freq->new && send_ipi) {
4749                 /*
4750                  * We upscale the frequency.  Must make the guest
4751                  * doesn't see old kvmclock values while running with
4752                  * the new frequency, otherwise we risk the guest sees
4753                  * time go backwards.
4754                  *
4755                  * In case we update the frequency for another cpu
4756                  * (which might be in guest context) send an interrupt
4757                  * to kick the cpu out of guest context.  Next time
4758                  * guest context is entered kvmclock will be updated,
4759                  * so the guest will not see stale values.
4760                  */
4761                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4762         }
4763         return 0;
4764 }
4765
4766 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4767         .notifier_call  = kvmclock_cpufreq_notifier
4768 };
4769
4770 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4771                                         unsigned long action, void *hcpu)
4772 {
4773         unsigned int cpu = (unsigned long)hcpu;
4774
4775         switch (action) {
4776                 case CPU_ONLINE:
4777                 case CPU_DOWN_FAILED:
4778                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4779                         break;
4780                 case CPU_DOWN_PREPARE:
4781                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4782                         break;
4783         }
4784         return NOTIFY_OK;
4785 }
4786
4787 static struct notifier_block kvmclock_cpu_notifier_block = {
4788         .notifier_call  = kvmclock_cpu_notifier,
4789         .priority = -INT_MAX
4790 };
4791
4792 static void kvm_timer_init(void)
4793 {
4794         int cpu;
4795
4796         max_tsc_khz = tsc_khz;
4797         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4798         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4799 #ifdef CONFIG_CPU_FREQ
4800                 struct cpufreq_policy policy;
4801                 memset(&policy, 0, sizeof(policy));
4802                 cpu = get_cpu();
4803                 cpufreq_get_policy(&policy, cpu);
4804                 if (policy.cpuinfo.max_freq)
4805                         max_tsc_khz = policy.cpuinfo.max_freq;
4806                 put_cpu();
4807 #endif
4808                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4809                                           CPUFREQ_TRANSITION_NOTIFIER);
4810         }
4811         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4812         for_each_online_cpu(cpu)
4813                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4814 }
4815
4816 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4817
4818 int kvm_is_in_guest(void)
4819 {
4820         return __this_cpu_read(current_vcpu) != NULL;
4821 }
4822
4823 static int kvm_is_user_mode(void)
4824 {
4825         int user_mode = 3;
4826
4827         if (__this_cpu_read(current_vcpu))
4828                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4829
4830         return user_mode != 0;
4831 }
4832
4833 static unsigned long kvm_get_guest_ip(void)
4834 {
4835         unsigned long ip = 0;
4836
4837         if (__this_cpu_read(current_vcpu))
4838                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4839
4840         return ip;
4841 }
4842
4843 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4844         .is_in_guest            = kvm_is_in_guest,
4845         .is_user_mode           = kvm_is_user_mode,
4846         .get_guest_ip           = kvm_get_guest_ip,
4847 };
4848
4849 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4850 {
4851         __this_cpu_write(current_vcpu, vcpu);
4852 }
4853 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4854
4855 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4856 {
4857         __this_cpu_write(current_vcpu, NULL);
4858 }
4859 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4860
4861 static void kvm_set_mmio_spte_mask(void)
4862 {
4863         u64 mask;
4864         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4865
4866         /*
4867          * Set the reserved bits and the present bit of an paging-structure
4868          * entry to generate page fault with PFER.RSV = 1.
4869          */
4870         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4871         mask |= 1ull;
4872
4873 #ifdef CONFIG_X86_64
4874         /*
4875          * If reserved bit is not supported, clear the present bit to disable
4876          * mmio page fault.
4877          */
4878         if (maxphyaddr == 52)
4879                 mask &= ~1ull;
4880 #endif
4881
4882         kvm_mmu_set_mmio_spte_mask(mask);
4883 }
4884
4885 int kvm_arch_init(void *opaque)
4886 {
4887         int r;
4888         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4889
4890         if (kvm_x86_ops) {
4891                 printk(KERN_ERR "kvm: already loaded the other module\n");
4892                 r = -EEXIST;
4893                 goto out;
4894         }
4895
4896         if (!ops->cpu_has_kvm_support()) {
4897                 printk(KERN_ERR "kvm: no hardware support\n");
4898                 r = -EOPNOTSUPP;
4899                 goto out;
4900         }
4901         if (ops->disabled_by_bios()) {
4902                 printk(KERN_ERR "kvm: disabled by bios\n");
4903                 r = -EOPNOTSUPP;
4904                 goto out;
4905         }
4906
4907         r = kvm_mmu_module_init();
4908         if (r)
4909                 goto out;
4910
4911         kvm_set_mmio_spte_mask();
4912         kvm_init_msr_list();
4913
4914         kvm_x86_ops = ops;
4915         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4916                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4917
4918         kvm_timer_init();
4919
4920         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4921
4922         if (cpu_has_xsave)
4923                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4924
4925         return 0;
4926
4927 out:
4928         return r;
4929 }
4930
4931 void kvm_arch_exit(void)
4932 {
4933         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4934
4935         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4936                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4937                                             CPUFREQ_TRANSITION_NOTIFIER);
4938         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4939         kvm_x86_ops = NULL;
4940         kvm_mmu_module_exit();
4941 }
4942
4943 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4944 {
4945         ++vcpu->stat.halt_exits;
4946         if (irqchip_in_kernel(vcpu->kvm)) {
4947                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4948                 return 1;
4949         } else {
4950                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4951                 return 0;
4952         }
4953 }
4954 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4955
4956 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4957 {
4958         u64 param, ingpa, outgpa, ret;
4959         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4960         bool fast, longmode;
4961         int cs_db, cs_l;
4962
4963         /*
4964          * hypercall generates UD from non zero cpl and real mode
4965          * per HYPER-V spec
4966          */
4967         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4968                 kvm_queue_exception(vcpu, UD_VECTOR);
4969                 return 0;
4970         }
4971
4972         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4973         longmode = is_long_mode(vcpu) && cs_l == 1;
4974
4975         if (!longmode) {
4976                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4977                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4978                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4979                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4980                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4981                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4982         }
4983 #ifdef CONFIG_X86_64
4984         else {
4985                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4986                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4987                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4988         }
4989 #endif
4990
4991         code = param & 0xffff;
4992         fast = (param >> 16) & 0x1;
4993         rep_cnt = (param >> 32) & 0xfff;
4994         rep_idx = (param >> 48) & 0xfff;
4995
4996         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4997
4998         switch (code) {
4999         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5000                 kvm_vcpu_on_spin(vcpu);
5001                 break;
5002         default:
5003                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5004                 break;
5005         }
5006
5007         ret = res | (((u64)rep_done & 0xfff) << 32);
5008         if (longmode) {
5009                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5010         } else {
5011                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5012                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5013         }
5014
5015         return 1;
5016 }
5017
5018 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5019 {
5020         unsigned long nr, a0, a1, a2, a3, ret;
5021         int r = 1;
5022
5023         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5024                 return kvm_hv_hypercall(vcpu);
5025
5026         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5027         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5028         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5029         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5030         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5031
5032         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5033
5034         if (!is_long_mode(vcpu)) {
5035                 nr &= 0xFFFFFFFF;
5036                 a0 &= 0xFFFFFFFF;
5037                 a1 &= 0xFFFFFFFF;
5038                 a2 &= 0xFFFFFFFF;
5039                 a3 &= 0xFFFFFFFF;
5040         }
5041
5042         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5043                 ret = -KVM_EPERM;
5044                 goto out;
5045         }
5046
5047         switch (nr) {
5048         case KVM_HC_VAPIC_POLL_IRQ:
5049                 ret = 0;
5050                 break;
5051         default:
5052                 ret = -KVM_ENOSYS;
5053                 break;
5054         }
5055 out:
5056         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5057         ++vcpu->stat.hypercalls;
5058         return r;
5059 }
5060 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5061
5062 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5063 {
5064         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5065         char instruction[3];
5066         unsigned long rip = kvm_rip_read(vcpu);
5067
5068         /*
5069          * Blow out the MMU to ensure that no other VCPU has an active mapping
5070          * to ensure that the updated hypercall appears atomically across all
5071          * VCPUs.
5072          */
5073         kvm_mmu_zap_all(vcpu->kvm);
5074
5075         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5076
5077         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5078 }
5079
5080 /*
5081  * Check if userspace requested an interrupt window, and that the
5082  * interrupt window is open.
5083  *
5084  * No need to exit to userspace if we already have an interrupt queued.
5085  */
5086 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5087 {
5088         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5089                 vcpu->run->request_interrupt_window &&
5090                 kvm_arch_interrupt_allowed(vcpu));
5091 }
5092
5093 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5094 {
5095         struct kvm_run *kvm_run = vcpu->run;
5096
5097         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5098         kvm_run->cr8 = kvm_get_cr8(vcpu);
5099         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5100         if (irqchip_in_kernel(vcpu->kvm))
5101                 kvm_run->ready_for_interrupt_injection = 1;
5102         else
5103                 kvm_run->ready_for_interrupt_injection =
5104                         kvm_arch_interrupt_allowed(vcpu) &&
5105                         !kvm_cpu_has_interrupt(vcpu) &&
5106                         !kvm_event_needs_reinjection(vcpu);
5107 }
5108
5109 static void vapic_enter(struct kvm_vcpu *vcpu)
5110 {
5111         struct kvm_lapic *apic = vcpu->arch.apic;
5112         struct page *page;
5113
5114         if (!apic || !apic->vapic_addr)
5115                 return;
5116
5117         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5118
5119         vcpu->arch.apic->vapic_page = page;
5120 }
5121
5122 static void vapic_exit(struct kvm_vcpu *vcpu)
5123 {
5124         struct kvm_lapic *apic = vcpu->arch.apic;
5125         int idx;
5126
5127         if (!apic || !apic->vapic_addr)
5128                 return;
5129
5130         idx = srcu_read_lock(&vcpu->kvm->srcu);
5131         kvm_release_page_dirty(apic->vapic_page);
5132         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5133         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5134 }
5135
5136 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5137 {
5138         int max_irr, tpr;
5139
5140         if (!kvm_x86_ops->update_cr8_intercept)
5141                 return;
5142
5143         if (!vcpu->arch.apic)
5144                 return;
5145
5146         if (!vcpu->arch.apic->vapic_addr)
5147                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5148         else
5149                 max_irr = -1;
5150
5151         if (max_irr != -1)
5152                 max_irr >>= 4;
5153
5154         tpr = kvm_lapic_get_cr8(vcpu);
5155
5156         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5157 }
5158
5159 static void inject_pending_event(struct kvm_vcpu *vcpu)
5160 {
5161         /* try to reinject previous events if any */
5162         if (vcpu->arch.exception.pending) {
5163                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5164                                         vcpu->arch.exception.has_error_code,
5165                                         vcpu->arch.exception.error_code);
5166                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5167                                           vcpu->arch.exception.has_error_code,
5168                                           vcpu->arch.exception.error_code,
5169                                           vcpu->arch.exception.reinject);
5170                 return;
5171         }
5172
5173         if (vcpu->arch.nmi_injected) {
5174                 kvm_x86_ops->set_nmi(vcpu);
5175                 return;
5176         }
5177
5178         if (vcpu->arch.interrupt.pending) {
5179                 kvm_x86_ops->set_irq(vcpu);
5180                 return;
5181         }
5182
5183         /* try to inject new event if pending */
5184         if (vcpu->arch.nmi_pending) {
5185                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5186                         --vcpu->arch.nmi_pending;
5187                         vcpu->arch.nmi_injected = true;
5188                         kvm_x86_ops->set_nmi(vcpu);
5189                 }
5190         } else if (kvm_cpu_has_interrupt(vcpu)) {
5191                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5192                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5193                                             false);
5194                         kvm_x86_ops->set_irq(vcpu);
5195                 }
5196         }
5197 }
5198
5199 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5200 {
5201         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5202                         !vcpu->guest_xcr0_loaded) {
5203                 /* kvm_set_xcr() also depends on this */
5204                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5205                 vcpu->guest_xcr0_loaded = 1;
5206         }
5207 }
5208
5209 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5210 {
5211         if (vcpu->guest_xcr0_loaded) {
5212                 if (vcpu->arch.xcr0 != host_xcr0)
5213                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5214                 vcpu->guest_xcr0_loaded = 0;
5215         }
5216 }
5217
5218 static void process_nmi(struct kvm_vcpu *vcpu)
5219 {
5220         unsigned limit = 2;
5221
5222         /*
5223          * x86 is limited to one NMI running, and one NMI pending after it.
5224          * If an NMI is already in progress, limit further NMIs to just one.
5225          * Otherwise, allow two (and we'll inject the first one immediately).
5226          */
5227         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5228                 limit = 1;
5229
5230         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5231         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5232         kvm_make_request(KVM_REQ_EVENT, vcpu);
5233 }
5234
5235 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5236 {
5237         int r;
5238         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5239                 vcpu->run->request_interrupt_window;
5240         bool req_immediate_exit = 0;
5241
5242         if (vcpu->requests) {
5243                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5244                         kvm_mmu_unload(vcpu);
5245                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5246                         __kvm_migrate_timers(vcpu);
5247                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5248                         r = kvm_guest_time_update(vcpu);
5249                         if (unlikely(r))
5250                                 goto out;
5251                 }
5252                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5253                         kvm_mmu_sync_roots(vcpu);
5254                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5255                         kvm_x86_ops->tlb_flush(vcpu);
5256                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5257                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5258                         r = 0;
5259                         goto out;
5260                 }
5261                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5262                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5263                         r = 0;
5264                         goto out;
5265                 }
5266                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5267                         vcpu->fpu_active = 0;
5268                         kvm_x86_ops->fpu_deactivate(vcpu);
5269                 }
5270                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5271                         /* Page is swapped out. Do synthetic halt */
5272                         vcpu->arch.apf.halted = true;
5273                         r = 1;
5274                         goto out;
5275                 }
5276                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5277                         record_steal_time(vcpu);
5278                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5279                         process_nmi(vcpu);
5280                 req_immediate_exit =
5281                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5282                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5283                         kvm_handle_pmu_event(vcpu);
5284                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5285                         kvm_deliver_pmi(vcpu);
5286         }
5287
5288         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5289                 inject_pending_event(vcpu);
5290
5291                 /* enable NMI/IRQ window open exits if needed */
5292                 if (vcpu->arch.nmi_pending)
5293                         kvm_x86_ops->enable_nmi_window(vcpu);
5294                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5295                         kvm_x86_ops->enable_irq_window(vcpu);
5296
5297                 if (kvm_lapic_enabled(vcpu)) {
5298                         update_cr8_intercept(vcpu);
5299                         kvm_lapic_sync_to_vapic(vcpu);
5300                 }
5301         }
5302
5303         r = kvm_mmu_reload(vcpu);
5304         if (unlikely(r)) {
5305                 goto cancel_injection;
5306         }
5307
5308         preempt_disable();
5309
5310         kvm_x86_ops->prepare_guest_switch(vcpu);
5311         if (vcpu->fpu_active)
5312                 kvm_load_guest_fpu(vcpu);
5313         kvm_load_guest_xcr0(vcpu);
5314
5315         vcpu->mode = IN_GUEST_MODE;
5316
5317         /* We should set ->mode before check ->requests,
5318          * see the comment in make_all_cpus_request.
5319          */
5320         smp_mb();
5321
5322         local_irq_disable();
5323
5324         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5325             || need_resched() || signal_pending(current)) {
5326                 vcpu->mode = OUTSIDE_GUEST_MODE;
5327                 smp_wmb();
5328                 local_irq_enable();
5329                 preempt_enable();
5330                 r = 1;
5331                 goto cancel_injection;
5332         }
5333
5334         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5335
5336         if (req_immediate_exit)
5337                 smp_send_reschedule(vcpu->cpu);
5338
5339         kvm_guest_enter();
5340
5341         if (unlikely(vcpu->arch.switch_db_regs)) {
5342                 set_debugreg(0, 7);
5343                 set_debugreg(vcpu->arch.eff_db[0], 0);
5344                 set_debugreg(vcpu->arch.eff_db[1], 1);
5345                 set_debugreg(vcpu->arch.eff_db[2], 2);
5346                 set_debugreg(vcpu->arch.eff_db[3], 3);
5347         }
5348
5349         trace_kvm_entry(vcpu->vcpu_id);
5350         kvm_x86_ops->run(vcpu);
5351
5352         /*
5353          * If the guest has used debug registers, at least dr7
5354          * will be disabled while returning to the host.
5355          * If we don't have active breakpoints in the host, we don't
5356          * care about the messed up debug address registers. But if
5357          * we have some of them active, restore the old state.
5358          */
5359         if (hw_breakpoint_active())
5360                 hw_breakpoint_restore();
5361
5362         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5363
5364         vcpu->mode = OUTSIDE_GUEST_MODE;
5365         smp_wmb();
5366         local_irq_enable();
5367
5368         ++vcpu->stat.exits;
5369
5370         /*
5371          * We must have an instruction between local_irq_enable() and
5372          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5373          * the interrupt shadow.  The stat.exits increment will do nicely.
5374          * But we need to prevent reordering, hence this barrier():
5375          */
5376         barrier();
5377
5378         kvm_guest_exit();
5379
5380         preempt_enable();
5381
5382         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5383
5384         /*
5385          * Profile KVM exit RIPs:
5386          */
5387         if (unlikely(prof_on == KVM_PROFILING)) {
5388                 unsigned long rip = kvm_rip_read(vcpu);
5389                 profile_hit(KVM_PROFILING, (void *)rip);
5390         }
5391
5392         if (unlikely(vcpu->arch.tsc_always_catchup))
5393                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5394
5395         if (vcpu->arch.apic_attention)
5396                 kvm_lapic_sync_from_vapic(vcpu);
5397
5398         r = kvm_x86_ops->handle_exit(vcpu);
5399         return r;
5400
5401 cancel_injection:
5402         kvm_x86_ops->cancel_injection(vcpu);
5403         if (unlikely(vcpu->arch.apic_attention))
5404                 kvm_lapic_sync_from_vapic(vcpu);
5405 out:
5406         return r;
5407 }
5408
5409
5410 static int __vcpu_run(struct kvm_vcpu *vcpu)
5411 {
5412         int r;
5413         struct kvm *kvm = vcpu->kvm;
5414
5415         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5416                 pr_debug("vcpu %d received sipi with vector # %x\n",
5417                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5418                 kvm_lapic_reset(vcpu);
5419                 r = kvm_arch_vcpu_reset(vcpu);
5420                 if (r)
5421                         return r;
5422                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5423         }
5424
5425         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5426         vapic_enter(vcpu);
5427
5428         r = 1;
5429         while (r > 0) {
5430                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5431                     !vcpu->arch.apf.halted)
5432                         r = vcpu_enter_guest(vcpu);
5433                 else {
5434                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5435                         kvm_vcpu_block(vcpu);
5436                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5437                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5438                         {
5439                                 switch(vcpu->arch.mp_state) {
5440                                 case KVM_MP_STATE_HALTED:
5441                                         vcpu->arch.mp_state =
5442                                                 KVM_MP_STATE_RUNNABLE;
5443                                 case KVM_MP_STATE_RUNNABLE:
5444                                         vcpu->arch.apf.halted = false;
5445                                         break;
5446                                 case KVM_MP_STATE_SIPI_RECEIVED:
5447                                 default:
5448                                         r = -EINTR;
5449                                         break;
5450                                 }
5451                         }
5452                 }
5453
5454                 if (r <= 0)
5455                         break;
5456
5457                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5458                 if (kvm_cpu_has_pending_timer(vcpu))
5459                         kvm_inject_pending_timer_irqs(vcpu);
5460
5461                 if (dm_request_for_irq_injection(vcpu)) {
5462                         r = -EINTR;
5463                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5464                         ++vcpu->stat.request_irq_exits;
5465                 }
5466
5467                 kvm_check_async_pf_completion(vcpu);
5468
5469                 if (signal_pending(current)) {
5470                         r = -EINTR;
5471                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5472                         ++vcpu->stat.signal_exits;
5473                 }
5474                 if (need_resched()) {
5475                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5476                         kvm_resched(vcpu);
5477                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5478                 }
5479         }
5480
5481         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5482
5483         vapic_exit(vcpu);
5484
5485         return r;
5486 }
5487
5488 /*
5489  * Implements the following, as a state machine:
5490  *
5491  * read:
5492  *   for each fragment
5493  *     write gpa, len
5494  *     exit
5495  *     copy data
5496  *   execute insn
5497  *
5498  * write:
5499  *   for each fragment
5500  *      write gpa, len
5501  *      copy data
5502  *      exit
5503  */
5504 static int complete_mmio(struct kvm_vcpu *vcpu)
5505 {
5506         struct kvm_run *run = vcpu->run;
5507         struct kvm_mmio_fragment *frag;
5508         int r;
5509
5510         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5511                 return 1;
5512
5513         if (vcpu->mmio_needed) {
5514                 /* Complete previous fragment */
5515                 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment++];
5516                 if (!vcpu->mmio_is_write)
5517                         memcpy(frag->data, run->mmio.data, frag->len);
5518                 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5519                         vcpu->mmio_needed = 0;
5520                         if (vcpu->mmio_is_write)
5521                                 return 1;
5522                         vcpu->mmio_read_completed = 1;
5523                         goto done;
5524                 }
5525                 /* Initiate next fragment */
5526                 ++frag;
5527                 run->exit_reason = KVM_EXIT_MMIO;
5528                 run->mmio.phys_addr = frag->gpa;
5529                 if (vcpu->mmio_is_write)
5530                         memcpy(run->mmio.data, frag->data, frag->len);
5531                 run->mmio.len = frag->len;
5532                 run->mmio.is_write = vcpu->mmio_is_write;
5533                 return 0;
5534
5535         }
5536 done:
5537         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5538         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5539         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5540         if (r != EMULATE_DONE)
5541                 return 0;
5542         return 1;
5543 }
5544
5545 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5546 {
5547         int r;
5548         sigset_t sigsaved;
5549
5550         if (!tsk_used_math(current) && init_fpu(current))
5551                 return -ENOMEM;
5552
5553         if (vcpu->sigset_active)
5554                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5555
5556         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5557                 kvm_vcpu_block(vcpu);
5558                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5559                 r = -EAGAIN;
5560                 goto out;
5561         }
5562
5563         /* re-sync apic's tpr */
5564         if (!irqchip_in_kernel(vcpu->kvm)) {
5565                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5566                         r = -EINVAL;
5567                         goto out;
5568                 }
5569         }
5570
5571         r = complete_mmio(vcpu);
5572         if (r <= 0)
5573                 goto out;
5574
5575         r = __vcpu_run(vcpu);
5576
5577 out:
5578         post_kvm_run_save(vcpu);
5579         if (vcpu->sigset_active)
5580                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5581
5582         return r;
5583 }
5584
5585 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5586 {
5587         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5588                 /*
5589                  * We are here if userspace calls get_regs() in the middle of
5590                  * instruction emulation. Registers state needs to be copied
5591                  * back from emulation context to vcpu. Usrapace shouldn't do
5592                  * that usually, but some bad designed PV devices (vmware
5593                  * backdoor interface) need this to work
5594                  */
5595                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5596                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5597                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5598         }
5599         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5600         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5601         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5602         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5603         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5604         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5605         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5606         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5607 #ifdef CONFIG_X86_64
5608         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5609         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5610         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5611         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5612         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5613         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5614         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5615         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5616 #endif
5617
5618         regs->rip = kvm_rip_read(vcpu);
5619         regs->rflags = kvm_get_rflags(vcpu);
5620
5621         return 0;
5622 }
5623
5624 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5625 {
5626         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5627         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5628
5629         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5630         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5631         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5632         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5633         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5634         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5635         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5636         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5637 #ifdef CONFIG_X86_64
5638         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5639         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5640         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5641         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5642         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5643         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5644         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5645         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5646 #endif
5647
5648         kvm_rip_write(vcpu, regs->rip);
5649         kvm_set_rflags(vcpu, regs->rflags);
5650
5651         vcpu->arch.exception.pending = false;
5652
5653         kvm_make_request(KVM_REQ_EVENT, vcpu);
5654
5655         return 0;
5656 }
5657
5658 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5659 {
5660         struct kvm_segment cs;
5661
5662         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5663         *db = cs.db;
5664         *l = cs.l;
5665 }
5666 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5667
5668 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5669                                   struct kvm_sregs *sregs)
5670 {
5671         struct desc_ptr dt;
5672
5673         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5674         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5675         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5676         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5677         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5678         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5679
5680         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5681         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5682
5683         kvm_x86_ops->get_idt(vcpu, &dt);
5684         sregs->idt.limit = dt.size;
5685         sregs->idt.base = dt.address;
5686         kvm_x86_ops->get_gdt(vcpu, &dt);
5687         sregs->gdt.limit = dt.size;
5688         sregs->gdt.base = dt.address;
5689
5690         sregs->cr0 = kvm_read_cr0(vcpu);
5691         sregs->cr2 = vcpu->arch.cr2;
5692         sregs->cr3 = kvm_read_cr3(vcpu);
5693         sregs->cr4 = kvm_read_cr4(vcpu);
5694         sregs->cr8 = kvm_get_cr8(vcpu);
5695         sregs->efer = vcpu->arch.efer;
5696         sregs->apic_base = kvm_get_apic_base(vcpu);
5697
5698         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5699
5700         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5701                 set_bit(vcpu->arch.interrupt.nr,
5702                         (unsigned long *)sregs->interrupt_bitmap);
5703
5704         return 0;
5705 }
5706
5707 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5708                                     struct kvm_mp_state *mp_state)
5709 {
5710         mp_state->mp_state = vcpu->arch.mp_state;
5711         return 0;
5712 }
5713
5714 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5715                                     struct kvm_mp_state *mp_state)
5716 {
5717         vcpu->arch.mp_state = mp_state->mp_state;
5718         kvm_make_request(KVM_REQ_EVENT, vcpu);
5719         return 0;
5720 }
5721
5722 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
5723                     int reason, bool has_error_code, u32 error_code)
5724 {
5725         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5726         int ret;
5727
5728         init_emulate_ctxt(vcpu);
5729
5730         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
5731                                    has_error_code, error_code);
5732
5733         if (ret)
5734                 return EMULATE_FAIL;
5735
5736         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5737         kvm_rip_write(vcpu, ctxt->eip);
5738         kvm_set_rflags(vcpu, ctxt->eflags);
5739         kvm_make_request(KVM_REQ_EVENT, vcpu);
5740         return EMULATE_DONE;
5741 }
5742 EXPORT_SYMBOL_GPL(kvm_task_switch);
5743
5744 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5745                                   struct kvm_sregs *sregs)
5746 {
5747         int mmu_reset_needed = 0;
5748         int pending_vec, max_bits, idx;
5749         struct desc_ptr dt;
5750
5751         dt.size = sregs->idt.limit;
5752         dt.address = sregs->idt.base;
5753         kvm_x86_ops->set_idt(vcpu, &dt);
5754         dt.size = sregs->gdt.limit;
5755         dt.address = sregs->gdt.base;
5756         kvm_x86_ops->set_gdt(vcpu, &dt);
5757
5758         vcpu->arch.cr2 = sregs->cr2;
5759         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5760         vcpu->arch.cr3 = sregs->cr3;
5761         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5762
5763         kvm_set_cr8(vcpu, sregs->cr8);
5764
5765         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5766         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5767         kvm_set_apic_base(vcpu, sregs->apic_base);
5768
5769         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5770         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5771         vcpu->arch.cr0 = sregs->cr0;
5772
5773         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5774         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5775         if (sregs->cr4 & X86_CR4_OSXSAVE)
5776                 kvm_update_cpuid(vcpu);
5777
5778         idx = srcu_read_lock(&vcpu->kvm->srcu);
5779         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5780                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5781                 mmu_reset_needed = 1;
5782         }
5783         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5784
5785         if (mmu_reset_needed)
5786                 kvm_mmu_reset_context(vcpu);
5787
5788         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5789         pending_vec = find_first_bit(
5790                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5791         if (pending_vec < max_bits) {
5792                 kvm_queue_interrupt(vcpu, pending_vec, false);
5793                 pr_debug("Set back pending irq %d\n", pending_vec);
5794         }
5795
5796         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5797         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5798         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5799         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5800         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5801         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5802
5803         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5804         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5805
5806         update_cr8_intercept(vcpu);
5807
5808         /* Older userspace won't unhalt the vcpu on reset. */
5809         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5810             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5811             !is_protmode(vcpu))
5812                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5813
5814         kvm_make_request(KVM_REQ_EVENT, vcpu);
5815
5816         return 0;
5817 }
5818
5819 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5820                                         struct kvm_guest_debug *dbg)
5821 {
5822         unsigned long rflags;
5823         int i, r;
5824
5825         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5826                 r = -EBUSY;
5827                 if (vcpu->arch.exception.pending)
5828                         goto out;
5829                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5830                         kvm_queue_exception(vcpu, DB_VECTOR);
5831                 else
5832                         kvm_queue_exception(vcpu, BP_VECTOR);
5833         }
5834
5835         /*
5836          * Read rflags as long as potentially injected trace flags are still
5837          * filtered out.
5838          */
5839         rflags = kvm_get_rflags(vcpu);
5840
5841         vcpu->guest_debug = dbg->control;
5842         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5843                 vcpu->guest_debug = 0;
5844
5845         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5846                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5847                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5848                 vcpu->arch.switch_db_regs =
5849                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5850         } else {
5851                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5852                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5853                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5854         }
5855
5856         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5857                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5858                         get_segment_base(vcpu, VCPU_SREG_CS);
5859
5860         /*
5861          * Trigger an rflags update that will inject or remove the trace
5862          * flags.
5863          */
5864         kvm_set_rflags(vcpu, rflags);
5865
5866         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5867
5868         r = 0;
5869
5870 out:
5871
5872         return r;
5873 }
5874
5875 /*
5876  * Translate a guest virtual address to a guest physical address.
5877  */
5878 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5879                                     struct kvm_translation *tr)
5880 {
5881         unsigned long vaddr = tr->linear_address;
5882         gpa_t gpa;
5883         int idx;
5884
5885         idx = srcu_read_lock(&vcpu->kvm->srcu);
5886         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5887         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5888         tr->physical_address = gpa;
5889         tr->valid = gpa != UNMAPPED_GVA;
5890         tr->writeable = 1;
5891         tr->usermode = 0;
5892
5893         return 0;
5894 }
5895
5896 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5897 {
5898         struct i387_fxsave_struct *fxsave =
5899                         &vcpu->arch.guest_fpu.state->fxsave;
5900
5901         memcpy(fpu->fpr, fxsave->st_space, 128);
5902         fpu->fcw = fxsave->cwd;
5903         fpu->fsw = fxsave->swd;
5904         fpu->ftwx = fxsave->twd;
5905         fpu->last_opcode = fxsave->fop;
5906         fpu->last_ip = fxsave->rip;
5907         fpu->last_dp = fxsave->rdp;
5908         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5909
5910         return 0;
5911 }
5912
5913 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5914 {
5915         struct i387_fxsave_struct *fxsave =
5916                         &vcpu->arch.guest_fpu.state->fxsave;
5917
5918         memcpy(fxsave->st_space, fpu->fpr, 128);
5919         fxsave->cwd = fpu->fcw;
5920         fxsave->swd = fpu->fsw;
5921         fxsave->twd = fpu->ftwx;
5922         fxsave->fop = fpu->last_opcode;
5923         fxsave->rip = fpu->last_ip;
5924         fxsave->rdp = fpu->last_dp;
5925         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5926
5927         return 0;
5928 }
5929
5930 int fx_init(struct kvm_vcpu *vcpu)
5931 {
5932         int err;
5933
5934         err = fpu_alloc(&vcpu->arch.guest_fpu);
5935         if (err)
5936                 return err;
5937
5938         fpu_finit(&vcpu->arch.guest_fpu);
5939
5940         /*
5941          * Ensure guest xcr0 is valid for loading
5942          */
5943         vcpu->arch.xcr0 = XSTATE_FP;
5944
5945         vcpu->arch.cr0 |= X86_CR0_ET;
5946
5947         return 0;
5948 }
5949 EXPORT_SYMBOL_GPL(fx_init);
5950
5951 static void fx_free(struct kvm_vcpu *vcpu)
5952 {
5953         fpu_free(&vcpu->arch.guest_fpu);
5954 }
5955
5956 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5957 {
5958         if (vcpu->guest_fpu_loaded)
5959                 return;
5960
5961         /*
5962          * Restore all possible states in the guest,
5963          * and assume host would use all available bits.
5964          * Guest xcr0 would be loaded later.
5965          */
5966         kvm_put_guest_xcr0(vcpu);
5967         vcpu->guest_fpu_loaded = 1;
5968         unlazy_fpu(current);
5969         fpu_restore_checking(&vcpu->arch.guest_fpu);
5970         trace_kvm_fpu(1);
5971 }
5972
5973 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5974 {
5975         kvm_put_guest_xcr0(vcpu);
5976
5977         if (!vcpu->guest_fpu_loaded)
5978                 return;
5979
5980         vcpu->guest_fpu_loaded = 0;
5981         fpu_save_init(&vcpu->arch.guest_fpu);
5982         ++vcpu->stat.fpu_reload;
5983         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5984         trace_kvm_fpu(0);
5985 }
5986
5987 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5988 {
5989         kvmclock_reset(vcpu);
5990
5991         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5992         fx_free(vcpu);
5993         kvm_x86_ops->vcpu_free(vcpu);
5994 }
5995
5996 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5997                                                 unsigned int id)
5998 {
5999         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6000                 printk_once(KERN_WARNING
6001                 "kvm: SMP vm created on host with unstable TSC; "
6002                 "guest TSC will not be reliable\n");
6003         return kvm_x86_ops->vcpu_create(kvm, id);
6004 }
6005
6006 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6007 {
6008         int r;
6009
6010         vcpu->arch.mtrr_state.have_fixed = 1;
6011         vcpu_load(vcpu);
6012         r = kvm_arch_vcpu_reset(vcpu);
6013         if (r == 0)
6014                 r = kvm_mmu_setup(vcpu);
6015         vcpu_put(vcpu);
6016
6017         return r;
6018 }
6019
6020 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6021 {
6022         vcpu->arch.apf.msr_val = 0;
6023
6024         vcpu_load(vcpu);
6025         kvm_mmu_unload(vcpu);
6026         vcpu_put(vcpu);
6027
6028         fx_free(vcpu);
6029         kvm_x86_ops->vcpu_free(vcpu);
6030 }
6031
6032 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6033 {
6034         atomic_set(&vcpu->arch.nmi_queued, 0);
6035         vcpu->arch.nmi_pending = 0;
6036         vcpu->arch.nmi_injected = false;
6037
6038         vcpu->arch.switch_db_regs = 0;
6039         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6040         vcpu->arch.dr6 = DR6_FIXED_1;
6041         vcpu->arch.dr7 = DR7_FIXED_1;
6042
6043         kvm_make_request(KVM_REQ_EVENT, vcpu);
6044         vcpu->arch.apf.msr_val = 0;
6045         vcpu->arch.st.msr_val = 0;
6046
6047         kvmclock_reset(vcpu);
6048
6049         kvm_clear_async_pf_completion_queue(vcpu);
6050         kvm_async_pf_hash_reset(vcpu);
6051         vcpu->arch.apf.halted = false;
6052
6053         kvm_pmu_reset(vcpu);
6054
6055         return kvm_x86_ops->vcpu_reset(vcpu);
6056 }
6057
6058 int kvm_arch_hardware_enable(void *garbage)
6059 {
6060         struct kvm *kvm;
6061         struct kvm_vcpu *vcpu;
6062         int i;
6063         int ret;
6064         u64 local_tsc;
6065         u64 max_tsc = 0;
6066         bool stable, backwards_tsc = false;
6067
6068         kvm_shared_msr_cpu_online();
6069         ret = kvm_x86_ops->hardware_enable(garbage);
6070         if (ret != 0)
6071                 return ret;
6072
6073         local_tsc = native_read_tsc();
6074         stable = !check_tsc_unstable();
6075         list_for_each_entry(kvm, &vm_list, vm_list) {
6076                 kvm_for_each_vcpu(i, vcpu, kvm) {
6077                         if (!stable && vcpu->cpu == smp_processor_id())
6078                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6079                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6080                                 backwards_tsc = true;
6081                                 if (vcpu->arch.last_host_tsc > max_tsc)
6082                                         max_tsc = vcpu->arch.last_host_tsc;
6083                         }
6084                 }
6085         }
6086
6087         /*
6088          * Sometimes, even reliable TSCs go backwards.  This happens on
6089          * platforms that reset TSC during suspend or hibernate actions, but
6090          * maintain synchronization.  We must compensate.  Fortunately, we can
6091          * detect that condition here, which happens early in CPU bringup,
6092          * before any KVM threads can be running.  Unfortunately, we can't
6093          * bring the TSCs fully up to date with real time, as we aren't yet far
6094          * enough into CPU bringup that we know how much real time has actually
6095          * elapsed; our helper function, get_kernel_ns() will be using boot
6096          * variables that haven't been updated yet.
6097          *
6098          * So we simply find the maximum observed TSC above, then record the
6099          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6100          * the adjustment will be applied.  Note that we accumulate
6101          * adjustments, in case multiple suspend cycles happen before some VCPU
6102          * gets a chance to run again.  In the event that no KVM threads get a
6103          * chance to run, we will miss the entire elapsed period, as we'll have
6104          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6105          * loose cycle time.  This isn't too big a deal, since the loss will be
6106          * uniform across all VCPUs (not to mention the scenario is extremely
6107          * unlikely). It is possible that a second hibernate recovery happens
6108          * much faster than a first, causing the observed TSC here to be
6109          * smaller; this would require additional padding adjustment, which is
6110          * why we set last_host_tsc to the local tsc observed here.
6111          *
6112          * N.B. - this code below runs only on platforms with reliable TSC,
6113          * as that is the only way backwards_tsc is set above.  Also note
6114          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6115          * have the same delta_cyc adjustment applied if backwards_tsc
6116          * is detected.  Note further, this adjustment is only done once,
6117          * as we reset last_host_tsc on all VCPUs to stop this from being
6118          * called multiple times (one for each physical CPU bringup).
6119          *
6120          * Platforms with unnreliable TSCs don't have to deal with this, they
6121          * will be compensated by the logic in vcpu_load, which sets the TSC to
6122          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6123          * guarantee that they stay in perfect synchronization.
6124          */
6125         if (backwards_tsc) {
6126                 u64 delta_cyc = max_tsc - local_tsc;
6127                 list_for_each_entry(kvm, &vm_list, vm_list) {
6128                         kvm_for_each_vcpu(i, vcpu, kvm) {
6129                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6130                                 vcpu->arch.last_host_tsc = local_tsc;
6131                         }
6132
6133                         /*
6134                          * We have to disable TSC offset matching.. if you were
6135                          * booting a VM while issuing an S4 host suspend....
6136                          * you may have some problem.  Solving this issue is
6137                          * left as an exercise to the reader.
6138                          */
6139                         kvm->arch.last_tsc_nsec = 0;
6140                         kvm->arch.last_tsc_write = 0;
6141                 }
6142
6143         }
6144         return 0;
6145 }
6146
6147 void kvm_arch_hardware_disable(void *garbage)
6148 {
6149         kvm_x86_ops->hardware_disable(garbage);
6150         drop_user_return_notifiers(garbage);
6151 }
6152
6153 int kvm_arch_hardware_setup(void)
6154 {
6155         return kvm_x86_ops->hardware_setup();
6156 }
6157
6158 void kvm_arch_hardware_unsetup(void)
6159 {
6160         kvm_x86_ops->hardware_unsetup();
6161 }
6162
6163 void kvm_arch_check_processor_compat(void *rtn)
6164 {
6165         kvm_x86_ops->check_processor_compatibility(rtn);
6166 }
6167
6168 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6169 {
6170         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6171 }
6172
6173 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6174 {
6175         struct page *page;
6176         struct kvm *kvm;
6177         int r;
6178
6179         BUG_ON(vcpu->kvm == NULL);
6180         kvm = vcpu->kvm;
6181
6182         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6183         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6184                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6185         else
6186                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6187
6188         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6189         if (!page) {
6190                 r = -ENOMEM;
6191                 goto fail;
6192         }
6193         vcpu->arch.pio_data = page_address(page);
6194
6195         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6196
6197         r = kvm_mmu_create(vcpu);
6198         if (r < 0)
6199                 goto fail_free_pio_data;
6200
6201         if (irqchip_in_kernel(kvm)) {
6202                 r = kvm_create_lapic(vcpu);
6203                 if (r < 0)
6204                         goto fail_mmu_destroy;
6205         }
6206
6207         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6208                                        GFP_KERNEL);
6209         if (!vcpu->arch.mce_banks) {
6210                 r = -ENOMEM;
6211                 goto fail_free_lapic;
6212         }
6213         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6214
6215         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6216                 goto fail_free_mce_banks;
6217
6218         kvm_async_pf_hash_reset(vcpu);
6219         kvm_pmu_init(vcpu);
6220
6221         return 0;
6222 fail_free_mce_banks:
6223         kfree(vcpu->arch.mce_banks);
6224 fail_free_lapic:
6225         kvm_free_lapic(vcpu);
6226 fail_mmu_destroy:
6227         kvm_mmu_destroy(vcpu);
6228 fail_free_pio_data:
6229         free_page((unsigned long)vcpu->arch.pio_data);
6230 fail:
6231         return r;
6232 }
6233
6234 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6235 {
6236         int idx;
6237
6238         kvm_pmu_destroy(vcpu);
6239         kfree(vcpu->arch.mce_banks);
6240         kvm_free_lapic(vcpu);
6241         idx = srcu_read_lock(&vcpu->kvm->srcu);
6242         kvm_mmu_destroy(vcpu);
6243         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6244         free_page((unsigned long)vcpu->arch.pio_data);
6245 }
6246
6247 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6248 {
6249         if (type)
6250                 return -EINVAL;
6251
6252         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6253         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6254
6255         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6256         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6257
6258         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6259
6260         return 0;
6261 }
6262
6263 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6264 {
6265         vcpu_load(vcpu);
6266         kvm_mmu_unload(vcpu);
6267         vcpu_put(vcpu);
6268 }
6269
6270 static void kvm_free_vcpus(struct kvm *kvm)
6271 {
6272         unsigned int i;
6273         struct kvm_vcpu *vcpu;
6274
6275         /*
6276          * Unpin any mmu pages first.
6277          */
6278         kvm_for_each_vcpu(i, vcpu, kvm) {
6279                 kvm_clear_async_pf_completion_queue(vcpu);
6280                 kvm_unload_vcpu_mmu(vcpu);
6281         }
6282         kvm_for_each_vcpu(i, vcpu, kvm)
6283                 kvm_arch_vcpu_free(vcpu);
6284
6285         mutex_lock(&kvm->lock);
6286         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6287                 kvm->vcpus[i] = NULL;
6288
6289         atomic_set(&kvm->online_vcpus, 0);
6290         mutex_unlock(&kvm->lock);
6291 }
6292
6293 void kvm_arch_sync_events(struct kvm *kvm)
6294 {
6295         kvm_free_all_assigned_devices(kvm);
6296         kvm_free_pit(kvm);
6297 }
6298
6299 void kvm_arch_destroy_vm(struct kvm *kvm)
6300 {
6301         kvm_iommu_unmap_guest(kvm);
6302         kfree(kvm->arch.vpic);
6303         kfree(kvm->arch.vioapic);
6304         kvm_free_vcpus(kvm);
6305         if (kvm->arch.apic_access_page)
6306                 put_page(kvm->arch.apic_access_page);
6307         if (kvm->arch.ept_identity_pagetable)
6308                 put_page(kvm->arch.ept_identity_pagetable);
6309 }
6310
6311 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6312                            struct kvm_memory_slot *dont)
6313 {
6314         int i;
6315
6316         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6317                 if (!dont || free->arch.lpage_info[i] != dont->arch.lpage_info[i]) {
6318                         kvm_kvfree(free->arch.lpage_info[i]);
6319                         free->arch.lpage_info[i] = NULL;
6320                 }
6321         }
6322 }
6323
6324 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6325 {
6326         int i;
6327
6328         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6329                 unsigned long ugfn;
6330                 int lpages;
6331                 int level = i + 2;
6332
6333                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6334                                       slot->base_gfn, level) + 1;
6335
6336                 slot->arch.lpage_info[i] =
6337                         kvm_kvzalloc(lpages * sizeof(*slot->arch.lpage_info[i]));
6338                 if (!slot->arch.lpage_info[i])
6339                         goto out_free;
6340
6341                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6342                         slot->arch.lpage_info[i][0].write_count = 1;
6343                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6344                         slot->arch.lpage_info[i][lpages - 1].write_count = 1;
6345                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6346                 /*
6347                  * If the gfn and userspace address are not aligned wrt each
6348                  * other, or if explicitly asked to, disable large page
6349                  * support for this slot
6350                  */
6351                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6352                     !kvm_largepages_enabled()) {
6353                         unsigned long j;
6354
6355                         for (j = 0; j < lpages; ++j)
6356                                 slot->arch.lpage_info[i][j].write_count = 1;
6357                 }
6358         }
6359
6360         return 0;
6361
6362 out_free:
6363         for (i = 0; i < KVM_NR_PAGE_SIZES - 1; ++i) {
6364                 kvm_kvfree(slot->arch.lpage_info[i]);
6365                 slot->arch.lpage_info[i] = NULL;
6366         }
6367         return -ENOMEM;
6368 }
6369
6370 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6371                                 struct kvm_memory_slot *memslot,
6372                                 struct kvm_memory_slot old,
6373                                 struct kvm_userspace_memory_region *mem,
6374                                 int user_alloc)
6375 {
6376         int npages = memslot->npages;
6377         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6378
6379         /* Prevent internal slot pages from being moved by fork()/COW. */
6380         if (memslot->id >= KVM_MEMORY_SLOTS)
6381                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6382
6383         /*To keep backward compatibility with older userspace,
6384          *x86 needs to hanlde !user_alloc case.
6385          */
6386         if (!user_alloc) {
6387                 if (npages && !old.rmap) {
6388                         unsigned long userspace_addr;
6389
6390                         userspace_addr = vm_mmap(NULL, 0,
6391                                                  npages * PAGE_SIZE,
6392                                                  PROT_READ | PROT_WRITE,
6393                                                  map_flags,
6394                                                  0);
6395
6396                         if (IS_ERR((void *)userspace_addr))
6397                                 return PTR_ERR((void *)userspace_addr);
6398
6399                         memslot->userspace_addr = userspace_addr;
6400                 }
6401         }
6402
6403
6404         return 0;
6405 }
6406
6407 void kvm_arch_commit_memory_region(struct kvm *kvm,
6408                                 struct kvm_userspace_memory_region *mem,
6409                                 struct kvm_memory_slot old,
6410                                 int user_alloc)
6411 {
6412
6413         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6414
6415         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6416                 int ret;
6417
6418                 ret = vm_munmap(old.userspace_addr,
6419                                 old.npages * PAGE_SIZE);
6420                 if (ret < 0)
6421                         printk(KERN_WARNING
6422                                "kvm_vm_ioctl_set_memory_region: "
6423                                "failed to munmap memory\n");
6424         }
6425
6426         if (!kvm->arch.n_requested_mmu_pages)
6427                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6428
6429         spin_lock(&kvm->mmu_lock);
6430         if (nr_mmu_pages)
6431                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6432         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6433         spin_unlock(&kvm->mmu_lock);
6434 }
6435
6436 void kvm_arch_flush_shadow(struct kvm *kvm)
6437 {
6438         kvm_mmu_zap_all(kvm);
6439         kvm_reload_remote_mmus(kvm);
6440 }
6441
6442 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6443 {
6444         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6445                 !vcpu->arch.apf.halted)
6446                 || !list_empty_careful(&vcpu->async_pf.done)
6447                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6448                 || atomic_read(&vcpu->arch.nmi_queued) ||
6449                 (kvm_arch_interrupt_allowed(vcpu) &&
6450                  kvm_cpu_has_interrupt(vcpu));
6451 }
6452
6453 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
6454 {
6455         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
6456 }
6457
6458 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6459 {
6460         return kvm_x86_ops->interrupt_allowed(vcpu);
6461 }
6462
6463 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6464 {
6465         unsigned long current_rip = kvm_rip_read(vcpu) +
6466                 get_segment_base(vcpu, VCPU_SREG_CS);
6467
6468         return current_rip == linear_rip;
6469 }
6470 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6471
6472 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6473 {
6474         unsigned long rflags;
6475
6476         rflags = kvm_x86_ops->get_rflags(vcpu);
6477         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6478                 rflags &= ~X86_EFLAGS_TF;
6479         return rflags;
6480 }
6481 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6482
6483 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6484 {
6485         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6486             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6487                 rflags |= X86_EFLAGS_TF;
6488         kvm_x86_ops->set_rflags(vcpu, rflags);
6489         kvm_make_request(KVM_REQ_EVENT, vcpu);
6490 }
6491 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6492
6493 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6494 {
6495         int r;
6496
6497         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6498               is_error_page(work->page))
6499                 return;
6500
6501         r = kvm_mmu_reload(vcpu);
6502         if (unlikely(r))
6503                 return;
6504
6505         if (!vcpu->arch.mmu.direct_map &&
6506               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6507                 return;
6508
6509         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6510 }
6511
6512 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6513 {
6514         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6515 }
6516
6517 static inline u32 kvm_async_pf_next_probe(u32 key)
6518 {
6519         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6520 }
6521
6522 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6523 {
6524         u32 key = kvm_async_pf_hash_fn(gfn);
6525
6526         while (vcpu->arch.apf.gfns[key] != ~0)
6527                 key = kvm_async_pf_next_probe(key);
6528
6529         vcpu->arch.apf.gfns[key] = gfn;
6530 }
6531
6532 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6533 {
6534         int i;
6535         u32 key = kvm_async_pf_hash_fn(gfn);
6536
6537         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6538                      (vcpu->arch.apf.gfns[key] != gfn &&
6539                       vcpu->arch.apf.gfns[key] != ~0); i++)
6540                 key = kvm_async_pf_next_probe(key);
6541
6542         return key;
6543 }
6544
6545 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6546 {
6547         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6548 }
6549
6550 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6551 {
6552         u32 i, j, k;
6553
6554         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6555         while (true) {
6556                 vcpu->arch.apf.gfns[i] = ~0;
6557                 do {
6558                         j = kvm_async_pf_next_probe(j);
6559                         if (vcpu->arch.apf.gfns[j] == ~0)
6560                                 return;
6561                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6562                         /*
6563                          * k lies cyclically in ]i,j]
6564                          * |    i.k.j |
6565                          * |....j i.k.| or  |.k..j i...|
6566                          */
6567                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6568                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6569                 i = j;
6570         }
6571 }
6572
6573 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6574 {
6575
6576         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6577                                       sizeof(val));
6578 }
6579
6580 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6581                                      struct kvm_async_pf *work)
6582 {
6583         struct x86_exception fault;
6584
6585         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6586         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6587
6588         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6589             (vcpu->arch.apf.send_user_only &&
6590              kvm_x86_ops->get_cpl(vcpu) == 0))
6591                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6592         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6593                 fault.vector = PF_VECTOR;
6594                 fault.error_code_valid = true;
6595                 fault.error_code = 0;
6596                 fault.nested_page_fault = false;
6597                 fault.address = work->arch.token;
6598                 kvm_inject_page_fault(vcpu, &fault);
6599         }
6600 }
6601
6602 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6603                                  struct kvm_async_pf *work)
6604 {
6605         struct x86_exception fault;
6606
6607         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6608         if (is_error_page(work->page))
6609                 work->arch.token = ~0; /* broadcast wakeup */
6610         else
6611                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6612
6613         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6614             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6615                 fault.vector = PF_VECTOR;
6616                 fault.error_code_valid = true;
6617                 fault.error_code = 0;
6618                 fault.nested_page_fault = false;
6619                 fault.address = work->arch.token;
6620                 kvm_inject_page_fault(vcpu, &fault);
6621         }
6622         vcpu->arch.apf.halted = false;
6623         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6624 }
6625
6626 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6627 {
6628         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6629                 return true;
6630         else
6631                 return !kvm_event_needs_reinjection(vcpu) &&
6632                         kvm_x86_ops->interrupt_allowed(vcpu);
6633 }
6634
6635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6642 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6643 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6644 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6645 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6646 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);