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[~andy/linux] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  *
10  * Authors:
11  *   Avi Kivity   <avi@qumranet.com>
12  *   Yaniv Kamay  <yaniv@qumranet.com>
13  *   Amit Shah    <amit.shah@qumranet.com>
14  *   Ben-Ami Yassour <benami@il.ibm.com>
15  *
16  * This work is licensed under the terms of the GNU GPL, version 2.  See
17  * the COPYING file in the top-level directory.
18  *
19  */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40
41 #include <asm/uaccess.h>
42 #include <asm/msr.h>
43 #include <asm/desc.h>
44 #include <asm/mtrr.h>
45
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS                                               \
48         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS                                               \
52         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
54                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
55                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 /* EFER defaults:
59  * - enable syscall per default because its emulated by KVM
60  * - enable LME and LMA per default on 64 bit KVM
61  */
62 #ifdef CONFIG_X86_64
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 #else
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #endif
67
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72                                     struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74                                               u32 function, u32 index);
75
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80         { "pf_fixed", VCPU_STAT(pf_fixed) },
81         { "pf_guest", VCPU_STAT(pf_guest) },
82         { "tlb_flush", VCPU_STAT(tlb_flush) },
83         { "invlpg", VCPU_STAT(invlpg) },
84         { "exits", VCPU_STAT(exits) },
85         { "io_exits", VCPU_STAT(io_exits) },
86         { "mmio_exits", VCPU_STAT(mmio_exits) },
87         { "signal_exits", VCPU_STAT(signal_exits) },
88         { "irq_window", VCPU_STAT(irq_window_exits) },
89         { "nmi_window", VCPU_STAT(nmi_window_exits) },
90         { "halt_exits", VCPU_STAT(halt_exits) },
91         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92         { "hypercalls", VCPU_STAT(hypercalls) },
93         { "request_irq", VCPU_STAT(request_irq_exits) },
94         { "irq_exits", VCPU_STAT(irq_exits) },
95         { "host_state_reload", VCPU_STAT(host_state_reload) },
96         { "efer_reload", VCPU_STAT(efer_reload) },
97         { "fpu_reload", VCPU_STAT(fpu_reload) },
98         { "insn_emulation", VCPU_STAT(insn_emulation) },
99         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
100         { "irq_injections", VCPU_STAT(irq_injections) },
101         { "nmi_injections", VCPU_STAT(nmi_injections) },
102         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
103         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
104         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
105         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
106         { "mmu_flooded", VM_STAT(mmu_flooded) },
107         { "mmu_recycled", VM_STAT(mmu_recycled) },
108         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
109         { "mmu_unsync", VM_STAT(mmu_unsync) },
110         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
111         { "largepages", VM_STAT(lpages) },
112         { NULL }
113 };
114
115 unsigned long segment_base(u16 selector)
116 {
117         struct descriptor_table gdt;
118         struct desc_struct *d;
119         unsigned long table_base;
120         unsigned long v;
121
122         if (selector == 0)
123                 return 0;
124
125         asm("sgdt %0" : "=m"(gdt));
126         table_base = gdt.base;
127
128         if (selector & 4) {           /* from ldt */
129                 u16 ldt_selector;
130
131                 asm("sldt %0" : "=g"(ldt_selector));
132                 table_base = segment_base(ldt_selector);
133         }
134         d = (struct desc_struct *)(table_base + (selector & ~7));
135         v = d->base0 | ((unsigned long)d->base1 << 16) |
136                 ((unsigned long)d->base2 << 24);
137 #ifdef CONFIG_X86_64
138         if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
139                 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
140 #endif
141         return v;
142 }
143 EXPORT_SYMBOL_GPL(segment_base);
144
145 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
146 {
147         if (irqchip_in_kernel(vcpu->kvm))
148                 return vcpu->arch.apic_base;
149         else
150                 return vcpu->arch.apic_base;
151 }
152 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
153
154 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
155 {
156         /* TODO: reserve bits check */
157         if (irqchip_in_kernel(vcpu->kvm))
158                 kvm_lapic_set_base(vcpu, data);
159         else
160                 vcpu->arch.apic_base = data;
161 }
162 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
163
164 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
165 {
166         WARN_ON(vcpu->arch.exception.pending);
167         vcpu->arch.exception.pending = true;
168         vcpu->arch.exception.has_error_code = false;
169         vcpu->arch.exception.nr = nr;
170 }
171 EXPORT_SYMBOL_GPL(kvm_queue_exception);
172
173 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
174                            u32 error_code)
175 {
176         ++vcpu->stat.pf_guest;
177
178         if (vcpu->arch.exception.pending) {
179                 if (vcpu->arch.exception.nr == PF_VECTOR) {
180                         printk(KERN_DEBUG "kvm: inject_page_fault:"
181                                         " double fault 0x%lx\n", addr);
182                         vcpu->arch.exception.nr = DF_VECTOR;
183                         vcpu->arch.exception.error_code = 0;
184                 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
185                         /* triple fault -> shutdown */
186                         set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
187                 }
188                 return;
189         }
190         vcpu->arch.cr2 = addr;
191         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
192 }
193
194 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
195 {
196         vcpu->arch.nmi_pending = 1;
197 }
198 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
199
200 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
201 {
202         WARN_ON(vcpu->arch.exception.pending);
203         vcpu->arch.exception.pending = true;
204         vcpu->arch.exception.has_error_code = true;
205         vcpu->arch.exception.nr = nr;
206         vcpu->arch.exception.error_code = error_code;
207 }
208 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
209
210 static void __queue_exception(struct kvm_vcpu *vcpu)
211 {
212         kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
213                                      vcpu->arch.exception.has_error_code,
214                                      vcpu->arch.exception.error_code);
215 }
216
217 /*
218  * Load the pae pdptrs.  Return true is they are all valid.
219  */
220 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
221 {
222         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
223         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
224         int i;
225         int ret;
226         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
227
228         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
229                                   offset * sizeof(u64), sizeof(pdpte));
230         if (ret < 0) {
231                 ret = 0;
232                 goto out;
233         }
234         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
235                 if (is_present_pte(pdpte[i]) &&
236                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
237                         ret = 0;
238                         goto out;
239                 }
240         }
241         ret = 1;
242
243         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
244 out:
245
246         return ret;
247 }
248 EXPORT_SYMBOL_GPL(load_pdptrs);
249
250 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
251 {
252         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
253         bool changed = true;
254         int r;
255
256         if (is_long_mode(vcpu) || !is_pae(vcpu))
257                 return false;
258
259         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
260         if (r < 0)
261                 goto out;
262         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
263 out:
264
265         return changed;
266 }
267
268 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
269 {
270         if (cr0 & CR0_RESERVED_BITS) {
271                 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
272                        cr0, vcpu->arch.cr0);
273                 kvm_inject_gp(vcpu, 0);
274                 return;
275         }
276
277         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
278                 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
279                 kvm_inject_gp(vcpu, 0);
280                 return;
281         }
282
283         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
284                 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
285                        "and a clear PE flag\n");
286                 kvm_inject_gp(vcpu, 0);
287                 return;
288         }
289
290         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
291 #ifdef CONFIG_X86_64
292                 if ((vcpu->arch.shadow_efer & EFER_LME)) {
293                         int cs_db, cs_l;
294
295                         if (!is_pae(vcpu)) {
296                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
297                                        "in long mode while PAE is disabled\n");
298                                 kvm_inject_gp(vcpu, 0);
299                                 return;
300                         }
301                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
302                         if (cs_l) {
303                                 printk(KERN_DEBUG "set_cr0: #GP, start paging "
304                                        "in long mode while CS.L == 1\n");
305                                 kvm_inject_gp(vcpu, 0);
306                                 return;
307
308                         }
309                 } else
310 #endif
311                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
312                         printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
313                                "reserved bits\n");
314                         kvm_inject_gp(vcpu, 0);
315                         return;
316                 }
317
318         }
319
320         kvm_x86_ops->set_cr0(vcpu, cr0);
321         vcpu->arch.cr0 = cr0;
322
323         kvm_mmu_reset_context(vcpu);
324         return;
325 }
326 EXPORT_SYMBOL_GPL(kvm_set_cr0);
327
328 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
329 {
330         kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
331         KVMTRACE_1D(LMSW, vcpu,
332                     (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
333                     handler);
334 }
335 EXPORT_SYMBOL_GPL(kvm_lmsw);
336
337 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
338 {
339         unsigned long old_cr4 = vcpu->arch.cr4;
340         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
341
342         if (cr4 & CR4_RESERVED_BITS) {
343                 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
344                 kvm_inject_gp(vcpu, 0);
345                 return;
346         }
347
348         if (is_long_mode(vcpu)) {
349                 if (!(cr4 & X86_CR4_PAE)) {
350                         printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
351                                "in long mode\n");
352                         kvm_inject_gp(vcpu, 0);
353                         return;
354                 }
355         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
356                    && ((cr4 ^ old_cr4) & pdptr_bits)
357                    && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
358                 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
359                 kvm_inject_gp(vcpu, 0);
360                 return;
361         }
362
363         if (cr4 & X86_CR4_VMXE) {
364                 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
365                 kvm_inject_gp(vcpu, 0);
366                 return;
367         }
368         kvm_x86_ops->set_cr4(vcpu, cr4);
369         vcpu->arch.cr4 = cr4;
370         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
371         kvm_mmu_reset_context(vcpu);
372 }
373 EXPORT_SYMBOL_GPL(kvm_set_cr4);
374
375 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
376 {
377         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
378                 kvm_mmu_sync_roots(vcpu);
379                 kvm_mmu_flush_tlb(vcpu);
380                 return;
381         }
382
383         if (is_long_mode(vcpu)) {
384                 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
385                         printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
386                         kvm_inject_gp(vcpu, 0);
387                         return;
388                 }
389         } else {
390                 if (is_pae(vcpu)) {
391                         if (cr3 & CR3_PAE_RESERVED_BITS) {
392                                 printk(KERN_DEBUG
393                                        "set_cr3: #GP, reserved bits\n");
394                                 kvm_inject_gp(vcpu, 0);
395                                 return;
396                         }
397                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
398                                 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
399                                        "reserved bits\n");
400                                 kvm_inject_gp(vcpu, 0);
401                                 return;
402                         }
403                 }
404                 /*
405                  * We don't check reserved bits in nonpae mode, because
406                  * this isn't enforced, and VMware depends on this.
407                  */
408         }
409
410         /*
411          * Does the new cr3 value map to physical memory? (Note, we
412          * catch an invalid cr3 even in real-mode, because it would
413          * cause trouble later on when we turn on paging anyway.)
414          *
415          * A real CPU would silently accept an invalid cr3 and would
416          * attempt to use it - with largely undefined (and often hard
417          * to debug) behavior on the guest side.
418          */
419         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
420                 kvm_inject_gp(vcpu, 0);
421         else {
422                 vcpu->arch.cr3 = cr3;
423                 vcpu->arch.mmu.new_cr3(vcpu);
424         }
425 }
426 EXPORT_SYMBOL_GPL(kvm_set_cr3);
427
428 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
429 {
430         if (cr8 & CR8_RESERVED_BITS) {
431                 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
432                 kvm_inject_gp(vcpu, 0);
433                 return;
434         }
435         if (irqchip_in_kernel(vcpu->kvm))
436                 kvm_lapic_set_tpr(vcpu, cr8);
437         else
438                 vcpu->arch.cr8 = cr8;
439 }
440 EXPORT_SYMBOL_GPL(kvm_set_cr8);
441
442 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
443 {
444         if (irqchip_in_kernel(vcpu->kvm))
445                 return kvm_lapic_get_cr8(vcpu);
446         else
447                 return vcpu->arch.cr8;
448 }
449 EXPORT_SYMBOL_GPL(kvm_get_cr8);
450
451 static inline u32 bit(int bitno)
452 {
453         return 1 << (bitno & 31);
454 }
455
456 /*
457  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
458  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
459  *
460  * This list is modified at module load time to reflect the
461  * capabilities of the host cpu.
462  */
463 static u32 msrs_to_save[] = {
464         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
465         MSR_K6_STAR,
466 #ifdef CONFIG_X86_64
467         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
468 #endif
469         MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
470         MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
471 };
472
473 static unsigned num_msrs_to_save;
474
475 static u32 emulated_msrs[] = {
476         MSR_IA32_MISC_ENABLE,
477 };
478
479 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
480 {
481         if (efer & efer_reserved_bits) {
482                 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
483                        efer);
484                 kvm_inject_gp(vcpu, 0);
485                 return;
486         }
487
488         if (is_paging(vcpu)
489             && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
490                 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
491                 kvm_inject_gp(vcpu, 0);
492                 return;
493         }
494
495         if (efer & EFER_FFXSR) {
496                 struct kvm_cpuid_entry2 *feat;
497
498                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
499                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
500                         printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
501                         kvm_inject_gp(vcpu, 0);
502                         return;
503                 }
504         }
505
506         if (efer & EFER_SVME) {
507                 struct kvm_cpuid_entry2 *feat;
508
509                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
510                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
511                         printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
512                         kvm_inject_gp(vcpu, 0);
513                         return;
514                 }
515         }
516
517         kvm_x86_ops->set_efer(vcpu, efer);
518
519         efer &= ~EFER_LMA;
520         efer |= vcpu->arch.shadow_efer & EFER_LMA;
521
522         vcpu->arch.shadow_efer = efer;
523
524         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
525         kvm_mmu_reset_context(vcpu);
526 }
527
528 void kvm_enable_efer_bits(u64 mask)
529 {
530        efer_reserved_bits &= ~mask;
531 }
532 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
533
534
535 /*
536  * Writes msr value into into the appropriate "register".
537  * Returns 0 on success, non-0 otherwise.
538  * Assumes vcpu_load() was already called.
539  */
540 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
541 {
542         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
543 }
544
545 /*
546  * Adapt set_msr() to msr_io()'s calling convention
547  */
548 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
549 {
550         return kvm_set_msr(vcpu, index, *data);
551 }
552
553 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
554 {
555         static int version;
556         struct pvclock_wall_clock wc;
557         struct timespec now, sys, boot;
558
559         if (!wall_clock)
560                 return;
561
562         version++;
563
564         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
565
566         /*
567          * The guest calculates current wall clock time by adding
568          * system time (updated by kvm_write_guest_time below) to the
569          * wall clock specified here.  guest system time equals host
570          * system time for us, thus we must fill in host boot time here.
571          */
572         now = current_kernel_time();
573         ktime_get_ts(&sys);
574         boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
575
576         wc.sec = boot.tv_sec;
577         wc.nsec = boot.tv_nsec;
578         wc.version = version;
579
580         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
581
582         version++;
583         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
584 }
585
586 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
587 {
588         uint32_t quotient, remainder;
589
590         /* Don't try to replace with do_div(), this one calculates
591          * "(dividend << 32) / divisor" */
592         __asm__ ( "divl %4"
593                   : "=a" (quotient), "=d" (remainder)
594                   : "0" (0), "1" (dividend), "r" (divisor) );
595         return quotient;
596 }
597
598 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
599 {
600         uint64_t nsecs = 1000000000LL;
601         int32_t  shift = 0;
602         uint64_t tps64;
603         uint32_t tps32;
604
605         tps64 = tsc_khz * 1000LL;
606         while (tps64 > nsecs*2) {
607                 tps64 >>= 1;
608                 shift--;
609         }
610
611         tps32 = (uint32_t)tps64;
612         while (tps32 <= (uint32_t)nsecs) {
613                 tps32 <<= 1;
614                 shift++;
615         }
616
617         hv_clock->tsc_shift = shift;
618         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
619
620         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
621                  __func__, tsc_khz, hv_clock->tsc_shift,
622                  hv_clock->tsc_to_system_mul);
623 }
624
625 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
626
627 static void kvm_write_guest_time(struct kvm_vcpu *v)
628 {
629         struct timespec ts;
630         unsigned long flags;
631         struct kvm_vcpu_arch *vcpu = &v->arch;
632         void *shared_kaddr;
633         unsigned long this_tsc_khz;
634
635         if ((!vcpu->time_page))
636                 return;
637
638         this_tsc_khz = get_cpu_var(cpu_tsc_khz);
639         if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
640                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
641                 vcpu->hv_clock_tsc_khz = this_tsc_khz;
642         }
643         put_cpu_var(cpu_tsc_khz);
644
645         /* Keep irq disabled to prevent changes to the clock */
646         local_irq_save(flags);
647         kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
648                           &vcpu->hv_clock.tsc_timestamp);
649         ktime_get_ts(&ts);
650         local_irq_restore(flags);
651
652         /* With all the info we got, fill in the values */
653
654         vcpu->hv_clock.system_time = ts.tv_nsec +
655                                      (NSEC_PER_SEC * (u64)ts.tv_sec);
656         /*
657          * The interface expects us to write an even number signaling that the
658          * update is finished. Since the guest won't see the intermediate
659          * state, we just increase by 2 at the end.
660          */
661         vcpu->hv_clock.version += 2;
662
663         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
664
665         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
666                sizeof(vcpu->hv_clock));
667
668         kunmap_atomic(shared_kaddr, KM_USER0);
669
670         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
671 }
672
673 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
674 {
675         struct kvm_vcpu_arch *vcpu = &v->arch;
676
677         if (!vcpu->time_page)
678                 return 0;
679         set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
680         return 1;
681 }
682
683 static bool msr_mtrr_valid(unsigned msr)
684 {
685         switch (msr) {
686         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
687         case MSR_MTRRfix64K_00000:
688         case MSR_MTRRfix16K_80000:
689         case MSR_MTRRfix16K_A0000:
690         case MSR_MTRRfix4K_C0000:
691         case MSR_MTRRfix4K_C8000:
692         case MSR_MTRRfix4K_D0000:
693         case MSR_MTRRfix4K_D8000:
694         case MSR_MTRRfix4K_E0000:
695         case MSR_MTRRfix4K_E8000:
696         case MSR_MTRRfix4K_F0000:
697         case MSR_MTRRfix4K_F8000:
698         case MSR_MTRRdefType:
699         case MSR_IA32_CR_PAT:
700                 return true;
701         case 0x2f8:
702                 return true;
703         }
704         return false;
705 }
706
707 static bool valid_pat_type(unsigned t)
708 {
709         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
710 }
711
712 static bool valid_mtrr_type(unsigned t)
713 {
714         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
715 }
716
717 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
718 {
719         int i;
720
721         if (!msr_mtrr_valid(msr))
722                 return false;
723
724         if (msr == MSR_IA32_CR_PAT) {
725                 for (i = 0; i < 8; i++)
726                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
727                                 return false;
728                 return true;
729         } else if (msr == MSR_MTRRdefType) {
730                 if (data & ~0xcff)
731                         return false;
732                 return valid_mtrr_type(data & 0xff);
733         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
734                 for (i = 0; i < 8 ; i++)
735                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
736                                 return false;
737                 return true;
738         }
739
740         /* variable MTRRs */
741         return valid_mtrr_type(data & 0xff);
742 }
743
744 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
745 {
746         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
747
748         if (!mtrr_valid(vcpu, msr, data))
749                 return 1;
750
751         if (msr == MSR_MTRRdefType) {
752                 vcpu->arch.mtrr_state.def_type = data;
753                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
754         } else if (msr == MSR_MTRRfix64K_00000)
755                 p[0] = data;
756         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
757                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
758         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
759                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
760         else if (msr == MSR_IA32_CR_PAT)
761                 vcpu->arch.pat = data;
762         else {  /* Variable MTRRs */
763                 int idx, is_mtrr_mask;
764                 u64 *pt;
765
766                 idx = (msr - 0x200) / 2;
767                 is_mtrr_mask = msr - 0x200 - 2 * idx;
768                 if (!is_mtrr_mask)
769                         pt =
770                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
771                 else
772                         pt =
773                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
774                 *pt = data;
775         }
776
777         kvm_mmu_reset_context(vcpu);
778         return 0;
779 }
780
781 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
782 {
783         switch (msr) {
784         case MSR_EFER:
785                 set_efer(vcpu, data);
786                 break;
787         case MSR_IA32_MC0_STATUS:
788                 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
789                        __func__, data);
790                 break;
791         case MSR_IA32_MCG_STATUS:
792                 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
793                         __func__, data);
794                 break;
795         case MSR_IA32_MCG_CTL:
796                 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
797                         __func__, data);
798                 break;
799         case MSR_IA32_DEBUGCTLMSR:
800                 if (!data) {
801                         /* We support the non-activated case already */
802                         break;
803                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
804                         /* Values other than LBR and BTF are vendor-specific,
805                            thus reserved and should throw a #GP */
806                         return 1;
807                 }
808                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
809                         __func__, data);
810                 break;
811         case MSR_IA32_UCODE_REV:
812         case MSR_IA32_UCODE_WRITE:
813         case MSR_VM_HSAVE_PA:
814                 break;
815         case 0x200 ... 0x2ff:
816                 return set_msr_mtrr(vcpu, msr, data);
817         case MSR_IA32_APICBASE:
818                 kvm_set_apic_base(vcpu, data);
819                 break;
820         case MSR_IA32_MISC_ENABLE:
821                 vcpu->arch.ia32_misc_enable_msr = data;
822                 break;
823         case MSR_KVM_WALL_CLOCK:
824                 vcpu->kvm->arch.wall_clock = data;
825                 kvm_write_wall_clock(vcpu->kvm, data);
826                 break;
827         case MSR_KVM_SYSTEM_TIME: {
828                 if (vcpu->arch.time_page) {
829                         kvm_release_page_dirty(vcpu->arch.time_page);
830                         vcpu->arch.time_page = NULL;
831                 }
832
833                 vcpu->arch.time = data;
834
835                 /* we verify if the enable bit is set... */
836                 if (!(data & 1))
837                         break;
838
839                 /* ...but clean it before doing the actual write */
840                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
841
842                 vcpu->arch.time_page =
843                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
844
845                 if (is_error_page(vcpu->arch.time_page)) {
846                         kvm_release_page_clean(vcpu->arch.time_page);
847                         vcpu->arch.time_page = NULL;
848                 }
849
850                 kvm_request_guest_time_update(vcpu);
851                 break;
852         }
853         default:
854                 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
855                 return 1;
856         }
857         return 0;
858 }
859 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
860
861
862 /*
863  * Reads an msr value (of 'msr_index') into 'pdata'.
864  * Returns 0 on success, non-0 otherwise.
865  * Assumes vcpu_load() was already called.
866  */
867 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
868 {
869         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
870 }
871
872 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
873 {
874         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
875
876         if (!msr_mtrr_valid(msr))
877                 return 1;
878
879         if (msr == MSR_MTRRdefType)
880                 *pdata = vcpu->arch.mtrr_state.def_type +
881                          (vcpu->arch.mtrr_state.enabled << 10);
882         else if (msr == MSR_MTRRfix64K_00000)
883                 *pdata = p[0];
884         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
885                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
886         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
887                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
888         else if (msr == MSR_IA32_CR_PAT)
889                 *pdata = vcpu->arch.pat;
890         else {  /* Variable MTRRs */
891                 int idx, is_mtrr_mask;
892                 u64 *pt;
893
894                 idx = (msr - 0x200) / 2;
895                 is_mtrr_mask = msr - 0x200 - 2 * idx;
896                 if (!is_mtrr_mask)
897                         pt =
898                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
899                 else
900                         pt =
901                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
902                 *pdata = *pt;
903         }
904
905         return 0;
906 }
907
908 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
909 {
910         u64 data;
911
912         switch (msr) {
913         case 0xc0010010: /* SYSCFG */
914         case 0xc0010015: /* HWCR */
915         case MSR_IA32_PLATFORM_ID:
916         case MSR_IA32_P5_MC_ADDR:
917         case MSR_IA32_P5_MC_TYPE:
918         case MSR_IA32_MC0_CTL:
919         case MSR_IA32_MCG_STATUS:
920         case MSR_IA32_MCG_CAP:
921         case MSR_IA32_MCG_CTL:
922         case MSR_IA32_MC0_MISC:
923         case MSR_IA32_MC0_MISC+4:
924         case MSR_IA32_MC0_MISC+8:
925         case MSR_IA32_MC0_MISC+12:
926         case MSR_IA32_MC0_MISC+16:
927         case MSR_IA32_MC0_MISC+20:
928         case MSR_IA32_UCODE_REV:
929         case MSR_IA32_EBL_CR_POWERON:
930         case MSR_IA32_DEBUGCTLMSR:
931         case MSR_IA32_LASTBRANCHFROMIP:
932         case MSR_IA32_LASTBRANCHTOIP:
933         case MSR_IA32_LASTINTFROMIP:
934         case MSR_IA32_LASTINTTOIP:
935         case MSR_VM_HSAVE_PA:
936         case MSR_P6_EVNTSEL0:
937         case MSR_P6_EVNTSEL1:
938         case MSR_K7_EVNTSEL0:
939                 data = 0;
940                 break;
941         case MSR_MTRRcap:
942                 data = 0x500 | KVM_NR_VAR_MTRR;
943                 break;
944         case 0x200 ... 0x2ff:
945                 return get_msr_mtrr(vcpu, msr, pdata);
946         case 0xcd: /* fsb frequency */
947                 data = 3;
948                 break;
949         case MSR_IA32_APICBASE:
950                 data = kvm_get_apic_base(vcpu);
951                 break;
952         case MSR_IA32_MISC_ENABLE:
953                 data = vcpu->arch.ia32_misc_enable_msr;
954                 break;
955         case MSR_IA32_PERF_STATUS:
956                 /* TSC increment by tick */
957                 data = 1000ULL;
958                 /* CPU multiplier */
959                 data |= (((uint64_t)4ULL) << 40);
960                 break;
961         case MSR_EFER:
962                 data = vcpu->arch.shadow_efer;
963                 break;
964         case MSR_KVM_WALL_CLOCK:
965                 data = vcpu->kvm->arch.wall_clock;
966                 break;
967         case MSR_KVM_SYSTEM_TIME:
968                 data = vcpu->arch.time;
969                 break;
970         default:
971                 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
972                 return 1;
973         }
974         *pdata = data;
975         return 0;
976 }
977 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
978
979 /*
980  * Read or write a bunch of msrs. All parameters are kernel addresses.
981  *
982  * @return number of msrs set successfully.
983  */
984 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
985                     struct kvm_msr_entry *entries,
986                     int (*do_msr)(struct kvm_vcpu *vcpu,
987                                   unsigned index, u64 *data))
988 {
989         int i;
990
991         vcpu_load(vcpu);
992
993         down_read(&vcpu->kvm->slots_lock);
994         for (i = 0; i < msrs->nmsrs; ++i)
995                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
996                         break;
997         up_read(&vcpu->kvm->slots_lock);
998
999         vcpu_put(vcpu);
1000
1001         return i;
1002 }
1003
1004 /*
1005  * Read or write a bunch of msrs. Parameters are user addresses.
1006  *
1007  * @return number of msrs set successfully.
1008  */
1009 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1010                   int (*do_msr)(struct kvm_vcpu *vcpu,
1011                                 unsigned index, u64 *data),
1012                   int writeback)
1013 {
1014         struct kvm_msrs msrs;
1015         struct kvm_msr_entry *entries;
1016         int r, n;
1017         unsigned size;
1018
1019         r = -EFAULT;
1020         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1021                 goto out;
1022
1023         r = -E2BIG;
1024         if (msrs.nmsrs >= MAX_IO_MSRS)
1025                 goto out;
1026
1027         r = -ENOMEM;
1028         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1029         entries = vmalloc(size);
1030         if (!entries)
1031                 goto out;
1032
1033         r = -EFAULT;
1034         if (copy_from_user(entries, user_msrs->entries, size))
1035                 goto out_free;
1036
1037         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1038         if (r < 0)
1039                 goto out_free;
1040
1041         r = -EFAULT;
1042         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1043                 goto out_free;
1044
1045         r = n;
1046
1047 out_free:
1048         vfree(entries);
1049 out:
1050         return r;
1051 }
1052
1053 int kvm_dev_ioctl_check_extension(long ext)
1054 {
1055         int r;
1056
1057         switch (ext) {
1058         case KVM_CAP_IRQCHIP:
1059         case KVM_CAP_HLT:
1060         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1061         case KVM_CAP_SET_TSS_ADDR:
1062         case KVM_CAP_EXT_CPUID:
1063         case KVM_CAP_CLOCKSOURCE:
1064         case KVM_CAP_PIT:
1065         case KVM_CAP_NOP_IO_DELAY:
1066         case KVM_CAP_MP_STATE:
1067         case KVM_CAP_SYNC_MMU:
1068         case KVM_CAP_REINJECT_CONTROL:
1069         case KVM_CAP_IRQ_INJECT_STATUS:
1070         case KVM_CAP_ASSIGN_DEV_IRQ:
1071                 r = 1;
1072                 break;
1073         case KVM_CAP_COALESCED_MMIO:
1074                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1075                 break;
1076         case KVM_CAP_VAPIC:
1077                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1078                 break;
1079         case KVM_CAP_NR_VCPUS:
1080                 r = KVM_MAX_VCPUS;
1081                 break;
1082         case KVM_CAP_NR_MEMSLOTS:
1083                 r = KVM_MEMORY_SLOTS;
1084                 break;
1085         case KVM_CAP_PV_MMU:
1086                 r = !tdp_enabled;
1087                 break;
1088         case KVM_CAP_IOMMU:
1089                 r = iommu_found();
1090                 break;
1091         default:
1092                 r = 0;
1093                 break;
1094         }
1095         return r;
1096
1097 }
1098
1099 long kvm_arch_dev_ioctl(struct file *filp,
1100                         unsigned int ioctl, unsigned long arg)
1101 {
1102         void __user *argp = (void __user *)arg;
1103         long r;
1104
1105         switch (ioctl) {
1106         case KVM_GET_MSR_INDEX_LIST: {
1107                 struct kvm_msr_list __user *user_msr_list = argp;
1108                 struct kvm_msr_list msr_list;
1109                 unsigned n;
1110
1111                 r = -EFAULT;
1112                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1113                         goto out;
1114                 n = msr_list.nmsrs;
1115                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1116                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1117                         goto out;
1118                 r = -E2BIG;
1119                 if (n < msr_list.nmsrs)
1120                         goto out;
1121                 r = -EFAULT;
1122                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1123                                  num_msrs_to_save * sizeof(u32)))
1124                         goto out;
1125                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1126                                  &emulated_msrs,
1127                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1128                         goto out;
1129                 r = 0;
1130                 break;
1131         }
1132         case KVM_GET_SUPPORTED_CPUID: {
1133                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1134                 struct kvm_cpuid2 cpuid;
1135
1136                 r = -EFAULT;
1137                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1138                         goto out;
1139                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1140                                                       cpuid_arg->entries);
1141                 if (r)
1142                         goto out;
1143
1144                 r = -EFAULT;
1145                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1146                         goto out;
1147                 r = 0;
1148                 break;
1149         }
1150         default:
1151                 r = -EINVAL;
1152         }
1153 out:
1154         return r;
1155 }
1156
1157 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1158 {
1159         kvm_x86_ops->vcpu_load(vcpu, cpu);
1160         kvm_request_guest_time_update(vcpu);
1161 }
1162
1163 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1164 {
1165         kvm_x86_ops->vcpu_put(vcpu);
1166         kvm_put_guest_fpu(vcpu);
1167 }
1168
1169 static int is_efer_nx(void)
1170 {
1171         unsigned long long efer = 0;
1172
1173         rdmsrl_safe(MSR_EFER, &efer);
1174         return efer & EFER_NX;
1175 }
1176
1177 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1178 {
1179         int i;
1180         struct kvm_cpuid_entry2 *e, *entry;
1181
1182         entry = NULL;
1183         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1184                 e = &vcpu->arch.cpuid_entries[i];
1185                 if (e->function == 0x80000001) {
1186                         entry = e;
1187                         break;
1188                 }
1189         }
1190         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1191                 entry->edx &= ~(1 << 20);
1192                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1193         }
1194 }
1195
1196 /* when an old userspace process fills a new kernel module */
1197 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1198                                     struct kvm_cpuid *cpuid,
1199                                     struct kvm_cpuid_entry __user *entries)
1200 {
1201         int r, i;
1202         struct kvm_cpuid_entry *cpuid_entries;
1203
1204         r = -E2BIG;
1205         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1206                 goto out;
1207         r = -ENOMEM;
1208         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1209         if (!cpuid_entries)
1210                 goto out;
1211         r = -EFAULT;
1212         if (copy_from_user(cpuid_entries, entries,
1213                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1214                 goto out_free;
1215         for (i = 0; i < cpuid->nent; i++) {
1216                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1217                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1218                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1219                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1220                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1221                 vcpu->arch.cpuid_entries[i].index = 0;
1222                 vcpu->arch.cpuid_entries[i].flags = 0;
1223                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1224                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1225                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1226         }
1227         vcpu->arch.cpuid_nent = cpuid->nent;
1228         cpuid_fix_nx_cap(vcpu);
1229         r = 0;
1230
1231 out_free:
1232         vfree(cpuid_entries);
1233 out:
1234         return r;
1235 }
1236
1237 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1238                                      struct kvm_cpuid2 *cpuid,
1239                                      struct kvm_cpuid_entry2 __user *entries)
1240 {
1241         int r;
1242
1243         r = -E2BIG;
1244         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1245                 goto out;
1246         r = -EFAULT;
1247         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1248                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1249                 goto out;
1250         vcpu->arch.cpuid_nent = cpuid->nent;
1251         return 0;
1252
1253 out:
1254         return r;
1255 }
1256
1257 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1258                                      struct kvm_cpuid2 *cpuid,
1259                                      struct kvm_cpuid_entry2 __user *entries)
1260 {
1261         int r;
1262
1263         r = -E2BIG;
1264         if (cpuid->nent < vcpu->arch.cpuid_nent)
1265                 goto out;
1266         r = -EFAULT;
1267         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1268                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1269                 goto out;
1270         return 0;
1271
1272 out:
1273         cpuid->nent = vcpu->arch.cpuid_nent;
1274         return r;
1275 }
1276
1277 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1278                            u32 index)
1279 {
1280         entry->function = function;
1281         entry->index = index;
1282         cpuid_count(entry->function, entry->index,
1283                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1284         entry->flags = 0;
1285 }
1286
1287 #define F(x) bit(X86_FEATURE_##x)
1288
1289 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1290                          u32 index, int *nent, int maxnent)
1291 {
1292         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1293 #ifdef CONFIG_X86_64
1294         unsigned f_lm = F(LM);
1295 #else
1296         unsigned f_lm = 0;
1297 #endif
1298
1299         /* cpuid 1.edx */
1300         const u32 kvm_supported_word0_x86_features =
1301                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1302                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1303                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1304                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1305                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1306                 0 /* Reserved, DS, ACPI */ | F(MMX) |
1307                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1308                 0 /* HTT, TM, Reserved, PBE */;
1309         /* cpuid 0x80000001.edx */
1310         const u32 kvm_supported_word1_x86_features =
1311                 F(FPU) | F(VME) | F(DE) | F(PSE) |
1312                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1313                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1314                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1315                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1316                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1317                 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1318                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1319         /* cpuid 1.ecx */
1320         const u32 kvm_supported_word4_x86_features =
1321                 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1322                 0 /* DS-CPL, VMX, SMX, EST */ |
1323                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1324                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1325                 0 /* Reserved, DCA */ | F(XMM4_1) |
1326                 F(XMM4_2) | 0 /* x2APIC */ | F(MOVBE) | F(POPCNT) |
1327                 0 /* Reserved, XSAVE, OSXSAVE */;
1328         /* cpuid 0x80000001.ecx */
1329         const u32 kvm_supported_word6_x86_features =
1330                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1331                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1332                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1333                 0 /* SKINIT */ | 0 /* WDT */;
1334
1335         /* all calls to cpuid_count() should be made on the same cpu */
1336         get_cpu();
1337         do_cpuid_1_ent(entry, function, index);
1338         ++*nent;
1339
1340         switch (function) {
1341         case 0:
1342                 entry->eax = min(entry->eax, (u32)0xb);
1343                 break;
1344         case 1:
1345                 entry->edx &= kvm_supported_word0_x86_features;
1346                 entry->ecx &= kvm_supported_word4_x86_features;
1347                 break;
1348         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1349          * may return different values. This forces us to get_cpu() before
1350          * issuing the first command, and also to emulate this annoying behavior
1351          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1352         case 2: {
1353                 int t, times = entry->eax & 0xff;
1354
1355                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1356                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1357                 for (t = 1; t < times && *nent < maxnent; ++t) {
1358                         do_cpuid_1_ent(&entry[t], function, 0);
1359                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1360                         ++*nent;
1361                 }
1362                 break;
1363         }
1364         /* function 4 and 0xb have additional index. */
1365         case 4: {
1366                 int i, cache_type;
1367
1368                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1369                 /* read more entries until cache_type is zero */
1370                 for (i = 1; *nent < maxnent; ++i) {
1371                         cache_type = entry[i - 1].eax & 0x1f;
1372                         if (!cache_type)
1373                                 break;
1374                         do_cpuid_1_ent(&entry[i], function, i);
1375                         entry[i].flags |=
1376                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1377                         ++*nent;
1378                 }
1379                 break;
1380         }
1381         case 0xb: {
1382                 int i, level_type;
1383
1384                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1385                 /* read more entries until level_type is zero */
1386                 for (i = 1; *nent < maxnent; ++i) {
1387                         level_type = entry[i - 1].ecx & 0xff00;
1388                         if (!level_type)
1389                                 break;
1390                         do_cpuid_1_ent(&entry[i], function, i);
1391                         entry[i].flags |=
1392                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1393                         ++*nent;
1394                 }
1395                 break;
1396         }
1397         case 0x80000000:
1398                 entry->eax = min(entry->eax, 0x8000001a);
1399                 break;
1400         case 0x80000001:
1401                 entry->edx &= kvm_supported_word1_x86_features;
1402                 entry->ecx &= kvm_supported_word6_x86_features;
1403                 break;
1404         }
1405         put_cpu();
1406 }
1407
1408 #undef F
1409
1410 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1411                                      struct kvm_cpuid_entry2 __user *entries)
1412 {
1413         struct kvm_cpuid_entry2 *cpuid_entries;
1414         int limit, nent = 0, r = -E2BIG;
1415         u32 func;
1416
1417         if (cpuid->nent < 1)
1418                 goto out;
1419         r = -ENOMEM;
1420         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1421         if (!cpuid_entries)
1422                 goto out;
1423
1424         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1425         limit = cpuid_entries[0].eax;
1426         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1427                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1428                              &nent, cpuid->nent);
1429         r = -E2BIG;
1430         if (nent >= cpuid->nent)
1431                 goto out_free;
1432
1433         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1434         limit = cpuid_entries[nent - 1].eax;
1435         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1436                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1437                              &nent, cpuid->nent);
1438         r = -EFAULT;
1439         if (copy_to_user(entries, cpuid_entries,
1440                          nent * sizeof(struct kvm_cpuid_entry2)))
1441                 goto out_free;
1442         cpuid->nent = nent;
1443         r = 0;
1444
1445 out_free:
1446         vfree(cpuid_entries);
1447 out:
1448         return r;
1449 }
1450
1451 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1452                                     struct kvm_lapic_state *s)
1453 {
1454         vcpu_load(vcpu);
1455         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1456         vcpu_put(vcpu);
1457
1458         return 0;
1459 }
1460
1461 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1462                                     struct kvm_lapic_state *s)
1463 {
1464         vcpu_load(vcpu);
1465         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1466         kvm_apic_post_state_restore(vcpu);
1467         vcpu_put(vcpu);
1468
1469         return 0;
1470 }
1471
1472 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1473                                     struct kvm_interrupt *irq)
1474 {
1475         if (irq->irq < 0 || irq->irq >= 256)
1476                 return -EINVAL;
1477         if (irqchip_in_kernel(vcpu->kvm))
1478                 return -ENXIO;
1479         vcpu_load(vcpu);
1480
1481         kvm_queue_interrupt(vcpu, irq->irq, false);
1482
1483         vcpu_put(vcpu);
1484
1485         return 0;
1486 }
1487
1488 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1489 {
1490         vcpu_load(vcpu);
1491         kvm_inject_nmi(vcpu);
1492         vcpu_put(vcpu);
1493
1494         return 0;
1495 }
1496
1497 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1498                                            struct kvm_tpr_access_ctl *tac)
1499 {
1500         if (tac->flags)
1501                 return -EINVAL;
1502         vcpu->arch.tpr_access_reporting = !!tac->enabled;
1503         return 0;
1504 }
1505
1506 long kvm_arch_vcpu_ioctl(struct file *filp,
1507                          unsigned int ioctl, unsigned long arg)
1508 {
1509         struct kvm_vcpu *vcpu = filp->private_data;
1510         void __user *argp = (void __user *)arg;
1511         int r;
1512         struct kvm_lapic_state *lapic = NULL;
1513
1514         switch (ioctl) {
1515         case KVM_GET_LAPIC: {
1516                 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1517
1518                 r = -ENOMEM;
1519                 if (!lapic)
1520                         goto out;
1521                 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1522                 if (r)
1523                         goto out;
1524                 r = -EFAULT;
1525                 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1526                         goto out;
1527                 r = 0;
1528                 break;
1529         }
1530         case KVM_SET_LAPIC: {
1531                 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1532                 r = -ENOMEM;
1533                 if (!lapic)
1534                         goto out;
1535                 r = -EFAULT;
1536                 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1537                         goto out;
1538                 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1539                 if (r)
1540                         goto out;
1541                 r = 0;
1542                 break;
1543         }
1544         case KVM_INTERRUPT: {
1545                 struct kvm_interrupt irq;
1546
1547                 r = -EFAULT;
1548                 if (copy_from_user(&irq, argp, sizeof irq))
1549                         goto out;
1550                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1551                 if (r)
1552                         goto out;
1553                 r = 0;
1554                 break;
1555         }
1556         case KVM_NMI: {
1557                 r = kvm_vcpu_ioctl_nmi(vcpu);
1558                 if (r)
1559                         goto out;
1560                 r = 0;
1561                 break;
1562         }
1563         case KVM_SET_CPUID: {
1564                 struct kvm_cpuid __user *cpuid_arg = argp;
1565                 struct kvm_cpuid cpuid;
1566
1567                 r = -EFAULT;
1568                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1569                         goto out;
1570                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1571                 if (r)
1572                         goto out;
1573                 break;
1574         }
1575         case KVM_SET_CPUID2: {
1576                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1577                 struct kvm_cpuid2 cpuid;
1578
1579                 r = -EFAULT;
1580                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1581                         goto out;
1582                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1583                                               cpuid_arg->entries);
1584                 if (r)
1585                         goto out;
1586                 break;
1587         }
1588         case KVM_GET_CPUID2: {
1589                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1590                 struct kvm_cpuid2 cpuid;
1591
1592                 r = -EFAULT;
1593                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1594                         goto out;
1595                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1596                                               cpuid_arg->entries);
1597                 if (r)
1598                         goto out;
1599                 r = -EFAULT;
1600                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1601                         goto out;
1602                 r = 0;
1603                 break;
1604         }
1605         case KVM_GET_MSRS:
1606                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1607                 break;
1608         case KVM_SET_MSRS:
1609                 r = msr_io(vcpu, argp, do_set_msr, 0);
1610                 break;
1611         case KVM_TPR_ACCESS_REPORTING: {
1612                 struct kvm_tpr_access_ctl tac;
1613
1614                 r = -EFAULT;
1615                 if (copy_from_user(&tac, argp, sizeof tac))
1616                         goto out;
1617                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1618                 if (r)
1619                         goto out;
1620                 r = -EFAULT;
1621                 if (copy_to_user(argp, &tac, sizeof tac))
1622                         goto out;
1623                 r = 0;
1624                 break;
1625         };
1626         case KVM_SET_VAPIC_ADDR: {
1627                 struct kvm_vapic_addr va;
1628
1629                 r = -EINVAL;
1630                 if (!irqchip_in_kernel(vcpu->kvm))
1631                         goto out;
1632                 r = -EFAULT;
1633                 if (copy_from_user(&va, argp, sizeof va))
1634                         goto out;
1635                 r = 0;
1636                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1637                 break;
1638         }
1639         default:
1640                 r = -EINVAL;
1641         }
1642 out:
1643         kfree(lapic);
1644         return r;
1645 }
1646
1647 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1648 {
1649         int ret;
1650
1651         if (addr > (unsigned int)(-3 * PAGE_SIZE))
1652                 return -1;
1653         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1654         return ret;
1655 }
1656
1657 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1658                                           u32 kvm_nr_mmu_pages)
1659 {
1660         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1661                 return -EINVAL;
1662
1663         down_write(&kvm->slots_lock);
1664         spin_lock(&kvm->mmu_lock);
1665
1666         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1667         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1668
1669         spin_unlock(&kvm->mmu_lock);
1670         up_write(&kvm->slots_lock);
1671         return 0;
1672 }
1673
1674 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1675 {
1676         return kvm->arch.n_alloc_mmu_pages;
1677 }
1678
1679 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1680 {
1681         int i;
1682         struct kvm_mem_alias *alias;
1683
1684         for (i = 0; i < kvm->arch.naliases; ++i) {
1685                 alias = &kvm->arch.aliases[i];
1686                 if (gfn >= alias->base_gfn
1687                     && gfn < alias->base_gfn + alias->npages)
1688                         return alias->target_gfn + gfn - alias->base_gfn;
1689         }
1690         return gfn;
1691 }
1692
1693 /*
1694  * Set a new alias region.  Aliases map a portion of physical memory into
1695  * another portion.  This is useful for memory windows, for example the PC
1696  * VGA region.
1697  */
1698 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1699                                          struct kvm_memory_alias *alias)
1700 {
1701         int r, n;
1702         struct kvm_mem_alias *p;
1703
1704         r = -EINVAL;
1705         /* General sanity checks */
1706         if (alias->memory_size & (PAGE_SIZE - 1))
1707                 goto out;
1708         if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1709                 goto out;
1710         if (alias->slot >= KVM_ALIAS_SLOTS)
1711                 goto out;
1712         if (alias->guest_phys_addr + alias->memory_size
1713             < alias->guest_phys_addr)
1714                 goto out;
1715         if (alias->target_phys_addr + alias->memory_size
1716             < alias->target_phys_addr)
1717                 goto out;
1718
1719         down_write(&kvm->slots_lock);
1720         spin_lock(&kvm->mmu_lock);
1721
1722         p = &kvm->arch.aliases[alias->slot];
1723         p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1724         p->npages = alias->memory_size >> PAGE_SHIFT;
1725         p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1726
1727         for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1728                 if (kvm->arch.aliases[n - 1].npages)
1729                         break;
1730         kvm->arch.naliases = n;
1731
1732         spin_unlock(&kvm->mmu_lock);
1733         kvm_mmu_zap_all(kvm);
1734
1735         up_write(&kvm->slots_lock);
1736
1737         return 0;
1738
1739 out:
1740         return r;
1741 }
1742
1743 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1744 {
1745         int r;
1746
1747         r = 0;
1748         switch (chip->chip_id) {
1749         case KVM_IRQCHIP_PIC_MASTER:
1750                 memcpy(&chip->chip.pic,
1751                         &pic_irqchip(kvm)->pics[0],
1752                         sizeof(struct kvm_pic_state));
1753                 break;
1754         case KVM_IRQCHIP_PIC_SLAVE:
1755                 memcpy(&chip->chip.pic,
1756                         &pic_irqchip(kvm)->pics[1],
1757                         sizeof(struct kvm_pic_state));
1758                 break;
1759         case KVM_IRQCHIP_IOAPIC:
1760                 memcpy(&chip->chip.ioapic,
1761                         ioapic_irqchip(kvm),
1762                         sizeof(struct kvm_ioapic_state));
1763                 break;
1764         default:
1765                 r = -EINVAL;
1766                 break;
1767         }
1768         return r;
1769 }
1770
1771 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1772 {
1773         int r;
1774
1775         r = 0;
1776         switch (chip->chip_id) {
1777         case KVM_IRQCHIP_PIC_MASTER:
1778                 memcpy(&pic_irqchip(kvm)->pics[0],
1779                         &chip->chip.pic,
1780                         sizeof(struct kvm_pic_state));
1781                 break;
1782         case KVM_IRQCHIP_PIC_SLAVE:
1783                 memcpy(&pic_irqchip(kvm)->pics[1],
1784                         &chip->chip.pic,
1785                         sizeof(struct kvm_pic_state));
1786                 break;
1787         case KVM_IRQCHIP_IOAPIC:
1788                 memcpy(ioapic_irqchip(kvm),
1789                         &chip->chip.ioapic,
1790                         sizeof(struct kvm_ioapic_state));
1791                 break;
1792         default:
1793                 r = -EINVAL;
1794                 break;
1795         }
1796         kvm_pic_update_irq(pic_irqchip(kvm));
1797         return r;
1798 }
1799
1800 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1801 {
1802         int r = 0;
1803
1804         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1805         return r;
1806 }
1807
1808 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1809 {
1810         int r = 0;
1811
1812         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1813         kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1814         return r;
1815 }
1816
1817 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1818                                  struct kvm_reinject_control *control)
1819 {
1820         if (!kvm->arch.vpit)
1821                 return -ENXIO;
1822         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1823         return 0;
1824 }
1825
1826 /*
1827  * Get (and clear) the dirty memory log for a memory slot.
1828  */
1829 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1830                                       struct kvm_dirty_log *log)
1831 {
1832         int r;
1833         int n;
1834         struct kvm_memory_slot *memslot;
1835         int is_dirty = 0;
1836
1837         down_write(&kvm->slots_lock);
1838
1839         r = kvm_get_dirty_log(kvm, log, &is_dirty);
1840         if (r)
1841                 goto out;
1842
1843         /* If nothing is dirty, don't bother messing with page tables. */
1844         if (is_dirty) {
1845                 spin_lock(&kvm->mmu_lock);
1846                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1847                 spin_unlock(&kvm->mmu_lock);
1848                 kvm_flush_remote_tlbs(kvm);
1849                 memslot = &kvm->memslots[log->slot];
1850                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1851                 memset(memslot->dirty_bitmap, 0, n);
1852         }
1853         r = 0;
1854 out:
1855         up_write(&kvm->slots_lock);
1856         return r;
1857 }
1858
1859 long kvm_arch_vm_ioctl(struct file *filp,
1860                        unsigned int ioctl, unsigned long arg)
1861 {
1862         struct kvm *kvm = filp->private_data;
1863         void __user *argp = (void __user *)arg;
1864         int r = -EINVAL;
1865         /*
1866          * This union makes it completely explicit to gcc-3.x
1867          * that these two variables' stack usage should be
1868          * combined, not added together.
1869          */
1870         union {
1871                 struct kvm_pit_state ps;
1872                 struct kvm_memory_alias alias;
1873         } u;
1874
1875         switch (ioctl) {
1876         case KVM_SET_TSS_ADDR:
1877                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1878                 if (r < 0)
1879                         goto out;
1880                 break;
1881         case KVM_SET_MEMORY_REGION: {
1882                 struct kvm_memory_region kvm_mem;
1883                 struct kvm_userspace_memory_region kvm_userspace_mem;
1884
1885                 r = -EFAULT;
1886                 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1887                         goto out;
1888                 kvm_userspace_mem.slot = kvm_mem.slot;
1889                 kvm_userspace_mem.flags = kvm_mem.flags;
1890                 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1891                 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1892                 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1893                 if (r)
1894                         goto out;
1895                 break;
1896         }
1897         case KVM_SET_NR_MMU_PAGES:
1898                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1899                 if (r)
1900                         goto out;
1901                 break;
1902         case KVM_GET_NR_MMU_PAGES:
1903                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1904                 break;
1905         case KVM_SET_MEMORY_ALIAS:
1906                 r = -EFAULT;
1907                 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1908                         goto out;
1909                 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1910                 if (r)
1911                         goto out;
1912                 break;
1913         case KVM_CREATE_IRQCHIP:
1914                 r = -ENOMEM;
1915                 kvm->arch.vpic = kvm_create_pic(kvm);
1916                 if (kvm->arch.vpic) {
1917                         r = kvm_ioapic_init(kvm);
1918                         if (r) {
1919                                 kfree(kvm->arch.vpic);
1920                                 kvm->arch.vpic = NULL;
1921                                 goto out;
1922                         }
1923                 } else
1924                         goto out;
1925                 r = kvm_setup_default_irq_routing(kvm);
1926                 if (r) {
1927                         kfree(kvm->arch.vpic);
1928                         kfree(kvm->arch.vioapic);
1929                         goto out;
1930                 }
1931                 break;
1932         case KVM_CREATE_PIT:
1933                 mutex_lock(&kvm->lock);
1934                 r = -EEXIST;
1935                 if (kvm->arch.vpit)
1936                         goto create_pit_unlock;
1937                 r = -ENOMEM;
1938                 kvm->arch.vpit = kvm_create_pit(kvm);
1939                 if (kvm->arch.vpit)
1940                         r = 0;
1941         create_pit_unlock:
1942                 mutex_unlock(&kvm->lock);
1943                 break;
1944         case KVM_IRQ_LINE_STATUS:
1945         case KVM_IRQ_LINE: {
1946                 struct kvm_irq_level irq_event;
1947
1948                 r = -EFAULT;
1949                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1950                         goto out;
1951                 if (irqchip_in_kernel(kvm)) {
1952                         __s32 status;
1953                         mutex_lock(&kvm->lock);
1954                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1955                                         irq_event.irq, irq_event.level);
1956                         mutex_unlock(&kvm->lock);
1957                         if (ioctl == KVM_IRQ_LINE_STATUS) {
1958                                 irq_event.status = status;
1959                                 if (copy_to_user(argp, &irq_event,
1960                                                         sizeof irq_event))
1961                                         goto out;
1962                         }
1963                         r = 0;
1964                 }
1965                 break;
1966         }
1967         case KVM_GET_IRQCHIP: {
1968                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1969                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1970
1971                 r = -ENOMEM;
1972                 if (!chip)
1973                         goto out;
1974                 r = -EFAULT;
1975                 if (copy_from_user(chip, argp, sizeof *chip))
1976                         goto get_irqchip_out;
1977                 r = -ENXIO;
1978                 if (!irqchip_in_kernel(kvm))
1979                         goto get_irqchip_out;
1980                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1981                 if (r)
1982                         goto get_irqchip_out;
1983                 r = -EFAULT;
1984                 if (copy_to_user(argp, chip, sizeof *chip))
1985                         goto get_irqchip_out;
1986                 r = 0;
1987         get_irqchip_out:
1988                 kfree(chip);
1989                 if (r)
1990                         goto out;
1991                 break;
1992         }
1993         case KVM_SET_IRQCHIP: {
1994                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1995                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1996
1997                 r = -ENOMEM;
1998                 if (!chip)
1999                         goto out;
2000                 r = -EFAULT;
2001                 if (copy_from_user(chip, argp, sizeof *chip))
2002                         goto set_irqchip_out;
2003                 r = -ENXIO;
2004                 if (!irqchip_in_kernel(kvm))
2005                         goto set_irqchip_out;
2006                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2007                 if (r)
2008                         goto set_irqchip_out;
2009                 r = 0;
2010         set_irqchip_out:
2011                 kfree(chip);
2012                 if (r)
2013                         goto out;
2014                 break;
2015         }
2016         case KVM_GET_PIT: {
2017                 r = -EFAULT;
2018                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2019                         goto out;
2020                 r = -ENXIO;
2021                 if (!kvm->arch.vpit)
2022                         goto out;
2023                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2024                 if (r)
2025                         goto out;
2026                 r = -EFAULT;
2027                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2028                         goto out;
2029                 r = 0;
2030                 break;
2031         }
2032         case KVM_SET_PIT: {
2033                 r = -EFAULT;
2034                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2035                         goto out;
2036                 r = -ENXIO;
2037                 if (!kvm->arch.vpit)
2038                         goto out;
2039                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2040                 if (r)
2041                         goto out;
2042                 r = 0;
2043                 break;
2044         }
2045         case KVM_REINJECT_CONTROL: {
2046                 struct kvm_reinject_control control;
2047                 r =  -EFAULT;
2048                 if (copy_from_user(&control, argp, sizeof(control)))
2049                         goto out;
2050                 r = kvm_vm_ioctl_reinject(kvm, &control);
2051                 if (r)
2052                         goto out;
2053                 r = 0;
2054                 break;
2055         }
2056         default:
2057                 ;
2058         }
2059 out:
2060         return r;
2061 }
2062
2063 static void kvm_init_msr_list(void)
2064 {
2065         u32 dummy[2];
2066         unsigned i, j;
2067
2068         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2069                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2070                         continue;
2071                 if (j < i)
2072                         msrs_to_save[j] = msrs_to_save[i];
2073                 j++;
2074         }
2075         num_msrs_to_save = j;
2076 }
2077
2078 /*
2079  * Only apic need an MMIO device hook, so shortcut now..
2080  */
2081 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2082                                                 gpa_t addr, int len,
2083                                                 int is_write)
2084 {
2085         struct kvm_io_device *dev;
2086
2087         if (vcpu->arch.apic) {
2088                 dev = &vcpu->arch.apic->dev;
2089                 if (dev->in_range(dev, addr, len, is_write))
2090                         return dev;
2091         }
2092         return NULL;
2093 }
2094
2095
2096 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2097                                                 gpa_t addr, int len,
2098                                                 int is_write)
2099 {
2100         struct kvm_io_device *dev;
2101
2102         dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2103         if (dev == NULL)
2104                 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2105                                           is_write);
2106         return dev;
2107 }
2108
2109 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2110                                struct kvm_vcpu *vcpu)
2111 {
2112         void *data = val;
2113         int r = X86EMUL_CONTINUE;
2114
2115         while (bytes) {
2116                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2117                 unsigned offset = addr & (PAGE_SIZE-1);
2118                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2119                 int ret;
2120
2121                 if (gpa == UNMAPPED_GVA) {
2122                         r = X86EMUL_PROPAGATE_FAULT;
2123                         goto out;
2124                 }
2125                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2126                 if (ret < 0) {
2127                         r = X86EMUL_UNHANDLEABLE;
2128                         goto out;
2129                 }
2130
2131                 bytes -= toread;
2132                 data += toread;
2133                 addr += toread;
2134         }
2135 out:
2136         return r;
2137 }
2138
2139 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2140                                 struct kvm_vcpu *vcpu)
2141 {
2142         void *data = val;
2143         int r = X86EMUL_CONTINUE;
2144
2145         while (bytes) {
2146                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2147                 unsigned offset = addr & (PAGE_SIZE-1);
2148                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2149                 int ret;
2150
2151                 if (gpa == UNMAPPED_GVA) {
2152                         r = X86EMUL_PROPAGATE_FAULT;
2153                         goto out;
2154                 }
2155                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2156                 if (ret < 0) {
2157                         r = X86EMUL_UNHANDLEABLE;
2158                         goto out;
2159                 }
2160
2161                 bytes -= towrite;
2162                 data += towrite;
2163                 addr += towrite;
2164         }
2165 out:
2166         return r;
2167 }
2168
2169
2170 static int emulator_read_emulated(unsigned long addr,
2171                                   void *val,
2172                                   unsigned int bytes,
2173                                   struct kvm_vcpu *vcpu)
2174 {
2175         struct kvm_io_device *mmio_dev;
2176         gpa_t                 gpa;
2177
2178         if (vcpu->mmio_read_completed) {
2179                 memcpy(val, vcpu->mmio_data, bytes);
2180                 vcpu->mmio_read_completed = 0;
2181                 return X86EMUL_CONTINUE;
2182         }
2183
2184         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2185
2186         /* For APIC access vmexit */
2187         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2188                 goto mmio;
2189
2190         if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2191                                 == X86EMUL_CONTINUE)
2192                 return X86EMUL_CONTINUE;
2193         if (gpa == UNMAPPED_GVA)
2194                 return X86EMUL_PROPAGATE_FAULT;
2195
2196 mmio:
2197         /*
2198          * Is this MMIO handled locally?
2199          */
2200         mutex_lock(&vcpu->kvm->lock);
2201         mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2202         if (mmio_dev) {
2203                 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2204                 mutex_unlock(&vcpu->kvm->lock);
2205                 return X86EMUL_CONTINUE;
2206         }
2207         mutex_unlock(&vcpu->kvm->lock);
2208
2209         vcpu->mmio_needed = 1;
2210         vcpu->mmio_phys_addr = gpa;
2211         vcpu->mmio_size = bytes;
2212         vcpu->mmio_is_write = 0;
2213
2214         return X86EMUL_UNHANDLEABLE;
2215 }
2216
2217 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2218                           const void *val, int bytes)
2219 {
2220         int ret;
2221
2222         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2223         if (ret < 0)
2224                 return 0;
2225         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2226         return 1;
2227 }
2228
2229 static int emulator_write_emulated_onepage(unsigned long addr,
2230                                            const void *val,
2231                                            unsigned int bytes,
2232                                            struct kvm_vcpu *vcpu)
2233 {
2234         struct kvm_io_device *mmio_dev;
2235         gpa_t                 gpa;
2236
2237         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2238
2239         if (gpa == UNMAPPED_GVA) {
2240                 kvm_inject_page_fault(vcpu, addr, 2);
2241                 return X86EMUL_PROPAGATE_FAULT;
2242         }
2243
2244         /* For APIC access vmexit */
2245         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2246                 goto mmio;
2247
2248         if (emulator_write_phys(vcpu, gpa, val, bytes))
2249                 return X86EMUL_CONTINUE;
2250
2251 mmio:
2252         /*
2253          * Is this MMIO handled locally?
2254          */
2255         mutex_lock(&vcpu->kvm->lock);
2256         mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2257         if (mmio_dev) {
2258                 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2259                 mutex_unlock(&vcpu->kvm->lock);
2260                 return X86EMUL_CONTINUE;
2261         }
2262         mutex_unlock(&vcpu->kvm->lock);
2263
2264         vcpu->mmio_needed = 1;
2265         vcpu->mmio_phys_addr = gpa;
2266         vcpu->mmio_size = bytes;
2267         vcpu->mmio_is_write = 1;
2268         memcpy(vcpu->mmio_data, val, bytes);
2269
2270         return X86EMUL_CONTINUE;
2271 }
2272
2273 int emulator_write_emulated(unsigned long addr,
2274                                    const void *val,
2275                                    unsigned int bytes,
2276                                    struct kvm_vcpu *vcpu)
2277 {
2278         /* Crossing a page boundary? */
2279         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2280                 int rc, now;
2281
2282                 now = -addr & ~PAGE_MASK;
2283                 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2284                 if (rc != X86EMUL_CONTINUE)
2285                         return rc;
2286                 addr += now;
2287                 val += now;
2288                 bytes -= now;
2289         }
2290         return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2291 }
2292 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2293
2294 static int emulator_cmpxchg_emulated(unsigned long addr,
2295                                      const void *old,
2296                                      const void *new,
2297                                      unsigned int bytes,
2298                                      struct kvm_vcpu *vcpu)
2299 {
2300         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2301 #ifndef CONFIG_X86_64
2302         /* guests cmpxchg8b have to be emulated atomically */
2303         if (bytes == 8) {
2304                 gpa_t gpa;
2305                 struct page *page;
2306                 char *kaddr;
2307                 u64 val;
2308
2309                 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2310
2311                 if (gpa == UNMAPPED_GVA ||
2312                    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2313                         goto emul_write;
2314
2315                 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2316                         goto emul_write;
2317
2318                 val = *(u64 *)new;
2319
2320                 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2321
2322                 kaddr = kmap_atomic(page, KM_USER0);
2323                 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2324                 kunmap_atomic(kaddr, KM_USER0);
2325                 kvm_release_page_dirty(page);
2326         }
2327 emul_write:
2328 #endif
2329
2330         return emulator_write_emulated(addr, new, bytes, vcpu);
2331 }
2332
2333 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2334 {
2335         return kvm_x86_ops->get_segment_base(vcpu, seg);
2336 }
2337
2338 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2339 {
2340         kvm_mmu_invlpg(vcpu, address);
2341         return X86EMUL_CONTINUE;
2342 }
2343
2344 int emulate_clts(struct kvm_vcpu *vcpu)
2345 {
2346         KVMTRACE_0D(CLTS, vcpu, handler);
2347         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2348         return X86EMUL_CONTINUE;
2349 }
2350
2351 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2352 {
2353         struct kvm_vcpu *vcpu = ctxt->vcpu;
2354
2355         switch (dr) {
2356         case 0 ... 3:
2357                 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2358                 return X86EMUL_CONTINUE;
2359         default:
2360                 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2361                 return X86EMUL_UNHANDLEABLE;
2362         }
2363 }
2364
2365 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2366 {
2367         unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2368         int exception;
2369
2370         kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2371         if (exception) {
2372                 /* FIXME: better handling */
2373                 return X86EMUL_UNHANDLEABLE;
2374         }
2375         return X86EMUL_CONTINUE;
2376 }
2377
2378 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2379 {
2380         u8 opcodes[4];
2381         unsigned long rip = kvm_rip_read(vcpu);
2382         unsigned long rip_linear;
2383
2384         if (!printk_ratelimit())
2385                 return;
2386
2387         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2388
2389         kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2390
2391         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2392                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2393 }
2394 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2395
2396 static struct x86_emulate_ops emulate_ops = {
2397         .read_std            = kvm_read_guest_virt,
2398         .read_emulated       = emulator_read_emulated,
2399         .write_emulated      = emulator_write_emulated,
2400         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
2401 };
2402
2403 static void cache_all_regs(struct kvm_vcpu *vcpu)
2404 {
2405         kvm_register_read(vcpu, VCPU_REGS_RAX);
2406         kvm_register_read(vcpu, VCPU_REGS_RSP);
2407         kvm_register_read(vcpu, VCPU_REGS_RIP);
2408         vcpu->arch.regs_dirty = ~0;
2409 }
2410
2411 int emulate_instruction(struct kvm_vcpu *vcpu,
2412                         struct kvm_run *run,
2413                         unsigned long cr2,
2414                         u16 error_code,
2415                         int emulation_type)
2416 {
2417         int r, shadow_mask;
2418         struct decode_cache *c;
2419
2420         kvm_clear_exception_queue(vcpu);
2421         vcpu->arch.mmio_fault_cr2 = cr2;
2422         /*
2423          * TODO: fix x86_emulate.c to use guest_read/write_register
2424          * instead of direct ->regs accesses, can save hundred cycles
2425          * on Intel for instructions that don't read/change RSP, for
2426          * for example.
2427          */
2428         cache_all_regs(vcpu);
2429
2430         vcpu->mmio_is_write = 0;
2431         vcpu->arch.pio.string = 0;
2432
2433         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2434                 int cs_db, cs_l;
2435                 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2436
2437                 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2438                 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2439                 vcpu->arch.emulate_ctxt.mode =
2440                         (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2441                         ? X86EMUL_MODE_REAL : cs_l
2442                         ? X86EMUL_MODE_PROT64 : cs_db
2443                         ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2444
2445                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2446
2447                 /* Reject the instructions other than VMCALL/VMMCALL when
2448                  * try to emulate invalid opcode */
2449                 c = &vcpu->arch.emulate_ctxt.decode;
2450                 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2451                     (!(c->twobyte && c->b == 0x01 &&
2452                       (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2453                        c->modrm_mod == 3 && c->modrm_rm == 1)))
2454                         return EMULATE_FAIL;
2455
2456                 ++vcpu->stat.insn_emulation;
2457                 if (r)  {
2458                         ++vcpu->stat.insn_emulation_fail;
2459                         if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2460                                 return EMULATE_DONE;
2461                         return EMULATE_FAIL;
2462                 }
2463         }
2464
2465         if (emulation_type & EMULTYPE_SKIP) {
2466                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2467                 return EMULATE_DONE;
2468         }
2469
2470         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2471         shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2472
2473         if (r == 0)
2474                 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2475
2476         if (vcpu->arch.pio.string)
2477                 return EMULATE_DO_MMIO;
2478
2479         if ((r || vcpu->mmio_is_write) && run) {
2480                 run->exit_reason = KVM_EXIT_MMIO;
2481                 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2482                 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2483                 run->mmio.len = vcpu->mmio_size;
2484                 run->mmio.is_write = vcpu->mmio_is_write;
2485         }
2486
2487         if (r) {
2488                 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2489                         return EMULATE_DONE;
2490                 if (!vcpu->mmio_needed) {
2491                         kvm_report_emulation_failure(vcpu, "mmio");
2492                         return EMULATE_FAIL;
2493                 }
2494                 return EMULATE_DO_MMIO;
2495         }
2496
2497         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2498
2499         if (vcpu->mmio_is_write) {
2500                 vcpu->mmio_needed = 0;
2501                 return EMULATE_DO_MMIO;
2502         }
2503
2504         return EMULATE_DONE;
2505 }
2506 EXPORT_SYMBOL_GPL(emulate_instruction);
2507
2508 static int pio_copy_data(struct kvm_vcpu *vcpu)
2509 {
2510         void *p = vcpu->arch.pio_data;
2511         gva_t q = vcpu->arch.pio.guest_gva;
2512         unsigned bytes;
2513         int ret;
2514
2515         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2516         if (vcpu->arch.pio.in)
2517                 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2518         else
2519                 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2520         return ret;
2521 }
2522
2523 int complete_pio(struct kvm_vcpu *vcpu)
2524 {
2525         struct kvm_pio_request *io = &vcpu->arch.pio;
2526         long delta;
2527         int r;
2528         unsigned long val;
2529
2530         if (!io->string) {
2531                 if (io->in) {
2532                         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2533                         memcpy(&val, vcpu->arch.pio_data, io->size);
2534                         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2535                 }
2536         } else {
2537                 if (io->in) {
2538                         r = pio_copy_data(vcpu);
2539                         if (r)
2540                                 return r;
2541                 }
2542
2543                 delta = 1;
2544                 if (io->rep) {
2545                         delta *= io->cur_count;
2546                         /*
2547                          * The size of the register should really depend on
2548                          * current address size.
2549                          */
2550                         val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2551                         val -= delta;
2552                         kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2553                 }
2554                 if (io->down)
2555                         delta = -delta;
2556                 delta *= io->size;
2557                 if (io->in) {
2558                         val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2559                         val += delta;
2560                         kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2561                 } else {
2562                         val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2563                         val += delta;
2564                         kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2565                 }
2566         }
2567
2568         io->count -= io->cur_count;
2569         io->cur_count = 0;
2570
2571         return 0;
2572 }
2573
2574 static void kernel_pio(struct kvm_io_device *pio_dev,
2575                        struct kvm_vcpu *vcpu,
2576                        void *pd)
2577 {
2578         /* TODO: String I/O for in kernel device */
2579
2580         mutex_lock(&vcpu->kvm->lock);
2581         if (vcpu->arch.pio.in)
2582                 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2583                                   vcpu->arch.pio.size,
2584                                   pd);
2585         else
2586                 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2587                                    vcpu->arch.pio.size,
2588                                    pd);
2589         mutex_unlock(&vcpu->kvm->lock);
2590 }
2591
2592 static void pio_string_write(struct kvm_io_device *pio_dev,
2593                              struct kvm_vcpu *vcpu)
2594 {
2595         struct kvm_pio_request *io = &vcpu->arch.pio;
2596         void *pd = vcpu->arch.pio_data;
2597         int i;
2598
2599         mutex_lock(&vcpu->kvm->lock);
2600         for (i = 0; i < io->cur_count; i++) {
2601                 kvm_iodevice_write(pio_dev, io->port,
2602                                    io->size,
2603                                    pd);
2604                 pd += io->size;
2605         }
2606         mutex_unlock(&vcpu->kvm->lock);
2607 }
2608
2609 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2610                                                gpa_t addr, int len,
2611                                                int is_write)
2612 {
2613         return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2614 }
2615
2616 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2617                   int size, unsigned port)
2618 {
2619         struct kvm_io_device *pio_dev;
2620         unsigned long val;
2621
2622         vcpu->run->exit_reason = KVM_EXIT_IO;
2623         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2624         vcpu->run->io.size = vcpu->arch.pio.size = size;
2625         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2626         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2627         vcpu->run->io.port = vcpu->arch.pio.port = port;
2628         vcpu->arch.pio.in = in;
2629         vcpu->arch.pio.string = 0;
2630         vcpu->arch.pio.down = 0;
2631         vcpu->arch.pio.rep = 0;
2632
2633         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2634                 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2635                             handler);
2636         else
2637                 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2638                             handler);
2639
2640         val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2641         memcpy(vcpu->arch.pio_data, &val, 4);
2642
2643         pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2644         if (pio_dev) {
2645                 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2646                 complete_pio(vcpu);
2647                 return 1;
2648         }
2649         return 0;
2650 }
2651 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2652
2653 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2654                   int size, unsigned long count, int down,
2655                   gva_t address, int rep, unsigned port)
2656 {
2657         unsigned now, in_page;
2658         int ret = 0;
2659         struct kvm_io_device *pio_dev;
2660
2661         vcpu->run->exit_reason = KVM_EXIT_IO;
2662         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2663         vcpu->run->io.size = vcpu->arch.pio.size = size;
2664         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2665         vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2666         vcpu->run->io.port = vcpu->arch.pio.port = port;
2667         vcpu->arch.pio.in = in;
2668         vcpu->arch.pio.string = 1;
2669         vcpu->arch.pio.down = down;
2670         vcpu->arch.pio.rep = rep;
2671
2672         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2673                 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2674                             handler);
2675         else
2676                 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2677                             handler);
2678
2679         if (!count) {
2680                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2681                 return 1;
2682         }
2683
2684         if (!down)
2685                 in_page = PAGE_SIZE - offset_in_page(address);
2686         else
2687                 in_page = offset_in_page(address) + size;
2688         now = min(count, (unsigned long)in_page / size);
2689         if (!now)
2690                 now = 1;
2691         if (down) {
2692                 /*
2693                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
2694                  */
2695                 pr_unimpl(vcpu, "guest string pio down\n");
2696                 kvm_inject_gp(vcpu, 0);
2697                 return 1;
2698         }
2699         vcpu->run->io.count = now;
2700         vcpu->arch.pio.cur_count = now;
2701
2702         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2703                 kvm_x86_ops->skip_emulated_instruction(vcpu);
2704
2705         vcpu->arch.pio.guest_gva = address;
2706
2707         pio_dev = vcpu_find_pio_dev(vcpu, port,
2708                                     vcpu->arch.pio.cur_count,
2709                                     !vcpu->arch.pio.in);
2710         if (!vcpu->arch.pio.in) {
2711                 /* string PIO write */
2712                 ret = pio_copy_data(vcpu);
2713                 if (ret == X86EMUL_PROPAGATE_FAULT) {
2714                         kvm_inject_gp(vcpu, 0);
2715                         return 1;
2716                 }
2717                 if (ret == 0 && pio_dev) {
2718                         pio_string_write(pio_dev, vcpu);
2719                         complete_pio(vcpu);
2720                         if (vcpu->arch.pio.count == 0)
2721                                 ret = 1;
2722                 }
2723         } else if (pio_dev)
2724                 pr_unimpl(vcpu, "no string pio read support yet, "
2725                        "port %x size %d count %ld\n",
2726                         port, size, count);
2727
2728         return ret;
2729 }
2730 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2731
2732 static void bounce_off(void *info)
2733 {
2734         /* nothing */
2735 }
2736
2737 static unsigned int  ref_freq;
2738 static unsigned long tsc_khz_ref;
2739
2740 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2741                                      void *data)
2742 {
2743         struct cpufreq_freqs *freq = data;
2744         struct kvm *kvm;
2745         struct kvm_vcpu *vcpu;
2746         int i, send_ipi = 0;
2747
2748         if (!ref_freq)
2749                 ref_freq = freq->old;
2750
2751         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2752                 return 0;
2753         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2754                 return 0;
2755         per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2756
2757         spin_lock(&kvm_lock);
2758         list_for_each_entry(kvm, &vm_list, vm_list) {
2759                 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2760                         vcpu = kvm->vcpus[i];
2761                         if (!vcpu)
2762                                 continue;
2763                         if (vcpu->cpu != freq->cpu)
2764                                 continue;
2765                         if (!kvm_request_guest_time_update(vcpu))
2766                                 continue;
2767                         if (vcpu->cpu != smp_processor_id())
2768                                 send_ipi++;
2769                 }
2770         }
2771         spin_unlock(&kvm_lock);
2772
2773         if (freq->old < freq->new && send_ipi) {
2774                 /*
2775                  * We upscale the frequency.  Must make the guest
2776                  * doesn't see old kvmclock values while running with
2777                  * the new frequency, otherwise we risk the guest sees
2778                  * time go backwards.
2779                  *
2780                  * In case we update the frequency for another cpu
2781                  * (which might be in guest context) send an interrupt
2782                  * to kick the cpu out of guest context.  Next time
2783                  * guest context is entered kvmclock will be updated,
2784                  * so the guest will not see stale values.
2785                  */
2786                 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2787         }
2788         return 0;
2789 }
2790
2791 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2792         .notifier_call  = kvmclock_cpufreq_notifier
2793 };
2794
2795 int kvm_arch_init(void *opaque)
2796 {
2797         int r, cpu;
2798         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2799
2800         if (kvm_x86_ops) {
2801                 printk(KERN_ERR "kvm: already loaded the other module\n");
2802                 r = -EEXIST;
2803                 goto out;
2804         }
2805
2806         if (!ops->cpu_has_kvm_support()) {
2807                 printk(KERN_ERR "kvm: no hardware support\n");
2808                 r = -EOPNOTSUPP;
2809                 goto out;
2810         }
2811         if (ops->disabled_by_bios()) {
2812                 printk(KERN_ERR "kvm: disabled by bios\n");
2813                 r = -EOPNOTSUPP;
2814                 goto out;
2815         }
2816
2817         r = kvm_mmu_module_init();
2818         if (r)
2819                 goto out;
2820
2821         kvm_init_msr_list();
2822
2823         kvm_x86_ops = ops;
2824         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2825         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2826         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2827                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
2828
2829         for_each_possible_cpu(cpu)
2830                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2831         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2832                 tsc_khz_ref = tsc_khz;
2833                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2834                                           CPUFREQ_TRANSITION_NOTIFIER);
2835         }
2836
2837         return 0;
2838
2839 out:
2840         return r;
2841 }
2842
2843 void kvm_arch_exit(void)
2844 {
2845         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2846                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2847                                             CPUFREQ_TRANSITION_NOTIFIER);
2848         kvm_x86_ops = NULL;
2849         kvm_mmu_module_exit();
2850 }
2851
2852 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2853 {
2854         ++vcpu->stat.halt_exits;
2855         KVMTRACE_0D(HLT, vcpu, handler);
2856         if (irqchip_in_kernel(vcpu->kvm)) {
2857                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2858                 return 1;
2859         } else {
2860                 vcpu->run->exit_reason = KVM_EXIT_HLT;
2861                 return 0;
2862         }
2863 }
2864 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2865
2866 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2867                            unsigned long a1)
2868 {
2869         if (is_long_mode(vcpu))
2870                 return a0;
2871         else
2872                 return a0 | ((gpa_t)a1 << 32);
2873 }
2874
2875 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2876 {
2877         unsigned long nr, a0, a1, a2, a3, ret;
2878         int r = 1;
2879
2880         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2881         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2882         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2883         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2884         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2885
2886         KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2887
2888         if (!is_long_mode(vcpu)) {
2889                 nr &= 0xFFFFFFFF;
2890                 a0 &= 0xFFFFFFFF;
2891                 a1 &= 0xFFFFFFFF;
2892                 a2 &= 0xFFFFFFFF;
2893                 a3 &= 0xFFFFFFFF;
2894         }
2895
2896         switch (nr) {
2897         case KVM_HC_VAPIC_POLL_IRQ:
2898                 ret = 0;
2899                 break;
2900         case KVM_HC_MMU_OP:
2901                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2902                 break;
2903         default:
2904                 ret = -KVM_ENOSYS;
2905                 break;
2906         }
2907         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2908         ++vcpu->stat.hypercalls;
2909         return r;
2910 }
2911 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2912
2913 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2914 {
2915         char instruction[3];
2916         int ret = 0;
2917         unsigned long rip = kvm_rip_read(vcpu);
2918
2919
2920         /*
2921          * Blow out the MMU to ensure that no other VCPU has an active mapping
2922          * to ensure that the updated hypercall appears atomically across all
2923          * VCPUs.
2924          */
2925         kvm_mmu_zap_all(vcpu->kvm);
2926
2927         kvm_x86_ops->patch_hypercall(vcpu, instruction);
2928         if (emulator_write_emulated(rip, instruction, 3, vcpu)
2929             != X86EMUL_CONTINUE)
2930                 ret = -EFAULT;
2931
2932         return ret;
2933 }
2934
2935 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2936 {
2937         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2938 }
2939
2940 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2941 {
2942         struct descriptor_table dt = { limit, base };
2943
2944         kvm_x86_ops->set_gdt(vcpu, &dt);
2945 }
2946
2947 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2948 {
2949         struct descriptor_table dt = { limit, base };
2950
2951         kvm_x86_ops->set_idt(vcpu, &dt);
2952 }
2953
2954 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2955                    unsigned long *rflags)
2956 {
2957         kvm_lmsw(vcpu, msw);
2958         *rflags = kvm_x86_ops->get_rflags(vcpu);
2959 }
2960
2961 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2962 {
2963         unsigned long value;
2964
2965         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2966         switch (cr) {
2967         case 0:
2968                 value = vcpu->arch.cr0;
2969                 break;
2970         case 2:
2971                 value = vcpu->arch.cr2;
2972                 break;
2973         case 3:
2974                 value = vcpu->arch.cr3;
2975                 break;
2976         case 4:
2977                 value = vcpu->arch.cr4;
2978                 break;
2979         case 8:
2980                 value = kvm_get_cr8(vcpu);
2981                 break;
2982         default:
2983                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2984                 return 0;
2985         }
2986         KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2987                     (u32)((u64)value >> 32), handler);
2988
2989         return value;
2990 }
2991
2992 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2993                      unsigned long *rflags)
2994 {
2995         KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2996                     (u32)((u64)val >> 32), handler);
2997
2998         switch (cr) {
2999         case 0:
3000                 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3001                 *rflags = kvm_x86_ops->get_rflags(vcpu);
3002                 break;
3003         case 2:
3004                 vcpu->arch.cr2 = val;
3005                 break;
3006         case 3:
3007                 kvm_set_cr3(vcpu, val);
3008                 break;
3009         case 4:
3010                 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3011                 break;
3012         case 8:
3013                 kvm_set_cr8(vcpu, val & 0xfUL);
3014                 break;
3015         default:
3016                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3017         }
3018 }
3019
3020 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3021 {
3022         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3023         int j, nent = vcpu->arch.cpuid_nent;
3024
3025         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3026         /* when no next entry is found, the current entry[i] is reselected */
3027         for (j = i + 1; ; j = (j + 1) % nent) {
3028                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3029                 if (ej->function == e->function) {
3030                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3031                         return j;
3032                 }
3033         }
3034         return 0; /* silence gcc, even though control never reaches here */
3035 }
3036
3037 /* find an entry with matching function, matching index (if needed), and that
3038  * should be read next (if it's stateful) */
3039 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3040         u32 function, u32 index)
3041 {
3042         if (e->function != function)
3043                 return 0;
3044         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3045                 return 0;
3046         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3047             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3048                 return 0;
3049         return 1;
3050 }
3051
3052 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3053                                               u32 function, u32 index)
3054 {
3055         int i;
3056         struct kvm_cpuid_entry2 *best = NULL;
3057
3058         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3059                 struct kvm_cpuid_entry2 *e;
3060
3061                 e = &vcpu->arch.cpuid_entries[i];
3062                 if (is_matching_cpuid_entry(e, function, index)) {
3063                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3064                                 move_to_next_stateful_cpuid_entry(vcpu, i);
3065                         best = e;
3066                         break;
3067                 }
3068                 /*
3069                  * Both basic or both extended?
3070                  */
3071                 if (((e->function ^ function) & 0x80000000) == 0)
3072                         if (!best || e->function > best->function)
3073                                 best = e;
3074         }
3075         return best;
3076 }
3077
3078 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3079 {
3080         struct kvm_cpuid_entry2 *best;
3081
3082         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3083         if (best)
3084                 return best->eax & 0xff;
3085         return 36;
3086 }
3087
3088 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3089 {
3090         u32 function, index;
3091         struct kvm_cpuid_entry2 *best;
3092
3093         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3094         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3095         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3096         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3097         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3098         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3099         best = kvm_find_cpuid_entry(vcpu, function, index);
3100         if (best) {
3101                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3102                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3103                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3104                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3105         }
3106         kvm_x86_ops->skip_emulated_instruction(vcpu);
3107         KVMTRACE_5D(CPUID, vcpu, function,
3108                     (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3109                     (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3110                     (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3111                     (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3112 }
3113 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3114
3115 /*
3116  * Check if userspace requested an interrupt window, and that the
3117  * interrupt window is open.
3118  *
3119  * No need to exit to userspace if we already have an interrupt queued.
3120  */
3121 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3122                                           struct kvm_run *kvm_run)
3123 {
3124         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3125                 kvm_run->request_interrupt_window &&
3126                 kvm_arch_interrupt_allowed(vcpu));
3127 }
3128
3129 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3130                               struct kvm_run *kvm_run)
3131 {
3132         kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3133         kvm_run->cr8 = kvm_get_cr8(vcpu);
3134         kvm_run->apic_base = kvm_get_apic_base(vcpu);
3135         if (irqchip_in_kernel(vcpu->kvm))
3136                 kvm_run->ready_for_interrupt_injection = 1;
3137         else
3138                 kvm_run->ready_for_interrupt_injection =
3139                         kvm_arch_interrupt_allowed(vcpu) &&
3140                         !kvm_cpu_has_interrupt(vcpu) &&
3141                         !kvm_event_needs_reinjection(vcpu);
3142 }
3143
3144 static void vapic_enter(struct kvm_vcpu *vcpu)
3145 {
3146         struct kvm_lapic *apic = vcpu->arch.apic;
3147         struct page *page;
3148
3149         if (!apic || !apic->vapic_addr)
3150                 return;
3151
3152         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3153
3154         vcpu->arch.apic->vapic_page = page;
3155 }
3156
3157 static void vapic_exit(struct kvm_vcpu *vcpu)
3158 {
3159         struct kvm_lapic *apic = vcpu->arch.apic;
3160
3161         if (!apic || !apic->vapic_addr)
3162                 return;
3163
3164         down_read(&vcpu->kvm->slots_lock);
3165         kvm_release_page_dirty(apic->vapic_page);
3166         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3167         up_read(&vcpu->kvm->slots_lock);
3168 }
3169
3170 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3171 {
3172         int max_irr, tpr;
3173
3174         if (!kvm_x86_ops->update_cr8_intercept)
3175                 return;
3176
3177         if (!vcpu->arch.apic->vapic_addr)
3178                 max_irr = kvm_lapic_find_highest_irr(vcpu);
3179         else
3180                 max_irr = -1;
3181
3182         if (max_irr != -1)
3183                 max_irr >>= 4;
3184
3185         tpr = kvm_lapic_get_cr8(vcpu);
3186
3187         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3188 }
3189
3190 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3191 {
3192         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3193                 kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
3194
3195         /* try to reinject previous events if any */
3196         if (vcpu->arch.nmi_injected) {
3197                 kvm_x86_ops->set_nmi(vcpu);
3198                 return;
3199         }
3200
3201         if (vcpu->arch.interrupt.pending) {
3202                 kvm_x86_ops->set_irq(vcpu);
3203                 return;
3204         }
3205
3206         /* try to inject new event if pending */
3207         if (vcpu->arch.nmi_pending) {
3208                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3209                         vcpu->arch.nmi_pending = false;
3210                         vcpu->arch.nmi_injected = true;
3211                         kvm_x86_ops->set_nmi(vcpu);
3212                 }
3213         } else if (kvm_cpu_has_interrupt(vcpu)) {
3214                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3215                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3216                                             false);
3217                         kvm_x86_ops->set_irq(vcpu);
3218                 }
3219         }
3220 }
3221
3222 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3223 {
3224         int r;
3225         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3226                 kvm_run->request_interrupt_window;
3227
3228         if (vcpu->requests)
3229                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3230                         kvm_mmu_unload(vcpu);
3231
3232         r = kvm_mmu_reload(vcpu);
3233         if (unlikely(r))
3234                 goto out;
3235
3236         if (vcpu->requests) {
3237                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3238                         __kvm_migrate_timers(vcpu);
3239                 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3240                         kvm_write_guest_time(vcpu);
3241                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3242                         kvm_mmu_sync_roots(vcpu);
3243                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3244                         kvm_x86_ops->tlb_flush(vcpu);
3245                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3246                                        &vcpu->requests)) {
3247                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3248                         r = 0;
3249                         goto out;
3250                 }
3251                 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3252                         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3253                         r = 0;
3254                         goto out;
3255                 }
3256         }
3257
3258         preempt_disable();
3259
3260         kvm_x86_ops->prepare_guest_switch(vcpu);
3261         kvm_load_guest_fpu(vcpu);
3262
3263         local_irq_disable();
3264
3265         clear_bit(KVM_REQ_KICK, &vcpu->requests);
3266         smp_mb__after_clear_bit();
3267
3268         if (vcpu->requests || need_resched() || signal_pending(current)) {
3269                 local_irq_enable();
3270                 preempt_enable();
3271                 r = 1;
3272                 goto out;
3273         }
3274
3275         if (vcpu->arch.exception.pending)
3276                 __queue_exception(vcpu);
3277         else
3278                 inject_pending_irq(vcpu, kvm_run);
3279
3280         /* enable NMI/IRQ window open exits if needed */
3281         if (vcpu->arch.nmi_pending)
3282                 kvm_x86_ops->enable_nmi_window(vcpu);
3283         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3284                 kvm_x86_ops->enable_irq_window(vcpu);
3285
3286         if (kvm_lapic_enabled(vcpu)) {
3287                 update_cr8_intercept(vcpu);
3288                 kvm_lapic_sync_to_vapic(vcpu);
3289         }
3290
3291         up_read(&vcpu->kvm->slots_lock);
3292
3293         kvm_guest_enter();
3294
3295         get_debugreg(vcpu->arch.host_dr6, 6);
3296         get_debugreg(vcpu->arch.host_dr7, 7);
3297         if (unlikely(vcpu->arch.switch_db_regs)) {
3298                 get_debugreg(vcpu->arch.host_db[0], 0);
3299                 get_debugreg(vcpu->arch.host_db[1], 1);
3300                 get_debugreg(vcpu->arch.host_db[2], 2);
3301                 get_debugreg(vcpu->arch.host_db[3], 3);
3302
3303                 set_debugreg(0, 7);
3304                 set_debugreg(vcpu->arch.eff_db[0], 0);
3305                 set_debugreg(vcpu->arch.eff_db[1], 1);
3306                 set_debugreg(vcpu->arch.eff_db[2], 2);
3307                 set_debugreg(vcpu->arch.eff_db[3], 3);
3308         }
3309
3310         KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3311         kvm_x86_ops->run(vcpu, kvm_run);
3312
3313         if (unlikely(vcpu->arch.switch_db_regs)) {
3314                 set_debugreg(0, 7);
3315                 set_debugreg(vcpu->arch.host_db[0], 0);
3316                 set_debugreg(vcpu->arch.host_db[1], 1);
3317                 set_debugreg(vcpu->arch.host_db[2], 2);
3318                 set_debugreg(vcpu->arch.host_db[3], 3);
3319         }
3320         set_debugreg(vcpu->arch.host_dr6, 6);
3321         set_debugreg(vcpu->arch.host_dr7, 7);
3322
3323         set_bit(KVM_REQ_KICK, &vcpu->requests);
3324         local_irq_enable();
3325
3326         ++vcpu->stat.exits;
3327
3328         /*
3329          * We must have an instruction between local_irq_enable() and
3330          * kvm_guest_exit(), so the timer interrupt isn't delayed by
3331          * the interrupt shadow.  The stat.exits increment will do nicely.
3332          * But we need to prevent reordering, hence this barrier():
3333          */
3334         barrier();
3335
3336         kvm_guest_exit();
3337
3338         preempt_enable();
3339
3340         down_read(&vcpu->kvm->slots_lock);
3341
3342         /*
3343          * Profile KVM exit RIPs:
3344          */
3345         if (unlikely(prof_on == KVM_PROFILING)) {
3346                 unsigned long rip = kvm_rip_read(vcpu);
3347                 profile_hit(KVM_PROFILING, (void *)rip);
3348         }
3349
3350
3351         kvm_lapic_sync_from_vapic(vcpu);
3352
3353         r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3354 out:
3355         return r;
3356 }
3357
3358
3359 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3360 {
3361         int r;
3362
3363         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3364                 pr_debug("vcpu %d received sipi with vector # %x\n",
3365                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
3366                 kvm_lapic_reset(vcpu);
3367                 r = kvm_arch_vcpu_reset(vcpu);
3368                 if (r)
3369                         return r;
3370                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3371         }
3372
3373         down_read(&vcpu->kvm->slots_lock);
3374         vapic_enter(vcpu);
3375
3376         r = 1;
3377         while (r > 0) {
3378                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3379                         r = vcpu_enter_guest(vcpu, kvm_run);
3380                 else {
3381                         up_read(&vcpu->kvm->slots_lock);
3382                         kvm_vcpu_block(vcpu);
3383                         down_read(&vcpu->kvm->slots_lock);
3384                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3385                         {
3386                                 switch(vcpu->arch.mp_state) {
3387                                 case KVM_MP_STATE_HALTED:
3388                                         vcpu->arch.mp_state =
3389                                                 KVM_MP_STATE_RUNNABLE;
3390                                 case KVM_MP_STATE_RUNNABLE:
3391                                         break;
3392                                 case KVM_MP_STATE_SIPI_RECEIVED:
3393                                 default:
3394                                         r = -EINTR;
3395                                         break;
3396                                 }
3397                         }
3398                 }
3399
3400                 if (r <= 0)
3401                         break;
3402
3403                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3404                 if (kvm_cpu_has_pending_timer(vcpu))
3405                         kvm_inject_pending_timer_irqs(vcpu);
3406
3407                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3408                         r = -EINTR;
3409                         kvm_run->exit_reason = KVM_EXIT_INTR;
3410                         ++vcpu->stat.request_irq_exits;
3411                 }
3412                 if (signal_pending(current)) {
3413                         r = -EINTR;
3414                         kvm_run->exit_reason = KVM_EXIT_INTR;
3415                         ++vcpu->stat.signal_exits;
3416                 }
3417                 if (need_resched()) {
3418                         up_read(&vcpu->kvm->slots_lock);
3419                         kvm_resched(vcpu);
3420                         down_read(&vcpu->kvm->slots_lock);
3421                 }
3422         }
3423
3424         up_read(&vcpu->kvm->slots_lock);
3425         post_kvm_run_save(vcpu, kvm_run);
3426
3427         vapic_exit(vcpu);
3428
3429         return r;
3430 }
3431
3432 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3433 {
3434         int r;
3435         sigset_t sigsaved;
3436
3437         vcpu_load(vcpu);
3438
3439         if (vcpu->sigset_active)
3440                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3441
3442         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3443                 kvm_vcpu_block(vcpu);
3444                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3445                 r = -EAGAIN;
3446                 goto out;
3447         }
3448
3449         /* re-sync apic's tpr */
3450         if (!irqchip_in_kernel(vcpu->kvm))
3451                 kvm_set_cr8(vcpu, kvm_run->cr8);
3452
3453         if (vcpu->arch.pio.cur_count) {
3454                 r = complete_pio(vcpu);
3455                 if (r)
3456                         goto out;
3457         }
3458 #if CONFIG_HAS_IOMEM
3459         if (vcpu->mmio_needed) {
3460                 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3461                 vcpu->mmio_read_completed = 1;
3462                 vcpu->mmio_needed = 0;
3463
3464                 down_read(&vcpu->kvm->slots_lock);
3465                 r = emulate_instruction(vcpu, kvm_run,
3466                                         vcpu->arch.mmio_fault_cr2, 0,
3467                                         EMULTYPE_NO_DECODE);
3468                 up_read(&vcpu->kvm->slots_lock);
3469                 if (r == EMULATE_DO_MMIO) {
3470                         /*
3471                          * Read-modify-write.  Back to userspace.
3472                          */
3473                         r = 0;
3474                         goto out;
3475                 }
3476         }
3477 #endif
3478         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3479                 kvm_register_write(vcpu, VCPU_REGS_RAX,
3480                                      kvm_run->hypercall.ret);
3481
3482         r = __vcpu_run(vcpu, kvm_run);
3483
3484 out:
3485         if (vcpu->sigset_active)
3486                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3487
3488         vcpu_put(vcpu);
3489         return r;
3490 }
3491
3492 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3493 {
3494         vcpu_load(vcpu);
3495
3496         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3497         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3498         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3499         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3500         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3501         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3502         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3503         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3504 #ifdef CONFIG_X86_64
3505         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3506         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3507         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3508         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3509         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3510         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3511         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3512         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3513 #endif
3514
3515         regs->rip = kvm_rip_read(vcpu);
3516         regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3517
3518         /*
3519          * Don't leak debug flags in case they were set for guest debugging
3520          */
3521         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3522                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3523
3524         vcpu_put(vcpu);
3525
3526         return 0;
3527 }
3528
3529 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3530 {
3531         vcpu_load(vcpu);
3532
3533         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3534         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3535         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3536         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3537         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3538         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3539         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3540         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3541 #ifdef CONFIG_X86_64
3542         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3543         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3544         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3545         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3546         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3547         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3548         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3549         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3550
3551 #endif
3552
3553         kvm_rip_write(vcpu, regs->rip);
3554         kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3555
3556
3557         vcpu->arch.exception.pending = false;
3558
3559         vcpu_put(vcpu);
3560
3561         return 0;
3562 }
3563
3564 void kvm_get_segment(struct kvm_vcpu *vcpu,
3565                      struct kvm_segment *var, int seg)
3566 {
3567         kvm_x86_ops->get_segment(vcpu, var, seg);
3568 }
3569
3570 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3571 {
3572         struct kvm_segment cs;
3573
3574         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3575         *db = cs.db;
3576         *l = cs.l;
3577 }
3578 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3579
3580 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3581                                   struct kvm_sregs *sregs)
3582 {
3583         struct descriptor_table dt;
3584
3585         vcpu_load(vcpu);
3586
3587         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3588         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3589         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3590         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3591         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3592         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3593
3594         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3595         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3596
3597         kvm_x86_ops->get_idt(vcpu, &dt);
3598         sregs->idt.limit = dt.limit;
3599         sregs->idt.base = dt.base;
3600         kvm_x86_ops->get_gdt(vcpu, &dt);
3601         sregs->gdt.limit = dt.limit;
3602         sregs->gdt.base = dt.base;
3603
3604         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3605         sregs->cr0 = vcpu->arch.cr0;
3606         sregs->cr2 = vcpu->arch.cr2;
3607         sregs->cr3 = vcpu->arch.cr3;
3608         sregs->cr4 = vcpu->arch.cr4;
3609         sregs->cr8 = kvm_get_cr8(vcpu);
3610         sregs->efer = vcpu->arch.shadow_efer;
3611         sregs->apic_base = kvm_get_apic_base(vcpu);
3612
3613         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3614
3615         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3616                 set_bit(vcpu->arch.interrupt.nr,
3617                         (unsigned long *)sregs->interrupt_bitmap);
3618
3619         vcpu_put(vcpu);
3620
3621         return 0;
3622 }
3623
3624 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3625                                     struct kvm_mp_state *mp_state)
3626 {
3627         vcpu_load(vcpu);
3628         mp_state->mp_state = vcpu->arch.mp_state;
3629         vcpu_put(vcpu);
3630         return 0;
3631 }
3632
3633 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3634                                     struct kvm_mp_state *mp_state)
3635 {
3636         vcpu_load(vcpu);
3637         vcpu->arch.mp_state = mp_state->mp_state;
3638         vcpu_put(vcpu);
3639         return 0;
3640 }
3641
3642 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3643                         struct kvm_segment *var, int seg)
3644 {
3645         kvm_x86_ops->set_segment(vcpu, var, seg);
3646 }
3647
3648 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3649                                    struct kvm_segment *kvm_desct)
3650 {
3651         kvm_desct->base = seg_desc->base0;
3652         kvm_desct->base |= seg_desc->base1 << 16;
3653         kvm_desct->base |= seg_desc->base2 << 24;
3654         kvm_desct->limit = seg_desc->limit0;
3655         kvm_desct->limit |= seg_desc->limit << 16;
3656         if (seg_desc->g) {
3657                 kvm_desct->limit <<= 12;
3658                 kvm_desct->limit |= 0xfff;
3659         }
3660         kvm_desct->selector = selector;
3661         kvm_desct->type = seg_desc->type;
3662         kvm_desct->present = seg_desc->p;
3663         kvm_desct->dpl = seg_desc->dpl;
3664         kvm_desct->db = seg_desc->d;
3665         kvm_desct->s = seg_desc->s;
3666         kvm_desct->l = seg_desc->l;
3667         kvm_desct->g = seg_desc->g;
3668         kvm_desct->avl = seg_desc->avl;
3669         if (!selector)
3670                 kvm_desct->unusable = 1;
3671         else
3672                 kvm_desct->unusable = 0;
3673         kvm_desct->padding = 0;
3674 }
3675
3676 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3677                                           u16 selector,
3678                                           struct descriptor_table *dtable)
3679 {
3680         if (selector & 1 << 2) {
3681                 struct kvm_segment kvm_seg;
3682
3683                 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3684
3685                 if (kvm_seg.unusable)
3686                         dtable->limit = 0;
3687                 else
3688                         dtable->limit = kvm_seg.limit;
3689                 dtable->base = kvm_seg.base;
3690         }
3691         else
3692                 kvm_x86_ops->get_gdt(vcpu, dtable);
3693 }
3694
3695 /* allowed just for 8 bytes segments */
3696 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3697                                          struct desc_struct *seg_desc)
3698 {
3699         gpa_t gpa;
3700         struct descriptor_table dtable;
3701         u16 index = selector >> 3;
3702
3703         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3704
3705         if (dtable.limit < index * 8 + 7) {
3706                 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3707                 return 1;
3708         }
3709         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3710         gpa += index * 8;
3711         return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3712 }
3713
3714 /* allowed just for 8 bytes segments */
3715 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3716                                          struct desc_struct *seg_desc)
3717 {
3718         gpa_t gpa;
3719         struct descriptor_table dtable;
3720         u16 index = selector >> 3;
3721
3722         get_segment_descriptor_dtable(vcpu, selector, &dtable);
3723
3724         if (dtable.limit < index * 8 + 7)
3725                 return 1;
3726         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3727         gpa += index * 8;
3728         return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3729 }
3730
3731 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3732                              struct desc_struct *seg_desc)
3733 {
3734         u32 base_addr;
3735
3736         base_addr = seg_desc->base0;
3737         base_addr |= (seg_desc->base1 << 16);
3738         base_addr |= (seg_desc->base2 << 24);
3739
3740         return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3741 }
3742
3743 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3744 {
3745         struct kvm_segment kvm_seg;
3746
3747         kvm_get_segment(vcpu, &kvm_seg, seg);
3748         return kvm_seg.selector;
3749 }
3750
3751 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3752                                                 u16 selector,
3753                                                 struct kvm_segment *kvm_seg)
3754 {
3755         struct desc_struct seg_desc;
3756
3757         if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3758                 return 1;
3759         seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3760         return 0;
3761 }
3762
3763 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3764 {
3765         struct kvm_segment segvar = {
3766                 .base = selector << 4,
3767                 .limit = 0xffff,
3768                 .selector = selector,
3769                 .type = 3,
3770                 .present = 1,
3771                 .dpl = 3,
3772                 .db = 0,
3773                 .s = 1,
3774                 .l = 0,
3775                 .g = 0,
3776                 .avl = 0,
3777                 .unusable = 0,
3778         };
3779         kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3780         return 0;
3781 }
3782
3783 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3784                                 int type_bits, int seg)
3785 {
3786         struct kvm_segment kvm_seg;
3787
3788         if (!(vcpu->arch.cr0 & X86_CR0_PE))
3789                 return kvm_load_realmode_segment(vcpu, selector, seg);
3790         if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3791                 return 1;
3792         kvm_seg.type |= type_bits;
3793
3794         if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3795             seg != VCPU_SREG_LDTR)
3796                 if (!kvm_seg.s)
3797                         kvm_seg.unusable = 1;
3798
3799         kvm_set_segment(vcpu, &kvm_seg, seg);
3800         return 0;
3801 }
3802
3803 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3804                                 struct tss_segment_32 *tss)
3805 {
3806         tss->cr3 = vcpu->arch.cr3;
3807         tss->eip = kvm_rip_read(vcpu);
3808         tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3809         tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3810         tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3811         tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3812         tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3813         tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3814         tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3815         tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3816         tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3817         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3818         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3819         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3820         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3821         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3822         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3823         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3824 }
3825
3826 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3827                                   struct tss_segment_32 *tss)
3828 {
3829         kvm_set_cr3(vcpu, tss->cr3);
3830
3831         kvm_rip_write(vcpu, tss->eip);
3832         kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3833
3834         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3835         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3836         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3837         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3838         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3839         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3840         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3841         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3842
3843         if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3844                 return 1;
3845
3846         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3847                 return 1;
3848
3849         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3850                 return 1;
3851
3852         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3853                 return 1;
3854
3855         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3856                 return 1;
3857
3858         if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3859                 return 1;
3860
3861         if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3862                 return 1;
3863         return 0;
3864 }
3865
3866 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3867                                 struct tss_segment_16 *tss)
3868 {
3869         tss->ip = kvm_rip_read(vcpu);
3870         tss->flag = kvm_x86_ops->get_rflags(vcpu);
3871         tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3872         tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3873         tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3874         tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3875         tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3876         tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3877         tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3878         tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3879
3880         tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3881         tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3882         tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3883         tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3884         tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3885         tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3886 }
3887
3888 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3889                                  struct tss_segment_16 *tss)
3890 {
3891         kvm_rip_write(vcpu, tss->ip);
3892         kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3893         kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3894         kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3895         kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3896         kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3897         kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3898         kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3899         kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3900         kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3901
3902         if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3903                 return 1;
3904
3905         if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3906                 return 1;
3907
3908         if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3909                 return 1;
3910
3911         if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3912                 return 1;
3913
3914         if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3915                 return 1;
3916         return 0;
3917 }
3918
3919 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3920                               u16 old_tss_sel, u32 old_tss_base,
3921                               struct desc_struct *nseg_desc)
3922 {
3923         struct tss_segment_16 tss_segment_16;
3924         int ret = 0;
3925
3926         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3927                            sizeof tss_segment_16))
3928                 goto out;
3929
3930         save_state_to_tss16(vcpu, &tss_segment_16);
3931
3932         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3933                             sizeof tss_segment_16))
3934                 goto out;
3935
3936         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3937                            &tss_segment_16, sizeof tss_segment_16))
3938                 goto out;
3939
3940         if (old_tss_sel != 0xffff) {
3941                 tss_segment_16.prev_task_link = old_tss_sel;
3942
3943                 if (kvm_write_guest(vcpu->kvm,
3944                                     get_tss_base_addr(vcpu, nseg_desc),
3945                                     &tss_segment_16.prev_task_link,
3946                                     sizeof tss_segment_16.prev_task_link))
3947                         goto out;
3948         }
3949
3950         if (load_state_from_tss16(vcpu, &tss_segment_16))
3951                 goto out;
3952
3953         ret = 1;
3954 out:
3955         return ret;
3956 }
3957
3958 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3959                        u16 old_tss_sel, u32 old_tss_base,
3960                        struct desc_struct *nseg_desc)
3961 {
3962         struct tss_segment_32 tss_segment_32;
3963         int ret = 0;
3964
3965         if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3966                            sizeof tss_segment_32))
3967                 goto out;
3968
3969         save_state_to_tss32(vcpu, &tss_segment_32);
3970
3971         if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3972                             sizeof tss_segment_32))
3973                 goto out;
3974
3975         if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3976                            &tss_segment_32, sizeof tss_segment_32))
3977                 goto out;
3978
3979         if (old_tss_sel != 0xffff) {
3980                 tss_segment_32.prev_task_link = old_tss_sel;
3981
3982                 if (kvm_write_guest(vcpu->kvm,
3983                                     get_tss_base_addr(vcpu, nseg_desc),
3984                                     &tss_segment_32.prev_task_link,
3985                                     sizeof tss_segment_32.prev_task_link))
3986                         goto out;
3987         }
3988
3989         if (load_state_from_tss32(vcpu, &tss_segment_32))
3990                 goto out;
3991
3992         ret = 1;
3993 out:
3994         return ret;
3995 }
3996
3997 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3998 {
3999         struct kvm_segment tr_seg;
4000         struct desc_struct cseg_desc;
4001         struct desc_struct nseg_desc;
4002         int ret = 0;
4003         u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4004         u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4005
4006         old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4007
4008         /* FIXME: Handle errors. Failure to read either TSS or their
4009          * descriptors should generate a pagefault.
4010          */
4011         if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4012                 goto out;
4013
4014         if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4015                 goto out;
4016
4017         if (reason != TASK_SWITCH_IRET) {
4018                 int cpl;
4019
4020                 cpl = kvm_x86_ops->get_cpl(vcpu);
4021                 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4022                         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4023                         return 1;
4024                 }
4025         }
4026
4027         if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
4028                 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4029                 return 1;
4030         }
4031
4032         if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4033                 cseg_desc.type &= ~(1 << 1); //clear the B flag
4034                 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4035         }
4036
4037         if (reason == TASK_SWITCH_IRET) {
4038                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4039                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4040         }
4041
4042         /* set back link to prev task only if NT bit is set in eflags
4043            note that old_tss_sel is not used afetr this point */
4044         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4045                 old_tss_sel = 0xffff;
4046
4047         /* set back link to prev task only if NT bit is set in eflags
4048            note that old_tss_sel is not used afetr this point */
4049         if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4050                 old_tss_sel = 0xffff;
4051
4052         if (nseg_desc.type & 8)
4053                 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4054                                          old_tss_base, &nseg_desc);
4055         else
4056                 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4057                                          old_tss_base, &nseg_desc);
4058
4059         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4060                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4061                 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4062         }
4063
4064         if (reason != TASK_SWITCH_IRET) {
4065                 nseg_desc.type |= (1 << 1);
4066                 save_guest_segment_descriptor(vcpu, tss_selector,
4067                                               &nseg_desc);
4068         }
4069
4070         kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4071         seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4072         tr_seg.type = 11;
4073         kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4074 out:
4075         return ret;
4076 }
4077 EXPORT_SYMBOL_GPL(kvm_task_switch);
4078
4079 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4080                                   struct kvm_sregs *sregs)
4081 {
4082         int mmu_reset_needed = 0;
4083         int pending_vec, max_bits;
4084         struct descriptor_table dt;
4085
4086         vcpu_load(vcpu);
4087
4088         dt.limit = sregs->idt.limit;
4089         dt.base = sregs->idt.base;
4090         kvm_x86_ops->set_idt(vcpu, &dt);
4091         dt.limit = sregs->gdt.limit;
4092         dt.base = sregs->gdt.base;
4093         kvm_x86_ops->set_gdt(vcpu, &dt);
4094
4095         vcpu->arch.cr2 = sregs->cr2;
4096         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4097
4098         down_read(&vcpu->kvm->slots_lock);
4099         if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4100                 vcpu->arch.cr3 = sregs->cr3;
4101         else
4102                 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4103         up_read(&vcpu->kvm->slots_lock);
4104
4105         kvm_set_cr8(vcpu, sregs->cr8);
4106
4107         mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4108         kvm_x86_ops->set_efer(vcpu, sregs->efer);
4109         kvm_set_apic_base(vcpu, sregs->apic_base);
4110
4111         kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4112
4113         mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4114         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4115         vcpu->arch.cr0 = sregs->cr0;
4116
4117         mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4118         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4119         if (!is_long_mode(vcpu) && is_pae(vcpu))
4120                 load_pdptrs(vcpu, vcpu->arch.cr3);
4121
4122         if (mmu_reset_needed)
4123                 kvm_mmu_reset_context(vcpu);
4124
4125         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4126         pending_vec = find_first_bit(
4127                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4128         if (pending_vec < max_bits) {
4129                 kvm_queue_interrupt(vcpu, pending_vec, false);
4130                 pr_debug("Set back pending irq %d\n", pending_vec);
4131                 if (irqchip_in_kernel(vcpu->kvm))
4132                         kvm_pic_clear_isr_ack(vcpu->kvm);
4133         }
4134
4135         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4136         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4137         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4138         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4139         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4140         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4141
4142         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4143         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4144
4145         /* Older userspace won't unhalt the vcpu on reset. */
4146         if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4147             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4148             !(vcpu->arch.cr0 & X86_CR0_PE))
4149                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4150
4151         vcpu_put(vcpu);
4152
4153         return 0;
4154 }
4155
4156 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4157                                         struct kvm_guest_debug *dbg)
4158 {
4159         int i, r;
4160
4161         vcpu_load(vcpu);
4162
4163         if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4164             (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4165                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4166                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4167                 vcpu->arch.switch_db_regs =
4168                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4169         } else {
4170                 for (i = 0; i < KVM_NR_DB_REGS; i++)
4171                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4172                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4173         }
4174
4175         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4176
4177         if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4178                 kvm_queue_exception(vcpu, DB_VECTOR);
4179         else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4180                 kvm_queue_exception(vcpu, BP_VECTOR);
4181
4182         vcpu_put(vcpu);
4183
4184         return r;
4185 }
4186
4187 /*
4188  * fxsave fpu state.  Taken from x86_64/processor.h.  To be killed when
4189  * we have asm/x86/processor.h
4190  */
4191 struct fxsave {
4192         u16     cwd;
4193         u16     swd;
4194         u16     twd;
4195         u16     fop;
4196         u64     rip;
4197         u64     rdp;
4198         u32     mxcsr;
4199         u32     mxcsr_mask;
4200         u32     st_space[32];   /* 8*16 bytes for each FP-reg = 128 bytes */
4201 #ifdef CONFIG_X86_64
4202         u32     xmm_space[64];  /* 16*16 bytes for each XMM-reg = 256 bytes */
4203 #else
4204         u32     xmm_space[32];  /* 8*16 bytes for each XMM-reg = 128 bytes */
4205 #endif
4206 };
4207
4208 /*
4209  * Translate a guest virtual address to a guest physical address.
4210  */
4211 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4212                                     struct kvm_translation *tr)
4213 {
4214         unsigned long vaddr = tr->linear_address;
4215         gpa_t gpa;
4216
4217         vcpu_load(vcpu);
4218         down_read(&vcpu->kvm->slots_lock);
4219         gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4220         up_read(&vcpu->kvm->slots_lock);
4221         tr->physical_address = gpa;
4222         tr->valid = gpa != UNMAPPED_GVA;
4223         tr->writeable = 1;
4224         tr->usermode = 0;
4225         vcpu_put(vcpu);
4226
4227         return 0;
4228 }
4229
4230 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4231 {
4232         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4233
4234         vcpu_load(vcpu);
4235
4236         memcpy(fpu->fpr, fxsave->st_space, 128);
4237         fpu->fcw = fxsave->cwd;
4238         fpu->fsw = fxsave->swd;
4239         fpu->ftwx = fxsave->twd;
4240         fpu->last_opcode = fxsave->fop;
4241         fpu->last_ip = fxsave->rip;
4242         fpu->last_dp = fxsave->rdp;
4243         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4244
4245         vcpu_put(vcpu);
4246
4247         return 0;
4248 }
4249
4250 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4251 {
4252         struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4253
4254         vcpu_load(vcpu);
4255
4256         memcpy(fxsave->st_space, fpu->fpr, 128);
4257         fxsave->cwd = fpu->fcw;
4258         fxsave->swd = fpu->fsw;
4259         fxsave->twd = fpu->ftwx;
4260         fxsave->fop = fpu->last_opcode;
4261         fxsave->rip = fpu->last_ip;
4262         fxsave->rdp = fpu->last_dp;
4263         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4264
4265         vcpu_put(vcpu);
4266
4267         return 0;
4268 }
4269
4270 void fx_init(struct kvm_vcpu *vcpu)
4271 {
4272         unsigned after_mxcsr_mask;
4273
4274         /*
4275          * Touch the fpu the first time in non atomic context as if
4276          * this is the first fpu instruction the exception handler
4277          * will fire before the instruction returns and it'll have to
4278          * allocate ram with GFP_KERNEL.
4279          */
4280         if (!used_math())
4281                 kvm_fx_save(&vcpu->arch.host_fx_image);
4282
4283         /* Initialize guest FPU by resetting ours and saving into guest's */
4284         preempt_disable();
4285         kvm_fx_save(&vcpu->arch.host_fx_image);
4286         kvm_fx_finit();
4287         kvm_fx_save(&vcpu->arch.guest_fx_image);
4288         kvm_fx_restore(&vcpu->arch.host_fx_image);
4289         preempt_enable();
4290
4291         vcpu->arch.cr0 |= X86_CR0_ET;
4292         after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4293         vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4294         memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4295                0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4296 }
4297 EXPORT_SYMBOL_GPL(fx_init);
4298
4299 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4300 {
4301         if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4302                 return;
4303
4304         vcpu->guest_fpu_loaded = 1;
4305         kvm_fx_save(&vcpu->arch.host_fx_image);
4306         kvm_fx_restore(&vcpu->arch.guest_fx_image);
4307 }
4308 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4309
4310 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4311 {
4312         if (!vcpu->guest_fpu_loaded)
4313                 return;
4314
4315         vcpu->guest_fpu_loaded = 0;
4316         kvm_fx_save(&vcpu->arch.guest_fx_image);
4317         kvm_fx_restore(&vcpu->arch.host_fx_image);
4318         ++vcpu->stat.fpu_reload;
4319 }
4320 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4321
4322 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4323 {
4324         if (vcpu->arch.time_page) {
4325                 kvm_release_page_dirty(vcpu->arch.time_page);
4326                 vcpu->arch.time_page = NULL;
4327         }
4328
4329         kvm_x86_ops->vcpu_free(vcpu);
4330 }
4331
4332 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4333                                                 unsigned int id)
4334 {
4335         return kvm_x86_ops->vcpu_create(kvm, id);
4336 }
4337
4338 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4339 {
4340         int r;
4341
4342         /* We do fxsave: this must be aligned. */
4343         BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4344
4345         vcpu->arch.mtrr_state.have_fixed = 1;
4346         vcpu_load(vcpu);
4347         r = kvm_arch_vcpu_reset(vcpu);
4348         if (r == 0)
4349                 r = kvm_mmu_setup(vcpu);
4350         vcpu_put(vcpu);
4351         if (r < 0)
4352                 goto free_vcpu;
4353
4354         return 0;
4355 free_vcpu:
4356         kvm_x86_ops->vcpu_free(vcpu);
4357         return r;
4358 }
4359
4360 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4361 {
4362         vcpu_load(vcpu);
4363         kvm_mmu_unload(vcpu);
4364         vcpu_put(vcpu);
4365
4366         kvm_x86_ops->vcpu_free(vcpu);
4367 }
4368
4369 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4370 {
4371         vcpu->arch.nmi_pending = false;
4372         vcpu->arch.nmi_injected = false;
4373
4374         vcpu->arch.switch_db_regs = 0;
4375         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4376         vcpu->arch.dr6 = DR6_FIXED_1;
4377         vcpu->arch.dr7 = DR7_FIXED_1;
4378
4379         return kvm_x86_ops->vcpu_reset(vcpu);
4380 }
4381
4382 void kvm_arch_hardware_enable(void *garbage)
4383 {
4384         kvm_x86_ops->hardware_enable(garbage);
4385 }
4386
4387 void kvm_arch_hardware_disable(void *garbage)
4388 {
4389         kvm_x86_ops->hardware_disable(garbage);
4390 }
4391
4392 int kvm_arch_hardware_setup(void)
4393 {
4394         return kvm_x86_ops->hardware_setup();
4395 }
4396
4397 void kvm_arch_hardware_unsetup(void)
4398 {
4399         kvm_x86_ops->hardware_unsetup();
4400 }
4401
4402 void kvm_arch_check_processor_compat(void *rtn)
4403 {
4404         kvm_x86_ops->check_processor_compatibility(rtn);
4405 }
4406
4407 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4408 {
4409         struct page *page;
4410         struct kvm *kvm;
4411         int r;
4412
4413         BUG_ON(vcpu->kvm == NULL);
4414         kvm = vcpu->kvm;
4415
4416         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4417         if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4418                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4419         else
4420                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4421
4422         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4423         if (!page) {
4424                 r = -ENOMEM;
4425                 goto fail;
4426         }
4427         vcpu->arch.pio_data = page_address(page);
4428
4429         r = kvm_mmu_create(vcpu);
4430         if (r < 0)
4431                 goto fail_free_pio_data;
4432
4433         if (irqchip_in_kernel(kvm)) {
4434                 r = kvm_create_lapic(vcpu);
4435                 if (r < 0)
4436                         goto fail_mmu_destroy;
4437         }
4438
4439         return 0;
4440
4441 fail_mmu_destroy:
4442         kvm_mmu_destroy(vcpu);
4443 fail_free_pio_data:
4444         free_page((unsigned long)vcpu->arch.pio_data);
4445 fail:
4446         return r;
4447 }
4448
4449 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4450 {
4451         kvm_free_lapic(vcpu);
4452         down_read(&vcpu->kvm->slots_lock);
4453         kvm_mmu_destroy(vcpu);
4454         up_read(&vcpu->kvm->slots_lock);
4455         free_page((unsigned long)vcpu->arch.pio_data);
4456 }
4457
4458 struct  kvm *kvm_arch_create_vm(void)
4459 {
4460         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4461
4462         if (!kvm)
4463                 return ERR_PTR(-ENOMEM);
4464
4465         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4466         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4467
4468         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4469         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4470
4471         rdtscll(kvm->arch.vm_init_tsc);
4472
4473         return kvm;
4474 }
4475
4476 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4477 {
4478         vcpu_load(vcpu);
4479         kvm_mmu_unload(vcpu);
4480         vcpu_put(vcpu);
4481 }
4482
4483 static void kvm_free_vcpus(struct kvm *kvm)
4484 {
4485         unsigned int i;
4486
4487         /*
4488          * Unpin any mmu pages first.
4489          */
4490         for (i = 0; i < KVM_MAX_VCPUS; ++i)
4491                 if (kvm->vcpus[i])
4492                         kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4493         for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4494                 if (kvm->vcpus[i]) {
4495                         kvm_arch_vcpu_free(kvm->vcpus[i]);
4496                         kvm->vcpus[i] = NULL;
4497                 }
4498         }
4499
4500 }
4501
4502 void kvm_arch_sync_events(struct kvm *kvm)
4503 {
4504         kvm_free_all_assigned_devices(kvm);
4505 }
4506
4507 void kvm_arch_destroy_vm(struct kvm *kvm)
4508 {
4509         kvm_iommu_unmap_guest(kvm);
4510         kvm_free_pit(kvm);
4511         kfree(kvm->arch.vpic);
4512         kfree(kvm->arch.vioapic);
4513         kvm_free_vcpus(kvm);
4514         kvm_free_physmem(kvm);
4515         if (kvm->arch.apic_access_page)
4516                 put_page(kvm->arch.apic_access_page);
4517         if (kvm->arch.ept_identity_pagetable)
4518                 put_page(kvm->arch.ept_identity_pagetable);
4519         kfree(kvm);
4520 }
4521
4522 int kvm_arch_set_memory_region(struct kvm *kvm,
4523                                 struct kvm_userspace_memory_region *mem,
4524                                 struct kvm_memory_slot old,
4525                                 int user_alloc)
4526 {
4527         int npages = mem->memory_size >> PAGE_SHIFT;
4528         struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4529
4530         /*To keep backward compatibility with older userspace,
4531          *x86 needs to hanlde !user_alloc case.
4532          */
4533         if (!user_alloc) {
4534                 if (npages && !old.rmap) {
4535                         unsigned long userspace_addr;
4536
4537                         down_write(&current->mm->mmap_sem);
4538                         userspace_addr = do_mmap(NULL, 0,
4539                                                  npages * PAGE_SIZE,
4540                                                  PROT_READ | PROT_WRITE,
4541                                                  MAP_PRIVATE | MAP_ANONYMOUS,
4542                                                  0);
4543                         up_write(&current->mm->mmap_sem);
4544
4545                         if (IS_ERR((void *)userspace_addr))
4546                                 return PTR_ERR((void *)userspace_addr);
4547
4548                         /* set userspace_addr atomically for kvm_hva_to_rmapp */
4549                         spin_lock(&kvm->mmu_lock);
4550                         memslot->userspace_addr = userspace_addr;
4551                         spin_unlock(&kvm->mmu_lock);
4552                 } else {
4553                         if (!old.user_alloc && old.rmap) {
4554                                 int ret;
4555
4556                                 down_write(&current->mm->mmap_sem);
4557                                 ret = do_munmap(current->mm, old.userspace_addr,
4558                                                 old.npages * PAGE_SIZE);
4559                                 up_write(&current->mm->mmap_sem);
4560                                 if (ret < 0)
4561                                         printk(KERN_WARNING
4562                                        "kvm_vm_ioctl_set_memory_region: "
4563                                        "failed to munmap memory\n");
4564                         }
4565                 }
4566         }
4567
4568         spin_lock(&kvm->mmu_lock);
4569         if (!kvm->arch.n_requested_mmu_pages) {
4570                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4571                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4572         }
4573
4574         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4575         spin_unlock(&kvm->mmu_lock);
4576         kvm_flush_remote_tlbs(kvm);
4577
4578         return 0;
4579 }
4580
4581 void kvm_arch_flush_shadow(struct kvm *kvm)
4582 {
4583         kvm_mmu_zap_all(kvm);
4584         kvm_reload_remote_mmus(kvm);
4585 }
4586
4587 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4588 {
4589         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4590                || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4591                || vcpu->arch.nmi_pending;
4592 }
4593
4594 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4595 {
4596         int me;
4597         int cpu = vcpu->cpu;
4598
4599         if (waitqueue_active(&vcpu->wq)) {
4600                 wake_up_interruptible(&vcpu->wq);
4601                 ++vcpu->stat.halt_wakeup;
4602         }
4603
4604         me = get_cpu();
4605         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4606                 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4607                         smp_send_reschedule(cpu);
4608         put_cpu();
4609 }
4610
4611 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4612 {
4613         return kvm_x86_ops->interrupt_allowed(vcpu);
4614 }