Pileus Git - ~andy/linux/blob - arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static struct kvm_shared_msrs __percpu *shared_msrs;
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 166 {
 167         int i;
 168         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 169                 vcpu->arch.apf.gfns[i] = ~0;
 170 }
 171
 172 static void kvm_on_user_return(struct user_return_notifier *urn)
 173 {
 174         unsigned slot;
 175         struct kvm_shared_msrs *locals
 176                 = container_of(urn, struct kvm_shared_msrs, urn);
 177         struct kvm_shared_msr_values *values;
 178
 179         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 180                 values = &locals->values[slot];
 181                 if (values->host != values->curr) {
 182                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 183                         values->curr = values->host;
 184                 }
 185         }
 186         locals->registered = false;
 187         user_return_notifier_unregister(urn);
 188 }
 189
 190 static void shared_msr_update(unsigned slot, u32 msr)
 191 {
 192         u64 value;
 193         unsigned int cpu = smp_processor_id();
 194         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 195
 196         /* only read, and nobody should modify it at this time,
 197          * so don't need lock */
 198         if (slot >= shared_msrs_global.nr) {
 199                 printk(KERN_ERR "kvm: invalid MSR slot!");
 200                 return;
 201         }
 202         rdmsrl_safe(msr, &value);
 203         smsr->values[slot].host = value;
 204         smsr->values[slot].curr = value;
 205 }
 206
 207 void kvm_define_shared_msr(unsigned slot, u32 msr)
 208 {
 209         if (slot >= shared_msrs_global.nr)
 210                 shared_msrs_global.nr = slot + 1;
 211         shared_msrs_global.msrs[slot] = msr;
 212         /* we need ensured the shared_msr_global have been updated */
 213         smp_wmb();
 214 }
 215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 216
 217 static void kvm_shared_msr_cpu_online(void)
 218 {
 219         unsigned i;
 220
 221         for (i = 0; i < shared_msrs_global.nr; ++i)
 222                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 223 }
 224
 225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 226 {
 227         unsigned int cpu = smp_processor_id();
 228         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 229
 230         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 231                 return;
 232         smsr->values[slot].curr = value;
 233         wrmsrl(shared_msrs_global.msrs[slot], value);
 234         if (!smsr->registered) {
 235                 smsr->urn.on_user_return = kvm_on_user_return;
 236                 user_return_notifier_register(&smsr->urn);
 237                 smsr->registered = true;
 238         }
 239 }
 240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 241
 242 static void drop_user_return_notifiers(void *ignore)
 243 {
 244         unsigned int cpu = smp_processor_id();
 245         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 246
 247         if (smsr->registered)
 248                 kvm_on_user_return(&smsr->urn);
 249 }
 250
 251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 252 {
 253         return vcpu->arch.apic_base;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 256
 257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 258 {
 259         /* TODO: reserve bits check */
 260         kvm_lapic_set_base(vcpu, data);
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 263
 264 asmlinkage void kvm_spurious_fault(void)
 265 {
 266         /* Fault while not rebooting.  We want the trace. */
 267         BUG();
 268 }
 269 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 270
 271 #define EXCPT_BENIGN            0
 272 #define EXCPT_CONTRIBUTORY      1
 273 #define EXCPT_PF                2
 274
 275 static int exception_class(int vector)
 276 {
 277         switch (vector) {
 278         case PF_VECTOR:
 279                 return EXCPT_PF;
 280         case DE_VECTOR:
 281         case TS_VECTOR:
 282         case NP_VECTOR:
 283         case SS_VECTOR:
 284         case GP_VECTOR:
 285                 return EXCPT_CONTRIBUTORY;
 286         default:
 287                 break;
 288         }
 289         return EXCPT_BENIGN;
 290 }
 291
 292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 293                 unsigned nr, bool has_error, u32 error_code,
 294                 bool reinject)
 295 {
 296         u32 prev_nr;
 297         int class1, class2;
 298
 299         kvm_make_request(KVM_REQ_EVENT, vcpu);
 300
 301         if (!vcpu->arch.exception.pending) {
 302         queue:
 303                 vcpu->arch.exception.pending = true;
 304                 vcpu->arch.exception.has_error_code = has_error;
 305                 vcpu->arch.exception.nr = nr;
 306                 vcpu->arch.exception.error_code = error_code;
 307                 vcpu->arch.exception.reinject = reinject;
 308                 return;
 309         }
 310
 311         /* to check exception */
 312         prev_nr = vcpu->arch.exception.nr;
 313         if (prev_nr == DF_VECTOR) {
 314                 /* triple fault -> shutdown */
 315                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 316                 return;
 317         }
 318         class1 = exception_class(prev_nr);
 319         class2 = exception_class(nr);
 320         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 321                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 322                 /* generate double fault per SDM Table 5-5 */
 323                 vcpu->arch.exception.pending = true;
 324                 vcpu->arch.exception.has_error_code = true;
 325                 vcpu->arch.exception.nr = DF_VECTOR;
 326                 vcpu->arch.exception.error_code = 0;
 327         } else
 328                 /* replace previous exception with a new one in a hope
 329                    that instruction re-execution will regenerate lost
 330                    exception */
 331                 goto queue;
 332 }
 333
 334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, false);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 339
 340 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 341 {
 342         kvm_multiple_exception(vcpu, nr, false, 0, true);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 345
 346 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 347 {
 348         if (err)
 349                 kvm_inject_gp(vcpu, 0);
 350         else
 351                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 352 }
 353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 354
 355 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 356 {
 357         ++vcpu->stat.pf_guest;
 358         vcpu->arch.cr2 = fault->address;
 359         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 362
 363 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 364 {
 365         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 366                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 367         else
 368                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 369 }
 370
 371 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 372 {
 373         atomic_inc(&vcpu->arch.nmi_queued);
 374         kvm_make_request(KVM_REQ_NMI, vcpu);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 377
 378 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 383
 384 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 385 {
 386         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 387 }
 388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 389
 390 /*
 391  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 392  * a #GP and return false.
 393  */
 394 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 395 {
 396         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 397                 return true;
 398         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 399         return false;
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 402
 403 /*
 404  * This function will be used to read from the physical memory of the currently
 405  * running guest. The difference to kvm_read_guest_page is that this function
 406  * can read from guest physical or from the guest's guest physical memory.
 407  */
 408 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 409                             gfn_t ngfn, void *data, int offset, int len,
 410                             u32 access)
 411 {
 412         gfn_t real_gfn;
 413         gpa_t ngpa;
 414
 415         ngpa     = gfn_to_gpa(ngfn);
 416         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 417         if (real_gfn == UNMAPPED_GVA)
 418                 return -EFAULT;
 419
 420         real_gfn = gpa_to_gfn(real_gfn);
 421
 422         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 425
 426 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 427                                void *data, int offset, int len, u32 access)
 428 {
 429         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 430                                        data, offset, len, access);
 431 }
 432
 433 /*
 434  * Load the pae pdptrs.  Return true is they are all valid.
 435  */
 436 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 437 {
 438         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 439         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 440         int i;
 441         int ret;
 442         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 443
 444         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 445                                       offset * sizeof(u64), sizeof(pdpte),
 446                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 447         if (ret < 0) {
 448                 ret = 0;
 449                 goto out;
 450         }
 451         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 452                 if (is_present_gpte(pdpte[i]) &&
 453                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 454                         ret = 0;
 455                         goto out;
 456                 }
 457         }
 458         ret = 1;
 459
 460         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 461         __set_bit(VCPU_EXREG_PDPTR,
 462                   (unsigned long *)&vcpu->arch.regs_avail);
 463         __set_bit(VCPU_EXREG_PDPTR,
 464                   (unsigned long *)&vcpu->arch.regs_dirty);
 465 out:
 466
 467         return ret;
 468 }
 469 EXPORT_SYMBOL_GPL(load_pdptrs);
 470
 471 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 472 {
 473         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 474         bool changed = true;
 475         int offset;
 476         gfn_t gfn;
 477         int r;
 478
 479         if (is_long_mode(vcpu) || !is_pae(vcpu))
 480                 return false;
 481
 482         if (!test_bit(VCPU_EXREG_PDPTR,
 483                       (unsigned long *)&vcpu->arch.regs_avail))
 484                 return true;
 485
 486         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 487         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 488         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 489                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 490         if (r < 0)
 491                 goto out;
 492         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 493 out:
 494
 495         return changed;
 496 }
 497
 498 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 499 {
 500         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 501         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 502                                     X86_CR0_CD | X86_CR0_NW;
 503
 504         cr0 |= X86_CR0_ET;
 505
 506 #ifdef CONFIG_X86_64
 507         if (cr0 & 0xffffffff00000000UL)
 508                 return 1;
 509 #endif
 510
 511         cr0 &= ~CR0_RESERVED_BITS;
 512
 513         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 514                 return 1;
 515
 516         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 517                 return 1;
 518
 519         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 520 #ifdef CONFIG_X86_64
 521                 if ((vcpu->arch.efer & EFER_LME)) {
 522                         int cs_db, cs_l;
 523
 524                         if (!is_pae(vcpu))
 525                                 return 1;
 526                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 527                         if (cs_l)
 528                                 return 1;
 529                 } else
 530 #endif
 531                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 532                                                  kvm_read_cr3(vcpu)))
 533                         return 1;
 534         }
 535
 536         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 537                 return 1;
 538
 539         kvm_x86_ops->set_cr0(vcpu, cr0);
 540
 541         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 542                 kvm_clear_async_pf_completion_queue(vcpu);
 543                 kvm_async_pf_hash_reset(vcpu);
 544         }
 545
 546         if ((cr0 ^ old_cr0) & update_bits)
 547                 kvm_mmu_reset_context(vcpu);
 548         return 0;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 551
 552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 553 {
 554         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 555 }
 556 EXPORT_SYMBOL_GPL(kvm_lmsw);
 557
 558 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 559 {
 560         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 561                         !vcpu->guest_xcr0_loaded) {
 562                 /* kvm_set_xcr() also depends on this */
 563                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 564                 vcpu->guest_xcr0_loaded = 1;
 565         }
 566 }
 567
 568 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 569 {
 570         if (vcpu->guest_xcr0_loaded) {
 571                 if (vcpu->arch.xcr0 != host_xcr0)
 572                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 573                 vcpu->guest_xcr0_loaded = 0;
 574         }
 575 }
 576
 577 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 578 {
 579         u64 xcr0;
 580
 581         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 582         if (index != XCR_XFEATURE_ENABLED_MASK)
 583                 return 1;
 584         xcr0 = xcr;
 585         if (!(xcr0 & XSTATE_FP))
 586                 return 1;
 587         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 588                 return 1;
 589         if (xcr0 & ~host_xcr0)
 590                 return 1;
 591         kvm_put_guest_xcr0(vcpu);
 592         vcpu->arch.xcr0 = xcr0;
 593         return 0;
 594 }
 595
 596 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 597 {
 598         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 599             __kvm_set_xcr(vcpu, index, xcr)) {
 600                 kvm_inject_gp(vcpu, 0);
 601                 return 1;
 602         }
 603         return 0;
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 606
 607 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 608 {
 609         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 610         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 611                                    X86_CR4_PAE | X86_CR4_SMEP;
 612         if (cr4 & CR4_RESERVED_BITS)
 613                 return 1;
 614
 615         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 616                 return 1;
 617
 618         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 619                 return 1;
 620
 621         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 622                 return 1;
 623
 624         if (is_long_mode(vcpu)) {
 625                 if (!(cr4 & X86_CR4_PAE))
 626                         return 1;
 627         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 628                    && ((cr4 ^ old_cr4) & pdptr_bits)
 629                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 630                                    kvm_read_cr3(vcpu)))
 631                 return 1;
 632
 633         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 634                 if (!guest_cpuid_has_pcid(vcpu))
 635                         return 1;
 636
 637                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 638                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 639                         return 1;
 640         }
 641
 642         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 643                 return 1;
 644
 645         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 646             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 647                 kvm_mmu_reset_context(vcpu);
 648
 649         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 650                 kvm_update_cpuid(vcpu);
 651
 652         return 0;
 653 }
 654 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 655
 656 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 657 {
 658         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 659                 kvm_mmu_sync_roots(vcpu);
 660                 kvm_mmu_flush_tlb(vcpu);
 661                 return 0;
 662         }
 663
 664         if (is_long_mode(vcpu)) {
 665                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 666                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 667                                 return 1;
 668                 } else
 669                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 670                                 return 1;
 671         } else {
 672                 if (is_pae(vcpu)) {
 673                         if (cr3 & CR3_PAE_RESERVED_BITS)
 674                                 return 1;
 675                         if (is_paging(vcpu) &&
 676                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 677                                 return 1;
 678                 }
 679                 /*
 680                  * We don't check reserved bits in nonpae mode, because
 681                  * this isn't enforced, and VMware depends on this.
 682                  */
 683         }
 684
 685         vcpu->arch.cr3 = cr3;
 686         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 687         vcpu->arch.mmu.new_cr3(vcpu);
 688         return 0;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 691
 692 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 693 {
 694         if (cr8 & CR8_RESERVED_BITS)
 695                 return 1;
 696         if (irqchip_in_kernel(vcpu->kvm))
 697                 kvm_lapic_set_tpr(vcpu, cr8);
 698         else
 699                 vcpu->arch.cr8 = cr8;
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 703
 704 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 705 {
 706         if (irqchip_in_kernel(vcpu->kvm))
 707                 return kvm_lapic_get_cr8(vcpu);
 708         else
 709                 return vcpu->arch.cr8;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 712
 713 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 714 {
 715         unsigned long dr7;
 716
 717         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 718                 dr7 = vcpu->arch.guest_debug_dr7;
 719         else
 720                 dr7 = vcpu->arch.dr7;
 721         kvm_x86_ops->set_dr7(vcpu, dr7);
 722         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 723 }
 724
 725 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 726 {
 727         switch (dr) {
 728         case 0 ... 3:
 729                 vcpu->arch.db[dr] = val;
 730                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 731                         vcpu->arch.eff_db[dr] = val;
 732                 break;
 733         case 4:
 734                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 735                         return 1; /* #UD */
 736                 /* fall through */
 737         case 6:
 738                 if (val & 0xffffffff00000000ULL)
 739                         return -1; /* #GP */
 740                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 741                 break;
 742         case 5:
 743                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 744                         return 1; /* #UD */
 745                 /* fall through */
 746         default: /* 7 */
 747                 if (val & 0xffffffff00000000ULL)
 748                         return -1; /* #GP */
 749                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 750                 kvm_update_dr7(vcpu);
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 758 {
 759         int res;
 760
 761         res = __kvm_set_dr(vcpu, dr, val);
 762         if (res > 0)
 763                 kvm_queue_exception(vcpu, UD_VECTOR);
 764         else if (res < 0)
 765                 kvm_inject_gp(vcpu, 0);
 766
 767         return res;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_set_dr);
 770
 771 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 772 {
 773         switch (dr) {
 774         case 0 ... 3:
 775                 *val = vcpu->arch.db[dr];
 776                 break;
 777         case 4:
 778                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 779                         return 1;
 780                 /* fall through */
 781         case 6:
 782                 *val = vcpu->arch.dr6;
 783                 break;
 784         case 5:
 785                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                         return 1;
 787                 /* fall through */
 788         default: /* 7 */
 789                 *val = vcpu->arch.dr7;
 790                 break;
 791         }
 792
 793         return 0;
 794 }
 795
 796 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 797 {
 798         if (_kvm_get_dr(vcpu, dr, val)) {
 799                 kvm_queue_exception(vcpu, UD_VECTOR);
 800                 return 1;
 801         }
 802         return 0;
 803 }
 804 EXPORT_SYMBOL_GPL(kvm_get_dr);
 805
 806 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 807 {
 808         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 809         u64 data;
 810         int err;
 811
 812         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 813         if (err)
 814                 return err;
 815         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 816         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 817         return err;
 818 }
 819 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 820
 821 /*
 822  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 823  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 824  *
 825  * This list is modified at module load time to reflect the
 826  * capabilities of the host cpu. This capabilities test skips MSRs that are
 827  * kvm-specific. Those are put in the beginning of the list.
 828  */
 829
 830 #define KVM_SAVE_MSRS_BEGIN     10
 831 static u32 msrs_to_save[] = {
 832         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 833         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 834         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 835         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 836         MSR_KVM_PV_EOI_EN,
 837         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 838         MSR_STAR,
 839 #ifdef CONFIG_X86_64
 840         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 841 #endif
 842         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 843         MSR_IA32_FEATURE_CONTROL
 844 };
 845
 846 static unsigned num_msrs_to_save;
 847
 848 static const u32 emulated_msrs[] = {
 849         MSR_IA32_TSC_ADJUST,
 850         MSR_IA32_TSCDEADLINE,
 851         MSR_IA32_MISC_ENABLE,
 852         MSR_IA32_MCG_STATUS,
 853         MSR_IA32_MCG_CTL,
 854 };
 855
 856 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 857 {
 858         if (efer & efer_reserved_bits)
 859                 return false;
 860
 861         if (efer & EFER_FFXSR) {
 862                 struct kvm_cpuid_entry2 *feat;
 863
 864                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 865                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 866                         return false;
 867         }
 868
 869         if (efer & EFER_SVME) {
 870                 struct kvm_cpuid_entry2 *feat;
 871
 872                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 873                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 874                         return false;
 875         }
 876
 877         return true;
 878 }
 879 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 880
 881 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 882 {
 883         u64 old_efer = vcpu->arch.efer;
 884
 885         if (!kvm_valid_efer(vcpu, efer))
 886                 return 1;
 887
 888         if (is_paging(vcpu)
 889             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 890                 return 1;
 891
 892         efer &= ~EFER_LMA;
 893         efer |= vcpu->arch.efer & EFER_LMA;
 894
 895         kvm_x86_ops->set_efer(vcpu, efer);
 896
 897         /* Update reserved bits */
 898         if ((efer ^ old_efer) & EFER_NX)
 899                 kvm_mmu_reset_context(vcpu);
 900
 901         return 0;
 902 }
 903
 904 void kvm_enable_efer_bits(u64 mask)
 905 {
 906        efer_reserved_bits &= ~mask;
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 909
 910
 911 /*
 912  * Writes msr value into into the appropriate "register".
 913  * Returns 0 on success, non-0 otherwise.
 914  * Assumes vcpu_load() was already called.
 915  */
 916 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 917 {
 918         return kvm_x86_ops->set_msr(vcpu, msr);
 919 }
 920
 921 /*
 922  * Adapt set_msr() to msr_io()'s calling convention
 923  */
 924 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 925 {
 926         struct msr_data msr;
 927
 928         msr.data = *data;
 929         msr.index = index;
 930         msr.host_initiated = true;
 931         return kvm_set_msr(vcpu, &msr);
 932 }
 933
 934 #ifdef CONFIG_X86_64
 935 struct pvclock_gtod_data {
 936         seqcount_t      seq;
 937
 938         struct { /* extract of a clocksource struct */
 939                 int vclock_mode;
 940                 cycle_t cycle_last;
 941                 cycle_t mask;
 942                 u32     mult;
 943                 u32     shift;
 944         } clock;
 945
 946         /* open coded 'struct timespec' */
 947         u64             monotonic_time_snsec;
 948         time_t          monotonic_time_sec;
 949 };
 950
 951 static struct pvclock_gtod_data pvclock_gtod_data;
 952
 953 static void update_pvclock_gtod(struct timekeeper *tk)
 954 {
 955         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 956
 957         write_seqcount_begin(&vdata->seq);
 958
 959         /* copy pvclock gtod data */
 960         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 961         vdata->clock.cycle_last         = tk->clock->cycle_last;
 962         vdata->clock.mask               = tk->clock->mask;
 963         vdata->clock.mult               = tk->mult;
 964         vdata->clock.shift              = tk->shift;
 965
 966         vdata->monotonic_time_sec       = tk->xtime_sec
 967                                         + tk->wall_to_monotonic.tv_sec;
 968         vdata->monotonic_time_snsec     = tk->xtime_nsec
 969                                         + (tk->wall_to_monotonic.tv_nsec
 970                                                 << tk->shift);
 971         while (vdata->monotonic_time_snsec >=
 972                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 973                 vdata->monotonic_time_snsec -=
 974                                         ((u64)NSEC_PER_SEC) << tk->shift;
 975                 vdata->monotonic_time_sec++;
 976         }
 977
 978         write_seqcount_end(&vdata->seq);
 979 }
 980 #endif
 981
 982
 983 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 984 {
 985         int version;
 986         int r;
 987         struct pvclock_wall_clock wc;
 988         struct timespec boot;
 989
 990         if (!wall_clock)
 991                 return;
 992
 993         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 994         if (r)
 995                 return;
 996
 997         if (version & 1)
 998                 ++version;  /* first time write, random junk */
 999
1000         ++version;
1001
1002         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1003
1004         /*
1005          * The guest calculates current wall clock time by adding
1006          * system time (updated by kvm_guest_time_update below) to the
1007          * wall clock specified here.  guest system time equals host
1008          * system time for us, thus we must fill in host boot time here.
1009          */
1010         getboottime(&boot);
1011
1012         if (kvm->arch.kvmclock_offset) {
1013                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1014                 boot = timespec_sub(boot, ts);
1015         }
1016         wc.sec = boot.tv_sec;
1017         wc.nsec = boot.tv_nsec;
1018         wc.version = version;
1019
1020         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1021
1022         version++;
1023         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1024 }
1025
1026 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1027 {
1028         uint32_t quotient, remainder;
1029
1030         /* Don't try to replace with do_div(), this one calculates
1031          * "(dividend << 32) / divisor" */
1032         __asm__ ( "divl %4"
1033                   : "=a" (quotient), "=d" (remainder)
1034                   : "0" (0), "1" (dividend), "r" (divisor) );
1035         return quotient;
1036 }
1037
1038 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1039                                s8 *pshift, u32 *pmultiplier)
1040 {
1041         uint64_t scaled64;
1042         int32_t  shift = 0;
1043         uint64_t tps64;
1044         uint32_t tps32;
1045
1046         tps64 = base_khz * 1000LL;
1047         scaled64 = scaled_khz * 1000LL;
1048         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1049                 tps64 >>= 1;
1050                 shift--;
1051         }
1052
1053         tps32 = (uint32_t)tps64;
1054         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1055                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1056                         scaled64 >>= 1;
1057                 else
1058                         tps32 <<= 1;
1059                 shift++;
1060         }
1061
1062         *pshift = shift;
1063         *pmultiplier = div_frac(scaled64, tps32);
1064
1065         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1066                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1067 }
1068
1069 static inline u64 get_kernel_ns(void)
1070 {
1071         struct timespec ts;
1072
1073         WARN_ON(preemptible());
1074         ktime_get_ts(&ts);
1075         monotonic_to_bootbased(&ts);
1076         return timespec_to_ns(&ts);
1077 }
1078
1079 #ifdef CONFIG_X86_64
1080 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1081 #endif
1082
1083 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1084 unsigned long max_tsc_khz;
1085
1086 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1087 {
1088         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1089                                    vcpu->arch.virtual_tsc_shift);
1090 }
1091
1092 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1093 {
1094         u64 v = (u64)khz * (1000000 + ppm);
1095         do_div(v, 1000000);
1096         return v;
1097 }
1098
1099 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1100 {
1101         u32 thresh_lo, thresh_hi;
1102         int use_scaling = 0;
1103
1104         /* tsc_khz can be zero if TSC calibration fails */
1105         if (this_tsc_khz == 0)
1106                 return;
1107
1108         /* Compute a scale to convert nanoseconds in TSC cycles */
1109         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1110                            &vcpu->arch.virtual_tsc_shift,
1111                            &vcpu->arch.virtual_tsc_mult);
1112         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1113
1114         /*
1115          * Compute the variation in TSC rate which is acceptable
1116          * within the range of tolerance and decide if the
1117          * rate being applied is within that bounds of the hardware
1118          * rate.  If so, no scaling or compensation need be done.
1119          */
1120         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1121         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1122         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1123                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1124                 use_scaling = 1;
1125         }
1126         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1127 }
1128
1129 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1130 {
1131         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1132                                       vcpu->arch.virtual_tsc_mult,
1133                                       vcpu->arch.virtual_tsc_shift);
1134         tsc += vcpu->arch.this_tsc_write;
1135         return tsc;
1136 }
1137
1138 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1139 {
1140 #ifdef CONFIG_X86_64
1141         bool vcpus_matched;
1142         bool do_request = false;
1143         struct kvm_arch *ka = &vcpu->kvm->arch;
1144         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1145
1146         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1147                          atomic_read(&vcpu->kvm->online_vcpus));
1148
1149         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1150                 if (!ka->use_master_clock)
1151                         do_request = 1;
1152
1153         if (!vcpus_matched && ka->use_master_clock)
1154                         do_request = 1;
1155
1156         if (do_request)
1157                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1158
1159         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1160                             atomic_read(&vcpu->kvm->online_vcpus),
1161                             ka->use_master_clock, gtod->clock.vclock_mode);
1162 #endif
1163 }
1164
1165 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1166 {
1167         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1168         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1169 }
1170
1171 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1172 {
1173         struct kvm *kvm = vcpu->kvm;
1174         u64 offset, ns, elapsed;
1175         unsigned long flags;
1176         s64 usdiff;
1177         bool matched;
1178         u64 data = msr->data;
1179
1180         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1181         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1182         ns = get_kernel_ns();
1183         elapsed = ns - kvm->arch.last_tsc_nsec;
1184
1185         if (vcpu->arch.virtual_tsc_khz) {
1186                 int faulted = 0;
1187
1188                 /* n.b - signed multiplication and division required */
1189                 usdiff = data - kvm->arch.last_tsc_write;
1190 #ifdef CONFIG_X86_64
1191                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1192 #else
1193                 /* do_div() only does unsigned */
1194                 asm("1: idivl %[divisor]\n"
1195                     "2: xor %%edx, %%edx\n"
1196                     "   movl $0, %[faulted]\n"
1197                     "3:\n"
1198                     ".section .fixup,\"ax\"\n"
1199                     "4: movl $1, %[faulted]\n"
1200                     "   jmp  3b\n"
1201                     ".previous\n"
1202
1203                 _ASM_EXTABLE(1b, 4b)
1204
1205                 : "=A"(usdiff), [faulted] "=r" (faulted)
1206                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1207
1208 #endif
1209                 do_div(elapsed, 1000);
1210                 usdiff -= elapsed;
1211                 if (usdiff < 0)
1212                         usdiff = -usdiff;
1213
1214                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1215                 if (faulted)
1216                         usdiff = USEC_PER_SEC;
1217         } else
1218                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1219
1220         /*
1221          * Special case: TSC write with a small delta (1 second) of virtual
1222          * cycle time against real time is interpreted as an attempt to
1223          * synchronize the CPU.
1224          *
1225          * For a reliable TSC, we can match TSC offsets, and for an unstable
1226          * TSC, we add elapsed time in this computation.  We could let the
1227          * compensation code attempt to catch up if we fall behind, but
1228          * it's better to try to match offsets from the beginning.
1229          */
1230         if (usdiff < USEC_PER_SEC &&
1231             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1232                 if (!check_tsc_unstable()) {
1233                         offset = kvm->arch.cur_tsc_offset;
1234                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1235                 } else {
1236                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1237                         data += delta;
1238                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1239                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1240                 }
1241                 matched = true;
1242         } else {
1243                 /*
1244                  * We split periods of matched TSC writes into generations.
1245                  * For each generation, we track the original measured
1246                  * nanosecond time, offset, and write, so if TSCs are in
1247                  * sync, we can match exact offset, and if not, we can match
1248                  * exact software computation in compute_guest_tsc()
1249                  *
1250                  * These values are tracked in kvm->arch.cur_xxx variables.
1251                  */
1252                 kvm->arch.cur_tsc_generation++;
1253                 kvm->arch.cur_tsc_nsec = ns;
1254                 kvm->arch.cur_tsc_write = data;
1255                 kvm->arch.cur_tsc_offset = offset;
1256                 matched = false;
1257                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1258                          kvm->arch.cur_tsc_generation, data);
1259         }
1260
1261         /*
1262          * We also track th most recent recorded KHZ, write and time to
1263          * allow the matching interval to be extended at each write.
1264          */
1265         kvm->arch.last_tsc_nsec = ns;
1266         kvm->arch.last_tsc_write = data;
1267         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1268
1269         /* Reset of TSC must disable overshoot protection below */
1270         vcpu->arch.hv_clock.tsc_timestamp = 0;
1271         vcpu->arch.last_guest_tsc = data;
1272
1273         /* Keep track of which generation this VCPU has synchronized to */
1274         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1275         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1276         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1277
1278         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1279                 update_ia32_tsc_adjust_msr(vcpu, offset);
1280         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1281         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1282
1283         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1284         if (matched)
1285                 kvm->arch.nr_vcpus_matched_tsc++;
1286         else
1287                 kvm->arch.nr_vcpus_matched_tsc = 0;
1288
1289         kvm_track_tsc_matching(vcpu);
1290         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1291 }
1292
1293 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1294
1295 #ifdef CONFIG_X86_64
1296
1297 static cycle_t read_tsc(void)
1298 {
1299         cycle_t ret;
1300         u64 last;
1301
1302         /*
1303          * Empirically, a fence (of type that depends on the CPU)
1304          * before rdtsc is enough to ensure that rdtsc is ordered
1305          * with respect to loads.  The various CPU manuals are unclear
1306          * as to whether rdtsc can be reordered with later loads,
1307          * but no one has ever seen it happen.
1308          */
1309         rdtsc_barrier();
1310         ret = (cycle_t)vget_cycles();
1311
1312         last = pvclock_gtod_data.clock.cycle_last;
1313
1314         if (likely(ret >= last))
1315                 return ret;
1316
1317         /*
1318          * GCC likes to generate cmov here, but this branch is extremely
1319          * predictable (it's just a funciton of time and the likely is
1320          * very likely) and there's a data dependence, so force GCC
1321          * to generate a branch instead.  I don't barrier() because
1322          * we don't actually need a barrier, and if this function
1323          * ever gets inlined it will generate worse code.
1324          */
1325         asm volatile ("");
1326         return last;
1327 }
1328
1329 static inline u64 vgettsc(cycle_t *cycle_now)
1330 {
1331         long v;
1332         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1333
1334         *cycle_now = read_tsc();
1335
1336         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1337         return v * gtod->clock.mult;
1338 }
1339
1340 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1341 {
1342         unsigned long seq;
1343         u64 ns;
1344         int mode;
1345         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1346
1347         ts->tv_nsec = 0;
1348         do {
1349                 seq = read_seqcount_begin(&gtod->seq);
1350                 mode = gtod->clock.vclock_mode;
1351                 ts->tv_sec = gtod->monotonic_time_sec;
1352                 ns = gtod->monotonic_time_snsec;
1353                 ns += vgettsc(cycle_now);
1354                 ns >>= gtod->clock.shift;
1355         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1356         timespec_add_ns(ts, ns);
1357
1358         return mode;
1359 }
1360
1361 /* returns true if host is using tsc clocksource */
1362 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1363 {
1364         struct timespec ts;
1365
1366         /* checked again under seqlock below */
1367         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1368                 return false;
1369
1370         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1371                 return false;
1372
1373         monotonic_to_bootbased(&ts);
1374         *kernel_ns = timespec_to_ns(&ts);
1375
1376         return true;
1377 }
1378 #endif
1379
1380 /*
1381  *
1382  * Assuming a stable TSC across physical CPUS, and a stable TSC
1383  * across virtual CPUs, the following condition is possible.
1384  * Each numbered line represents an event visible to both
1385  * CPUs at the next numbered event.
1386  *
1387  * "timespecX" represents host monotonic time. "tscX" represents
1388  * RDTSC value.
1389  *
1390  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1391  *
1392  * 1.  read timespec0,tsc0
1393  * 2.                                   | timespec1 = timespec0 + N
1394  *                                      | tsc1 = tsc0 + M
1395  * 3. transition to guest               | transition to guest
1396  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1397  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1398  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1399  *
1400  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1401  *
1402  *      - ret0 < ret1
1403  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1404  *              ...
1405  *      - 0 < N - M => M < N
1406  *
1407  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1408  * always the case (the difference between two distinct xtime instances
1409  * might be smaller then the difference between corresponding TSC reads,
1410  * when updating guest vcpus pvclock areas).
1411  *
1412  * To avoid that problem, do not allow visibility of distinct
1413  * system_timestamp/tsc_timestamp values simultaneously: use a master
1414  * copy of host monotonic time values. Update that master copy
1415  * in lockstep.
1416  *
1417  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1418  *
1419  */
1420
1421 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1422 {
1423 #ifdef CONFIG_X86_64
1424         struct kvm_arch *ka = &kvm->arch;
1425         int vclock_mode;
1426         bool host_tsc_clocksource, vcpus_matched;
1427
1428         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1429                         atomic_read(&kvm->online_vcpus));
1430
1431         /*
1432          * If the host uses TSC clock, then passthrough TSC as stable
1433          * to the guest.
1434          */
1435         host_tsc_clocksource = kvm_get_time_and_clockread(
1436                                         &ka->master_kernel_ns,
1437                                         &ka->master_cycle_now);
1438
1439         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1440
1441         if (ka->use_master_clock)
1442                 atomic_set(&kvm_guest_has_master_clock, 1);
1443
1444         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1445         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1446                                         vcpus_matched);
1447 #endif
1448 }
1449
1450 static int kvm_guest_time_update(struct kvm_vcpu *v)
1451 {
1452         unsigned long flags, this_tsc_khz;
1453         struct kvm_vcpu_arch *vcpu = &v->arch;
1454         struct kvm_arch *ka = &v->kvm->arch;
1455         s64 kernel_ns, max_kernel_ns;
1456         u64 tsc_timestamp, host_tsc;
1457         struct pvclock_vcpu_time_info guest_hv_clock;
1458         u8 pvclock_flags;
1459         bool use_master_clock;
1460
1461         kernel_ns = 0;
1462         host_tsc = 0;
1463
1464         /*
1465          * If the host uses TSC clock, then passthrough TSC as stable
1466          * to the guest.
1467          */
1468         spin_lock(&ka->pvclock_gtod_sync_lock);
1469         use_master_clock = ka->use_master_clock;
1470         if (use_master_clock) {
1471                 host_tsc = ka->master_cycle_now;
1472                 kernel_ns = ka->master_kernel_ns;
1473         }
1474         spin_unlock(&ka->pvclock_gtod_sync_lock);
1475
1476         /* Keep irq disabled to prevent changes to the clock */
1477         local_irq_save(flags);
1478         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1479         if (unlikely(this_tsc_khz == 0)) {
1480                 local_irq_restore(flags);
1481                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1482                 return 1;
1483         }
1484         if (!use_master_clock) {
1485                 host_tsc = native_read_tsc();
1486                 kernel_ns = get_kernel_ns();
1487         }
1488
1489         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1490
1491         /*
1492          * We may have to catch up the TSC to match elapsed wall clock
1493          * time for two reasons, even if kvmclock is used.
1494          *   1) CPU could have been running below the maximum TSC rate
1495          *   2) Broken TSC compensation resets the base at each VCPU
1496          *      entry to avoid unknown leaps of TSC even when running
1497          *      again on the same CPU.  This may cause apparent elapsed
1498          *      time to disappear, and the guest to stand still or run
1499          *      very slowly.
1500          */
1501         if (vcpu->tsc_catchup) {
1502                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1503                 if (tsc > tsc_timestamp) {
1504                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1505                         tsc_timestamp = tsc;
1506                 }
1507         }
1508
1509         local_irq_restore(flags);
1510
1511         if (!vcpu->pv_time_enabled)
1512                 return 0;
1513
1514         /*
1515          * Time as measured by the TSC may go backwards when resetting the base
1516          * tsc_timestamp.  The reason for this is that the TSC resolution is
1517          * higher than the resolution of the other clock scales.  Thus, many
1518          * possible measurments of the TSC correspond to one measurement of any
1519          * other clock, and so a spread of values is possible.  This is not a
1520          * problem for the computation of the nanosecond clock; with TSC rates
1521          * around 1GHZ, there can only be a few cycles which correspond to one
1522          * nanosecond value, and any path through this code will inevitably
1523          * take longer than that.  However, with the kernel_ns value itself,
1524          * the precision may be much lower, down to HZ granularity.  If the
1525          * first sampling of TSC against kernel_ns ends in the low part of the
1526          * range, and the second in the high end of the range, we can get:
1527          *
1528          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1529          *
1530          * As the sampling errors potentially range in the thousands of cycles,
1531          * it is possible such a time value has already been observed by the
1532          * guest.  To protect against this, we must compute the system time as
1533          * observed by the guest and ensure the new system time is greater.
1534          */
1535         max_kernel_ns = 0;
1536         if (vcpu->hv_clock.tsc_timestamp) {
1537                 max_kernel_ns = vcpu->last_guest_tsc -
1538                                 vcpu->hv_clock.tsc_timestamp;
1539                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1540                                     vcpu->hv_clock.tsc_to_system_mul,
1541                                     vcpu->hv_clock.tsc_shift);
1542                 max_kernel_ns += vcpu->last_kernel_ns;
1543         }
1544
1545         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1546                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1547                                    &vcpu->hv_clock.tsc_shift,
1548                                    &vcpu->hv_clock.tsc_to_system_mul);
1549                 vcpu->hw_tsc_khz = this_tsc_khz;
1550         }
1551
1552         /* with a master <monotonic time, tsc value> tuple,
1553          * pvclock clock reads always increase at the (scaled) rate
1554          * of guest TSC - no need to deal with sampling errors.
1555          */
1556         if (!use_master_clock) {
1557                 if (max_kernel_ns > kernel_ns)
1558                         kernel_ns = max_kernel_ns;
1559         }
1560         /* With all the info we got, fill in the values */
1561         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1562         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1563         vcpu->last_kernel_ns = kernel_ns;
1564         vcpu->last_guest_tsc = tsc_timestamp;
1565
1566         /*
1567          * The interface expects us to write an even number signaling that the
1568          * update is finished. Since the guest won't see the intermediate
1569          * state, we just increase by 2 at the end.
1570          */
1571         vcpu->hv_clock.version += 2;
1572
1573         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1574                 &guest_hv_clock, sizeof(guest_hv_clock))))
1575                 return 0;
1576
1577         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1578         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1579
1580         if (vcpu->pvclock_set_guest_stopped_request) {
1581                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1582                 vcpu->pvclock_set_guest_stopped_request = false;
1583         }
1584
1585         /* If the host uses TSC clocksource, then it is stable */
1586         if (use_master_clock)
1587                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1588
1589         vcpu->hv_clock.flags = pvclock_flags;
1590
1591         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1592                                 &vcpu->hv_clock,
1593                                 sizeof(vcpu->hv_clock));
1594         return 0;
1595 }
1596
1597 /*
1598  * kvmclock updates which are isolated to a given vcpu, such as
1599  * vcpu->cpu migration, should not allow system_timestamp from
1600  * the rest of the vcpus to remain static. Otherwise ntp frequency
1601  * correction applies to one vcpu's system_timestamp but not
1602  * the others.
1603  *
1604  * So in those cases, request a kvmclock update for all vcpus.
1605  * The worst case for a remote vcpu to update its kvmclock
1606  * is then bounded by maximum nohz sleep latency.
1607  */
1608
1609 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1610 {
1611         int i;
1612         struct kvm *kvm = v->kvm;
1613         struct kvm_vcpu *vcpu;
1614
1615         kvm_for_each_vcpu(i, vcpu, kvm) {
1616                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1617                 kvm_vcpu_kick(vcpu);
1618         }
1619 }
1620
1621 static bool msr_mtrr_valid(unsigned msr)
1622 {
1623         switch (msr) {
1624         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1625         case MSR_MTRRfix64K_00000:
1626         case MSR_MTRRfix16K_80000:
1627         case MSR_MTRRfix16K_A0000:
1628         case MSR_MTRRfix4K_C0000:
1629         case MSR_MTRRfix4K_C8000:
1630         case MSR_MTRRfix4K_D0000:
1631         case MSR_MTRRfix4K_D8000:
1632         case MSR_MTRRfix4K_E0000:
1633         case MSR_MTRRfix4K_E8000:
1634         case MSR_MTRRfix4K_F0000:
1635         case MSR_MTRRfix4K_F8000:
1636         case MSR_MTRRdefType:
1637         case MSR_IA32_CR_PAT:
1638                 return true;
1639         case 0x2f8:
1640                 return true;
1641         }
1642         return false;
1643 }
1644
1645 static bool valid_pat_type(unsigned t)
1646 {
1647         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1648 }
1649
1650 static bool valid_mtrr_type(unsigned t)
1651 {
1652         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1653 }
1654
1655 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1656 {
1657         int i;
1658
1659         if (!msr_mtrr_valid(msr))
1660                 return false;
1661
1662         if (msr == MSR_IA32_CR_PAT) {
1663                 for (i = 0; i < 8; i++)
1664                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1665                                 return false;
1666                 return true;
1667         } else if (msr == MSR_MTRRdefType) {
1668                 if (data & ~0xcff)
1669                         return false;
1670                 return valid_mtrr_type(data & 0xff);
1671         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1672                 for (i = 0; i < 8 ; i++)
1673                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1674                                 return false;
1675                 return true;
1676         }
1677
1678         /* variable MTRRs */
1679         return valid_mtrr_type(data & 0xff);
1680 }
1681
1682 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1683 {
1684         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1685
1686         if (!mtrr_valid(vcpu, msr, data))
1687                 return 1;
1688
1689         if (msr == MSR_MTRRdefType) {
1690                 vcpu->arch.mtrr_state.def_type = data;
1691                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1692         } else if (msr == MSR_MTRRfix64K_00000)
1693                 p[0] = data;
1694         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1695                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1696         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1697                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1698         else if (msr == MSR_IA32_CR_PAT)
1699                 vcpu->arch.pat = data;
1700         else {  /* Variable MTRRs */
1701                 int idx, is_mtrr_mask;
1702                 u64 *pt;
1703
1704                 idx = (msr - 0x200) / 2;
1705                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1706                 if (!is_mtrr_mask)
1707                         pt =
1708                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1709                 else
1710                         pt =
1711                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1712                 *pt = data;
1713         }
1714
1715         kvm_mmu_reset_context(vcpu);
1716         return 0;
1717 }
1718
1719 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1720 {
1721         u64 mcg_cap = vcpu->arch.mcg_cap;
1722         unsigned bank_num = mcg_cap & 0xff;
1723
1724         switch (msr) {
1725         case MSR_IA32_MCG_STATUS:
1726                 vcpu->arch.mcg_status = data;
1727                 break;
1728         case MSR_IA32_MCG_CTL:
1729                 if (!(mcg_cap & MCG_CTL_P))
1730                         return 1;
1731                 if (data != 0 && data != ~(u64)0)
1732                         return -1;
1733                 vcpu->arch.mcg_ctl = data;
1734                 break;
1735         default:
1736                 if (msr >= MSR_IA32_MC0_CTL &&
1737                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1738                         u32 offset = msr - MSR_IA32_MC0_CTL;
1739                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1740                          * some Linux kernels though clear bit 10 in bank 4 to
1741                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1742                          * this to avoid an uncatched #GP in the guest
1743                          */
1744                         if ((offset & 0x3) == 0 &&
1745                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1746                                 return -1;
1747                         vcpu->arch.mce_banks[offset] = data;
1748                         break;
1749                 }
1750                 return 1;
1751         }
1752         return 0;
1753 }
1754
1755 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1756 {
1757         struct kvm *kvm = vcpu->kvm;
1758         int lm = is_long_mode(vcpu);
1759         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1760                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1761         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1762                 : kvm->arch.xen_hvm_config.blob_size_32;
1763         u32 page_num = data & ~PAGE_MASK;
1764         u64 page_addr = data & PAGE_MASK;
1765         u8 *page;
1766         int r;
1767
1768         r = -E2BIG;
1769         if (page_num >= blob_size)
1770                 goto out;
1771         r = -ENOMEM;
1772         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1773         if (IS_ERR(page)) {
1774                 r = PTR_ERR(page);
1775                 goto out;
1776         }
1777         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1778                 goto out_free;
1779         r = 0;
1780 out_free:
1781         kfree(page);
1782 out:
1783         return r;
1784 }
1785
1786 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1787 {
1788         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1789 }
1790
1791 static bool kvm_hv_msr_partition_wide(u32 msr)
1792 {
1793         bool r = false;
1794         switch (msr) {
1795         case HV_X64_MSR_GUEST_OS_ID:
1796         case HV_X64_MSR_HYPERCALL:
1797                 r = true;
1798                 break;
1799         }
1800
1801         return r;
1802 }
1803
1804 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1805 {
1806         struct kvm *kvm = vcpu->kvm;
1807
1808         switch (msr) {
1809         case HV_X64_MSR_GUEST_OS_ID:
1810                 kvm->arch.hv_guest_os_id = data;
1811                 /* setting guest os id to zero disables hypercall page */
1812                 if (!kvm->arch.hv_guest_os_id)
1813                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1814                 break;
1815         case HV_X64_MSR_HYPERCALL: {
1816                 u64 gfn;
1817                 unsigned long addr;
1818                 u8 instructions[4];
1819
1820                 /* if guest os id is not set hypercall should remain disabled */
1821                 if (!kvm->arch.hv_guest_os_id)
1822                         break;
1823                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1824                         kvm->arch.hv_hypercall = data;
1825                         break;
1826                 }
1827                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1828                 addr = gfn_to_hva(kvm, gfn);
1829                 if (kvm_is_error_hva(addr))
1830                         return 1;
1831                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1832                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1833                 if (__copy_to_user((void __user *)addr, instructions, 4))
1834                         return 1;
1835                 kvm->arch.hv_hypercall = data;
1836                 break;
1837         }
1838         default:
1839                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1840                             "data 0x%llx\n", msr, data);
1841                 return 1;
1842         }
1843         return 0;
1844 }
1845
1846 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1847 {
1848         switch (msr) {
1849         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1850                 unsigned long addr;
1851
1852                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1853                         vcpu->arch.hv_vapic = data;
1854                         break;
1855                 }
1856                 addr = gfn_to_hva(vcpu->kvm, data >>
1857                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1858                 if (kvm_is_error_hva(addr))
1859                         return 1;
1860                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1861                         return 1;
1862                 vcpu->arch.hv_vapic = data;
1863                 break;
1864         }
1865         case HV_X64_MSR_EOI:
1866                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1867         case HV_X64_MSR_ICR:
1868                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1869         case HV_X64_MSR_TPR:
1870                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1871         default:
1872                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1873                             "data 0x%llx\n", msr, data);
1874                 return 1;
1875         }
1876
1877         return 0;
1878 }
1879
1880 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1881 {
1882         gpa_t gpa = data & ~0x3f;
1883
1884         /* Bits 2:5 are reserved, Should be zero */
1885         if (data & 0x3c)
1886                 return 1;
1887
1888         vcpu->arch.apf.msr_val = data;
1889
1890         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1891                 kvm_clear_async_pf_completion_queue(vcpu);
1892                 kvm_async_pf_hash_reset(vcpu);
1893                 return 0;
1894         }
1895
1896         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1897                                         sizeof(u32)))
1898                 return 1;
1899
1900         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1901         kvm_async_pf_wakeup_all(vcpu);
1902         return 0;
1903 }
1904
1905 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1906 {
1907         vcpu->arch.pv_time_enabled = false;
1908 }
1909
1910 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1911 {
1912         u64 delta;
1913
1914         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1915                 return;
1916
1917         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1918         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1919         vcpu->arch.st.accum_steal = delta;
1920 }
1921
1922 static void record_steal_time(struct kvm_vcpu *vcpu)
1923 {
1924         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1925                 return;
1926
1927         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1928                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1929                 return;
1930
1931         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1932         vcpu->arch.st.steal.version += 2;
1933         vcpu->arch.st.accum_steal = 0;
1934
1935         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1936                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1937 }
1938
1939 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1940 {
1941         bool pr = false;
1942         u32 msr = msr_info->index;
1943         u64 data = msr_info->data;
1944
1945         switch (msr) {
1946         case MSR_AMD64_NB_CFG:
1947         case MSR_IA32_UCODE_REV:
1948         case MSR_IA32_UCODE_WRITE:
1949         case MSR_VM_HSAVE_PA:
1950         case MSR_AMD64_PATCH_LOADER:
1951         case MSR_AMD64_BU_CFG2:
1952                 break;
1953
1954         case MSR_EFER:
1955                 return set_efer(vcpu, data);
1956         case MSR_K7_HWCR:
1957                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1958                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1959                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1960                 if (data != 0) {
1961                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1962                                     data);
1963                         return 1;
1964                 }
1965                 break;
1966         case MSR_FAM10H_MMIO_CONF_BASE:
1967                 if (data != 0) {
1968                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1969                                     "0x%llx\n", data);
1970                         return 1;
1971                 }
1972                 break;
1973         case MSR_IA32_DEBUGCTLMSR:
1974                 if (!data) {
1975                         /* We support the non-activated case already */
1976                         break;
1977                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1978                         /* Values other than LBR and BTF are vendor-specific,
1979                            thus reserved and should throw a #GP */
1980                         return 1;
1981                 }
1982                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1983                             __func__, data);
1984                 break;
1985         case 0x200 ... 0x2ff:
1986                 return set_msr_mtrr(vcpu, msr, data);
1987         case MSR_IA32_APICBASE:
1988                 kvm_set_apic_base(vcpu, data);
1989                 break;
1990         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1991                 return kvm_x2apic_msr_write(vcpu, msr, data);
1992         case MSR_IA32_TSCDEADLINE:
1993                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1994                 break;
1995         case MSR_IA32_TSC_ADJUST:
1996                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1997                         if (!msr_info->host_initiated) {
1998                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1999                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2000                         }
2001                         vcpu->arch.ia32_tsc_adjust_msr = data;
2002                 }
2003                 break;
2004         case MSR_IA32_MISC_ENABLE:
2005                 vcpu->arch.ia32_misc_enable_msr = data;
2006                 break;
2007         case MSR_KVM_WALL_CLOCK_NEW:
2008         case MSR_KVM_WALL_CLOCK:
2009                 vcpu->kvm->arch.wall_clock = data;
2010                 kvm_write_wall_clock(vcpu->kvm, data);
2011                 break;
2012         case MSR_KVM_SYSTEM_TIME_NEW:
2013         case MSR_KVM_SYSTEM_TIME: {
2014                 u64 gpa_offset;
2015                 kvmclock_reset(vcpu);
2016
2017                 vcpu->arch.time = data;
2018                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2019
2020                 /* we verify if the enable bit is set... */
2021                 if (!(data & 1))
2022                         break;
2023
2024                 gpa_offset = data & ~(PAGE_MASK | 1);
2025
2026                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2027                      &vcpu->arch.pv_time, data & ~1ULL,
2028                      sizeof(struct pvclock_vcpu_time_info)))
2029                         vcpu->arch.pv_time_enabled = false;
2030                 else
2031                         vcpu->arch.pv_time_enabled = true;
2032
2033                 break;
2034         }
2035         case MSR_KVM_ASYNC_PF_EN:
2036                 if (kvm_pv_enable_async_pf(vcpu, data))
2037                         return 1;
2038                 break;
2039         case MSR_KVM_STEAL_TIME:
2040
2041                 if (unlikely(!sched_info_on()))
2042                         return 1;
2043
2044                 if (data & KVM_STEAL_RESERVED_MASK)
2045                         return 1;
2046
2047                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2048                                                 data & KVM_STEAL_VALID_BITS,
2049                                                 sizeof(struct kvm_steal_time)))
2050                         return 1;
2051
2052                 vcpu->arch.st.msr_val = data;
2053
2054                 if (!(data & KVM_MSR_ENABLED))
2055                         break;
2056
2057                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2058
2059                 preempt_disable();
2060                 accumulate_steal_time(vcpu);
2061                 preempt_enable();
2062
2063                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2064
2065                 break;
2066         case MSR_KVM_PV_EOI_EN:
2067                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2068                         return 1;
2069                 break;
2070
2071         case MSR_IA32_MCG_CTL:
2072         case MSR_IA32_MCG_STATUS:
2073         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2074                 return set_msr_mce(vcpu, msr, data);
2075
2076         /* Performance counters are not protected by a CPUID bit,
2077          * so we should check all of them in the generic path for the sake of
2078          * cross vendor migration.
2079          * Writing a zero into the event select MSRs disables them,
2080          * which we perfectly emulate ;-). Any other value should be at least
2081          * reported, some guests depend on them.
2082          */
2083         case MSR_K7_EVNTSEL0:
2084         case MSR_K7_EVNTSEL1:
2085         case MSR_K7_EVNTSEL2:
2086         case MSR_K7_EVNTSEL3:
2087                 if (data != 0)
2088                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2089                                     "0x%x data 0x%llx\n", msr, data);
2090                 break;
2091         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2092          * so we ignore writes to make it happy.
2093          */
2094         case MSR_K7_PERFCTR0:
2095         case MSR_K7_PERFCTR1:
2096         case MSR_K7_PERFCTR2:
2097         case MSR_K7_PERFCTR3:
2098                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2099                             "0x%x data 0x%llx\n", msr, data);
2100                 break;
2101         case MSR_P6_PERFCTR0:
2102         case MSR_P6_PERFCTR1:
2103                 pr = true;
2104         case MSR_P6_EVNTSEL0:
2105         case MSR_P6_EVNTSEL1:
2106                 if (kvm_pmu_msr(vcpu, msr))
2107                         return kvm_pmu_set_msr(vcpu, msr_info);
2108
2109                 if (pr || data != 0)
2110                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2111                                     "0x%x data 0x%llx\n", msr, data);
2112                 break;
2113         case MSR_K7_CLK_CTL:
2114                 /*
2115                  * Ignore all writes to this no longer documented MSR.
2116                  * Writes are only relevant for old K7 processors,
2117                  * all pre-dating SVM, but a recommended workaround from
2118                  * AMD for these chips. It is possible to specify the
2119                  * affected processor models on the command line, hence
2120                  * the need to ignore the workaround.
2121                  */
2122                 break;
2123         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2124                 if (kvm_hv_msr_partition_wide(msr)) {
2125                         int r;
2126                         mutex_lock(&vcpu->kvm->lock);
2127                         r = set_msr_hyperv_pw(vcpu, msr, data);
2128                         mutex_unlock(&vcpu->kvm->lock);
2129                         return r;
2130                 } else
2131                         return set_msr_hyperv(vcpu, msr, data);
2132                 break;
2133         case MSR_IA32_BBL_CR_CTL3:
2134                 /* Drop writes to this legacy MSR -- see rdmsr
2135                  * counterpart for further detail.
2136                  */
2137                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2138                 break;
2139         case MSR_AMD64_OSVW_ID_LENGTH:
2140                 if (!guest_cpuid_has_osvw(vcpu))
2141                         return 1;
2142                 vcpu->arch.osvw.length = data;
2143                 break;
2144         case MSR_AMD64_OSVW_STATUS:
2145                 if (!guest_cpuid_has_osvw(vcpu))
2146                         return 1;
2147                 vcpu->arch.osvw.status = data;
2148                 break;
2149         default:
2150                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2151                         return xen_hvm_config(vcpu, data);
2152                 if (kvm_pmu_msr(vcpu, msr))
2153                         return kvm_pmu_set_msr(vcpu, msr_info);
2154                 if (!ignore_msrs) {
2155                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2156                                     msr, data);
2157                         return 1;
2158                 } else {
2159                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2160                                     msr, data);
2161                         break;
2162                 }
2163         }
2164         return 0;
2165 }
2166 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2167
2168
2169 /*
2170  * Reads an msr value (of 'msr_index') into 'pdata'.
2171  * Returns 0 on success, non-0 otherwise.
2172  * Assumes vcpu_load() was already called.
2173  */
2174 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2175 {
2176         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2177 }
2178
2179 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2180 {
2181         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2182
2183         if (!msr_mtrr_valid(msr))
2184                 return 1;
2185
2186         if (msr == MSR_MTRRdefType)
2187                 *pdata = vcpu->arch.mtrr_state.def_type +
2188                          (vcpu->arch.mtrr_state.enabled << 10);
2189         else if (msr == MSR_MTRRfix64K_00000)
2190                 *pdata = p[0];
2191         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2192                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2193         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2194                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2195         else if (msr == MSR_IA32_CR_PAT)
2196                 *pdata = vcpu->arch.pat;
2197         else {  /* Variable MTRRs */
2198                 int idx, is_mtrr_mask;
2199                 u64 *pt;
2200
2201                 idx = (msr - 0x200) / 2;
2202                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2203                 if (!is_mtrr_mask)
2204                         pt =
2205                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2206                 else
2207                         pt =
2208                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2209                 *pdata = *pt;
2210         }
2211
2212         return 0;
2213 }
2214
2215 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2216 {
2217         u64 data;
2218         u64 mcg_cap = vcpu->arch.mcg_cap;
2219         unsigned bank_num = mcg_cap & 0xff;
2220
2221         switch (msr) {
2222         case MSR_IA32_P5_MC_ADDR:
2223         case MSR_IA32_P5_MC_TYPE:
2224                 data = 0;
2225                 break;
2226         case MSR_IA32_MCG_CAP:
2227                 data = vcpu->arch.mcg_cap;
2228                 break;
2229         case MSR_IA32_MCG_CTL:
2230                 if (!(mcg_cap & MCG_CTL_P))
2231                         return 1;
2232                 data = vcpu->arch.mcg_ctl;
2233                 break;
2234         case MSR_IA32_MCG_STATUS:
2235                 data = vcpu->arch.mcg_status;
2236                 break;
2237         default:
2238                 if (msr >= MSR_IA32_MC0_CTL &&
2239                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2240                         u32 offset = msr - MSR_IA32_MC0_CTL;
2241                         data = vcpu->arch.mce_banks[offset];
2242                         break;
2243                 }
2244                 return 1;
2245         }
2246         *pdata = data;
2247         return 0;
2248 }
2249
2250 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2251 {
2252         u64 data = 0;
2253         struct kvm *kvm = vcpu->kvm;
2254
2255         switch (msr) {
2256         case HV_X64_MSR_GUEST_OS_ID:
2257                 data = kvm->arch.hv_guest_os_id;
2258                 break;
2259         case HV_X64_MSR_HYPERCALL:
2260                 data = kvm->arch.hv_hypercall;
2261                 break;
2262         default:
2263                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2264                 return 1;
2265         }
2266
2267         *pdata = data;
2268         return 0;
2269 }
2270
2271 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2272 {
2273         u64 data = 0;
2274
2275         switch (msr) {
2276         case HV_X64_MSR_VP_INDEX: {
2277                 int r;
2278                 struct kvm_vcpu *v;
2279                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2280                         if (v == vcpu)
2281                                 data = r;
2282                 break;
2283         }
2284         case HV_X64_MSR_EOI:
2285                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2286         case HV_X64_MSR_ICR:
2287                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2288         case HV_X64_MSR_TPR:
2289                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2290         case HV_X64_MSR_APIC_ASSIST_PAGE:
2291                 data = vcpu->arch.hv_vapic;
2292                 break;
2293         default:
2294                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2295                 return 1;
2296         }
2297         *pdata = data;
2298         return 0;
2299 }
2300
2301 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2302 {
2303         u64 data;
2304
2305         switch (msr) {
2306         case MSR_IA32_PLATFORM_ID:
2307         case MSR_IA32_EBL_CR_POWERON:
2308         case MSR_IA32_DEBUGCTLMSR:
2309         case MSR_IA32_LASTBRANCHFROMIP:
2310         case MSR_IA32_LASTBRANCHTOIP:
2311         case MSR_IA32_LASTINTFROMIP:
2312         case MSR_IA32_LASTINTTOIP:
2313         case MSR_K8_SYSCFG:
2314         case MSR_K7_HWCR:
2315         case MSR_VM_HSAVE_PA:
2316         case MSR_K7_EVNTSEL0:
2317         case MSR_K7_PERFCTR0:
2318         case MSR_K8_INT_PENDING_MSG:
2319         case MSR_AMD64_NB_CFG:
2320         case MSR_FAM10H_MMIO_CONF_BASE:
2321         case MSR_AMD64_BU_CFG2:
2322                 data = 0;
2323                 break;
2324         case MSR_P6_PERFCTR0:
2325         case MSR_P6_PERFCTR1:
2326         case MSR_P6_EVNTSEL0:
2327         case MSR_P6_EVNTSEL1:
2328                 if (kvm_pmu_msr(vcpu, msr))
2329                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2330                 data = 0;
2331                 break;
2332         case MSR_IA32_UCODE_REV:
2333                 data = 0x100000000ULL;
2334                 break;
2335         case MSR_MTRRcap:
2336                 data = 0x500 | KVM_NR_VAR_MTRR;
2337                 break;
2338         case 0x200 ... 0x2ff:
2339                 return get_msr_mtrr(vcpu, msr, pdata);
2340         case 0xcd: /* fsb frequency */
2341                 data = 3;
2342                 break;
2343                 /*
2344                  * MSR_EBC_FREQUENCY_ID
2345                  * Conservative value valid for even the basic CPU models.
2346                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2347                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2348                  * and 266MHz for model 3, or 4. Set Core Clock
2349                  * Frequency to System Bus Frequency Ratio to 1 (bits
2350                  * 31:24) even though these are only valid for CPU
2351                  * models > 2, however guests may end up dividing or
2352                  * multiplying by zero otherwise.
2353                  */
2354         case MSR_EBC_FREQUENCY_ID:
2355                 data = 1 << 24;
2356                 break;
2357         case MSR_IA32_APICBASE:
2358                 data = kvm_get_apic_base(vcpu);
2359                 break;
2360         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2361                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2362                 break;
2363         case MSR_IA32_TSCDEADLINE:
2364                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2365                 break;
2366         case MSR_IA32_TSC_ADJUST:
2367                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2368                 break;
2369         case MSR_IA32_MISC_ENABLE:
2370                 data = vcpu->arch.ia32_misc_enable_msr;
2371                 break;
2372         case MSR_IA32_PERF_STATUS:
2373                 /* TSC increment by tick */
2374                 data = 1000ULL;
2375                 /* CPU multiplier */
2376                 data |= (((uint64_t)4ULL) << 40);
2377                 break;
2378         case MSR_EFER:
2379                 data = vcpu->arch.efer;
2380                 break;
2381         case MSR_KVM_WALL_CLOCK:
2382         case MSR_KVM_WALL_CLOCK_NEW:
2383                 data = vcpu->kvm->arch.wall_clock;
2384                 break;
2385         case MSR_KVM_SYSTEM_TIME:
2386         case MSR_KVM_SYSTEM_TIME_NEW:
2387                 data = vcpu->arch.time;
2388                 break;
2389         case MSR_KVM_ASYNC_PF_EN:
2390                 data = vcpu->arch.apf.msr_val;
2391                 break;
2392         case MSR_KVM_STEAL_TIME:
2393                 data = vcpu->arch.st.msr_val;
2394                 break;
2395         case MSR_KVM_PV_EOI_EN:
2396                 data = vcpu->arch.pv_eoi.msr_val;
2397                 break;
2398         case MSR_IA32_P5_MC_ADDR:
2399         case MSR_IA32_P5_MC_TYPE:
2400         case MSR_IA32_MCG_CAP:
2401         case MSR_IA32_MCG_CTL:
2402         case MSR_IA32_MCG_STATUS:
2403         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2404                 return get_msr_mce(vcpu, msr, pdata);
2405         case MSR_K7_CLK_CTL:
2406                 /*
2407                  * Provide expected ramp-up count for K7. All other
2408                  * are set to zero, indicating minimum divisors for
2409                  * every field.
2410                  *
2411                  * This prevents guest kernels on AMD host with CPU
2412                  * type 6, model 8 and higher from exploding due to
2413                  * the rdmsr failing.
2414                  */
2415                 data = 0x20000000;
2416                 break;
2417         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2418                 if (kvm_hv_msr_partition_wide(msr)) {
2419                         int r;
2420                         mutex_lock(&vcpu->kvm->lock);
2421                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2422                         mutex_unlock(&vcpu->kvm->lock);
2423                         return r;
2424                 } else
2425                         return get_msr_hyperv(vcpu, msr, pdata);
2426                 break;
2427         case MSR_IA32_BBL_CR_CTL3:
2428                 /* This legacy MSR exists but isn't fully documented in current
2429                  * silicon.  It is however accessed by winxp in very narrow
2430                  * scenarios where it sets bit #19, itself documented as
2431                  * a "reserved" bit.  Best effort attempt to source coherent
2432                  * read data here should the balance of the register be
2433                  * interpreted by the guest:
2434                  *
2435                  * L2 cache control register 3: 64GB range, 256KB size,
2436                  * enabled, latency 0x1, configured
2437                  */
2438                 data = 0xbe702111;
2439                 break;
2440         case MSR_AMD64_OSVW_ID_LENGTH:
2441                 if (!guest_cpuid_has_osvw(vcpu))
2442                         return 1;
2443                 data = vcpu->arch.osvw.length;
2444                 break;
2445         case MSR_AMD64_OSVW_STATUS:
2446                 if (!guest_cpuid_has_osvw(vcpu))
2447                         return 1;
2448                 data = vcpu->arch.osvw.status;
2449                 break;
2450         default:
2451                 if (kvm_pmu_msr(vcpu, msr))
2452                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2453                 if (!ignore_msrs) {
2454                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2455                         return 1;
2456                 } else {
2457                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2458                         data = 0;
2459                 }
2460                 break;
2461         }
2462         *pdata = data;
2463         return 0;
2464 }
2465 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2466
2467 /*
2468  * Read or write a bunch of msrs. All parameters are kernel addresses.
2469  *
2470  * @return number of msrs set successfully.
2471  */
2472 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2473                     struct kvm_msr_entry *entries,
2474                     int (*do_msr)(struct kvm_vcpu *vcpu,
2475                                   unsigned index, u64 *data))
2476 {
2477         int i, idx;
2478
2479         idx = srcu_read_lock(&vcpu->kvm->srcu);
2480         for (i = 0; i < msrs->nmsrs; ++i)
2481                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2482                         break;
2483         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2484
2485         return i;
2486 }
2487
2488 /*
2489  * Read or write a bunch of msrs. Parameters are user addresses.
2490  *
2491  * @return number of msrs set successfully.
2492  */
2493 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2494                   int (*do_msr)(struct kvm_vcpu *vcpu,
2495                                 unsigned index, u64 *data),
2496                   int writeback)
2497 {
2498         struct kvm_msrs msrs;
2499         struct kvm_msr_entry *entries;
2500         int r, n;
2501         unsigned size;
2502
2503         r = -EFAULT;
2504         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2505                 goto out;
2506
2507         r = -E2BIG;
2508         if (msrs.nmsrs >= MAX_IO_MSRS)
2509                 goto out;
2510
2511         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2512         entries = memdup_user(user_msrs->entries, size);
2513         if (IS_ERR(entries)) {
2514                 r = PTR_ERR(entries);
2515                 goto out;
2516         }
2517
2518         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2519         if (r < 0)
2520                 goto out_free;
2521
2522         r = -EFAULT;
2523         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2524                 goto out_free;
2525
2526         r = n;
2527
2528 out_free:
2529         kfree(entries);
2530 out:
2531         return r;
2532 }
2533
2534 int kvm_dev_ioctl_check_extension(long ext)
2535 {
2536         int r;
2537
2538         switch (ext) {
2539         case KVM_CAP_IRQCHIP:
2540         case KVM_CAP_HLT:
2541         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2542         case KVM_CAP_SET_TSS_ADDR:
2543         case KVM_CAP_EXT_CPUID:
2544         case KVM_CAP_CLOCKSOURCE:
2545         case KVM_CAP_PIT:
2546         case KVM_CAP_NOP_IO_DELAY:
2547         case KVM_CAP_MP_STATE:
2548         case KVM_CAP_SYNC_MMU:
2549         case KVM_CAP_USER_NMI:
2550         case KVM_CAP_REINJECT_CONTROL:
2551         case KVM_CAP_IRQ_INJECT_STATUS:
2552         case KVM_CAP_IRQFD:
2553         case KVM_CAP_IOEVENTFD:
2554         case KVM_CAP_PIT2:
2555         case KVM_CAP_PIT_STATE2:
2556         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2557         case KVM_CAP_XEN_HVM:
2558         case KVM_CAP_ADJUST_CLOCK:
2559         case KVM_CAP_VCPU_EVENTS:
2560         case KVM_CAP_HYPERV:
2561         case KVM_CAP_HYPERV_VAPIC:
2562         case KVM_CAP_HYPERV_SPIN:
2563         case KVM_CAP_PCI_SEGMENT:
2564         case KVM_CAP_DEBUGREGS:
2565         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2566         case KVM_CAP_XSAVE:
2567         case KVM_CAP_ASYNC_PF:
2568         case KVM_CAP_GET_TSC_KHZ:
2569         case KVM_CAP_KVMCLOCK_CTRL:
2570         case KVM_CAP_READONLY_MEM:
2571 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2572         case KVM_CAP_ASSIGN_DEV_IRQ:
2573         case KVM_CAP_PCI_2_3:
2574 #endif
2575                 r = 1;
2576                 break;
2577         case KVM_CAP_COALESCED_MMIO:
2578                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2579                 break;
2580         case KVM_CAP_VAPIC:
2581                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2582                 break;
2583         case KVM_CAP_NR_VCPUS:
2584                 r = KVM_SOFT_MAX_VCPUS;
2585                 break;
2586         case KVM_CAP_MAX_VCPUS:
2587                 r = KVM_MAX_VCPUS;
2588                 break;
2589         case KVM_CAP_NR_MEMSLOTS:
2590                 r = KVM_USER_MEM_SLOTS;
2591                 break;
2592         case KVM_CAP_PV_MMU:    /* obsolete */
2593                 r = 0;
2594                 break;
2595 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2596         case KVM_CAP_IOMMU:
2597                 r = iommu_present(&pci_bus_type);
2598                 break;
2599 #endif
2600         case KVM_CAP_MCE:
2601                 r = KVM_MAX_MCE_BANKS;
2602                 break;
2603         case KVM_CAP_XCRS:
2604                 r = cpu_has_xsave;
2605                 break;
2606         case KVM_CAP_TSC_CONTROL:
2607                 r = kvm_has_tsc_control;
2608                 break;
2609         case KVM_CAP_TSC_DEADLINE_TIMER:
2610                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2611                 break;
2612         default:
2613                 r = 0;
2614                 break;
2615         }
2616         return r;
2617
2618 }
2619
2620 long kvm_arch_dev_ioctl(struct file *filp,
2621                         unsigned int ioctl, unsigned long arg)
2622 {
2623         void __user *argp = (void __user *)arg;
2624         long r;
2625
2626         switch (ioctl) {
2627         case KVM_GET_MSR_INDEX_LIST: {
2628                 struct kvm_msr_list __user *user_msr_list = argp;
2629                 struct kvm_msr_list msr_list;
2630                 unsigned n;
2631
2632                 r = -EFAULT;
2633                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2634                         goto out;
2635                 n = msr_list.nmsrs;
2636                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2637                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2638                         goto out;
2639                 r = -E2BIG;
2640                 if (n < msr_list.nmsrs)
2641                         goto out;
2642                 r = -EFAULT;
2643                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2644                                  num_msrs_to_save * sizeof(u32)))
2645                         goto out;
2646                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2647                                  &emulated_msrs,
2648                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2649                         goto out;
2650                 r = 0;
2651                 break;
2652         }
2653         case KVM_GET_SUPPORTED_CPUID: {
2654                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2655                 struct kvm_cpuid2 cpuid;
2656
2657                 r = -EFAULT;
2658                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2659                         goto out;
2660                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2661                                                       cpuid_arg->entries);
2662                 if (r)
2663                         goto out;
2664
2665                 r = -EFAULT;
2666                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2667                         goto out;
2668                 r = 0;
2669                 break;
2670         }
2671         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2672                 u64 mce_cap;
2673
2674                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2675                 r = -EFAULT;
2676                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2677                         goto out;
2678                 r = 0;
2679                 break;
2680         }
2681         default:
2682                 r = -EINVAL;
2683         }
2684 out:
2685         return r;
2686 }
2687
2688 static void wbinvd_ipi(void *garbage)
2689 {
2690         wbinvd();
2691 }
2692
2693 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2694 {
2695         return vcpu->kvm->arch.iommu_domain &&
2696                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2697 }
2698
2699 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2700 {
2701         /* Address WBINVD may be executed by guest */
2702         if (need_emulate_wbinvd(vcpu)) {
2703                 if (kvm_x86_ops->has_wbinvd_exit())
2704                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2705                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2706                         smp_call_function_single(vcpu->cpu,
2707                                         wbinvd_ipi, NULL, 1);
2708         }
2709
2710         kvm_x86_ops->vcpu_load(vcpu, cpu);
2711
2712         /* Apply any externally detected TSC adjustments (due to suspend) */
2713         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2714                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2715                 vcpu->arch.tsc_offset_adjustment = 0;
2716                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2717         }
2718
2719         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2720                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2721                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2722                 if (tsc_delta < 0)
2723                         mark_tsc_unstable("KVM discovered backwards TSC");
2724                 if (check_tsc_unstable()) {
2725                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2726                                                 vcpu->arch.last_guest_tsc);
2727                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2728                         vcpu->arch.tsc_catchup = 1;
2729                 }
2730                 /*
2731                  * On a host with synchronized TSC, there is no need to update
2732                  * kvmclock on vcpu->cpu migration
2733                  */
2734                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2735                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2736                 if (vcpu->cpu != cpu)
2737                         kvm_migrate_timers(vcpu);
2738                 vcpu->cpu = cpu;
2739         }
2740
2741         accumulate_steal_time(vcpu);
2742         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2743 }
2744
2745 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2746 {
2747         kvm_x86_ops->vcpu_put(vcpu);
2748         kvm_put_guest_fpu(vcpu);
2749         vcpu->arch.last_host_tsc = native_read_tsc();
2750 }
2751
2752 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2753                                     struct kvm_lapic_state *s)
2754 {
2755         kvm_x86_ops->sync_pir_to_irr(vcpu);
2756         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2757
2758         return 0;
2759 }
2760
2761 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2762                                     struct kvm_lapic_state *s)
2763 {
2764         kvm_apic_post_state_restore(vcpu, s);
2765         update_cr8_intercept(vcpu);
2766
2767         return 0;
2768 }
2769
2770 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2771                                     struct kvm_interrupt *irq)
2772 {
2773         if (irq->irq >= KVM_NR_INTERRUPTS)
2774                 return -EINVAL;
2775         if (irqchip_in_kernel(vcpu->kvm))
2776                 return -ENXIO;
2777
2778         kvm_queue_interrupt(vcpu, irq->irq, false);
2779         kvm_make_request(KVM_REQ_EVENT, vcpu);
2780
2781         return 0;
2782 }
2783
2784 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2785 {
2786         kvm_inject_nmi(vcpu);
2787
2788         return 0;
2789 }
2790
2791 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2792                                            struct kvm_tpr_access_ctl *tac)
2793 {
2794         if (tac->flags)
2795                 return -EINVAL;
2796         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2797         return 0;
2798 }
2799
2800 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2801                                         u64 mcg_cap)
2802 {
2803         int r;
2804         unsigned bank_num = mcg_cap & 0xff, bank;
2805
2806         r = -EINVAL;
2807         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2808                 goto out;
2809         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2810                 goto out;
2811         r = 0;
2812         vcpu->arch.mcg_cap = mcg_cap;
2813         /* Init IA32_MCG_CTL to all 1s */
2814         if (mcg_cap & MCG_CTL_P)
2815                 vcpu->arch.mcg_ctl = ~(u64)0;
2816         /* Init IA32_MCi_CTL to all 1s */
2817         for (bank = 0; bank < bank_num; bank++)
2818                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2819 out:
2820         return r;
2821 }
2822
2823 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2824                                       struct kvm_x86_mce *mce)
2825 {
2826         u64 mcg_cap = vcpu->arch.mcg_cap;
2827         unsigned bank_num = mcg_cap & 0xff;
2828         u64 *banks = vcpu->arch.mce_banks;
2829
2830         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2831                 return -EINVAL;
2832         /*
2833          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2834          * reporting is disabled
2835          */
2836         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2837             vcpu->arch.mcg_ctl != ~(u64)0)
2838                 return 0;
2839         banks += 4 * mce->bank;
2840         /*
2841          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2842          * reporting is disabled for the bank
2843          */
2844         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2845                 return 0;
2846         if (mce->status & MCI_STATUS_UC) {
2847                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2848                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2849                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2850                         return 0;
2851                 }
2852                 if (banks[1] & MCI_STATUS_VAL)
2853                         mce->status |= MCI_STATUS_OVER;
2854                 banks[2] = mce->addr;
2855                 banks[3] = mce->misc;
2856                 vcpu->arch.mcg_status = mce->mcg_status;
2857                 banks[1] = mce->status;
2858                 kvm_queue_exception(vcpu, MC_VECTOR);
2859         } else if (!(banks[1] & MCI_STATUS_VAL)
2860                    || !(banks[1] & MCI_STATUS_UC)) {
2861                 if (banks[1] & MCI_STATUS_VAL)
2862                         mce->status |= MCI_STATUS_OVER;
2863                 banks[2] = mce->addr;
2864                 banks[3] = mce->misc;
2865                 banks[1] = mce->status;
2866         } else
2867                 banks[1] |= MCI_STATUS_OVER;
2868         return 0;
2869 }
2870
2871 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2872                                                struct kvm_vcpu_events *events)
2873 {
2874         process_nmi(vcpu);
2875         events->exception.injected =
2876                 vcpu->arch.exception.pending &&
2877                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2878         events->exception.nr = vcpu->arch.exception.nr;
2879         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2880         events->exception.pad = 0;
2881         events->exception.error_code = vcpu->arch.exception.error_code;
2882
2883         events->interrupt.injected =
2884                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2885         events->interrupt.nr = vcpu->arch.interrupt.nr;
2886         events->interrupt.soft = 0;
2887         events->interrupt.shadow =
2888                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2889                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2890
2891         events->nmi.injected = vcpu->arch.nmi_injected;
2892         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2893         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2894         events->nmi.pad = 0;
2895
2896         events->sipi_vector = 0; /* never valid when reporting to user space */
2897
2898         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2899                          | KVM_VCPUEVENT_VALID_SHADOW);
2900         memset(&events->reserved, 0, sizeof(events->reserved));
2901 }
2902
2903 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2904                                               struct kvm_vcpu_events *events)
2905 {
2906         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2907                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2908                               | KVM_VCPUEVENT_VALID_SHADOW))
2909                 return -EINVAL;
2910
2911         process_nmi(vcpu);
2912         vcpu->arch.exception.pending = events->exception.injected;
2913         vcpu->arch.exception.nr = events->exception.nr;
2914         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2915         vcpu->arch.exception.error_code = events->exception.error_code;
2916
2917         vcpu->arch.interrupt.pending = events->interrupt.injected;
2918         vcpu->arch.interrupt.nr = events->interrupt.nr;
2919         vcpu->arch.interrupt.soft = events->interrupt.soft;
2920         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2921                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2922                                                   events->interrupt.shadow);
2923
2924         vcpu->arch.nmi_injected = events->nmi.injected;
2925         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2926                 vcpu->arch.nmi_pending = events->nmi.pending;
2927         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2928
2929         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2930             kvm_vcpu_has_lapic(vcpu))
2931                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2932
2933         kvm_make_request(KVM_REQ_EVENT, vcpu);
2934
2935         return 0;
2936 }
2937
2938 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2939                                              struct kvm_debugregs *dbgregs)
2940 {
2941         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2942         dbgregs->dr6 = vcpu->arch.dr6;
2943         dbgregs->dr7 = vcpu->arch.dr7;
2944         dbgregs->flags = 0;
2945         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2946 }
2947
2948 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2949                                             struct kvm_debugregs *dbgregs)
2950 {
2951         if (dbgregs->flags)
2952                 return -EINVAL;
2953
2954         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2955         vcpu->arch.dr6 = dbgregs->dr6;
2956         vcpu->arch.dr7 = dbgregs->dr7;
2957
2958         return 0;
2959 }
2960
2961 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2962                                          struct kvm_xsave *guest_xsave)
2963 {
2964         if (cpu_has_xsave)
2965                 memcpy(guest_xsave->region,
2966                         &vcpu->arch.guest_fpu.state->xsave,
2967                         xstate_size);
2968         else {
2969                 memcpy(guest_xsave->region,
2970                         &vcpu->arch.guest_fpu.state->fxsave,
2971                         sizeof(struct i387_fxsave_struct));
2972                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2973                         XSTATE_FPSSE;
2974         }
2975 }
2976
2977 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2978                                         struct kvm_xsave *guest_xsave)
2979 {
2980         u64 xstate_bv =
2981                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2982
2983         if (cpu_has_xsave)
2984                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2985                         guest_xsave->region, xstate_size);
2986         else {
2987                 if (xstate_bv & ~XSTATE_FPSSE)
2988                         return -EINVAL;
2989                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2990                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2991         }
2992         return 0;
2993 }
2994
2995 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2996                                         struct kvm_xcrs *guest_xcrs)
2997 {
2998         if (!cpu_has_xsave) {
2999                 guest_xcrs->nr_xcrs = 0;
3000                 return;
3001         }
3002
3003         guest_xcrs->nr_xcrs = 1;
3004         guest_xcrs->flags = 0;
3005         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3006         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3007 }
3008
3009 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3010                                        struct kvm_xcrs *guest_xcrs)
3011 {
3012         int i, r = 0;
3013
3014         if (!cpu_has_xsave)
3015                 return -EINVAL;
3016
3017         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3018                 return -EINVAL;
3019
3020         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3021                 /* Only support XCR0 currently */
3022                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3023                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3024                                 guest_xcrs->xcrs[0].value);
3025                         break;
3026                 }
3027         if (r)
3028                 r = -EINVAL;
3029         return r;
3030 }
3031
3032 /*
3033  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3034  * stopped by the hypervisor.  This function will be called from the host only.
3035  * EINVAL is returned when the host attempts to set the flag for a guest that
3036  * does not support pv clocks.
3037  */
3038 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3039 {
3040         if (!vcpu->arch.pv_time_enabled)
3041                 return -EINVAL;
3042         vcpu->arch.pvclock_set_guest_stopped_request = true;
3043         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3044         return 0;
3045 }
3046
3047 long kvm_arch_vcpu_ioctl(struct file *filp,
3048                          unsigned int ioctl, unsigned long arg)
3049 {
3050         struct kvm_vcpu *vcpu = filp->private_data;
3051         void __user *argp = (void __user *)arg;
3052         int r;
3053         union {
3054                 struct kvm_lapic_state *lapic;
3055                 struct kvm_xsave *xsave;
3056                 struct kvm_xcrs *xcrs;
3057                 void *buffer;
3058         } u;
3059
3060         u.buffer = NULL;
3061         switch (ioctl) {
3062         case KVM_GET_LAPIC: {
3063                 r = -EINVAL;
3064                 if (!vcpu->arch.apic)
3065                         goto out;
3066                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3067
3068                 r = -ENOMEM;
3069                 if (!u.lapic)
3070                         goto out;
3071                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3072                 if (r)
3073                         goto out;
3074                 r = -EFAULT;
3075                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3076                         goto out;
3077                 r = 0;
3078                 break;
3079         }
3080         case KVM_SET_LAPIC: {
3081                 r = -EINVAL;
3082                 if (!vcpu->arch.apic)
3083                         goto out;
3084                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3085                 if (IS_ERR(u.lapic))
3086                         return PTR_ERR(u.lapic);
3087
3088                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3089                 break;
3090         }
3091         case KVM_INTERRUPT: {
3092                 struct kvm_interrupt irq;
3093
3094                 r = -EFAULT;
3095                 if (copy_from_user(&irq, argp, sizeof irq))
3096                         goto out;
3097                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3098                 break;
3099         }
3100         case KVM_NMI: {
3101                 r = kvm_vcpu_ioctl_nmi(vcpu);
3102                 break;
3103         }
3104         case KVM_SET_CPUID: {
3105                 struct kvm_cpuid __user *cpuid_arg = argp;
3106                 struct kvm_cpuid cpuid;
3107
3108                 r = -EFAULT;
3109                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3110                         goto out;
3111                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3112                 break;
3113         }
3114         case KVM_SET_CPUID2: {
3115                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3116                 struct kvm_cpuid2 cpuid;
3117
3118                 r = -EFAULT;
3119                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3120                         goto out;
3121                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3122                                               cpuid_arg->entries);
3123                 break;
3124         }
3125         case KVM_GET_CPUID2: {
3126                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3127                 struct kvm_cpuid2 cpuid;
3128
3129                 r = -EFAULT;
3130                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3131                         goto out;
3132                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3133                                               cpuid_arg->entries);
3134                 if (r)
3135                         goto out;
3136                 r = -EFAULT;
3137                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3138                         goto out;
3139                 r = 0;
3140                 break;
3141         }
3142         case KVM_GET_MSRS:
3143                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3144                 break;
3145         case KVM_SET_MSRS:
3146                 r = msr_io(vcpu, argp, do_set_msr, 0);
3147                 break;
3148         case KVM_TPR_ACCESS_REPORTING: {
3149                 struct kvm_tpr_access_ctl tac;
3150
3151                 r = -EFAULT;
3152                 if (copy_from_user(&tac, argp, sizeof tac))
3153                         goto out;
3154                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3155                 if (r)
3156                         goto out;
3157                 r = -EFAULT;
3158                 if (copy_to_user(argp, &tac, sizeof tac))
3159                         goto out;
3160                 r = 0;
3161                 break;
3162         };
3163         case KVM_SET_VAPIC_ADDR: {
3164                 struct kvm_vapic_addr va;
3165
3166                 r = -EINVAL;
3167                 if (!irqchip_in_kernel(vcpu->kvm))
3168                         goto out;
3169                 r = -EFAULT;
3170                 if (copy_from_user(&va, argp, sizeof va))
3171                         goto out;
3172                 r = 0;
3173                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3174                 break;
3175         }
3176         case KVM_X86_SETUP_MCE: {
3177                 u64 mcg_cap;
3178
3179                 r = -EFAULT;
3180                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3181                         goto out;
3182                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3183                 break;
3184         }
3185         case KVM_X86_SET_MCE: {
3186                 struct kvm_x86_mce mce;
3187
3188                 r = -EFAULT;
3189                 if (copy_from_user(&mce, argp, sizeof mce))
3190                         goto out;
3191                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3192                 break;
3193         }
3194         case KVM_GET_VCPU_EVENTS: {
3195                 struct kvm_vcpu_events events;
3196
3197                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3198
3199                 r = -EFAULT;
3200                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3201                         break;
3202                 r = 0;
3203                 break;
3204         }
3205         case KVM_SET_VCPU_EVENTS: {
3206                 struct kvm_vcpu_events events;
3207
3208                 r = -EFAULT;
3209                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3210                         break;
3211
3212                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3213                 break;
3214         }
3215         case KVM_GET_DEBUGREGS: {
3216                 struct kvm_debugregs dbgregs;
3217
3218                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3219
3220                 r = -EFAULT;
3221                 if (copy_to_user(argp, &dbgregs,
3222                                  sizeof(struct kvm_debugregs)))
3223                         break;
3224                 r = 0;
3225                 break;
3226         }
3227         case KVM_SET_DEBUGREGS: {
3228                 struct kvm_debugregs dbgregs;
3229
3230                 r = -EFAULT;
3231                 if (copy_from_user(&dbgregs, argp,
3232                                    sizeof(struct kvm_debugregs)))
3233                         break;
3234
3235                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3236                 break;
3237         }
3238         case KVM_GET_XSAVE: {
3239                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3240                 r = -ENOMEM;
3241                 if (!u.xsave)
3242                         break;
3243
3244                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3245
3246                 r = -EFAULT;
3247                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3248                         break;
3249                 r = 0;
3250                 break;
3251         }
3252         case KVM_SET_XSAVE: {
3253                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3254                 if (IS_ERR(u.xsave))
3255                         return PTR_ERR(u.xsave);
3256
3257                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3258                 break;
3259         }
3260         case KVM_GET_XCRS: {
3261                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3262                 r = -ENOMEM;
3263                 if (!u.xcrs)
3264                         break;
3265
3266                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3267
3268                 r = -EFAULT;
3269                 if (copy_to_user(argp, u.xcrs,
3270                                  sizeof(struct kvm_xcrs)))
3271                         break;
3272                 r = 0;
3273                 break;
3274         }
3275         case KVM_SET_XCRS: {
3276                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3277                 if (IS_ERR(u.xcrs))
3278                         return PTR_ERR(u.xcrs);
3279
3280                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3281                 break;
3282         }
3283         case KVM_SET_TSC_KHZ: {
3284                 u32 user_tsc_khz;
3285
3286                 r = -EINVAL;
3287                 user_tsc_khz = (u32)arg;
3288
3289                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3290                         goto out;
3291
3292                 if (user_tsc_khz == 0)
3293                         user_tsc_khz = tsc_khz;
3294
3295                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3296
3297                 r = 0;
3298                 goto out;
3299         }
3300         case KVM_GET_TSC_KHZ: {
3301                 r = vcpu->arch.virtual_tsc_khz;
3302                 goto out;
3303         }
3304         case KVM_KVMCLOCK_CTRL: {
3305                 r = kvm_set_guest_paused(vcpu);
3306                 goto out;
3307         }
3308         default:
3309                 r = -EINVAL;
3310         }
3311 out:
3312         kfree(u.buffer);
3313         return r;
3314 }
3315
3316 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3317 {
3318         return VM_FAULT_SIGBUS;
3319 }
3320
3321 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3322 {
3323         int ret;
3324
3325         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3326                 return -EINVAL;
3327         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3328         return ret;
3329 }
3330
3331 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3332                                               u64 ident_addr)
3333 {
3334         kvm->arch.ept_identity_map_addr = ident_addr;
3335         return 0;
3336 }
3337
3338 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3339                                           u32 kvm_nr_mmu_pages)
3340 {
3341         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3342                 return -EINVAL;
3343
3344         mutex_lock(&kvm->slots_lock);
3345
3346         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3347         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3348
3349         mutex_unlock(&kvm->slots_lock);
3350         return 0;
3351 }
3352
3353 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3354 {
3355         return kvm->arch.n_max_mmu_pages;
3356 }
3357
3358 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3359 {
3360         int r;
3361
3362         r = 0;
3363         switch (chip->chip_id) {
3364         case KVM_IRQCHIP_PIC_MASTER:
3365                 memcpy(&chip->chip.pic,
3366                         &pic_irqchip(kvm)->pics[0],
3367                         sizeof(struct kvm_pic_state));
3368                 break;
3369         case KVM_IRQCHIP_PIC_SLAVE:
3370                 memcpy(&chip->chip.pic,
3371                         &pic_irqchip(kvm)->pics[1],
3372                         sizeof(struct kvm_pic_state));
3373                 break;
3374         case KVM_IRQCHIP_IOAPIC:
3375                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3376                 break;
3377         default:
3378                 r = -EINVAL;
3379                 break;
3380         }
3381         return r;
3382 }
3383
3384 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3385 {
3386         int r;
3387
3388         r = 0;
3389         switch (chip->chip_id) {
3390         case KVM_IRQCHIP_PIC_MASTER:
3391                 spin_lock(&pic_irqchip(kvm)->lock);
3392                 memcpy(&pic_irqchip(kvm)->pics[0],
3393                         &chip->chip.pic,
3394                         sizeof(struct kvm_pic_state));
3395                 spin_unlock(&pic_irqchip(kvm)->lock);
3396                 break;
3397         case KVM_IRQCHIP_PIC_SLAVE:
3398                 spin_lock(&pic_irqchip(kvm)->lock);
3399                 memcpy(&pic_irqchip(kvm)->pics[1],
3400                         &chip->chip.pic,
3401                         sizeof(struct kvm_pic_state));
3402                 spin_unlock(&pic_irqchip(kvm)->lock);
3403                 break;
3404         case KVM_IRQCHIP_IOAPIC:
3405                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3406                 break;
3407         default:
3408                 r = -EINVAL;
3409                 break;
3410         }
3411         kvm_pic_update_irq(pic_irqchip(kvm));
3412         return r;
3413 }
3414
3415 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3416 {
3417         int r = 0;
3418
3419         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3420         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3421         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3422         return r;
3423 }
3424
3425 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3426 {
3427         int r = 0;
3428
3429         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3430         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3431         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3432         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3433         return r;
3434 }
3435
3436 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3437 {
3438         int r = 0;
3439
3440         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3441         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3442                 sizeof(ps->channels));
3443         ps->flags = kvm->arch.vpit->pit_state.flags;
3444         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3445         memset(&ps->reserved, 0, sizeof(ps->reserved));
3446         return r;
3447 }
3448
3449 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3450 {
3451         int r = 0, start = 0;
3452         u32 prev_legacy, cur_legacy;
3453         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3454         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3455         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3456         if (!prev_legacy && cur_legacy)
3457                 start = 1;
3458         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3459                sizeof(kvm->arch.vpit->pit_state.channels));
3460         kvm->arch.vpit->pit_state.flags = ps->flags;
3461         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3462         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3463         return r;
3464 }
3465
3466 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3467                                  struct kvm_reinject_control *control)
3468 {
3469         if (!kvm->arch.vpit)
3470                 return -ENXIO;
3471         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3472         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3473         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3474         return 0;
3475 }
3476
3477 /**
3478  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3479  * @kvm: kvm instance
3480  * @log: slot id and address to which we copy the log
3481  *
3482  * We need to keep it in mind that VCPU threads can write to the bitmap
3483  * concurrently.  So, to avoid losing data, we keep the following order for
3484  * each bit:
3485  *
3486  *   1. Take a snapshot of the bit and clear it if needed.
3487  *   2. Write protect the corresponding page.
3488  *   3. Flush TLB's if needed.
3489  *   4. Copy the snapshot to the userspace.
3490  *
3491  * Between 2 and 3, the guest may write to the page using the remaining TLB
3492  * entry.  This is not a problem because the page will be reported dirty at
3493  * step 4 using the snapshot taken before and step 3 ensures that successive
3494  * writes will be logged for the next call.
3495  */
3496 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3497 {
3498         int r;
3499         struct kvm_memory_slot *memslot;
3500         unsigned long n, i;
3501         unsigned long *dirty_bitmap;
3502         unsigned long *dirty_bitmap_buffer;
3503         bool is_dirty = false;
3504
3505         mutex_lock(&kvm->slots_lock);
3506
3507         r = -EINVAL;
3508         if (log->slot >= KVM_USER_MEM_SLOTS)
3509                 goto out;
3510
3511         memslot = id_to_memslot(kvm->memslots, log->slot);
3512
3513         dirty_bitmap = memslot->dirty_bitmap;
3514         r = -ENOENT;
3515         if (!dirty_bitmap)
3516                 goto out;
3517
3518         n = kvm_dirty_bitmap_bytes(memslot);
3519
3520         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3521         memset(dirty_bitmap_buffer, 0, n);
3522
3523         spin_lock(&kvm->mmu_lock);
3524
3525         for (i = 0; i < n / sizeof(long); i++) {
3526                 unsigned long mask;
3527                 gfn_t offset;
3528
3529                 if (!dirty_bitmap[i])
3530                         continue;
3531
3532                 is_dirty = true;
3533
3534                 mask = xchg(&dirty_bitmap[i], 0);
3535                 dirty_bitmap_buffer[i] = mask;
3536
3537                 offset = i * BITS_PER_LONG;
3538                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3539         }
3540         if (is_dirty)
3541                 kvm_flush_remote_tlbs(kvm);
3542
3543         spin_unlock(&kvm->mmu_lock);
3544
3545         r = -EFAULT;
3546         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3547                 goto out;
3548
3549         r = 0;
3550 out:
3551         mutex_unlock(&kvm->slots_lock);
3552         return r;
3553 }
3554
3555 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3556                         bool line_status)
3557 {
3558         if (!irqchip_in_kernel(kvm))
3559                 return -ENXIO;
3560
3561         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3562                                         irq_event->irq, irq_event->level,
3563                                         line_status);
3564         return 0;
3565 }
3566
3567 long kvm_arch_vm_ioctl(struct file *filp,
3568                        unsigned int ioctl, unsigned long arg)
3569 {
3570         struct kvm *kvm = filp->private_data;
3571         void __user *argp = (void __user *)arg;
3572         int r = -ENOTTY;
3573         /*
3574          * This union makes it completely explicit to gcc-3.x
3575          * that these two variables' stack usage should be
3576          * combined, not added together.
3577          */
3578         union {
3579                 struct kvm_pit_state ps;
3580                 struct kvm_pit_state2 ps2;
3581                 struct kvm_pit_config pit_config;
3582         } u;
3583
3584         switch (ioctl) {
3585         case KVM_SET_TSS_ADDR:
3586                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3587                 break;
3588         case KVM_SET_IDENTITY_MAP_ADDR: {
3589                 u64 ident_addr;
3590
3591                 r = -EFAULT;
3592                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3593                         goto out;
3594                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3595                 break;
3596         }
3597         case KVM_SET_NR_MMU_PAGES:
3598                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3599                 break;
3600         case KVM_GET_NR_MMU_PAGES:
3601                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3602                 break;
3603         case KVM_CREATE_IRQCHIP: {
3604                 struct kvm_pic *vpic;
3605
3606                 mutex_lock(&kvm->lock);
3607                 r = -EEXIST;
3608                 if (kvm->arch.vpic)
3609                         goto create_irqchip_unlock;
3610                 r = -EINVAL;
3611                 if (atomic_read(&kvm->online_vcpus))
3612                         goto create_irqchip_unlock;
3613                 r = -ENOMEM;
3614                 vpic = kvm_create_pic(kvm);
3615                 if (vpic) {
3616                         r = kvm_ioapic_init(kvm);
3617                         if (r) {
3618                                 mutex_lock(&kvm->slots_lock);
3619                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3620                                                           &vpic->dev_master);
3621                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3622                                                           &vpic->dev_slave);
3623                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3624                                                           &vpic->dev_eclr);
3625                                 mutex_unlock(&kvm->slots_lock);
3626                                 kfree(vpic);
3627                                 goto create_irqchip_unlock;
3628                         }
3629                 } else
3630                         goto create_irqchip_unlock;
3631                 smp_wmb();
3632                 kvm->arch.vpic = vpic;
3633                 smp_wmb();
3634                 r = kvm_setup_default_irq_routing(kvm);
3635                 if (r) {
3636                         mutex_lock(&kvm->slots_lock);
3637                         mutex_lock(&kvm->irq_lock);
3638                         kvm_ioapic_destroy(kvm);
3639                         kvm_destroy_pic(kvm);
3640                         mutex_unlock(&kvm->irq_lock);
3641                         mutex_unlock(&kvm->slots_lock);
3642                 }
3643         create_irqchip_unlock:
3644                 mutex_unlock(&kvm->lock);
3645                 break;
3646         }
3647         case KVM_CREATE_PIT:
3648                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3649                 goto create_pit;
3650         case KVM_CREATE_PIT2:
3651                 r = -EFAULT;
3652                 if (copy_from_user(&u.pit_config, argp,
3653                                    sizeof(struct kvm_pit_config)))
3654                         goto out;
3655         create_pit:
3656                 mutex_lock(&kvm->slots_lock);
3657                 r = -EEXIST;
3658                 if (kvm->arch.vpit)
3659                         goto create_pit_unlock;
3660                 r = -ENOMEM;
3661                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3662                 if (kvm->arch.vpit)
3663                         r = 0;
3664         create_pit_unlock:
3665                 mutex_unlock(&kvm->slots_lock);
3666                 break;
3667         case KVM_GET_IRQCHIP: {
3668                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3669                 struct kvm_irqchip *chip;
3670
3671                 chip = memdup_user(argp, sizeof(*chip));
3672                 if (IS_ERR(chip)) {
3673                         r = PTR_ERR(chip);
3674                         goto out;
3675                 }
3676
3677                 r = -ENXIO;
3678                 if (!irqchip_in_kernel(kvm))
3679                         goto get_irqchip_out;
3680                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3681                 if (r)
3682                         goto get_irqchip_out;
3683                 r = -EFAULT;
3684                 if (copy_to_user(argp, chip, sizeof *chip))
3685                         goto get_irqchip_out;
3686                 r = 0;
3687         get_irqchip_out:
3688                 kfree(chip);
3689                 break;
3690         }
3691         case KVM_SET_IRQCHIP: {
3692                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3693                 struct kvm_irqchip *chip;
3694
3695                 chip = memdup_user(argp, sizeof(*chip));
3696                 if (IS_ERR(chip)) {
3697                         r = PTR_ERR(chip);
3698                         goto out;
3699                 }
3700
3701                 r = -ENXIO;
3702                 if (!irqchip_in_kernel(kvm))
3703                         goto set_irqchip_out;
3704                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3705                 if (r)
3706                         goto set_irqchip_out;
3707                 r = 0;
3708         set_irqchip_out:
3709                 kfree(chip);
3710                 break;
3711         }
3712         case KVM_GET_PIT: {
3713                 r = -EFAULT;
3714                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3715                         goto out;
3716                 r = -ENXIO;
3717                 if (!kvm->arch.vpit)
3718                         goto out;
3719                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3720                 if (r)
3721                         goto out;
3722                 r = -EFAULT;
3723                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3724                         goto out;
3725                 r = 0;
3726                 break;
3727         }
3728         case KVM_SET_PIT: {
3729                 r = -EFAULT;
3730                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3731                         goto out;
3732                 r = -ENXIO;
3733                 if (!kvm->arch.vpit)
3734                         goto out;
3735                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3736                 break;
3737         }
3738         case KVM_GET_PIT2: {
3739                 r = -ENXIO;
3740                 if (!kvm->arch.vpit)
3741                         goto out;
3742                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3743                 if (r)
3744                         goto out;
3745                 r = -EFAULT;
3746                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3747                         goto out;
3748                 r = 0;
3749                 break;
3750         }
3751         case KVM_SET_PIT2: {
3752                 r = -EFAULT;
3753                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3754                         goto out;
3755                 r = -ENXIO;
3756                 if (!kvm->arch.vpit)
3757                         goto out;
3758                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3759                 break;
3760         }
3761         case KVM_REINJECT_CONTROL: {
3762                 struct kvm_reinject_control control;
3763                 r =  -EFAULT;
3764                 if (copy_from_user(&control, argp, sizeof(control)))
3765                         goto out;
3766                 r = kvm_vm_ioctl_reinject(kvm, &control);
3767                 break;
3768         }
3769         case KVM_XEN_HVM_CONFIG: {
3770                 r = -EFAULT;
3771                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3772                                    sizeof(struct kvm_xen_hvm_config)))
3773                         goto out;
3774                 r = -EINVAL;
3775                 if (kvm->arch.xen_hvm_config.flags)
3776                         goto out;
3777                 r = 0;
3778                 break;
3779         }
3780         case KVM_SET_CLOCK: {
3781                 struct kvm_clock_data user_ns;
3782                 u64 now_ns;
3783                 s64 delta;
3784
3785                 r = -EFAULT;
3786                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3787                         goto out;
3788
3789                 r = -EINVAL;
3790                 if (user_ns.flags)
3791                         goto out;
3792
3793                 r = 0;
3794                 local_irq_disable();
3795                 now_ns = get_kernel_ns();
3796                 delta = user_ns.clock - now_ns;
3797                 local_irq_enable();
3798                 kvm->arch.kvmclock_offset = delta;
3799                 break;
3800         }
3801         case KVM_GET_CLOCK: {
3802                 struct kvm_clock_data user_ns;
3803                 u64 now_ns;
3804
3805                 local_irq_disable();
3806                 now_ns = get_kernel_ns();
3807                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3808                 local_irq_enable();
3809                 user_ns.flags = 0;
3810                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3811
3812                 r = -EFAULT;
3813                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3814                         goto out;
3815                 r = 0;
3816                 break;
3817         }
3818
3819         default:
3820                 ;
3821         }
3822 out:
3823         return r;
3824 }
3825
3826 static void kvm_init_msr_list(void)
3827 {
3828         u32 dummy[2];
3829         unsigned i, j;
3830
3831         /* skip the first msrs in the list. KVM-specific */
3832         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3833                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3834                         continue;
3835                 if (j < i)
3836                         msrs_to_save[j] = msrs_to_save[i];
3837                 j++;
3838         }
3839         num_msrs_to_save = j;
3840 }
3841
3842 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3843                            const void *v)
3844 {
3845         int handled = 0;
3846         int n;
3847
3848         do {
3849                 n = min(len, 8);
3850                 if (!(vcpu->arch.apic &&
3851                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3852                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3853                         break;
3854                 handled += n;
3855                 addr += n;
3856                 len -= n;
3857                 v += n;
3858         } while (len);
3859
3860         return handled;
3861 }
3862
3863 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3864 {
3865         int handled = 0;
3866         int n;
3867
3868         do {
3869                 n = min(len, 8);
3870                 if (!(vcpu->arch.apic &&
3871                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3872                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3873                         break;
3874                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3875                 handled += n;
3876                 addr += n;
3877                 len -= n;
3878                 v += n;
3879         } while (len);
3880
3881         return handled;
3882 }
3883
3884 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3885                         struct kvm_segment *var, int seg)
3886 {
3887         kvm_x86_ops->set_segment(vcpu, var, seg);
3888 }
3889
3890 void kvm_get_segment(struct kvm_vcpu *vcpu,
3891                      struct kvm_segment *var, int seg)
3892 {
3893         kvm_x86_ops->get_segment(vcpu, var, seg);
3894 }
3895
3896 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3897 {
3898         gpa_t t_gpa;
3899         struct x86_exception exception;
3900
3901         BUG_ON(!mmu_is_nested(vcpu));
3902
3903         /* NPT walks are always user-walks */
3904         access |= PFERR_USER_MASK;
3905         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3906
3907         return t_gpa;
3908 }
3909
3910 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3911                               struct x86_exception *exception)
3912 {
3913         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3914         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3915 }
3916
3917  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3918                                 struct x86_exception *exception)
3919 {
3920         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3921         access |= PFERR_FETCH_MASK;
3922         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3923 }
3924
3925 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3926                                struct x86_exception *exception)
3927 {
3928         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3929         access |= PFERR_WRITE_MASK;
3930         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3931 }
3932
3933 /* uses this to access any guest's mapped memory without checking CPL */
3934 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3935                                 struct x86_exception *exception)
3936 {
3937         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3938 }
3939
3940 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3941                                       struct kvm_vcpu *vcpu, u32 access,
3942                                       struct x86_exception *exception)
3943 {
3944         void *data = val;
3945         int r = X86EMUL_CONTINUE;
3946
3947         while (bytes) {
3948                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3949                                                             exception);
3950                 unsigned offset = addr & (PAGE_SIZE-1);
3951                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3952                 int ret;
3953
3954                 if (gpa == UNMAPPED_GVA)
3955                         return X86EMUL_PROPAGATE_FAULT;
3956                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3957                 if (ret < 0) {
3958                         r = X86EMUL_IO_NEEDED;
3959                         goto out;
3960                 }
3961
3962                 bytes -= toread;
3963                 data += toread;
3964                 addr += toread;
3965         }
3966 out:
3967         return r;
3968 }
3969
3970 /* used for instruction fetching */
3971 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3972                                 gva_t addr, void *val, unsigned int bytes,
3973                                 struct x86_exception *exception)
3974 {
3975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3976         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3977
3978         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3979                                           access | PFERR_FETCH_MASK,
3980                                           exception);
3981 }
3982
3983 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3984                                gva_t addr, void *val, unsigned int bytes,
3985                                struct x86_exception *exception)
3986 {
3987         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3988         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3989
3990         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3991                                           exception);
3992 }
3993 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3994
3995 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3996                                       gva_t addr, void *val, unsigned int bytes,
3997                                       struct x86_exception *exception)
3998 {
3999         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4000         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4001 }
4002
4003 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4004                                        gva_t addr, void *val,
4005                                        unsigned int bytes,
4006                                        struct x86_exception *exception)
4007 {
4008         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4009         void *data = val;
4010         int r = X86EMUL_CONTINUE;
4011
4012         while (bytes) {
4013                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4014                                                              PFERR_WRITE_MASK,
4015                                                              exception);
4016                 unsigned offset = addr & (PAGE_SIZE-1);
4017                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4018                 int ret;
4019
4020                 if (gpa == UNMAPPED_GVA)
4021                         return X86EMUL_PROPAGATE_FAULT;
4022                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4023                 if (ret < 0) {
4024                         r = X86EMUL_IO_NEEDED;
4025                         goto out;
4026                 }
4027
4028                 bytes -= towrite;
4029                 data += towrite;
4030                 addr += towrite;
4031         }
4032 out:
4033         return r;
4034 }
4035 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4036
4037 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4038                                 gpa_t *gpa, struct x86_exception *exception,
4039                                 bool write)
4040 {
4041         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4042                 | (write ? PFERR_WRITE_MASK : 0);
4043
4044         if (vcpu_match_mmio_gva(vcpu, gva)
4045             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4046                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4047                                         (gva & (PAGE_SIZE - 1));
4048                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4049                 return 1;
4050         }
4051
4052         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4053
4054         if (*gpa == UNMAPPED_GVA)
4055                 return -1;
4056
4057         /* For APIC access vmexit */
4058         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4059                 return 1;
4060
4061         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4062                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4063                 return 1;
4064         }
4065
4066         return 0;
4067 }
4068
4069 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4070                         const void *val, int bytes)
4071 {
4072         int ret;
4073
4074         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4075         if (ret < 0)
4076                 return 0;
4077         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4078         return 1;
4079 }
4080
4081 struct read_write_emulator_ops {
4082         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4083                                   int bytes);
4084         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4085                                   void *val, int bytes);
4086         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4087                                int bytes, void *val);
4088         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4089                                     void *val, int bytes);
4090         bool write;
4091 };
4092
4093 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4094 {
4095         if (vcpu->mmio_read_completed) {
4096                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4097                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4098                 vcpu->mmio_read_completed = 0;
4099                 return 1;
4100         }
4101
4102         return 0;
4103 }
4104
4105 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4106                         void *val, int bytes)
4107 {
4108         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4109 }
4110
4111 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4112                          void *val, int bytes)
4113 {
4114         return emulator_write_phys(vcpu, gpa, val, bytes);
4115 }
4116
4117 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4118 {
4119         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4120         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4121 }
4122
4123 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4124                           void *val, int bytes)
4125 {
4126         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4127         return X86EMUL_IO_NEEDED;
4128 }
4129
4130 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4131                            void *val, int bytes)
4132 {
4133         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4134
4135         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4136         return X86EMUL_CONTINUE;
4137 }
4138
4139 static const struct read_write_emulator_ops read_emultor = {
4140         .read_write_prepare = read_prepare,
4141         .read_write_emulate = read_emulate,
4142         .read_write_mmio = vcpu_mmio_read,
4143         .read_write_exit_mmio = read_exit_mmio,
4144 };
4145
4146 static const struct read_write_emulator_ops write_emultor = {
4147         .read_write_emulate = write_emulate,
4148         .read_write_mmio = write_mmio,
4149         .read_write_exit_mmio = write_exit_mmio,
4150         .write = true,
4151 };
4152
4153 static int emulator_read_write_onepage(unsigned long addr, void *val,
4154                                        unsigned int bytes,
4155                                        struct x86_exception *exception,
4156                                        struct kvm_vcpu *vcpu,
4157                                        const struct read_write_emulator_ops *ops)
4158 {
4159         gpa_t gpa;
4160         int handled, ret;
4161         bool write = ops->write;
4162         struct kvm_mmio_fragment *frag;
4163
4164         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4165
4166         if (ret < 0)
4167                 return X86EMUL_PROPAGATE_FAULT;
4168
4169         /* For APIC access vmexit */
4170         if (ret)
4171                 goto mmio;
4172
4173         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4174                 return X86EMUL_CONTINUE;
4175
4176 mmio:
4177         /*
4178          * Is this MMIO handled locally?
4179          */
4180         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4181         if (handled == bytes)
4182                 return X86EMUL_CONTINUE;
4183
4184         gpa += handled;
4185         bytes -= handled;
4186         val += handled;
4187
4188         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4189         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4190         frag->gpa = gpa;
4191         frag->data = val;
4192         frag->len = bytes;
4193         return X86EMUL_CONTINUE;
4194 }
4195
4196 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4197                         void *val, unsigned int bytes,
4198                         struct x86_exception *exception,
4199                         const struct read_write_emulator_ops *ops)
4200 {
4201         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4202         gpa_t gpa;
4203         int rc;
4204
4205         if (ops->read_write_prepare &&
4206                   ops->read_write_prepare(vcpu, val, bytes))
4207                 return X86EMUL_CONTINUE;
4208
4209         vcpu->mmio_nr_fragments = 0;
4210
4211         /* Crossing a page boundary? */
4212         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4213                 int now;
4214
4215                 now = -addr & ~PAGE_MASK;
4216                 rc = emulator_read_write_onepage(addr, val, now, exception,
4217                                                  vcpu, ops);
4218
4219                 if (rc != X86EMUL_CONTINUE)
4220                         return rc;
4221                 addr += now;
4222                 val += now;
4223                 bytes -= now;
4224         }
4225
4226         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4227                                          vcpu, ops);
4228         if (rc != X86EMUL_CONTINUE)
4229                 return rc;
4230
4231         if (!vcpu->mmio_nr_fragments)
4232                 return rc;
4233
4234         gpa = vcpu->mmio_fragments[0].gpa;
4235
4236         vcpu->mmio_needed = 1;
4237         vcpu->mmio_cur_fragment = 0;
4238
4239         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4240         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4241         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4242         vcpu->run->mmio.phys_addr = gpa;
4243
4244         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4245 }
4246
4247 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4248                                   unsigned long addr,
4249                                   void *val,
4250                                   unsigned int bytes,
4251                                   struct x86_exception *exception)
4252 {
4253         return emulator_read_write(ctxt, addr, val, bytes,
4254                                    exception, &read_emultor);
4255 }
4256
4257 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4258                             unsigned long addr,
4259                             const void *val,
4260                             unsigned int bytes,
4261                             struct x86_exception *exception)
4262 {
4263         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4264                                    exception, &write_emultor);
4265 }
4266
4267 #define CMPXCHG_TYPE(t, ptr, old, new) \
4268         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4269
4270 #ifdef CONFIG_X86_64
4271 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4272 #else
4273 #  define CMPXCHG64(ptr, old, new) \
4274         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4275 #endif
4276
4277 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4278                                      unsigned long addr,
4279                                      const void *old,
4280                                      const void *new,
4281                                      unsigned int bytes,
4282                                      struct x86_exception *exception)
4283 {
4284         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4285         gpa_t gpa;
4286         struct page *page;
4287         char *kaddr;
4288         bool exchanged;
4289
4290         /* guests cmpxchg8b have to be emulated atomically */
4291         if (bytes > 8 || (bytes & (bytes - 1)))
4292                 goto emul_write;
4293
4294         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4295
4296         if (gpa == UNMAPPED_GVA ||
4297             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4298                 goto emul_write;
4299
4300         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4301                 goto emul_write;
4302
4303         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4304         if (is_error_page(page))
4305                 goto emul_write;
4306
4307         kaddr = kmap_atomic(page);
4308         kaddr += offset_in_page(gpa);
4309         switch (bytes) {
4310         case 1:
4311                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4312                 break;
4313         case 2:
4314                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4315                 break;
4316         case 4:
4317                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4318                 break;
4319         case 8:
4320                 exchanged = CMPXCHG64(kaddr, old, new);
4321                 break;
4322         default:
4323                 BUG();
4324         }
4325         kunmap_atomic(kaddr);
4326         kvm_release_page_dirty(page);
4327
4328         if (!exchanged)
4329                 return X86EMUL_CMPXCHG_FAILED;
4330
4331         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4332
4333         return X86EMUL_CONTINUE;
4334
4335 emul_write:
4336         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4337
4338         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4339 }
4340
4341 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4342 {
4343         /* TODO: String I/O for in kernel device */
4344         int r;
4345
4346         if (vcpu->arch.pio.in)
4347                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4348                                     vcpu->arch.pio.size, pd);
4349         else
4350                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4351                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4352                                      pd);
4353         return r;
4354 }
4355
4356 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4357                                unsigned short port, void *val,
4358                                unsigned int count, bool in)
4359 {
4360         trace_kvm_pio(!in, port, size, count);
4361
4362         vcpu->arch.pio.port = port;
4363         vcpu->arch.pio.in = in;
4364         vcpu->arch.pio.count  = count;
4365         vcpu->arch.pio.size = size;
4366
4367         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4368                 vcpu->arch.pio.count = 0;
4369                 return 1;
4370         }
4371
4372         vcpu->run->exit_reason = KVM_EXIT_IO;
4373         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4374         vcpu->run->io.size = size;
4375         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4376         vcpu->run->io.count = count;
4377         vcpu->run->io.port = port;
4378
4379         return 0;
4380 }
4381
4382 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4383                                     int size, unsigned short port, void *val,
4384                                     unsigned int count)
4385 {
4386         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4387         int ret;
4388
4389         if (vcpu->arch.pio.count)
4390                 goto data_avail;
4391
4392         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4393         if (ret) {
4394 data_avail:
4395                 memcpy(val, vcpu->arch.pio_data, size * count);
4396                 vcpu->arch.pio.count = 0;
4397                 return 1;
4398         }
4399
4400         return 0;
4401 }
4402
4403 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4404                                      int size, unsigned short port,
4405                                      const void *val, unsigned int count)
4406 {
4407         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4408
4409         memcpy(vcpu->arch.pio_data, val, size * count);
4410         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4411 }
4412
4413 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4414 {
4415         return kvm_x86_ops->get_segment_base(vcpu, seg);
4416 }
4417
4418 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4419 {
4420         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4421 }
4422
4423 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4424 {
4425         if (!need_emulate_wbinvd(vcpu))
4426                 return X86EMUL_CONTINUE;
4427
4428         if (kvm_x86_ops->has_wbinvd_exit()) {
4429                 int cpu = get_cpu();
4430
4431                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4432                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4433                                 wbinvd_ipi, NULL, 1);
4434                 put_cpu();
4435                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4436         } else
4437                 wbinvd();
4438         return X86EMUL_CONTINUE;
4439 }
4440 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4441
4442 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4443 {
4444         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4445 }
4446
4447 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4448 {
4449         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4450 }
4451
4452 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4453 {
4454
4455         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4456 }
4457
4458 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4459 {
4460         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4461 }
4462
4463 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4464 {
4465         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4466         unsigned long value;
4467
4468         switch (cr) {
4469         case 0:
4470                 value = kvm_read_cr0(vcpu);
4471                 break;
4472         case 2:
4473                 value = vcpu->arch.cr2;
4474                 break;
4475         case 3:
4476                 value = kvm_read_cr3(vcpu);
4477                 break;
4478         case 4:
4479                 value = kvm_read_cr4(vcpu);
4480                 break;
4481         case 8:
4482                 value = kvm_get_cr8(vcpu);
4483                 break;
4484         default:
4485                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4486                 return 0;
4487         }
4488
4489         return value;
4490 }
4491
4492 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4493 {
4494         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4495         int res = 0;
4496
4497         switch (cr) {
4498         case 0:
4499                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4500                 break;
4501         case 2:
4502                 vcpu->arch.cr2 = val;
4503                 break;
4504         case 3:
4505                 res = kvm_set_cr3(vcpu, val);
4506                 break;
4507         case 4:
4508                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4509                 break;
4510         case 8:
4511                 res = kvm_set_cr8(vcpu, val);
4512                 break;
4513         default:
4514                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4515                 res = -1;
4516         }
4517
4518         return res;
4519 }
4520
4521 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4522 {
4523         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4524 }
4525
4526 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4527 {
4528         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4529 }
4530
4531 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4532 {
4533         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4534 }
4535
4536 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4537 {
4538         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4539 }
4540
4541 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4542 {
4543         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4544 }
4545
4546 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4547 {
4548         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4549 }
4550
4551 static unsigned long emulator_get_cached_segment_base(
4552         struct x86_emulate_ctxt *ctxt, int seg)
4553 {
4554         return get_segment_base(emul_to_vcpu(ctxt), seg);
4555 }
4556
4557 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4558                                  struct desc_struct *desc, u32 *base3,
4559                                  int seg)
4560 {
4561         struct kvm_segment var;
4562
4563         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4564         *selector = var.selector;
4565
4566         if (var.unusable) {
4567                 memset(desc, 0, sizeof(*desc));
4568                 return false;
4569         }
4570
4571         if (var.g)
4572                 var.limit >>= 12;
4573         set_desc_limit(desc, var.limit);
4574         set_desc_base(desc, (unsigned long)var.base);
4575 #ifdef CONFIG_X86_64
4576         if (base3)
4577                 *base3 = var.base >> 32;
4578 #endif
4579         desc->type = var.type;
4580         desc->s = var.s;
4581         desc->dpl = var.dpl;
4582         desc->p = var.present;
4583         desc->avl = var.avl;
4584         desc->l = var.l;
4585         desc->d = var.db;
4586         desc->g = var.g;
4587
4588         return true;
4589 }
4590
4591 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4592                                  struct desc_struct *desc, u32 base3,
4593                                  int seg)
4594 {
4595         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4596         struct kvm_segment var;
4597
4598         var.selector = selector;
4599         var.base = get_desc_base(desc);
4600 #ifdef CONFIG_X86_64
4601         var.base |= ((u64)base3) << 32;
4602 #endif
4603         var.limit = get_desc_limit(desc);
4604         if (desc->g)
4605                 var.limit = (var.limit << 12) | 0xfff;
4606         var.type = desc->type;
4607         var.present = desc->p;
4608         var.dpl = desc->dpl;
4609         var.db = desc->d;
4610         var.s = desc->s;
4611         var.l = desc->l;
4612         var.g = desc->g;
4613         var.avl = desc->avl;
4614         var.present = desc->p;
4615         var.unusable = !var.present;
4616         var.padding = 0;
4617
4618         kvm_set_segment(vcpu, &var, seg);
4619         return;
4620 }
4621
4622 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4623                             u32 msr_index, u64 *pdata)
4624 {
4625         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4626 }
4627
4628 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4629                             u32 msr_index, u64 data)
4630 {
4631         struct msr_data msr;
4632
4633         msr.data = data;
4634         msr.index = msr_index;
4635         msr.host_initiated = false;
4636         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4637 }
4638
4639 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4640                              u32 pmc, u64 *pdata)
4641 {
4642         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4643 }
4644
4645 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4646 {
4647         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4648 }
4649
4650 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4651 {
4652         preempt_disable();
4653         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4654         /*
4655          * CR0.TS may reference the host fpu state, not the guest fpu state,
4656          * so it may be clear at this point.
4657          */
4658         clts();
4659 }
4660
4661 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4662 {
4663         preempt_enable();
4664 }
4665
4666 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4667                               struct x86_instruction_info *info,
4668                               enum x86_intercept_stage stage)
4669 {
4670         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4671 }
4672
4673 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4674                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4675 {
4676         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4677 }
4678
4679 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4680 {
4681         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4682 }
4683
4684 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4685 {
4686         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4687 }
4688
4689 static const struct x86_emulate_ops emulate_ops = {
4690         .read_gpr            = emulator_read_gpr,
4691         .write_gpr           = emulator_write_gpr,
4692         .read_std            = kvm_read_guest_virt_system,
4693         .write_std           = kvm_write_guest_virt_system,
4694         .fetch               = kvm_fetch_guest_virt,
4695         .read_emulated       = emulator_read_emulated,
4696         .write_emulated      = emulator_write_emulated,
4697         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4698         .invlpg              = emulator_invlpg,
4699         .pio_in_emulated     = emulator_pio_in_emulated,
4700         .pio_out_emulated    = emulator_pio_out_emulated,
4701         .get_segment         = emulator_get_segment,
4702         .set_segment         = emulator_set_segment,
4703         .get_cached_segment_base = emulator_get_cached_segment_base,
4704         .get_gdt             = emulator_get_gdt,
4705         .get_idt             = emulator_get_idt,
4706         .set_gdt             = emulator_set_gdt,
4707         .set_idt             = emulator_set_idt,
4708         .get_cr              = emulator_get_cr,
4709         .set_cr              = emulator_set_cr,
4710         .set_rflags          = emulator_set_rflags,
4711         .cpl                 = emulator_get_cpl,
4712         .get_dr              = emulator_get_dr,
4713         .set_dr              = emulator_set_dr,
4714         .set_msr             = emulator_set_msr,
4715         .get_msr             = emulator_get_msr,
4716         .read_pmc            = emulator_read_pmc,
4717         .halt                = emulator_halt,
4718         .wbinvd              = emulator_wbinvd,
4719         .fix_hypercall       = emulator_fix_hypercall,
4720         .get_fpu             = emulator_get_fpu,
4721         .put_fpu             = emulator_put_fpu,
4722         .intercept           = emulator_intercept,
4723         .get_cpuid           = emulator_get_cpuid,
4724 };
4725
4726 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4727 {
4728         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4729         /*
4730          * an sti; sti; sequence only disable interrupts for the first
4731          * instruction. So, if the last instruction, be it emulated or
4732          * not, left the system with the INT_STI flag enabled, it
4733          * means that the last instruction is an sti. We should not
4734          * leave the flag on in this case. The same goes for mov ss
4735          */
4736         if (!(int_shadow & mask))
4737                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4738 }
4739
4740 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4741 {
4742         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4743         if (ctxt->exception.vector == PF_VECTOR)
4744                 kvm_propagate_fault(vcpu, &ctxt->exception);
4745         else if (ctxt->exception.error_code_valid)
4746                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4747                                       ctxt->exception.error_code);
4748         else
4749                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4750 }
4751
4752 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4753 {
4754         memset(&ctxt->twobyte, 0,
4755                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4756
4757         ctxt->fetch.start = 0;
4758         ctxt->fetch.end = 0;
4759         ctxt->io_read.pos = 0;
4760         ctxt->io_read.end = 0;
4761         ctxt->mem_read.pos = 0;
4762         ctxt->mem_read.end = 0;
4763 }
4764
4765 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4766 {
4767         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4768         int cs_db, cs_l;
4769
4770         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4771
4772         ctxt->eflags = kvm_get_rflags(vcpu);
4773         ctxt->eip = kvm_rip_read(vcpu);
4774         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4775                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4776                      cs_l                               ? X86EMUL_MODE_PROT64 :
4777                      cs_db                              ? X86EMUL_MODE_PROT32 :
4778                                                           X86EMUL_MODE_PROT16;
4779         ctxt->guest_mode = is_guest_mode(vcpu);
4780
4781         init_decode_cache(ctxt);
4782         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4783 }
4784
4785 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4786 {
4787         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4788         int ret;
4789
4790         init_emulate_ctxt(vcpu);
4791
4792         ctxt->op_bytes = 2;
4793         ctxt->ad_bytes = 2;
4794         ctxt->_eip = ctxt->eip + inc_eip;
4795         ret = emulate_int_real(ctxt, irq);
4796
4797         if (ret != X86EMUL_CONTINUE)
4798                 return EMULATE_FAIL;
4799
4800         ctxt->eip = ctxt->_eip;
4801         kvm_rip_write(vcpu, ctxt->eip);
4802         kvm_set_rflags(vcpu, ctxt->eflags);
4803
4804         if (irq == NMI_VECTOR)
4805                 vcpu->arch.nmi_pending = 0;
4806         else
4807                 vcpu->arch.interrupt.pending = false;
4808
4809         return EMULATE_DONE;
4810 }
4811 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4812
4813 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4814 {
4815         int r = EMULATE_DONE;
4816
4817         ++vcpu->stat.insn_emulation_fail;
4818         trace_kvm_emulate_insn_failed(vcpu);
4819         if (!is_guest_mode(vcpu)) {
4820                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4821                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4822                 vcpu->run->internal.ndata = 0;
4823                 r = EMULATE_FAIL;
4824         }
4825         kvm_queue_exception(vcpu, UD_VECTOR);
4826
4827         return r;
4828 }
4829
4830 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4831                                   bool write_fault_to_shadow_pgtable,
4832                                   int emulation_type)
4833 {
4834         gpa_t gpa = cr2;
4835         pfn_t pfn;
4836
4837         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4838                 return false;
4839
4840         if (!vcpu->arch.mmu.direct_map) {
4841                 /*
4842                  * Write permission should be allowed since only
4843                  * write access need to be emulated.
4844                  */
4845                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4846
4847                 /*
4848                  * If the mapping is invalid in guest, let cpu retry
4849                  * it to generate fault.
4850                  */
4851                 if (gpa == UNMAPPED_GVA)
4852                         return true;
4853         }
4854
4855         /*
4856          * Do not retry the unhandleable instruction if it faults on the
4857          * readonly host memory, otherwise it will goto a infinite loop:
4858          * retry instruction -> write #PF -> emulation fail -> retry
4859          * instruction -> ...
4860          */
4861         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4862
4863         /*
4864          * If the instruction failed on the error pfn, it can not be fixed,
4865          * report the error to userspace.
4866          */
4867         if (is_error_noslot_pfn(pfn))
4868                 return false;
4869
4870         kvm_release_pfn_clean(pfn);
4871
4872         /* The instructions are well-emulated on direct mmu. */
4873         if (vcpu->arch.mmu.direct_map) {
4874                 unsigned int indirect_shadow_pages;
4875
4876                 spin_lock(&vcpu->kvm->mmu_lock);
4877                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4878                 spin_unlock(&vcpu->kvm->mmu_lock);
4879
4880                 if (indirect_shadow_pages)
4881                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4882
4883                 return true;
4884         }
4885
4886         /*
4887          * if emulation was due to access to shadowed page table
4888          * and it failed try to unshadow page and re-enter the
4889          * guest to let CPU execute the instruction.
4890          */
4891         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4892
4893         /*
4894          * If the access faults on its page table, it can not
4895          * be fixed by unprotecting shadow page and it should
4896          * be reported to userspace.
4897          */
4898         return !write_fault_to_shadow_pgtable;
4899 }
4900
4901 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4902                               unsigned long cr2,  int emulation_type)
4903 {
4904         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4905         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4906
4907         last_retry_eip = vcpu->arch.last_retry_eip;
4908         last_retry_addr = vcpu->arch.last_retry_addr;
4909
4910         /*
4911          * If the emulation is caused by #PF and it is non-page_table
4912          * writing instruction, it means the VM-EXIT is caused by shadow
4913          * page protected, we can zap the shadow page and retry this
4914          * instruction directly.
4915          *
4916          * Note: if the guest uses a non-page-table modifying instruction
4917          * on the PDE that points to the instruction, then we will unmap
4918          * the instruction and go to an infinite loop. So, we cache the
4919          * last retried eip and the last fault address, if we meet the eip
4920          * and the address again, we can break out of the potential infinite
4921          * loop.
4922          */
4923         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4924
4925         if (!(emulation_type & EMULTYPE_RETRY))
4926                 return false;
4927
4928         if (x86_page_table_writing_insn(ctxt))
4929                 return false;
4930
4931         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4932                 return false;
4933
4934         vcpu->arch.last_retry_eip = ctxt->eip;
4935         vcpu->arch.last_retry_addr = cr2;
4936
4937         if (!vcpu->arch.mmu.direct_map)
4938                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4939
4940         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4941
4942         return true;
4943 }
4944
4945 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4946 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4947
4948 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
4949                                 unsigned long *db)
4950 {
4951         u32 dr6 = 0;
4952         int i;
4953         u32 enable, rwlen;
4954
4955         enable = dr7;
4956         rwlen = dr7 >> 16;
4957         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
4958                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
4959                         dr6 |= (1 << i);
4960         return dr6;
4961 }
4962
4963 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
4964 {
4965         struct kvm_run *kvm_run = vcpu->run;
4966
4967         /*
4968          * Use the "raw" value to see if TF was passed to the processor.
4969          * Note that the new value of the flags has not been saved yet.
4970          *
4971          * This is correct even for TF set by the guest, because "the
4972          * processor will not generate this exception after the instruction
4973          * that sets the TF flag".
4974          */
4975         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
4976
4977         if (unlikely(rflags & X86_EFLAGS_TF)) {
4978                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
4979                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
4980                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
4981                         kvm_run->debug.arch.exception = DB_VECTOR;
4982                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
4983                         *r = EMULATE_USER_EXIT;
4984                 } else {
4985                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
4986                         /*
4987                          * "Certain debug exceptions may clear bit 0-3.  The
4988                          * remaining contents of the DR6 register are never
4989                          * cleared by the processor".
4990                          */
4991                         vcpu->arch.dr6 &= ~15;
4992                         vcpu->arch.dr6 |= DR6_BS;
4993                         kvm_queue_exception(vcpu, DB_VECTOR);
4994                 }
4995         }
4996 }
4997
4998 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
4999 {
5000         struct kvm_run *kvm_run = vcpu->run;
5001         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5002         u32 dr6 = 0;
5003
5004         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5005             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5006                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5007                                            vcpu->arch.guest_debug_dr7,
5008                                            vcpu->arch.eff_db);
5009
5010                 if (dr6 != 0) {
5011                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5012                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5013                                 get_segment_base(vcpu, VCPU_SREG_CS);
5014
5015                         kvm_run->debug.arch.exception = DB_VECTOR;
5016                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5017                         *r = EMULATE_USER_EXIT;
5018                         return true;
5019                 }
5020         }
5021
5022         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5023                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5024                                            vcpu->arch.dr7,
5025                                            vcpu->arch.db);
5026
5027                 if (dr6 != 0) {
5028                         vcpu->arch.dr6 &= ~15;
5029                         vcpu->arch.dr6 |= dr6;
5030                         kvm_queue_exception(vcpu, DB_VECTOR);
5031                         *r = EMULATE_DONE;
5032                         return true;
5033                 }
5034         }
5035
5036         return false;
5037 }
5038
5039 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5040                             unsigned long cr2,
5041                             int emulation_type,
5042                             void *insn,
5043                             int insn_len)
5044 {
5045         int r;
5046         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5047         bool writeback = true;
5048         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5049
5050         /*
5051          * Clear write_fault_to_shadow_pgtable here to ensure it is
5052          * never reused.
5053          */
5054         vcpu->arch.write_fault_to_shadow_pgtable = false;
5055         kvm_clear_exception_queue(vcpu);
5056
5057         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5058                 init_emulate_ctxt(vcpu);
5059
5060                 /*
5061                  * We will reenter on the same instruction since
5062                  * we do not set complete_userspace_io.  This does not
5063                  * handle watchpoints yet, those would be handled in
5064                  * the emulate_ops.
5065                  */
5066                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5067                         return r;
5068
5069                 ctxt->interruptibility = 0;
5070                 ctxt->have_exception = false;
5071                 ctxt->perm_ok = false;
5072
5073                 ctxt->only_vendor_specific_insn
5074                         = emulation_type & EMULTYPE_TRAP_UD;
5075
5076                 r = x86_decode_insn(ctxt, insn, insn_len);
5077
5078                 trace_kvm_emulate_insn_start(vcpu);
5079                 ++vcpu->stat.insn_emulation;
5080                 if (r != EMULATION_OK)  {
5081                         if (emulation_type & EMULTYPE_TRAP_UD)
5082                                 return EMULATE_FAIL;
5083                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5084                                                 emulation_type))
5085                                 return EMULATE_DONE;
5086                         if (emulation_type & EMULTYPE_SKIP)
5087                                 return EMULATE_FAIL;
5088                         return handle_emulation_failure(vcpu);
5089                 }
5090         }
5091
5092         if (emulation_type & EMULTYPE_SKIP) {
5093                 kvm_rip_write(vcpu, ctxt->_eip);
5094                 return EMULATE_DONE;
5095         }
5096
5097         if (retry_instruction(ctxt, cr2, emulation_type))
5098                 return EMULATE_DONE;
5099
5100         /* this is needed for vmware backdoor interface to work since it
5101            changes registers values  during IO operation */
5102         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5103                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5104                 emulator_invalidate_register_cache(ctxt);
5105         }
5106
5107 restart:
5108         r = x86_emulate_insn(ctxt);
5109
5110         if (r == EMULATION_INTERCEPTED)
5111                 return EMULATE_DONE;
5112
5113         if (r == EMULATION_FAILED) {
5114                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5115                                         emulation_type))
5116                         return EMULATE_DONE;
5117
5118                 return handle_emulation_failure(vcpu);
5119         }
5120
5121         if (ctxt->have_exception) {
5122                 inject_emulated_exception(vcpu);
5123                 r = EMULATE_DONE;
5124         } else if (vcpu->arch.pio.count) {
5125                 if (!vcpu->arch.pio.in)
5126                         vcpu->arch.pio.count = 0;
5127                 else {
5128                         writeback = false;
5129                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5130                 }
5131                 r = EMULATE_USER_EXIT;
5132         } else if (vcpu->mmio_needed) {
5133                 if (!vcpu->mmio_is_write)
5134                         writeback = false;
5135                 r = EMULATE_USER_EXIT;
5136                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5137         } else if (r == EMULATION_RESTART)
5138                 goto restart;
5139         else
5140                 r = EMULATE_DONE;
5141
5142         if (writeback) {
5143                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5144                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5145                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5146                 kvm_rip_write(vcpu, ctxt->eip);
5147                 if (r == EMULATE_DONE)
5148                         kvm_vcpu_check_singlestep(vcpu, &r);
5149                 kvm_set_rflags(vcpu, ctxt->eflags);
5150         } else
5151                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5152
5153         return r;
5154 }
5155 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5156
5157 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5158 {
5159         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5160         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5161                                             size, port, &val, 1);
5162         /* do not return to emulator after return from userspace */
5163         vcpu->arch.pio.count = 0;
5164         return ret;
5165 }
5166 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5167
5168 static void tsc_bad(void *info)
5169 {
5170         __this_cpu_write(cpu_tsc_khz, 0);
5171 }
5172
5173 static void tsc_khz_changed(void *data)
5174 {
5175         struct cpufreq_freqs *freq = data;
5176         unsigned long khz = 0;
5177
5178         if (data)
5179                 khz = freq->new;
5180         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5181                 khz = cpufreq_quick_get(raw_smp_processor_id());
5182         if (!khz)
5183                 khz = tsc_khz;
5184         __this_cpu_write(cpu_tsc_khz, khz);
5185 }
5186
5187 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5188                                      void *data)
5189 {
5190         struct cpufreq_freqs *freq = data;
5191         struct kvm *kvm;
5192         struct kvm_vcpu *vcpu;
5193         int i, send_ipi = 0;
5194
5195         /*
5196          * We allow guests to temporarily run on slowing clocks,
5197          * provided we notify them after, or to run on accelerating
5198          * clocks, provided we notify them before.  Thus time never
5199          * goes backwards.
5200          *
5201          * However, we have a problem.  We can't atomically update
5202          * the frequency of a given CPU from this function; it is
5203          * merely a notifier, which can be called from any CPU.
5204          * Changing the TSC frequency at arbitrary points in time
5205          * requires a recomputation of local variables related to
5206          * the TSC for each VCPU.  We must flag these local variables
5207          * to be updated and be sure the update takes place with the
5208          * new frequency before any guests proceed.
5209          *
5210          * Unfortunately, the combination of hotplug CPU and frequency
5211          * change creates an intractable locking scenario; the order
5212          * of when these callouts happen is undefined with respect to
5213          * CPU hotplug, and they can race with each other.  As such,
5214          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5215          * undefined; you can actually have a CPU frequency change take
5216          * place in between the computation of X and the setting of the
5217          * variable.  To protect against this problem, all updates of
5218          * the per_cpu tsc_khz variable are done in an interrupt
5219          * protected IPI, and all callers wishing to update the value
5220          * must wait for a synchronous IPI to complete (which is trivial
5221          * if the caller is on the CPU already).  This establishes the
5222          * necessary total order on variable updates.
5223          *
5224          * Note that because a guest time update may take place
5225          * anytime after the setting of the VCPU's request bit, the
5226          * correct TSC value must be set before the request.  However,
5227          * to ensure the update actually makes it to any guest which
5228          * starts running in hardware virtualization between the set
5229          * and the acquisition of the spinlock, we must also ping the
5230          * CPU after setting the request bit.
5231          *
5232          */
5233
5234         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5235                 return 0;
5236         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5237                 return 0;
5238
5239         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5240
5241         raw_spin_lock(&kvm_lock);
5242         list_for_each_entry(kvm, &vm_list, vm_list) {
5243                 kvm_for_each_vcpu(i, vcpu, kvm) {
5244                         if (vcpu->cpu != freq->cpu)
5245                                 continue;
5246                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5247                         if (vcpu->cpu != smp_processor_id())
5248                                 send_ipi = 1;
5249                 }
5250         }
5251         raw_spin_unlock(&kvm_lock);
5252
5253         if (freq->old < freq->new && send_ipi) {
5254                 /*
5255                  * We upscale the frequency.  Must make the guest
5256                  * doesn't see old kvmclock values while running with
5257                  * the new frequency, otherwise we risk the guest sees
5258                  * time go backwards.
5259                  *
5260                  * In case we update the frequency for another cpu
5261                  * (which might be in guest context) send an interrupt
5262                  * to kick the cpu out of guest context.  Next time
5263                  * guest context is entered kvmclock will be updated,
5264                  * so the guest will not see stale values.
5265                  */
5266                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5267         }
5268         return 0;
5269 }
5270
5271 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5272         .notifier_call  = kvmclock_cpufreq_notifier
5273 };
5274
5275 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5276                                         unsigned long action, void *hcpu)
5277 {
5278         unsigned int cpu = (unsigned long)hcpu;
5279
5280         switch (action) {
5281                 case CPU_ONLINE:
5282                 case CPU_DOWN_FAILED:
5283                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5284                         break;
5285                 case CPU_DOWN_PREPARE:
5286                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5287                         break;
5288         }
5289         return NOTIFY_OK;
5290 }
5291
5292 static struct notifier_block kvmclock_cpu_notifier_block = {
5293         .notifier_call  = kvmclock_cpu_notifier,
5294         .priority = -INT_MAX
5295 };
5296
5297 static void kvm_timer_init(void)
5298 {
5299         int cpu;
5300
5301         max_tsc_khz = tsc_khz;
5302         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5303         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5304 #ifdef CONFIG_CPU_FREQ
5305                 struct cpufreq_policy policy;
5306                 memset(&policy, 0, sizeof(policy));
5307                 cpu = get_cpu();
5308                 cpufreq_get_policy(&policy, cpu);
5309                 if (policy.cpuinfo.max_freq)
5310                         max_tsc_khz = policy.cpuinfo.max_freq;
5311                 put_cpu();
5312 #endif
5313                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5314                                           CPUFREQ_TRANSITION_NOTIFIER);
5315         }
5316         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5317         for_each_online_cpu(cpu)
5318                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5319 }
5320
5321 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5322
5323 int kvm_is_in_guest(void)
5324 {
5325         return __this_cpu_read(current_vcpu) != NULL;
5326 }
5327
5328 static int kvm_is_user_mode(void)
5329 {
5330         int user_mode = 3;
5331
5332         if (__this_cpu_read(current_vcpu))
5333                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5334
5335         return user_mode != 0;
5336 }
5337
5338 static unsigned long kvm_get_guest_ip(void)
5339 {
5340         unsigned long ip = 0;
5341
5342         if (__this_cpu_read(current_vcpu))
5343                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5344
5345         return ip;
5346 }
5347
5348 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5349         .is_in_guest            = kvm_is_in_guest,
5350         .is_user_mode           = kvm_is_user_mode,
5351         .get_guest_ip           = kvm_get_guest_ip,
5352 };
5353
5354 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5355 {
5356         __this_cpu_write(current_vcpu, vcpu);
5357 }
5358 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5359
5360 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5361 {
5362         __this_cpu_write(current_vcpu, NULL);
5363 }
5364 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5365
5366 static void kvm_set_mmio_spte_mask(void)
5367 {
5368         u64 mask;
5369         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5370
5371         /*
5372          * Set the reserved bits and the present bit of an paging-structure
5373          * entry to generate page fault with PFER.RSV = 1.
5374          */
5375          /* Mask the reserved physical address bits. */
5376         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5377
5378         /* Bit 62 is always reserved for 32bit host. */
5379         mask |= 0x3ull << 62;
5380
5381         /* Set the present bit. */
5382         mask |= 1ull;
5383
5384 #ifdef CONFIG_X86_64
5385         /*
5386          * If reserved bit is not supported, clear the present bit to disable
5387          * mmio page fault.
5388          */
5389         if (maxphyaddr == 52)
5390                 mask &= ~1ull;
5391 #endif
5392
5393         kvm_mmu_set_mmio_spte_mask(mask);
5394 }
5395
5396 #ifdef CONFIG_X86_64
5397 static void pvclock_gtod_update_fn(struct work_struct *work)
5398 {
5399         struct kvm *kvm;
5400
5401         struct kvm_vcpu *vcpu;
5402         int i;
5403
5404         raw_spin_lock(&kvm_lock);
5405         list_for_each_entry(kvm, &vm_list, vm_list)
5406                 kvm_for_each_vcpu(i, vcpu, kvm)
5407                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5408         atomic_set(&kvm_guest_has_master_clock, 0);
5409         raw_spin_unlock(&kvm_lock);
5410 }
5411
5412 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5413
5414 /*
5415  * Notification about pvclock gtod data update.
5416  */
5417 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5418                                void *priv)
5419 {
5420         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5421         struct timekeeper *tk = priv;
5422
5423         update_pvclock_gtod(tk);
5424
5425         /* disable master clock if host does not trust, or does not
5426          * use, TSC clocksource
5427          */
5428         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5429             atomic_read(&kvm_guest_has_master_clock) != 0)
5430                 queue_work(system_long_wq, &pvclock_gtod_work);
5431
5432         return 0;
5433 }
5434
5435 static struct notifier_block pvclock_gtod_notifier = {
5436         .notifier_call = pvclock_gtod_notify,
5437 };
5438 #endif
5439
5440 int kvm_arch_init(void *opaque)
5441 {
5442         int r;
5443         struct kvm_x86_ops *ops = opaque;
5444
5445         if (kvm_x86_ops) {
5446                 printk(KERN_ERR "kvm: already loaded the other module\n");
5447                 r = -EEXIST;
5448                 goto out;
5449         }
5450
5451         if (!ops->cpu_has_kvm_support()) {
5452                 printk(KERN_ERR "kvm: no hardware support\n");
5453                 r = -EOPNOTSUPP;
5454                 goto out;
5455         }
5456         if (ops->disabled_by_bios()) {
5457                 printk(KERN_ERR "kvm: disabled by bios\n");
5458                 r = -EOPNOTSUPP;
5459                 goto out;
5460         }
5461
5462         r = -ENOMEM;
5463         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5464         if (!shared_msrs) {
5465                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5466                 goto out;
5467         }
5468
5469         r = kvm_mmu_module_init();
5470         if (r)
5471                 goto out_free_percpu;
5472
5473         kvm_set_mmio_spte_mask();
5474         kvm_init_msr_list();
5475
5476         kvm_x86_ops = ops;
5477         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5478                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5479
5480         kvm_timer_init();
5481
5482         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5483
5484         if (cpu_has_xsave)
5485                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5486
5487         kvm_lapic_init();
5488 #ifdef CONFIG_X86_64
5489         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5490 #endif
5491
5492         return 0;
5493
5494 out_free_percpu:
5495         free_percpu(shared_msrs);
5496 out:
5497         return r;
5498 }
5499
5500 void kvm_arch_exit(void)
5501 {
5502         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5503
5504         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5505                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5506                                             CPUFREQ_TRANSITION_NOTIFIER);
5507         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5508 #ifdef CONFIG_X86_64
5509         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5510 #endif
5511         kvm_x86_ops = NULL;
5512         kvm_mmu_module_exit();
5513         free_percpu(shared_msrs);
5514 }
5515
5516 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5517 {
5518         ++vcpu->stat.halt_exits;
5519         if (irqchip_in_kernel(vcpu->kvm)) {
5520                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5521                 return 1;
5522         } else {
5523                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5524                 return 0;
5525         }
5526 }
5527 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5528
5529 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5530 {
5531         u64 param, ingpa, outgpa, ret;
5532         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5533         bool fast, longmode;
5534         int cs_db, cs_l;
5535
5536         /*
5537          * hypercall generates UD from non zero cpl and real mode
5538          * per HYPER-V spec
5539          */
5540         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5541                 kvm_queue_exception(vcpu, UD_VECTOR);
5542                 return 0;
5543         }
5544
5545         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5546         longmode = is_long_mode(vcpu) && cs_l == 1;
5547
5548         if (!longmode) {
5549                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5550                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5551                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5552                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5553                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5554                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5555         }
5556 #ifdef CONFIG_X86_64
5557         else {
5558                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5559                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5560                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5561         }
5562 #endif
5563
5564         code = param & 0xffff;
5565         fast = (param >> 16) & 0x1;
5566         rep_cnt = (param >> 32) & 0xfff;
5567         rep_idx = (param >> 48) & 0xfff;
5568
5569         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5570
5571         switch (code) {
5572         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5573                 kvm_vcpu_on_spin(vcpu);
5574                 break;
5575         default:
5576                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5577                 break;
5578         }
5579
5580         ret = res | (((u64)rep_done & 0xfff) << 32);
5581         if (longmode) {
5582                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5583         } else {
5584                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5585                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5586         }
5587
5588         return 1;
5589 }
5590
5591 /*
5592  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5593  *
5594  * @apicid - apicid of vcpu to be kicked.
5595  */
5596 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5597 {
5598         struct kvm_lapic_irq lapic_irq;
5599
5600         lapic_irq.shorthand = 0;
5601         lapic_irq.dest_mode = 0;
5602         lapic_irq.dest_id = apicid;
5603
5604         lapic_irq.delivery_mode = APIC_DM_REMRD;
5605         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5606 }
5607
5608 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5609 {
5610         unsigned long nr, a0, a1, a2, a3, ret;
5611         int r = 1;
5612
5613         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5614                 return kvm_hv_hypercall(vcpu);
5615
5616         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5617         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5618         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5619         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5620         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5621
5622         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5623
5624         if (!is_long_mode(vcpu)) {
5625                 nr &= 0xFFFFFFFF;
5626                 a0 &= 0xFFFFFFFF;
5627                 a1 &= 0xFFFFFFFF;
5628                 a2 &= 0xFFFFFFFF;
5629                 a3 &= 0xFFFFFFFF;
5630         }
5631
5632         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5633                 ret = -KVM_EPERM;
5634                 goto out;
5635         }
5636
5637         switch (nr) {
5638         case KVM_HC_VAPIC_POLL_IRQ:
5639                 ret = 0;
5640                 break;
5641         case KVM_HC_KICK_CPU:
5642                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5643                 ret = 0;
5644                 break;
5645         default:
5646                 ret = -KVM_ENOSYS;
5647                 break;
5648         }
5649 out:
5650         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5651         ++vcpu->stat.hypercalls;
5652         return r;
5653 }
5654 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5655
5656 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5657 {
5658         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5659         char instruction[3];
5660         unsigned long rip = kvm_rip_read(vcpu);
5661
5662         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5663
5664         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5665 }
5666
5667 /*
5668  * Check if userspace requested an interrupt window, and that the
5669  * interrupt window is open.
5670  *
5671  * No need to exit to userspace if we already have an interrupt queued.
5672  */
5673 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5674 {
5675         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5676                 vcpu->run->request_interrupt_window &&
5677                 kvm_arch_interrupt_allowed(vcpu));
5678 }
5679
5680 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5681 {
5682         struct kvm_run *kvm_run = vcpu->run;
5683
5684         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5685         kvm_run->cr8 = kvm_get_cr8(vcpu);
5686         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5687         if (irqchip_in_kernel(vcpu->kvm))
5688                 kvm_run->ready_for_interrupt_injection = 1;
5689         else
5690                 kvm_run->ready_for_interrupt_injection =
5691                         kvm_arch_interrupt_allowed(vcpu) &&
5692                         !kvm_cpu_has_interrupt(vcpu) &&
5693                         !kvm_event_needs_reinjection(vcpu);
5694 }
5695
5696 static int vapic_enter(struct kvm_vcpu *vcpu)
5697 {
5698         struct kvm_lapic *apic = vcpu->arch.apic;
5699         struct page *page;
5700
5701         if (!apic || !apic->vapic_addr)
5702                 return 0;
5703
5704         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5705         if (is_error_page(page))
5706                 return -EFAULT;
5707
5708         vcpu->arch.apic->vapic_page = page;
5709         return 0;
5710 }
5711
5712 static void vapic_exit(struct kvm_vcpu *vcpu)
5713 {
5714         struct kvm_lapic *apic = vcpu->arch.apic;
5715         int idx;
5716
5717         if (!apic || !apic->vapic_addr)
5718                 return;
5719
5720         idx = srcu_read_lock(&vcpu->kvm->srcu);
5721         kvm_release_page_dirty(apic->vapic_page);
5722         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5723         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5724 }
5725
5726 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5727 {
5728         int max_irr, tpr;
5729
5730         if (!kvm_x86_ops->update_cr8_intercept)
5731                 return;
5732
5733         if (!vcpu->arch.apic)
5734                 return;
5735
5736         if (!vcpu->arch.apic->vapic_addr)
5737                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5738         else
5739                 max_irr = -1;
5740
5741         if (max_irr != -1)
5742                 max_irr >>= 4;
5743
5744         tpr = kvm_lapic_get_cr8(vcpu);
5745
5746         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5747 }
5748
5749 static void inject_pending_event(struct kvm_vcpu *vcpu)
5750 {
5751         /* try to reinject previous events if any */
5752         if (vcpu->arch.exception.pending) {
5753                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5754                                         vcpu->arch.exception.has_error_code,
5755                                         vcpu->arch.exception.error_code);
5756                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5757                                           vcpu->arch.exception.has_error_code,
5758                                           vcpu->arch.exception.error_code,
5759                                           vcpu->arch.exception.reinject);
5760                 return;
5761         }
5762
5763         if (vcpu->arch.nmi_injected) {
5764                 kvm_x86_ops->set_nmi(vcpu);
5765                 return;
5766         }
5767
5768         if (vcpu->arch.interrupt.pending) {
5769                 kvm_x86_ops->set_irq(vcpu);
5770                 return;
5771         }
5772
5773         /* try to inject new event if pending */
5774         if (vcpu->arch.nmi_pending) {
5775                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5776                         --vcpu->arch.nmi_pending;
5777                         vcpu->arch.nmi_injected = true;
5778                         kvm_x86_ops->set_nmi(vcpu);
5779                 }
5780         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5781                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5782                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5783                                             false);
5784                         kvm_x86_ops->set_irq(vcpu);
5785                 }
5786         }
5787 }
5788
5789 static void process_nmi(struct kvm_vcpu *vcpu)
5790 {
5791         unsigned limit = 2;
5792
5793         /*
5794          * x86 is limited to one NMI running, and one NMI pending after it.
5795          * If an NMI is already in progress, limit further NMIs to just one.
5796          * Otherwise, allow two (and we'll inject the first one immediately).
5797          */
5798         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5799                 limit = 1;
5800
5801         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5802         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5803         kvm_make_request(KVM_REQ_EVENT, vcpu);
5804 }
5805
5806 static void kvm_gen_update_masterclock(struct kvm *kvm)
5807 {
5808 #ifdef CONFIG_X86_64
5809         int i;
5810         struct kvm_vcpu *vcpu;
5811         struct kvm_arch *ka = &kvm->arch;
5812
5813         spin_lock(&ka->pvclock_gtod_sync_lock);
5814         kvm_make_mclock_inprogress_request(kvm);
5815         /* no guest entries from this point */
5816         pvclock_update_vm_gtod_copy(kvm);
5817
5818         kvm_for_each_vcpu(i, vcpu, kvm)
5819                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5820
5821         /* guest entries allowed */
5822         kvm_for_each_vcpu(i, vcpu, kvm)
5823                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5824
5825         spin_unlock(&ka->pvclock_gtod_sync_lock);
5826 #endif
5827 }
5828
5829 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5830 {
5831         u64 eoi_exit_bitmap[4];
5832         u32 tmr[8];
5833
5834         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5835                 return;
5836
5837         memset(eoi_exit_bitmap, 0, 32);
5838         memset(tmr, 0, 32);
5839
5840         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5841         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5842         kvm_apic_update_tmr(vcpu, tmr);
5843 }
5844
5845 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5846 {
5847         int r;
5848         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5849                 vcpu->run->request_interrupt_window;
5850         bool req_immediate_exit = false;
5851
5852         if (vcpu->requests) {
5853                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5854                         kvm_mmu_unload(vcpu);
5855                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5856                         __kvm_migrate_timers(vcpu);
5857                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5858                         kvm_gen_update_masterclock(vcpu->kvm);
5859                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5860                         kvm_gen_kvmclock_update(vcpu);
5861                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5862                         r = kvm_guest_time_update(vcpu);
5863                         if (unlikely(r))
5864                                 goto out;
5865                 }
5866                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5867                         kvm_mmu_sync_roots(vcpu);
5868                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5869                         kvm_x86_ops->tlb_flush(vcpu);
5870                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5871                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5872                         r = 0;
5873                         goto out;
5874                 }
5875                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5876                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5877                         r = 0;
5878                         goto out;
5879                 }
5880                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5881                         vcpu->fpu_active = 0;
5882                         kvm_x86_ops->fpu_deactivate(vcpu);
5883                 }
5884                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5885                         /* Page is swapped out. Do synthetic halt */
5886                         vcpu->arch.apf.halted = true;
5887                         r = 1;
5888                         goto out;
5889                 }
5890                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5891                         record_steal_time(vcpu);
5892                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5893                         process_nmi(vcpu);
5894                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5895                         kvm_handle_pmu_event(vcpu);
5896                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5897                         kvm_deliver_pmi(vcpu);
5898                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5899                         vcpu_scan_ioapic(vcpu);
5900         }
5901
5902         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5903                 kvm_apic_accept_events(vcpu);
5904                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5905                         r = 1;
5906                         goto out;
5907                 }
5908
5909                 inject_pending_event(vcpu);
5910
5911                 /* enable NMI/IRQ window open exits if needed */
5912                 if (vcpu->arch.nmi_pending)
5913                         req_immediate_exit =
5914                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5915                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5916                         req_immediate_exit =
5917                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5918
5919                 if (kvm_lapic_enabled(vcpu)) {
5920                         /*
5921                          * Update architecture specific hints for APIC
5922                          * virtual interrupt delivery.
5923                          */
5924                         if (kvm_x86_ops->hwapic_irr_update)
5925                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5926                                         kvm_lapic_find_highest_irr(vcpu));
5927                         update_cr8_intercept(vcpu);
5928                         kvm_lapic_sync_to_vapic(vcpu);
5929                 }
5930         }
5931
5932         r = kvm_mmu_reload(vcpu);
5933         if (unlikely(r)) {
5934                 goto cancel_injection;
5935         }
5936
5937         preempt_disable();
5938
5939         kvm_x86_ops->prepare_guest_switch(vcpu);
5940         if (vcpu->fpu_active)
5941                 kvm_load_guest_fpu(vcpu);
5942         kvm_load_guest_xcr0(vcpu);
5943
5944         vcpu->mode = IN_GUEST_MODE;
5945
5946         /* We should set ->mode before check ->requests,
5947          * see the comment in make_all_cpus_request.
5948          */
5949         smp_mb();
5950
5951         local_irq_disable();
5952
5953         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5954             || need_resched() || signal_pending(current)) {
5955                 vcpu->mode = OUTSIDE_GUEST_MODE;
5956                 smp_wmb();
5957                 local_irq_enable();
5958                 preempt_enable();
5959                 r = 1;
5960                 goto cancel_injection;
5961         }
5962
5963         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5964
5965         if (req_immediate_exit)
5966                 smp_send_reschedule(vcpu->cpu);
5967
5968         kvm_guest_enter();
5969
5970         if (unlikely(vcpu->arch.switch_db_regs)) {
5971                 set_debugreg(0, 7);
5972                 set_debugreg(vcpu->arch.eff_db[0], 0);
5973                 set_debugreg(vcpu->arch.eff_db[1], 1);
5974                 set_debugreg(vcpu->arch.eff_db[2], 2);
5975                 set_debugreg(vcpu->arch.eff_db[3], 3);
5976         }
5977
5978         trace_kvm_entry(vcpu->vcpu_id);
5979         kvm_x86_ops->run(vcpu);
5980
5981         /*
5982          * If the guest has used debug registers, at least dr7
5983          * will be disabled while returning to the host.
5984          * If we don't have active breakpoints in the host, we don't
5985          * care about the messed up debug address registers. But if
5986          * we have some of them active, restore the old state.
5987          */
5988         if (hw_breakpoint_active())
5989                 hw_breakpoint_restore();
5990
5991         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5992                                                            native_read_tsc());
5993
5994         vcpu->mode = OUTSIDE_GUEST_MODE;
5995         smp_wmb();
5996
5997         /* Interrupt is enabled by handle_external_intr() */
5998         kvm_x86_ops->handle_external_intr(vcpu);
5999
6000         ++vcpu->stat.exits;
6001
6002         /*
6003          * We must have an instruction between local_irq_enable() and
6004          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6005          * the interrupt shadow.  The stat.exits increment will do nicely.
6006          * But we need to prevent reordering, hence this barrier():
6007          */
6008         barrier();
6009
6010         kvm_guest_exit();
6011
6012         preempt_enable();
6013
6014         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6015
6016         /*
6017          * Profile KVM exit RIPs:
6018          */
6019         if (unlikely(prof_on == KVM_PROFILING)) {
6020                 unsigned long rip = kvm_rip_read(vcpu);
6021                 profile_hit(KVM_PROFILING, (void *)rip);
6022         }
6023
6024         if (unlikely(vcpu->arch.tsc_always_catchup))
6025                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6026
6027         if (vcpu->arch.apic_attention)
6028                 kvm_lapic_sync_from_vapic(vcpu);
6029
6030         r = kvm_x86_ops->handle_exit(vcpu);
6031         return r;
6032
6033 cancel_injection:
6034         kvm_x86_ops->cancel_injection(vcpu);
6035         if (unlikely(vcpu->arch.apic_attention))
6036                 kvm_lapic_sync_from_vapic(vcpu);
6037 out:
6038         return r;
6039 }
6040
6041
6042 static int __vcpu_run(struct kvm_vcpu *vcpu)
6043 {
6044         int r;
6045         struct kvm *kvm = vcpu->kvm;
6046
6047         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6048         r = vapic_enter(vcpu);
6049         if (r) {
6050                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6051                 return r;
6052         }
6053
6054         r = 1;
6055         while (r > 0) {
6056                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6057                     !vcpu->arch.apf.halted)
6058                         r = vcpu_enter_guest(vcpu);
6059                 else {
6060                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6061                         kvm_vcpu_block(vcpu);
6062                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6063                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6064                                 kvm_apic_accept_events(vcpu);
6065                                 switch(vcpu->arch.mp_state) {
6066                                 case KVM_MP_STATE_HALTED:
6067                                         vcpu->arch.pv.pv_unhalted = false;
6068                                         vcpu->arch.mp_state =
6069                                                 KVM_MP_STATE_RUNNABLE;
6070                                 case KVM_MP_STATE_RUNNABLE:
6071                                         vcpu->arch.apf.halted = false;
6072                                         break;
6073                                 case KVM_MP_STATE_INIT_RECEIVED:
6074                                         break;
6075                                 default:
6076                                         r = -EINTR;
6077                                         break;
6078                                 }
6079                         }
6080                 }
6081
6082                 if (r <= 0)
6083                         break;
6084
6085                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6086                 if (kvm_cpu_has_pending_timer(vcpu))
6087                         kvm_inject_pending_timer_irqs(vcpu);
6088
6089                 if (dm_request_for_irq_injection(vcpu)) {
6090                         r = -EINTR;
6091                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6092                         ++vcpu->stat.request_irq_exits;
6093                 }
6094
6095                 kvm_check_async_pf_completion(vcpu);
6096
6097                 if (signal_pending(current)) {
6098                         r = -EINTR;
6099                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6100                         ++vcpu->stat.signal_exits;
6101                 }
6102                 if (need_resched()) {
6103                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6104                         kvm_resched(vcpu);
6105                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6106                 }
6107         }
6108
6109         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6110
6111         vapic_exit(vcpu);
6112
6113         return r;
6114 }
6115
6116 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6117 {
6118         int r;
6119         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6120         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6121         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6122         if (r != EMULATE_DONE)
6123                 return 0;
6124         return 1;
6125 }
6126
6127 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6128 {
6129         BUG_ON(!vcpu->arch.pio.count);
6130
6131         return complete_emulated_io(vcpu);
6132 }
6133
6134 /*
6135  * Implements the following, as a state machine:
6136  *
6137  * read:
6138  *   for each fragment
6139  *     for each mmio piece in the fragment
6140  *       write gpa, len
6141  *       exit
6142  *       copy data
6143  *   execute insn
6144  *
6145  * write:
6146  *   for each fragment
6147  *     for each mmio piece in the fragment
6148  *       write gpa, len
6149  *       copy data
6150  *       exit
6151  */
6152 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6153 {
6154         struct kvm_run *run = vcpu->run;
6155         struct kvm_mmio_fragment *frag;
6156         unsigned len;
6157
6158         BUG_ON(!vcpu->mmio_needed);
6159
6160         /* Complete previous fragment */
6161         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6162         len = min(8u, frag->len);
6163         if (!vcpu->mmio_is_write)
6164                 memcpy(frag->data, run->mmio.data, len);
6165
6166         if (frag->len <= 8) {
6167                 /* Switch to the next fragment. */
6168                 frag++;
6169                 vcpu->mmio_cur_fragment++;
6170         } else {
6171                 /* Go forward to the next mmio piece. */
6172                 frag->data += len;
6173                 frag->gpa += len;
6174                 frag->len -= len;
6175         }
6176
6177         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6178                 vcpu->mmio_needed = 0;
6179                 if (vcpu->mmio_is_write)
6180                         return 1;
6181                 vcpu->mmio_read_completed = 1;
6182                 return complete_emulated_io(vcpu);
6183         }
6184
6185         run->exit_reason = KVM_EXIT_MMIO;
6186         run->mmio.phys_addr = frag->gpa;
6187         if (vcpu->mmio_is_write)
6188                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6189         run->mmio.len = min(8u, frag->len);
6190         run->mmio.is_write = vcpu->mmio_is_write;
6191         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6192         return 0;
6193 }
6194
6195
6196 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6197 {
6198         int r;
6199         sigset_t sigsaved;
6200
6201         if (!tsk_used_math(current) && init_fpu(current))
6202                 return -ENOMEM;
6203
6204         if (vcpu->sigset_active)
6205                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6206
6207         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6208                 kvm_vcpu_block(vcpu);
6209                 kvm_apic_accept_events(vcpu);
6210                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6211                 r = -EAGAIN;
6212                 goto out;
6213         }
6214
6215         /* re-sync apic's tpr */
6216         if (!irqchip_in_kernel(vcpu->kvm)) {
6217                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6218                         r = -EINVAL;
6219                         goto out;
6220                 }
6221         }
6222
6223         if (unlikely(vcpu->arch.complete_userspace_io)) {
6224                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6225                 vcpu->arch.complete_userspace_io = NULL;
6226                 r = cui(vcpu);
6227                 if (r <= 0)
6228                         goto out;
6229         } else
6230                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6231
6232         r = __vcpu_run(vcpu);
6233
6234 out:
6235         post_kvm_run_save(vcpu);
6236         if (vcpu->sigset_active)
6237                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6238
6239         return r;
6240 }
6241
6242 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6243 {
6244         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6245                 /*
6246                  * We are here if userspace calls get_regs() in the middle of
6247                  * instruction emulation. Registers state needs to be copied
6248                  * back from emulation context to vcpu. Userspace shouldn't do
6249                  * that usually, but some bad designed PV devices (vmware
6250                  * backdoor interface) need this to work
6251                  */
6252                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6253                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6254         }
6255         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6256         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6257         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6258         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6259         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6260         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6261         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6262         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6263 #ifdef CONFIG_X86_64
6264         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6265         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6266         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6267         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6268         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6269         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6270         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6271         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6272 #endif
6273
6274         regs->rip = kvm_rip_read(vcpu);
6275         regs->rflags = kvm_get_rflags(vcpu);
6276
6277         return 0;
6278 }
6279
6280 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6281 {
6282         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6283         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6284
6285         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6286         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6287         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6288         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6289         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6290         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6291         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6292         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6293 #ifdef CONFIG_X86_64
6294         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6295         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6296         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6297         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6298         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6299         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6300         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6301         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6302 #endif
6303
6304         kvm_rip_write(vcpu, regs->rip);
6305         kvm_set_rflags(vcpu, regs->rflags);
6306
6307         vcpu->arch.exception.pending = false;
6308
6309         kvm_make_request(KVM_REQ_EVENT, vcpu);
6310
6311         return 0;
6312 }
6313
6314 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6315 {
6316         struct kvm_segment cs;
6317
6318         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6319         *db = cs.db;
6320         *l = cs.l;
6321 }
6322 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6323
6324 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6325                                   struct kvm_sregs *sregs)
6326 {
6327         struct desc_ptr dt;
6328
6329         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6330         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6331         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6332         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6333         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6334         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6335
6336         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6337         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6338
6339         kvm_x86_ops->get_idt(vcpu, &dt);
6340         sregs->idt.limit = dt.size;
6341         sregs->idt.base = dt.address;
6342         kvm_x86_ops->get_gdt(vcpu, &dt);
6343         sregs->gdt.limit = dt.size;
6344         sregs->gdt.base = dt.address;
6345
6346         sregs->cr0 = kvm_read_cr0(vcpu);
6347         sregs->cr2 = vcpu->arch.cr2;
6348         sregs->cr3 = kvm_read_cr3(vcpu);
6349         sregs->cr4 = kvm_read_cr4(vcpu);
6350         sregs->cr8 = kvm_get_cr8(vcpu);
6351         sregs->efer = vcpu->arch.efer;
6352         sregs->apic_base = kvm_get_apic_base(vcpu);
6353
6354         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6355
6356         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6357                 set_bit(vcpu->arch.interrupt.nr,
6358                         (unsigned long *)sregs->interrupt_bitmap);
6359
6360         return 0;
6361 }
6362
6363 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6364                                     struct kvm_mp_state *mp_state)
6365 {
6366         kvm_apic_accept_events(vcpu);
6367         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6368                                         vcpu->arch.pv.pv_unhalted)
6369                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6370         else
6371                 mp_state->mp_state = vcpu->arch.mp_state;
6372
6373         return 0;
6374 }
6375
6376 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6377                                     struct kvm_mp_state *mp_state)
6378 {
6379         if (!kvm_vcpu_has_lapic(vcpu) &&
6380             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6381                 return -EINVAL;
6382
6383         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6384                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6385                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6386         } else
6387                 vcpu->arch.mp_state = mp_state->mp_state;
6388         kvm_make_request(KVM_REQ_EVENT, vcpu);
6389         return 0;
6390 }
6391
6392 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6393                     int reason, bool has_error_code, u32 error_code)
6394 {
6395         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6396         int ret;
6397
6398         init_emulate_ctxt(vcpu);
6399
6400         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6401                                    has_error_code, error_code);
6402
6403         if (ret)
6404                 return EMULATE_FAIL;
6405
6406         kvm_rip_write(vcpu, ctxt->eip);
6407         kvm_set_rflags(vcpu, ctxt->eflags);
6408         kvm_make_request(KVM_REQ_EVENT, vcpu);
6409         return EMULATE_DONE;
6410 }
6411 EXPORT_SYMBOL_GPL(kvm_task_switch);
6412
6413 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6414                                   struct kvm_sregs *sregs)
6415 {
6416         int mmu_reset_needed = 0;
6417         int pending_vec, max_bits, idx;
6418         struct desc_ptr dt;
6419
6420         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6421                 return -EINVAL;
6422
6423         dt.size = sregs->idt.limit;
6424         dt.address = sregs->idt.base;
6425         kvm_x86_ops->set_idt(vcpu, &dt);
6426         dt.size = sregs->gdt.limit;
6427         dt.address = sregs->gdt.base;
6428         kvm_x86_ops->set_gdt(vcpu, &dt);
6429
6430         vcpu->arch.cr2 = sregs->cr2;
6431         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6432         vcpu->arch.cr3 = sregs->cr3;
6433         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6434
6435         kvm_set_cr8(vcpu, sregs->cr8);
6436
6437         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6438         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6439         kvm_set_apic_base(vcpu, sregs->apic_base);
6440
6441         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6442         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6443         vcpu->arch.cr0 = sregs->cr0;
6444
6445         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6446         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6447         if (sregs->cr4 & X86_CR4_OSXSAVE)
6448                 kvm_update_cpuid(vcpu);
6449
6450         idx = srcu_read_lock(&vcpu->kvm->srcu);
6451         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6452                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6453                 mmu_reset_needed = 1;
6454         }
6455         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6456
6457         if (mmu_reset_needed)
6458                 kvm_mmu_reset_context(vcpu);
6459
6460         max_bits = KVM_NR_INTERRUPTS;
6461         pending_vec = find_first_bit(
6462                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6463         if (pending_vec < max_bits) {
6464                 kvm_queue_interrupt(vcpu, pending_vec, false);
6465                 pr_debug("Set back pending irq %d\n", pending_vec);
6466         }
6467
6468         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6469         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6470         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6471         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6472         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6473         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6474
6475         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6476         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6477
6478         update_cr8_intercept(vcpu);
6479
6480         /* Older userspace won't unhalt the vcpu on reset. */
6481         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6482             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6483             !is_protmode(vcpu))
6484                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6485
6486         kvm_make_request(KVM_REQ_EVENT, vcpu);
6487
6488         return 0;
6489 }
6490
6491 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6492                                         struct kvm_guest_debug *dbg)
6493 {
6494         unsigned long rflags;
6495         int i, r;
6496
6497         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6498                 r = -EBUSY;
6499                 if (vcpu->arch.exception.pending)
6500                         goto out;
6501                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6502                         kvm_queue_exception(vcpu, DB_VECTOR);
6503                 else
6504                         kvm_queue_exception(vcpu, BP_VECTOR);
6505         }
6506
6507         /*
6508          * Read rflags as long as potentially injected trace flags are still
6509          * filtered out.
6510          */
6511         rflags = kvm_get_rflags(vcpu);
6512
6513         vcpu->guest_debug = dbg->control;
6514         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6515                 vcpu->guest_debug = 0;
6516
6517         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6518                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6519                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6520                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6521         } else {
6522                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6523                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6524         }
6525         kvm_update_dr7(vcpu);
6526
6527         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6528                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6529                         get_segment_base(vcpu, VCPU_SREG_CS);
6530
6531         /*
6532          * Trigger an rflags update that will inject or remove the trace
6533          * flags.
6534          */
6535         kvm_set_rflags(vcpu, rflags);
6536
6537         kvm_x86_ops->update_db_bp_intercept(vcpu);
6538
6539         r = 0;
6540
6541 out:
6542
6543         return r;
6544 }
6545
6546 /*
6547  * Translate a guest virtual address to a guest physical address.
6548  */
6549 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6550                                     struct kvm_translation *tr)
6551 {
6552         unsigned long vaddr = tr->linear_address;
6553         gpa_t gpa;
6554         int idx;
6555
6556         idx = srcu_read_lock(&vcpu->kvm->srcu);
6557         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6558         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6559         tr->physical_address = gpa;
6560         tr->valid = gpa != UNMAPPED_GVA;
6561         tr->writeable = 1;
6562         tr->usermode = 0;
6563
6564         return 0;
6565 }
6566
6567 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6568 {
6569         struct i387_fxsave_struct *fxsave =
6570                         &vcpu->arch.guest_fpu.state->fxsave;
6571
6572         memcpy(fpu->fpr, fxsave->st_space, 128);
6573         fpu->fcw = fxsave->cwd;
6574         fpu->fsw = fxsave->swd;
6575         fpu->ftwx = fxsave->twd;
6576         fpu->last_opcode = fxsave->fop;
6577         fpu->last_ip = fxsave->rip;
6578         fpu->last_dp = fxsave->rdp;
6579         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6580
6581         return 0;
6582 }
6583
6584 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6585 {
6586         struct i387_fxsave_struct *fxsave =
6587                         &vcpu->arch.guest_fpu.state->fxsave;
6588
6589         memcpy(fxsave->st_space, fpu->fpr, 128);
6590         fxsave->cwd = fpu->fcw;
6591         fxsave->swd = fpu->fsw;
6592         fxsave->twd = fpu->ftwx;
6593         fxsave->fop = fpu->last_opcode;
6594         fxsave->rip = fpu->last_ip;
6595         fxsave->rdp = fpu->last_dp;
6596         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6597
6598         return 0;
6599 }
6600
6601 int fx_init(struct kvm_vcpu *vcpu)
6602 {
6603         int err;
6604
6605         err = fpu_alloc(&vcpu->arch.guest_fpu);
6606         if (err)
6607                 return err;
6608
6609         fpu_finit(&vcpu->arch.guest_fpu);
6610
6611         /*
6612          * Ensure guest xcr0 is valid for loading
6613          */
6614         vcpu->arch.xcr0 = XSTATE_FP;
6615
6616         vcpu->arch.cr0 |= X86_CR0_ET;
6617
6618         return 0;
6619 }
6620 EXPORT_SYMBOL_GPL(fx_init);
6621
6622 static void fx_free(struct kvm_vcpu *vcpu)
6623 {
6624         fpu_free(&vcpu->arch.guest_fpu);
6625 }
6626
6627 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6628 {
6629         if (vcpu->guest_fpu_loaded)
6630                 return;
6631
6632         /*
6633          * Restore all possible states in the guest,
6634          * and assume host would use all available bits.
6635          * Guest xcr0 would be loaded later.
6636          */
6637         kvm_put_guest_xcr0(vcpu);
6638         vcpu->guest_fpu_loaded = 1;
6639         __kernel_fpu_begin();
6640         fpu_restore_checking(&vcpu->arch.guest_fpu);
6641         trace_kvm_fpu(1);
6642 }
6643
6644 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6645 {
6646         kvm_put_guest_xcr0(vcpu);
6647
6648         if (!vcpu->guest_fpu_loaded)
6649                 return;
6650
6651         vcpu->guest_fpu_loaded = 0;
6652         fpu_save_init(&vcpu->arch.guest_fpu);
6653         __kernel_fpu_end();
6654         ++vcpu->stat.fpu_reload;
6655         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6656         trace_kvm_fpu(0);
6657 }
6658
6659 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6660 {
6661         kvmclock_reset(vcpu);
6662
6663         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6664         fx_free(vcpu);
6665         kvm_x86_ops->vcpu_free(vcpu);
6666 }
6667
6668 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6669                                                 unsigned int id)
6670 {
6671         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6672                 printk_once(KERN_WARNING
6673                 "kvm: SMP vm created on host with unstable TSC; "
6674                 "guest TSC will not be reliable\n");
6675         return kvm_x86_ops->vcpu_create(kvm, id);
6676 }
6677
6678 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6679 {
6680         int r;
6681
6682         vcpu->arch.mtrr_state.have_fixed = 1;
6683         r = vcpu_load(vcpu);
6684         if (r)
6685                 return r;
6686         kvm_vcpu_reset(vcpu);
6687         r = kvm_mmu_setup(vcpu);
6688         vcpu_put(vcpu);
6689
6690         return r;
6691 }
6692
6693 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6694 {
6695         int r;
6696         struct msr_data msr;
6697
6698         r = vcpu_load(vcpu);
6699         if (r)
6700                 return r;
6701         msr.data = 0x0;
6702         msr.index = MSR_IA32_TSC;
6703         msr.host_initiated = true;
6704         kvm_write_tsc(vcpu, &msr);
6705         vcpu_put(vcpu);
6706
6707         return r;
6708 }
6709
6710 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6711 {
6712         int r;
6713         vcpu->arch.apf.msr_val = 0;
6714
6715         r = vcpu_load(vcpu);
6716         BUG_ON(r);
6717         kvm_mmu_unload(vcpu);
6718         vcpu_put(vcpu);
6719
6720         fx_free(vcpu);
6721         kvm_x86_ops->vcpu_free(vcpu);
6722 }
6723
6724 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6725 {
6726         atomic_set(&vcpu->arch.nmi_queued, 0);
6727         vcpu->arch.nmi_pending = 0;
6728         vcpu->arch.nmi_injected = false;
6729
6730         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6731         vcpu->arch.dr6 = DR6_FIXED_1;
6732         vcpu->arch.dr7 = DR7_FIXED_1;
6733         kvm_update_dr7(vcpu);
6734
6735         kvm_make_request(KVM_REQ_EVENT, vcpu);
6736         vcpu->arch.apf.msr_val = 0;
6737         vcpu->arch.st.msr_val = 0;
6738
6739         kvmclock_reset(vcpu);
6740
6741         kvm_clear_async_pf_completion_queue(vcpu);
6742         kvm_async_pf_hash_reset(vcpu);
6743         vcpu->arch.apf.halted = false;
6744
6745         kvm_pmu_reset(vcpu);
6746
6747         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6748         vcpu->arch.regs_avail = ~0;
6749         vcpu->arch.regs_dirty = ~0;
6750
6751         kvm_x86_ops->vcpu_reset(vcpu);
6752 }
6753
6754 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6755 {
6756         struct kvm_segment cs;
6757
6758         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6759         cs.selector = vector << 8;
6760         cs.base = vector << 12;
6761         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6762         kvm_rip_write(vcpu, 0);
6763 }
6764
6765 int kvm_arch_hardware_enable(void *garbage)
6766 {
6767         struct kvm *kvm;
6768         struct kvm_vcpu *vcpu;
6769         int i;
6770         int ret;
6771         u64 local_tsc;
6772         u64 max_tsc = 0;
6773         bool stable, backwards_tsc = false;
6774
6775         kvm_shared_msr_cpu_online();
6776         ret = kvm_x86_ops->hardware_enable(garbage);
6777         if (ret != 0)
6778                 return ret;
6779
6780         local_tsc = native_read_tsc();
6781         stable = !check_tsc_unstable();
6782         list_for_each_entry(kvm, &vm_list, vm_list) {
6783                 kvm_for_each_vcpu(i, vcpu, kvm) {
6784                         if (!stable && vcpu->cpu == smp_processor_id())
6785                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6786                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6787                                 backwards_tsc = true;
6788                                 if (vcpu->arch.last_host_tsc > max_tsc)
6789                                         max_tsc = vcpu->arch.last_host_tsc;
6790                         }
6791                 }
6792         }
6793
6794         /*
6795          * Sometimes, even reliable TSCs go backwards.  This happens on
6796          * platforms that reset TSC during suspend or hibernate actions, but
6797          * maintain synchronization.  We must compensate.  Fortunately, we can
6798          * detect that condition here, which happens early in CPU bringup,
6799          * before any KVM threads can be running.  Unfortunately, we can't
6800          * bring the TSCs fully up to date with real time, as we aren't yet far
6801          * enough into CPU bringup that we know how much real time has actually
6802          * elapsed; our helper function, get_kernel_ns() will be using boot
6803          * variables that haven't been updated yet.
6804          *
6805          * So we simply find the maximum observed TSC above, then record the
6806          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6807          * the adjustment will be applied.  Note that we accumulate
6808          * adjustments, in case multiple suspend cycles happen before some VCPU
6809          * gets a chance to run again.  In the event that no KVM threads get a
6810          * chance to run, we will miss the entire elapsed period, as we'll have
6811          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6812          * loose cycle time.  This isn't too big a deal, since the loss will be
6813          * uniform across all VCPUs (not to mention the scenario is extremely
6814          * unlikely). It is possible that a second hibernate recovery happens
6815          * much faster than a first, causing the observed TSC here to be
6816          * smaller; this would require additional padding adjustment, which is
6817          * why we set last_host_tsc to the local tsc observed here.
6818          *
6819          * N.B. - this code below runs only on platforms with reliable TSC,
6820          * as that is the only way backwards_tsc is set above.  Also note
6821          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6822          * have the same delta_cyc adjustment applied if backwards_tsc
6823          * is detected.  Note further, this adjustment is only done once,
6824          * as we reset last_host_tsc on all VCPUs to stop this from being
6825          * called multiple times (one for each physical CPU bringup).
6826          *
6827          * Platforms with unreliable TSCs don't have to deal with this, they
6828          * will be compensated by the logic in vcpu_load, which sets the TSC to
6829          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6830          * guarantee that they stay in perfect synchronization.
6831          */
6832         if (backwards_tsc) {
6833                 u64 delta_cyc = max_tsc - local_tsc;
6834                 list_for_each_entry(kvm, &vm_list, vm_list) {
6835                         kvm_for_each_vcpu(i, vcpu, kvm) {
6836                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6837                                 vcpu->arch.last_host_tsc = local_tsc;
6838                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6839                                         &vcpu->requests);
6840                         }
6841
6842                         /*
6843                          * We have to disable TSC offset matching.. if you were
6844                          * booting a VM while issuing an S4 host suspend....
6845                          * you may have some problem.  Solving this issue is
6846                          * left as an exercise to the reader.
6847                          */
6848                         kvm->arch.last_tsc_nsec = 0;
6849                         kvm->arch.last_tsc_write = 0;
6850                 }
6851
6852         }
6853         return 0;
6854 }
6855
6856 void kvm_arch_hardware_disable(void *garbage)
6857 {
6858         kvm_x86_ops->hardware_disable(garbage);
6859         drop_user_return_notifiers(garbage);
6860 }
6861
6862 int kvm_arch_hardware_setup(void)
6863 {
6864         return kvm_x86_ops->hardware_setup();
6865 }
6866
6867 void kvm_arch_hardware_unsetup(void)
6868 {
6869         kvm_x86_ops->hardware_unsetup();
6870 }
6871
6872 void kvm_arch_check_processor_compat(void *rtn)
6873 {
6874         kvm_x86_ops->check_processor_compatibility(rtn);
6875 }
6876
6877 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6878 {
6879         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6880 }
6881
6882 struct static_key kvm_no_apic_vcpu __read_mostly;
6883
6884 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6885 {
6886         struct page *page;
6887         struct kvm *kvm;
6888         int r;
6889
6890         BUG_ON(vcpu->kvm == NULL);
6891         kvm = vcpu->kvm;
6892
6893         vcpu->arch.pv.pv_unhalted = false;
6894         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6895         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6896                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6897         else
6898                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6899
6900         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6901         if (!page) {
6902                 r = -ENOMEM;
6903                 goto fail;
6904         }
6905         vcpu->arch.pio_data = page_address(page);
6906
6907         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6908
6909         r = kvm_mmu_create(vcpu);
6910         if (r < 0)
6911                 goto fail_free_pio_data;
6912
6913         if (irqchip_in_kernel(kvm)) {
6914                 r = kvm_create_lapic(vcpu);
6915                 if (r < 0)
6916                         goto fail_mmu_destroy;
6917         } else
6918                 static_key_slow_inc(&kvm_no_apic_vcpu);
6919
6920         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6921                                        GFP_KERNEL);
6922         if (!vcpu->arch.mce_banks) {
6923                 r = -ENOMEM;
6924                 goto fail_free_lapic;
6925         }
6926         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6927
6928         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6929                 r = -ENOMEM;
6930                 goto fail_free_mce_banks;
6931         }
6932
6933         r = fx_init(vcpu);
6934         if (r)
6935                 goto fail_free_wbinvd_dirty_mask;
6936
6937         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6938         vcpu->arch.pv_time_enabled = false;
6939         kvm_async_pf_hash_reset(vcpu);
6940         kvm_pmu_init(vcpu);
6941
6942         return 0;
6943 fail_free_wbinvd_dirty_mask:
6944         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6945 fail_free_mce_banks:
6946         kfree(vcpu->arch.mce_banks);
6947 fail_free_lapic:
6948         kvm_free_lapic(vcpu);
6949 fail_mmu_destroy:
6950         kvm_mmu_destroy(vcpu);
6951 fail_free_pio_data:
6952         free_page((unsigned long)vcpu->arch.pio_data);
6953 fail:
6954         return r;
6955 }
6956
6957 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6958 {
6959         int idx;
6960
6961         kvm_pmu_destroy(vcpu);
6962         kfree(vcpu->arch.mce_banks);
6963         kvm_free_lapic(vcpu);
6964         idx = srcu_read_lock(&vcpu->kvm->srcu);
6965         kvm_mmu_destroy(vcpu);
6966         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6967         free_page((unsigned long)vcpu->arch.pio_data);
6968         if (!irqchip_in_kernel(vcpu->kvm))
6969                 static_key_slow_dec(&kvm_no_apic_vcpu);
6970 }
6971
6972 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6973 {
6974         if (type)
6975                 return -EINVAL;
6976
6977         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6978         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6979         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6980
6981         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6982         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6983         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6984         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6985                 &kvm->arch.irq_sources_bitmap);
6986
6987         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6988         mutex_init(&kvm->arch.apic_map_lock);
6989         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6990
6991         pvclock_update_vm_gtod_copy(kvm);
6992
6993         return 0;
6994 }
6995
6996 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6997 {
6998         int r;
6999         r = vcpu_load(vcpu);
7000         BUG_ON(r);
7001         kvm_mmu_unload(vcpu);
7002         vcpu_put(vcpu);
7003 }
7004
7005 static void kvm_free_vcpus(struct kvm *kvm)
7006 {
7007         unsigned int i;
7008         struct kvm_vcpu *vcpu;
7009
7010         /*
7011          * Unpin any mmu pages first.
7012          */
7013         kvm_for_each_vcpu(i, vcpu, kvm) {
7014                 kvm_clear_async_pf_completion_queue(vcpu);
7015                 kvm_unload_vcpu_mmu(vcpu);
7016         }
7017         kvm_for_each_vcpu(i, vcpu, kvm)
7018                 kvm_arch_vcpu_free(vcpu);
7019
7020         mutex_lock(&kvm->lock);
7021         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7022                 kvm->vcpus[i] = NULL;
7023
7024         atomic_set(&kvm->online_vcpus, 0);
7025         mutex_unlock(&kvm->lock);
7026 }
7027
7028 void kvm_arch_sync_events(struct kvm *kvm)
7029 {
7030         kvm_free_all_assigned_devices(kvm);
7031         kvm_free_pit(kvm);
7032 }
7033
7034 void kvm_arch_destroy_vm(struct kvm *kvm)
7035 {
7036         if (current->mm == kvm->mm) {
7037                 /*
7038                  * Free memory regions allocated on behalf of userspace,
7039                  * unless the the memory map has changed due to process exit
7040                  * or fd copying.
7041                  */
7042                 struct kvm_userspace_memory_region mem;
7043                 memset(&mem, 0, sizeof(mem));
7044                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7045                 kvm_set_memory_region(kvm, &mem);
7046
7047                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7048                 kvm_set_memory_region(kvm, &mem);
7049
7050                 mem.slot = TSS_PRIVATE_MEMSLOT;
7051                 kvm_set_memory_region(kvm, &mem);
7052         }
7053         kvm_iommu_unmap_guest(kvm);
7054         kfree(kvm->arch.vpic);
7055         kfree(kvm->arch.vioapic);
7056         kvm_free_vcpus(kvm);
7057         if (kvm->arch.apic_access_page)
7058                 put_page(kvm->arch.apic_access_page);
7059         if (kvm->arch.ept_identity_pagetable)
7060                 put_page(kvm->arch.ept_identity_pagetable);
7061         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7062 }
7063
7064 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
7065                            struct kvm_memory_slot *dont)
7066 {
7067         int i;
7068
7069         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7070                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7071                         kvm_kvfree(free->arch.rmap[i]);
7072                         free->arch.rmap[i] = NULL;
7073                 }
7074                 if (i == 0)
7075                         continue;
7076
7077                 if (!dont || free->arch.lpage_info[i - 1] !=
7078                              dont->arch.lpage_info[i - 1]) {
7079                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7080                         free->arch.lpage_info[i - 1] = NULL;
7081                 }
7082         }
7083 }
7084
7085 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
7086 {
7087         int i;
7088
7089         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7090                 unsigned long ugfn;
7091                 int lpages;
7092                 int level = i + 1;
7093
7094                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7095                                       slot->base_gfn, level) + 1;
7096
7097                 slot->arch.rmap[i] =
7098                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7099                 if (!slot->arch.rmap[i])
7100                         goto out_free;
7101                 if (i == 0)
7102                         continue;
7103
7104                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7105                                         sizeof(*slot->arch.lpage_info[i - 1]));
7106                 if (!slot->arch.lpage_info[i - 1])
7107                         goto out_free;
7108
7109                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7110                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7111                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7112                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7113                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7114                 /*
7115                  * If the gfn and userspace address are not aligned wrt each
7116                  * other, or if explicitly asked to, disable large page
7117                  * support for this slot
7118                  */
7119                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7120                     !kvm_largepages_enabled()) {
7121                         unsigned long j;
7122
7123                         for (j = 0; j < lpages; ++j)
7124                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7125                 }
7126         }
7127
7128         return 0;
7129
7130 out_free:
7131         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7132                 kvm_kvfree(slot->arch.rmap[i]);
7133                 slot->arch.rmap[i] = NULL;
7134                 if (i == 0)
7135                         continue;
7136
7137                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7138                 slot->arch.lpage_info[i - 1] = NULL;
7139         }
7140         return -ENOMEM;
7141 }
7142
7143 void kvm_arch_memslots_updated(struct kvm *kvm)
7144 {
7145         /*
7146          * memslots->generation has been incremented.
7147          * mmio generation may have reached its maximum value.
7148          */
7149         kvm_mmu_invalidate_mmio_sptes(kvm);
7150 }
7151
7152 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7153                                 struct kvm_memory_slot *memslot,
7154                                 struct kvm_userspace_memory_region *mem,
7155                                 enum kvm_mr_change change)
7156 {
7157         /*
7158          * Only private memory slots need to be mapped here since
7159          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7160          */
7161         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7162                 unsigned long userspace_addr;
7163
7164                 /*
7165                  * MAP_SHARED to prevent internal slot pages from being moved
7166                  * by fork()/COW.
7167                  */
7168                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7169                                          PROT_READ | PROT_WRITE,
7170                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7171
7172                 if (IS_ERR((void *)userspace_addr))
7173                         return PTR_ERR((void *)userspace_addr);
7174
7175                 memslot->userspace_addr = userspace_addr;
7176         }
7177
7178         return 0;
7179 }
7180
7181 void kvm_arch_commit_memory_region(struct kvm *kvm,
7182                                 struct kvm_userspace_memory_region *mem,
7183                                 const struct kvm_memory_slot *old,
7184                                 enum kvm_mr_change change)
7185 {
7186
7187         int nr_mmu_pages = 0;
7188
7189         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7190                 int ret;
7191
7192                 ret = vm_munmap(old->userspace_addr,
7193                                 old->npages * PAGE_SIZE);
7194                 if (ret < 0)
7195                         printk(KERN_WARNING
7196                                "kvm_vm_ioctl_set_memory_region: "
7197                                "failed to munmap memory\n");
7198         }
7199
7200         if (!kvm->arch.n_requested_mmu_pages)
7201                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7202
7203         if (nr_mmu_pages)
7204                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7205         /*
7206          * Write protect all pages for dirty logging.
7207          * Existing largepage mappings are destroyed here and new ones will
7208          * not be created until the end of the logging.
7209          */
7210         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7211                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7212 }
7213
7214 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7215 {
7216         kvm_mmu_invalidate_zap_all_pages(kvm);
7217 }
7218
7219 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7220                                    struct kvm_memory_slot *slot)
7221 {
7222         kvm_mmu_invalidate_zap_all_pages(kvm);
7223 }
7224
7225 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7226 {
7227         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7228                 !vcpu->arch.apf.halted)
7229                 || !list_empty_careful(&vcpu->async_pf.done)
7230                 || kvm_apic_has_events(vcpu)
7231                 || vcpu->arch.pv.pv_unhalted
7232                 || atomic_read(&vcpu->arch.nmi_queued) ||
7233                 (kvm_arch_interrupt_allowed(vcpu) &&
7234                  kvm_cpu_has_interrupt(vcpu));
7235 }
7236
7237 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7238 {
7239         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7240 }
7241
7242 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7243 {
7244         return kvm_x86_ops->interrupt_allowed(vcpu);
7245 }
7246
7247 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7248 {
7249         unsigned long current_rip = kvm_rip_read(vcpu) +
7250                 get_segment_base(vcpu, VCPU_SREG_CS);
7251
7252         return current_rip == linear_rip;
7253 }
7254 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7255
7256 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7257 {
7258         unsigned long rflags;
7259
7260         rflags = kvm_x86_ops->get_rflags(vcpu);
7261         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7262                 rflags &= ~X86_EFLAGS_TF;
7263         return rflags;
7264 }
7265 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7266
7267 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7268 {
7269         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7270             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7271                 rflags |= X86_EFLAGS_TF;
7272         kvm_x86_ops->set_rflags(vcpu, rflags);
7273         kvm_make_request(KVM_REQ_EVENT, vcpu);
7274 }
7275 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7276
7277 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7278 {
7279         int r;
7280
7281         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7282               is_error_page(work->page))
7283                 return;
7284
7285         r = kvm_mmu_reload(vcpu);
7286         if (unlikely(r))
7287                 return;
7288
7289         if (!vcpu->arch.mmu.direct_map &&
7290               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7291                 return;
7292
7293         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7294 }
7295
7296 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7297 {
7298         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7299 }
7300
7301 static inline u32 kvm_async_pf_next_probe(u32 key)
7302 {
7303         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7304 }
7305
7306 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7307 {
7308         u32 key = kvm_async_pf_hash_fn(gfn);
7309
7310         while (vcpu->arch.apf.gfns[key] != ~0)
7311                 key = kvm_async_pf_next_probe(key);
7312
7313         vcpu->arch.apf.gfns[key] = gfn;
7314 }
7315
7316 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7317 {
7318         int i;
7319         u32 key = kvm_async_pf_hash_fn(gfn);
7320
7321         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7322                      (vcpu->arch.apf.gfns[key] != gfn &&
7323                       vcpu->arch.apf.gfns[key] != ~0); i++)
7324                 key = kvm_async_pf_next_probe(key);
7325
7326         return key;
7327 }
7328
7329 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7330 {
7331         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7332 }
7333
7334 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7335 {
7336         u32 i, j, k;
7337
7338         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7339         while (true) {
7340                 vcpu->arch.apf.gfns[i] = ~0;
7341                 do {
7342                         j = kvm_async_pf_next_probe(j);
7343                         if (vcpu->arch.apf.gfns[j] == ~0)
7344                                 return;
7345                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7346                         /*
7347                          * k lies cyclically in ]i,j]
7348                          * |    i.k.j |
7349                          * |....j i.k.| or  |.k..j i...|
7350                          */
7351                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7352                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7353                 i = j;
7354         }
7355 }
7356
7357 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7358 {
7359
7360         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7361                                       sizeof(val));
7362 }
7363
7364 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7365                                      struct kvm_async_pf *work)
7366 {
7367         struct x86_exception fault;
7368
7369         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7370         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7371
7372         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7373             (vcpu->arch.apf.send_user_only &&
7374              kvm_x86_ops->get_cpl(vcpu) == 0))
7375                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7376         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7377                 fault.vector = PF_VECTOR;
7378                 fault.error_code_valid = true;
7379                 fault.error_code = 0;
7380                 fault.nested_page_fault = false;
7381                 fault.address = work->arch.token;
7382                 kvm_inject_page_fault(vcpu, &fault);
7383         }
7384 }
7385
7386 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7387                                  struct kvm_async_pf *work)
7388 {
7389         struct x86_exception fault;
7390
7391         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7392         if (is_error_page(work->page))
7393                 work->arch.token = ~0; /* broadcast wakeup */
7394         else
7395                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7396
7397         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7398             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7399                 fault.vector = PF_VECTOR;
7400                 fault.error_code_valid = true;
7401                 fault.error_code = 0;
7402                 fault.nested_page_fault = false;
7403                 fault.address = work->arch.token;
7404                 kvm_inject_page_fault(vcpu, &fault);
7405         }
7406         vcpu->arch.apf.halted = false;
7407         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7408 }
7409
7410 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7411 {
7412         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7413                 return true;
7414         else
7415                 return !kvm_event_needs_reinjection(vcpu) &&
7416                         kvm_x86_ops->interrupt_allowed(vcpu);
7417 }
7418
7419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7423 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7425 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7426 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7427 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7428 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7429 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7430 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7431 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);