Pileus Git - ~andy/linux/blob - arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static struct kvm_shared_msrs __percpu *shared_msrs;
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 166 {
 167         int i;
 168         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 169                 vcpu->arch.apf.gfns[i] = ~0;
 170 }
 171
 172 static void kvm_on_user_return(struct user_return_notifier *urn)
 173 {
 174         unsigned slot;
 175         struct kvm_shared_msrs *locals
 176                 = container_of(urn, struct kvm_shared_msrs, urn);
 177         struct kvm_shared_msr_values *values;
 178
 179         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 180                 values = &locals->values[slot];
 181                 if (values->host != values->curr) {
 182                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 183                         values->curr = values->host;
 184                 }
 185         }
 186         locals->registered = false;
 187         user_return_notifier_unregister(urn);
 188 }
 189
 190 static void shared_msr_update(unsigned slot, u32 msr)
 191 {
 192         u64 value;
 193         unsigned int cpu = smp_processor_id();
 194         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 195
 196         /* only read, and nobody should modify it at this time,
 197          * so don't need lock */
 198         if (slot >= shared_msrs_global.nr) {
 199                 printk(KERN_ERR "kvm: invalid MSR slot!");
 200                 return;
 201         }
 202         rdmsrl_safe(msr, &value);
 203         smsr->values[slot].host = value;
 204         smsr->values[slot].curr = value;
 205 }
 206
 207 void kvm_define_shared_msr(unsigned slot, u32 msr)
 208 {
 209         if (slot >= shared_msrs_global.nr)
 210                 shared_msrs_global.nr = slot + 1;
 211         shared_msrs_global.msrs[slot] = msr;
 212         /* we need ensured the shared_msr_global have been updated */
 213         smp_wmb();
 214 }
 215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 216
 217 static void kvm_shared_msr_cpu_online(void)
 218 {
 219         unsigned i;
 220
 221         for (i = 0; i < shared_msrs_global.nr; ++i)
 222                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 223 }
 224
 225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 226 {
 227         unsigned int cpu = smp_processor_id();
 228         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 229
 230         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 231                 return;
 232         smsr->values[slot].curr = value;
 233         wrmsrl(shared_msrs_global.msrs[slot], value);
 234         if (!smsr->registered) {
 235                 smsr->urn.on_user_return = kvm_on_user_return;
 236                 user_return_notifier_register(&smsr->urn);
 237                 smsr->registered = true;
 238         }
 239 }
 240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 241
 242 static void drop_user_return_notifiers(void *ignore)
 243 {
 244         unsigned int cpu = smp_processor_id();
 245         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 246
 247         if (smsr->registered)
 248                 kvm_on_user_return(&smsr->urn);
 249 }
 250
 251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 252 {
 253         return vcpu->arch.apic_base;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 256
 257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 258 {
 259         /* TODO: reserve bits check */
 260         kvm_lapic_set_base(vcpu, data);
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 263
 264 asmlinkage void kvm_spurious_fault(void)
 265 {
 266         /* Fault while not rebooting.  We want the trace. */
 267         BUG();
 268 }
 269 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 270
 271 #define EXCPT_BENIGN            0
 272 #define EXCPT_CONTRIBUTORY      1
 273 #define EXCPT_PF                2
 274
 275 static int exception_class(int vector)
 276 {
 277         switch (vector) {
 278         case PF_VECTOR:
 279                 return EXCPT_PF;
 280         case DE_VECTOR:
 281         case TS_VECTOR:
 282         case NP_VECTOR:
 283         case SS_VECTOR:
 284         case GP_VECTOR:
 285                 return EXCPT_CONTRIBUTORY;
 286         default:
 287                 break;
 288         }
 289         return EXCPT_BENIGN;
 290 }
 291
 292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 293                 unsigned nr, bool has_error, u32 error_code,
 294                 bool reinject)
 295 {
 296         u32 prev_nr;
 297         int class1, class2;
 298
 299         kvm_make_request(KVM_REQ_EVENT, vcpu);
 300
 301         if (!vcpu->arch.exception.pending) {
 302         queue:
 303                 vcpu->arch.exception.pending = true;
 304                 vcpu->arch.exception.has_error_code = has_error;
 305                 vcpu->arch.exception.nr = nr;
 306                 vcpu->arch.exception.error_code = error_code;
 307                 vcpu->arch.exception.reinject = reinject;
 308                 return;
 309         }
 310
 311         /* to check exception */
 312         prev_nr = vcpu->arch.exception.nr;
 313         if (prev_nr == DF_VECTOR) {
 314                 /* triple fault -> shutdown */
 315                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 316                 return;
 317         }
 318         class1 = exception_class(prev_nr);
 319         class2 = exception_class(nr);
 320         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 321                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 322                 /* generate double fault per SDM Table 5-5 */
 323                 vcpu->arch.exception.pending = true;
 324                 vcpu->arch.exception.has_error_code = true;
 325                 vcpu->arch.exception.nr = DF_VECTOR;
 326                 vcpu->arch.exception.error_code = 0;
 327         } else
 328                 /* replace previous exception with a new one in a hope
 329                    that instruction re-execution will regenerate lost
 330                    exception */
 331                 goto queue;
 332 }
 333
 334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, false);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 339
 340 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 341 {
 342         kvm_multiple_exception(vcpu, nr, false, 0, true);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 345
 346 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 347 {
 348         if (err)
 349                 kvm_inject_gp(vcpu, 0);
 350         else
 351                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 352 }
 353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 354
 355 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 356 {
 357         ++vcpu->stat.pf_guest;
 358         vcpu->arch.cr2 = fault->address;
 359         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 362
 363 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 364 {
 365         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 366                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 367         else
 368                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 369 }
 370
 371 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 372 {
 373         atomic_inc(&vcpu->arch.nmi_queued);
 374         kvm_make_request(KVM_REQ_NMI, vcpu);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 377
 378 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 383
 384 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 385 {
 386         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 387 }
 388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 389
 390 /*
 391  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 392  * a #GP and return false.
 393  */
 394 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 395 {
 396         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 397                 return true;
 398         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 399         return false;
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 402
 403 /*
 404  * This function will be used to read from the physical memory of the currently
 405  * running guest. The difference to kvm_read_guest_page is that this function
 406  * can read from guest physical or from the guest's guest physical memory.
 407  */
 408 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 409                             gfn_t ngfn, void *data, int offset, int len,
 410                             u32 access)
 411 {
 412         gfn_t real_gfn;
 413         gpa_t ngpa;
 414
 415         ngpa     = gfn_to_gpa(ngfn);
 416         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 417         if (real_gfn == UNMAPPED_GVA)
 418                 return -EFAULT;
 419
 420         real_gfn = gpa_to_gfn(real_gfn);
 421
 422         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 425
 426 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 427                                void *data, int offset, int len, u32 access)
 428 {
 429         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 430                                        data, offset, len, access);
 431 }
 432
 433 /*
 434  * Load the pae pdptrs.  Return true is they are all valid.
 435  */
 436 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 437 {
 438         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 439         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 440         int i;
 441         int ret;
 442         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 443
 444         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 445                                       offset * sizeof(u64), sizeof(pdpte),
 446                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 447         if (ret < 0) {
 448                 ret = 0;
 449                 goto out;
 450         }
 451         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 452                 if (is_present_gpte(pdpte[i]) &&
 453                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 454                         ret = 0;
 455                         goto out;
 456                 }
 457         }
 458         ret = 1;
 459
 460         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 461         __set_bit(VCPU_EXREG_PDPTR,
 462                   (unsigned long *)&vcpu->arch.regs_avail);
 463         __set_bit(VCPU_EXREG_PDPTR,
 464                   (unsigned long *)&vcpu->arch.regs_dirty);
 465 out:
 466
 467         return ret;
 468 }
 469 EXPORT_SYMBOL_GPL(load_pdptrs);
 470
 471 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 472 {
 473         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 474         bool changed = true;
 475         int offset;
 476         gfn_t gfn;
 477         int r;
 478
 479         if (is_long_mode(vcpu) || !is_pae(vcpu))
 480                 return false;
 481
 482         if (!test_bit(VCPU_EXREG_PDPTR,
 483                       (unsigned long *)&vcpu->arch.regs_avail))
 484                 return true;
 485
 486         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 487         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 488         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 489                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 490         if (r < 0)
 491                 goto out;
 492         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 493 out:
 494
 495         return changed;
 496 }
 497
 498 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 499 {
 500         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 501         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 502                                     X86_CR0_CD | X86_CR0_NW;
 503
 504         cr0 |= X86_CR0_ET;
 505
 506 #ifdef CONFIG_X86_64
 507         if (cr0 & 0xffffffff00000000UL)
 508                 return 1;
 509 #endif
 510
 511         cr0 &= ~CR0_RESERVED_BITS;
 512
 513         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 514                 return 1;
 515
 516         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 517                 return 1;
 518
 519         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 520 #ifdef CONFIG_X86_64
 521                 if ((vcpu->arch.efer & EFER_LME)) {
 522                         int cs_db, cs_l;
 523
 524                         if (!is_pae(vcpu))
 525                                 return 1;
 526                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 527                         if (cs_l)
 528                                 return 1;
 529                 } else
 530 #endif
 531                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 532                                                  kvm_read_cr3(vcpu)))
 533                         return 1;
 534         }
 535
 536         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 537                 return 1;
 538
 539         kvm_x86_ops->set_cr0(vcpu, cr0);
 540
 541         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 542                 kvm_clear_async_pf_completion_queue(vcpu);
 543                 kvm_async_pf_hash_reset(vcpu);
 544         }
 545
 546         if ((cr0 ^ old_cr0) & update_bits)
 547                 kvm_mmu_reset_context(vcpu);
 548         return 0;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 551
 552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 553 {
 554         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 555 }
 556 EXPORT_SYMBOL_GPL(kvm_lmsw);
 557
 558 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 559 {
 560         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 561                         !vcpu->guest_xcr0_loaded) {
 562                 /* kvm_set_xcr() also depends on this */
 563                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 564                 vcpu->guest_xcr0_loaded = 1;
 565         }
 566 }
 567
 568 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 569 {
 570         if (vcpu->guest_xcr0_loaded) {
 571                 if (vcpu->arch.xcr0 != host_xcr0)
 572                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 573                 vcpu->guest_xcr0_loaded = 0;
 574         }
 575 }
 576
 577 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 578 {
 579         u64 xcr0;
 580
 581         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 582         if (index != XCR_XFEATURE_ENABLED_MASK)
 583                 return 1;
 584         xcr0 = xcr;
 585         if (!(xcr0 & XSTATE_FP))
 586                 return 1;
 587         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 588                 return 1;
 589         if (xcr0 & ~vcpu->arch.guest_supported_xcr0)
 590                 return 1;
 591         kvm_put_guest_xcr0(vcpu);
 592         vcpu->arch.xcr0 = xcr0;
 593         return 0;
 594 }
 595
 596 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 597 {
 598         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 599             __kvm_set_xcr(vcpu, index, xcr)) {
 600                 kvm_inject_gp(vcpu, 0);
 601                 return 1;
 602         }
 603         return 0;
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 606
 607 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 608 {
 609         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 610         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 611                                    X86_CR4_PAE | X86_CR4_SMEP;
 612         if (cr4 & CR4_RESERVED_BITS)
 613                 return 1;
 614
 615         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 616                 return 1;
 617
 618         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 619                 return 1;
 620
 621         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 622                 return 1;
 623
 624         if (is_long_mode(vcpu)) {
 625                 if (!(cr4 & X86_CR4_PAE))
 626                         return 1;
 627         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 628                    && ((cr4 ^ old_cr4) & pdptr_bits)
 629                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 630                                    kvm_read_cr3(vcpu)))
 631                 return 1;
 632
 633         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 634                 if (!guest_cpuid_has_pcid(vcpu))
 635                         return 1;
 636
 637                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 638                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 639                         return 1;
 640         }
 641
 642         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 643                 return 1;
 644
 645         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 646             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 647                 kvm_mmu_reset_context(vcpu);
 648
 649         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 650                 kvm_update_cpuid(vcpu);
 651
 652         return 0;
 653 }
 654 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 655
 656 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 657 {
 658         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 659                 kvm_mmu_sync_roots(vcpu);
 660                 kvm_mmu_flush_tlb(vcpu);
 661                 return 0;
 662         }
 663
 664         if (is_long_mode(vcpu)) {
 665                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 666                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 667                                 return 1;
 668                 } else
 669                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 670                                 return 1;
 671         } else {
 672                 if (is_pae(vcpu)) {
 673                         if (cr3 & CR3_PAE_RESERVED_BITS)
 674                                 return 1;
 675                         if (is_paging(vcpu) &&
 676                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 677                                 return 1;
 678                 }
 679                 /*
 680                  * We don't check reserved bits in nonpae mode, because
 681                  * this isn't enforced, and VMware depends on this.
 682                  */
 683         }
 684
 685         vcpu->arch.cr3 = cr3;
 686         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 687         kvm_mmu_new_cr3(vcpu);
 688         return 0;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 691
 692 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 693 {
 694         if (cr8 & CR8_RESERVED_BITS)
 695                 return 1;
 696         if (irqchip_in_kernel(vcpu->kvm))
 697                 kvm_lapic_set_tpr(vcpu, cr8);
 698         else
 699                 vcpu->arch.cr8 = cr8;
 700         return 0;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 703
 704 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 705 {
 706         if (irqchip_in_kernel(vcpu->kvm))
 707                 return kvm_lapic_get_cr8(vcpu);
 708         else
 709                 return vcpu->arch.cr8;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 712
 713 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 714 {
 715         unsigned long dr7;
 716
 717         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 718                 dr7 = vcpu->arch.guest_debug_dr7;
 719         else
 720                 dr7 = vcpu->arch.dr7;
 721         kvm_x86_ops->set_dr7(vcpu, dr7);
 722         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 723 }
 724
 725 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 726 {
 727         switch (dr) {
 728         case 0 ... 3:
 729                 vcpu->arch.db[dr] = val;
 730                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 731                         vcpu->arch.eff_db[dr] = val;
 732                 break;
 733         case 4:
 734                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 735                         return 1; /* #UD */
 736                 /* fall through */
 737         case 6:
 738                 if (val & 0xffffffff00000000ULL)
 739                         return -1; /* #GP */
 740                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 741                 break;
 742         case 5:
 743                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 744                         return 1; /* #UD */
 745                 /* fall through */
 746         default: /* 7 */
 747                 if (val & 0xffffffff00000000ULL)
 748                         return -1; /* #GP */
 749                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 750                 kvm_update_dr7(vcpu);
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 758 {
 759         int res;
 760
 761         res = __kvm_set_dr(vcpu, dr, val);
 762         if (res > 0)
 763                 kvm_queue_exception(vcpu, UD_VECTOR);
 764         else if (res < 0)
 765                 kvm_inject_gp(vcpu, 0);
 766
 767         return res;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_set_dr);
 770
 771 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 772 {
 773         switch (dr) {
 774         case 0 ... 3:
 775                 *val = vcpu->arch.db[dr];
 776                 break;
 777         case 4:
 778                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 779                         return 1;
 780                 /* fall through */
 781         case 6:
 782                 *val = vcpu->arch.dr6;
 783                 break;
 784         case 5:
 785                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                         return 1;
 787                 /* fall through */
 788         default: /* 7 */
 789                 *val = vcpu->arch.dr7;
 790                 break;
 791         }
 792
 793         return 0;
 794 }
 795
 796 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 797 {
 798         if (_kvm_get_dr(vcpu, dr, val)) {
 799                 kvm_queue_exception(vcpu, UD_VECTOR);
 800                 return 1;
 801         }
 802         return 0;
 803 }
 804 EXPORT_SYMBOL_GPL(kvm_get_dr);
 805
 806 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 807 {
 808         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 809         u64 data;
 810         int err;
 811
 812         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 813         if (err)
 814                 return err;
 815         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 816         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 817         return err;
 818 }
 819 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 820
 821 /*
 822  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 823  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 824  *
 825  * This list is modified at module load time to reflect the
 826  * capabilities of the host cpu. This capabilities test skips MSRs that are
 827  * kvm-specific. Those are put in the beginning of the list.
 828  */
 829
 830 #define KVM_SAVE_MSRS_BEGIN     10
 831 static u32 msrs_to_save[] = {
 832         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 833         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 834         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 835         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 836         MSR_KVM_PV_EOI_EN,
 837         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 838         MSR_STAR,
 839 #ifdef CONFIG_X86_64
 840         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 841 #endif
 842         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 843         MSR_IA32_FEATURE_CONTROL
 844 };
 845
 846 static unsigned num_msrs_to_save;
 847
 848 static const u32 emulated_msrs[] = {
 849         MSR_IA32_TSC_ADJUST,
 850         MSR_IA32_TSCDEADLINE,
 851         MSR_IA32_MISC_ENABLE,
 852         MSR_IA32_MCG_STATUS,
 853         MSR_IA32_MCG_CTL,
 854 };
 855
 856 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 857 {
 858         if (efer & efer_reserved_bits)
 859                 return false;
 860
 861         if (efer & EFER_FFXSR) {
 862                 struct kvm_cpuid_entry2 *feat;
 863
 864                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 865                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 866                         return false;
 867         }
 868
 869         if (efer & EFER_SVME) {
 870                 struct kvm_cpuid_entry2 *feat;
 871
 872                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 873                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 874                         return false;
 875         }
 876
 877         return true;
 878 }
 879 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 880
 881 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 882 {
 883         u64 old_efer = vcpu->arch.efer;
 884
 885         if (!kvm_valid_efer(vcpu, efer))
 886                 return 1;
 887
 888         if (is_paging(vcpu)
 889             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 890                 return 1;
 891
 892         efer &= ~EFER_LMA;
 893         efer |= vcpu->arch.efer & EFER_LMA;
 894
 895         kvm_x86_ops->set_efer(vcpu, efer);
 896
 897         /* Update reserved bits */
 898         if ((efer ^ old_efer) & EFER_NX)
 899                 kvm_mmu_reset_context(vcpu);
 900
 901         return 0;
 902 }
 903
 904 void kvm_enable_efer_bits(u64 mask)
 905 {
 906        efer_reserved_bits &= ~mask;
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 909
 910
 911 /*
 912  * Writes msr value into into the appropriate "register".
 913  * Returns 0 on success, non-0 otherwise.
 914  * Assumes vcpu_load() was already called.
 915  */
 916 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 917 {
 918         return kvm_x86_ops->set_msr(vcpu, msr);
 919 }
 920
 921 /*
 922  * Adapt set_msr() to msr_io()'s calling convention
 923  */
 924 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 925 {
 926         struct msr_data msr;
 927
 928         msr.data = *data;
 929         msr.index = index;
 930         msr.host_initiated = true;
 931         return kvm_set_msr(vcpu, &msr);
 932 }
 933
 934 #ifdef CONFIG_X86_64
 935 struct pvclock_gtod_data {
 936         seqcount_t      seq;
 937
 938         struct { /* extract of a clocksource struct */
 939                 int vclock_mode;
 940                 cycle_t cycle_last;
 941                 cycle_t mask;
 942                 u32     mult;
 943                 u32     shift;
 944         } clock;
 945
 946         /* open coded 'struct timespec' */
 947         u64             monotonic_time_snsec;
 948         time_t          monotonic_time_sec;
 949 };
 950
 951 static struct pvclock_gtod_data pvclock_gtod_data;
 952
 953 static void update_pvclock_gtod(struct timekeeper *tk)
 954 {
 955         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 956
 957         write_seqcount_begin(&vdata->seq);
 958
 959         /* copy pvclock gtod data */
 960         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 961         vdata->clock.cycle_last         = tk->clock->cycle_last;
 962         vdata->clock.mask               = tk->clock->mask;
 963         vdata->clock.mult               = tk->mult;
 964         vdata->clock.shift              = tk->shift;
 965
 966         vdata->monotonic_time_sec       = tk->xtime_sec
 967                                         + tk->wall_to_monotonic.tv_sec;
 968         vdata->monotonic_time_snsec     = tk->xtime_nsec
 969                                         + (tk->wall_to_monotonic.tv_nsec
 970                                                 << tk->shift);
 971         while (vdata->monotonic_time_snsec >=
 972                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 973                 vdata->monotonic_time_snsec -=
 974                                         ((u64)NSEC_PER_SEC) << tk->shift;
 975                 vdata->monotonic_time_sec++;
 976         }
 977
 978         write_seqcount_end(&vdata->seq);
 979 }
 980 #endif
 981
 982
 983 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 984 {
 985         int version;
 986         int r;
 987         struct pvclock_wall_clock wc;
 988         struct timespec boot;
 989
 990         if (!wall_clock)
 991                 return;
 992
 993         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 994         if (r)
 995                 return;
 996
 997         if (version & 1)
 998                 ++version;  /* first time write, random junk */
 999
1000         ++version;
1001
1002         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1003
1004         /*
1005          * The guest calculates current wall clock time by adding
1006          * system time (updated by kvm_guest_time_update below) to the
1007          * wall clock specified here.  guest system time equals host
1008          * system time for us, thus we must fill in host boot time here.
1009          */
1010         getboottime(&boot);
1011
1012         if (kvm->arch.kvmclock_offset) {
1013                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1014                 boot = timespec_sub(boot, ts);
1015         }
1016         wc.sec = boot.tv_sec;
1017         wc.nsec = boot.tv_nsec;
1018         wc.version = version;
1019
1020         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1021
1022         version++;
1023         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1024 }
1025
1026 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1027 {
1028         uint32_t quotient, remainder;
1029
1030         /* Don't try to replace with do_div(), this one calculates
1031          * "(dividend << 32) / divisor" */
1032         __asm__ ( "divl %4"
1033                   : "=a" (quotient), "=d" (remainder)
1034                   : "0" (0), "1" (dividend), "r" (divisor) );
1035         return quotient;
1036 }
1037
1038 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1039                                s8 *pshift, u32 *pmultiplier)
1040 {
1041         uint64_t scaled64;
1042         int32_t  shift = 0;
1043         uint64_t tps64;
1044         uint32_t tps32;
1045
1046         tps64 = base_khz * 1000LL;
1047         scaled64 = scaled_khz * 1000LL;
1048         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1049                 tps64 >>= 1;
1050                 shift--;
1051         }
1052
1053         tps32 = (uint32_t)tps64;
1054         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1055                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1056                         scaled64 >>= 1;
1057                 else
1058                         tps32 <<= 1;
1059                 shift++;
1060         }
1061
1062         *pshift = shift;
1063         *pmultiplier = div_frac(scaled64, tps32);
1064
1065         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1066                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1067 }
1068
1069 static inline u64 get_kernel_ns(void)
1070 {
1071         struct timespec ts;
1072
1073         WARN_ON(preemptible());
1074         ktime_get_ts(&ts);
1075         monotonic_to_bootbased(&ts);
1076         return timespec_to_ns(&ts);
1077 }
1078
1079 #ifdef CONFIG_X86_64
1080 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1081 #endif
1082
1083 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1084 unsigned long max_tsc_khz;
1085
1086 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1087 {
1088         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1089                                    vcpu->arch.virtual_tsc_shift);
1090 }
1091
1092 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1093 {
1094         u64 v = (u64)khz * (1000000 + ppm);
1095         do_div(v, 1000000);
1096         return v;
1097 }
1098
1099 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1100 {
1101         u32 thresh_lo, thresh_hi;
1102         int use_scaling = 0;
1103
1104         /* tsc_khz can be zero if TSC calibration fails */
1105         if (this_tsc_khz == 0)
1106                 return;
1107
1108         /* Compute a scale to convert nanoseconds in TSC cycles */
1109         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1110                            &vcpu->arch.virtual_tsc_shift,
1111                            &vcpu->arch.virtual_tsc_mult);
1112         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1113
1114         /*
1115          * Compute the variation in TSC rate which is acceptable
1116          * within the range of tolerance and decide if the
1117          * rate being applied is within that bounds of the hardware
1118          * rate.  If so, no scaling or compensation need be done.
1119          */
1120         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1121         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1122         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1123                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1124                 use_scaling = 1;
1125         }
1126         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1127 }
1128
1129 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1130 {
1131         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1132                                       vcpu->arch.virtual_tsc_mult,
1133                                       vcpu->arch.virtual_tsc_shift);
1134         tsc += vcpu->arch.this_tsc_write;
1135         return tsc;
1136 }
1137
1138 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1139 {
1140 #ifdef CONFIG_X86_64
1141         bool vcpus_matched;
1142         bool do_request = false;
1143         struct kvm_arch *ka = &vcpu->kvm->arch;
1144         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1145
1146         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1147                          atomic_read(&vcpu->kvm->online_vcpus));
1148
1149         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1150                 if (!ka->use_master_clock)
1151                         do_request = 1;
1152
1153         if (!vcpus_matched && ka->use_master_clock)
1154                         do_request = 1;
1155
1156         if (do_request)
1157                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1158
1159         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1160                             atomic_read(&vcpu->kvm->online_vcpus),
1161                             ka->use_master_clock, gtod->clock.vclock_mode);
1162 #endif
1163 }
1164
1165 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1166 {
1167         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1168         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1169 }
1170
1171 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1172 {
1173         struct kvm *kvm = vcpu->kvm;
1174         u64 offset, ns, elapsed;
1175         unsigned long flags;
1176         s64 usdiff;
1177         bool matched;
1178         u64 data = msr->data;
1179
1180         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1181         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1182         ns = get_kernel_ns();
1183         elapsed = ns - kvm->arch.last_tsc_nsec;
1184
1185         if (vcpu->arch.virtual_tsc_khz) {
1186                 int faulted = 0;
1187
1188                 /* n.b - signed multiplication and division required */
1189                 usdiff = data - kvm->arch.last_tsc_write;
1190 #ifdef CONFIG_X86_64
1191                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1192 #else
1193                 /* do_div() only does unsigned */
1194                 asm("1: idivl %[divisor]\n"
1195                     "2: xor %%edx, %%edx\n"
1196                     "   movl $0, %[faulted]\n"
1197                     "3:\n"
1198                     ".section .fixup,\"ax\"\n"
1199                     "4: movl $1, %[faulted]\n"
1200                     "   jmp  3b\n"
1201                     ".previous\n"
1202
1203                 _ASM_EXTABLE(1b, 4b)
1204
1205                 : "=A"(usdiff), [faulted] "=r" (faulted)
1206                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1207
1208 #endif
1209                 do_div(elapsed, 1000);
1210                 usdiff -= elapsed;
1211                 if (usdiff < 0)
1212                         usdiff = -usdiff;
1213
1214                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1215                 if (faulted)
1216                         usdiff = USEC_PER_SEC;
1217         } else
1218                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1219
1220         /*
1221          * Special case: TSC write with a small delta (1 second) of virtual
1222          * cycle time against real time is interpreted as an attempt to
1223          * synchronize the CPU.
1224          *
1225          * For a reliable TSC, we can match TSC offsets, and for an unstable
1226          * TSC, we add elapsed time in this computation.  We could let the
1227          * compensation code attempt to catch up if we fall behind, but
1228          * it's better to try to match offsets from the beginning.
1229          */
1230         if (usdiff < USEC_PER_SEC &&
1231             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1232                 if (!check_tsc_unstable()) {
1233                         offset = kvm->arch.cur_tsc_offset;
1234                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1235                 } else {
1236                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1237                         data += delta;
1238                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1239                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1240                 }
1241                 matched = true;
1242         } else {
1243                 /*
1244                  * We split periods of matched TSC writes into generations.
1245                  * For each generation, we track the original measured
1246                  * nanosecond time, offset, and write, so if TSCs are in
1247                  * sync, we can match exact offset, and if not, we can match
1248                  * exact software computation in compute_guest_tsc()
1249                  *
1250                  * These values are tracked in kvm->arch.cur_xxx variables.
1251                  */
1252                 kvm->arch.cur_tsc_generation++;
1253                 kvm->arch.cur_tsc_nsec = ns;
1254                 kvm->arch.cur_tsc_write = data;
1255                 kvm->arch.cur_tsc_offset = offset;
1256                 matched = false;
1257                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1258                          kvm->arch.cur_tsc_generation, data);
1259         }
1260
1261         /*
1262          * We also track th most recent recorded KHZ, write and time to
1263          * allow the matching interval to be extended at each write.
1264          */
1265         kvm->arch.last_tsc_nsec = ns;
1266         kvm->arch.last_tsc_write = data;
1267         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1268
1269         /* Reset of TSC must disable overshoot protection below */
1270         vcpu->arch.hv_clock.tsc_timestamp = 0;
1271         vcpu->arch.last_guest_tsc = data;
1272
1273         /* Keep track of which generation this VCPU has synchronized to */
1274         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1275         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1276         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1277
1278         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1279                 update_ia32_tsc_adjust_msr(vcpu, offset);
1280         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1281         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1282
1283         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1284         if (matched)
1285                 kvm->arch.nr_vcpus_matched_tsc++;
1286         else
1287                 kvm->arch.nr_vcpus_matched_tsc = 0;
1288
1289         kvm_track_tsc_matching(vcpu);
1290         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1291 }
1292
1293 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1294
1295 #ifdef CONFIG_X86_64
1296
1297 static cycle_t read_tsc(void)
1298 {
1299         cycle_t ret;
1300         u64 last;
1301
1302         /*
1303          * Empirically, a fence (of type that depends on the CPU)
1304          * before rdtsc is enough to ensure that rdtsc is ordered
1305          * with respect to loads.  The various CPU manuals are unclear
1306          * as to whether rdtsc can be reordered with later loads,
1307          * but no one has ever seen it happen.
1308          */
1309         rdtsc_barrier();
1310         ret = (cycle_t)vget_cycles();
1311
1312         last = pvclock_gtod_data.clock.cycle_last;
1313
1314         if (likely(ret >= last))
1315                 return ret;
1316
1317         /*
1318          * GCC likes to generate cmov here, but this branch is extremely
1319          * predictable (it's just a funciton of time and the likely is
1320          * very likely) and there's a data dependence, so force GCC
1321          * to generate a branch instead.  I don't barrier() because
1322          * we don't actually need a barrier, and if this function
1323          * ever gets inlined it will generate worse code.
1324          */
1325         asm volatile ("");
1326         return last;
1327 }
1328
1329 static inline u64 vgettsc(cycle_t *cycle_now)
1330 {
1331         long v;
1332         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1333
1334         *cycle_now = read_tsc();
1335
1336         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1337         return v * gtod->clock.mult;
1338 }
1339
1340 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1341 {
1342         unsigned long seq;
1343         u64 ns;
1344         int mode;
1345         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1346
1347         ts->tv_nsec = 0;
1348         do {
1349                 seq = read_seqcount_begin(&gtod->seq);
1350                 mode = gtod->clock.vclock_mode;
1351                 ts->tv_sec = gtod->monotonic_time_sec;
1352                 ns = gtod->monotonic_time_snsec;
1353                 ns += vgettsc(cycle_now);
1354                 ns >>= gtod->clock.shift;
1355         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1356         timespec_add_ns(ts, ns);
1357
1358         return mode;
1359 }
1360
1361 /* returns true if host is using tsc clocksource */
1362 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1363 {
1364         struct timespec ts;
1365
1366         /* checked again under seqlock below */
1367         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1368                 return false;
1369
1370         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1371                 return false;
1372
1373         monotonic_to_bootbased(&ts);
1374         *kernel_ns = timespec_to_ns(&ts);
1375
1376         return true;
1377 }
1378 #endif
1379
1380 /*
1381  *
1382  * Assuming a stable TSC across physical CPUS, and a stable TSC
1383  * across virtual CPUs, the following condition is possible.
1384  * Each numbered line represents an event visible to both
1385  * CPUs at the next numbered event.
1386  *
1387  * "timespecX" represents host monotonic time. "tscX" represents
1388  * RDTSC value.
1389  *
1390  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1391  *
1392  * 1.  read timespec0,tsc0
1393  * 2.                                   | timespec1 = timespec0 + N
1394  *                                      | tsc1 = tsc0 + M
1395  * 3. transition to guest               | transition to guest
1396  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1397  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1398  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1399  *
1400  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1401  *
1402  *      - ret0 < ret1
1403  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1404  *              ...
1405  *      - 0 < N - M => M < N
1406  *
1407  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1408  * always the case (the difference between two distinct xtime instances
1409  * might be smaller then the difference between corresponding TSC reads,
1410  * when updating guest vcpus pvclock areas).
1411  *
1412  * To avoid that problem, do not allow visibility of distinct
1413  * system_timestamp/tsc_timestamp values simultaneously: use a master
1414  * copy of host monotonic time values. Update that master copy
1415  * in lockstep.
1416  *
1417  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1418  *
1419  */
1420
1421 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1422 {
1423 #ifdef CONFIG_X86_64
1424         struct kvm_arch *ka = &kvm->arch;
1425         int vclock_mode;
1426         bool host_tsc_clocksource, vcpus_matched;
1427
1428         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1429                         atomic_read(&kvm->online_vcpus));
1430
1431         /*
1432          * If the host uses TSC clock, then passthrough TSC as stable
1433          * to the guest.
1434          */
1435         host_tsc_clocksource = kvm_get_time_and_clockread(
1436                                         &ka->master_kernel_ns,
1437                                         &ka->master_cycle_now);
1438
1439         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1440
1441         if (ka->use_master_clock)
1442                 atomic_set(&kvm_guest_has_master_clock, 1);
1443
1444         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1445         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1446                                         vcpus_matched);
1447 #endif
1448 }
1449
1450 static void kvm_gen_update_masterclock(struct kvm *kvm)
1451 {
1452 #ifdef CONFIG_X86_64
1453         int i;
1454         struct kvm_vcpu *vcpu;
1455         struct kvm_arch *ka = &kvm->arch;
1456
1457         spin_lock(&ka->pvclock_gtod_sync_lock);
1458         kvm_make_mclock_inprogress_request(kvm);
1459         /* no guest entries from this point */
1460         pvclock_update_vm_gtod_copy(kvm);
1461
1462         kvm_for_each_vcpu(i, vcpu, kvm)
1463                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1464
1465         /* guest entries allowed */
1466         kvm_for_each_vcpu(i, vcpu, kvm)
1467                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1468
1469         spin_unlock(&ka->pvclock_gtod_sync_lock);
1470 #endif
1471 }
1472
1473 static int kvm_guest_time_update(struct kvm_vcpu *v)
1474 {
1475         unsigned long flags, this_tsc_khz;
1476         struct kvm_vcpu_arch *vcpu = &v->arch;
1477         struct kvm_arch *ka = &v->kvm->arch;
1478         s64 kernel_ns, max_kernel_ns;
1479         u64 tsc_timestamp, host_tsc;
1480         struct pvclock_vcpu_time_info guest_hv_clock;
1481         u8 pvclock_flags;
1482         bool use_master_clock;
1483
1484         kernel_ns = 0;
1485         host_tsc = 0;
1486
1487         /*
1488          * If the host uses TSC clock, then passthrough TSC as stable
1489          * to the guest.
1490          */
1491         spin_lock(&ka->pvclock_gtod_sync_lock);
1492         use_master_clock = ka->use_master_clock;
1493         if (use_master_clock) {
1494                 host_tsc = ka->master_cycle_now;
1495                 kernel_ns = ka->master_kernel_ns;
1496         }
1497         spin_unlock(&ka->pvclock_gtod_sync_lock);
1498
1499         /* Keep irq disabled to prevent changes to the clock */
1500         local_irq_save(flags);
1501         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1502         if (unlikely(this_tsc_khz == 0)) {
1503                 local_irq_restore(flags);
1504                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1505                 return 1;
1506         }
1507         if (!use_master_clock) {
1508                 host_tsc = native_read_tsc();
1509                 kernel_ns = get_kernel_ns();
1510         }
1511
1512         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1513
1514         /*
1515          * We may have to catch up the TSC to match elapsed wall clock
1516          * time for two reasons, even if kvmclock is used.
1517          *   1) CPU could have been running below the maximum TSC rate
1518          *   2) Broken TSC compensation resets the base at each VCPU
1519          *      entry to avoid unknown leaps of TSC even when running
1520          *      again on the same CPU.  This may cause apparent elapsed
1521          *      time to disappear, and the guest to stand still or run
1522          *      very slowly.
1523          */
1524         if (vcpu->tsc_catchup) {
1525                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1526                 if (tsc > tsc_timestamp) {
1527                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1528                         tsc_timestamp = tsc;
1529                 }
1530         }
1531
1532         local_irq_restore(flags);
1533
1534         if (!vcpu->pv_time_enabled)
1535                 return 0;
1536
1537         /*
1538          * Time as measured by the TSC may go backwards when resetting the base
1539          * tsc_timestamp.  The reason for this is that the TSC resolution is
1540          * higher than the resolution of the other clock scales.  Thus, many
1541          * possible measurments of the TSC correspond to one measurement of any
1542          * other clock, and so a spread of values is possible.  This is not a
1543          * problem for the computation of the nanosecond clock; with TSC rates
1544          * around 1GHZ, there can only be a few cycles which correspond to one
1545          * nanosecond value, and any path through this code will inevitably
1546          * take longer than that.  However, with the kernel_ns value itself,
1547          * the precision may be much lower, down to HZ granularity.  If the
1548          * first sampling of TSC against kernel_ns ends in the low part of the
1549          * range, and the second in the high end of the range, we can get:
1550          *
1551          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1552          *
1553          * As the sampling errors potentially range in the thousands of cycles,
1554          * it is possible such a time value has already been observed by the
1555          * guest.  To protect against this, we must compute the system time as
1556          * observed by the guest and ensure the new system time is greater.
1557          */
1558         max_kernel_ns = 0;
1559         if (vcpu->hv_clock.tsc_timestamp) {
1560                 max_kernel_ns = vcpu->last_guest_tsc -
1561                                 vcpu->hv_clock.tsc_timestamp;
1562                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1563                                     vcpu->hv_clock.tsc_to_system_mul,
1564                                     vcpu->hv_clock.tsc_shift);
1565                 max_kernel_ns += vcpu->last_kernel_ns;
1566         }
1567
1568         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1569                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1570                                    &vcpu->hv_clock.tsc_shift,
1571                                    &vcpu->hv_clock.tsc_to_system_mul);
1572                 vcpu->hw_tsc_khz = this_tsc_khz;
1573         }
1574
1575         /* with a master <monotonic time, tsc value> tuple,
1576          * pvclock clock reads always increase at the (scaled) rate
1577          * of guest TSC - no need to deal with sampling errors.
1578          */
1579         if (!use_master_clock) {
1580                 if (max_kernel_ns > kernel_ns)
1581                         kernel_ns = max_kernel_ns;
1582         }
1583         /* With all the info we got, fill in the values */
1584         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1585         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1586         vcpu->last_kernel_ns = kernel_ns;
1587         vcpu->last_guest_tsc = tsc_timestamp;
1588
1589         /*
1590          * The interface expects us to write an even number signaling that the
1591          * update is finished. Since the guest won't see the intermediate
1592          * state, we just increase by 2 at the end.
1593          */
1594         vcpu->hv_clock.version += 2;
1595
1596         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1597                 &guest_hv_clock, sizeof(guest_hv_clock))))
1598                 return 0;
1599
1600         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1601         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1602
1603         if (vcpu->pvclock_set_guest_stopped_request) {
1604                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1605                 vcpu->pvclock_set_guest_stopped_request = false;
1606         }
1607
1608         /* If the host uses TSC clocksource, then it is stable */
1609         if (use_master_clock)
1610                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1611
1612         vcpu->hv_clock.flags = pvclock_flags;
1613
1614         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1615                                 &vcpu->hv_clock,
1616                                 sizeof(vcpu->hv_clock));
1617         return 0;
1618 }
1619
1620 /*
1621  * kvmclock updates which are isolated to a given vcpu, such as
1622  * vcpu->cpu migration, should not allow system_timestamp from
1623  * the rest of the vcpus to remain static. Otherwise ntp frequency
1624  * correction applies to one vcpu's system_timestamp but not
1625  * the others.
1626  *
1627  * So in those cases, request a kvmclock update for all vcpus.
1628  * The worst case for a remote vcpu to update its kvmclock
1629  * is then bounded by maximum nohz sleep latency.
1630  */
1631
1632 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1633 {
1634         int i;
1635         struct kvm *kvm = v->kvm;
1636         struct kvm_vcpu *vcpu;
1637
1638         kvm_for_each_vcpu(i, vcpu, kvm) {
1639                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1640                 kvm_vcpu_kick(vcpu);
1641         }
1642 }
1643
1644 static bool msr_mtrr_valid(unsigned msr)
1645 {
1646         switch (msr) {
1647         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1648         case MSR_MTRRfix64K_00000:
1649         case MSR_MTRRfix16K_80000:
1650         case MSR_MTRRfix16K_A0000:
1651         case MSR_MTRRfix4K_C0000:
1652         case MSR_MTRRfix4K_C8000:
1653         case MSR_MTRRfix4K_D0000:
1654         case MSR_MTRRfix4K_D8000:
1655         case MSR_MTRRfix4K_E0000:
1656         case MSR_MTRRfix4K_E8000:
1657         case MSR_MTRRfix4K_F0000:
1658         case MSR_MTRRfix4K_F8000:
1659         case MSR_MTRRdefType:
1660         case MSR_IA32_CR_PAT:
1661                 return true;
1662         case 0x2f8:
1663                 return true;
1664         }
1665         return false;
1666 }
1667
1668 static bool valid_pat_type(unsigned t)
1669 {
1670         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1671 }
1672
1673 static bool valid_mtrr_type(unsigned t)
1674 {
1675         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1676 }
1677
1678 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1679 {
1680         int i;
1681
1682         if (!msr_mtrr_valid(msr))
1683                 return false;
1684
1685         if (msr == MSR_IA32_CR_PAT) {
1686                 for (i = 0; i < 8; i++)
1687                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1688                                 return false;
1689                 return true;
1690         } else if (msr == MSR_MTRRdefType) {
1691                 if (data & ~0xcff)
1692                         return false;
1693                 return valid_mtrr_type(data & 0xff);
1694         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1695                 for (i = 0; i < 8 ; i++)
1696                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1697                                 return false;
1698                 return true;
1699         }
1700
1701         /* variable MTRRs */
1702         return valid_mtrr_type(data & 0xff);
1703 }
1704
1705 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1706 {
1707         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1708
1709         if (!mtrr_valid(vcpu, msr, data))
1710                 return 1;
1711
1712         if (msr == MSR_MTRRdefType) {
1713                 vcpu->arch.mtrr_state.def_type = data;
1714                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1715         } else if (msr == MSR_MTRRfix64K_00000)
1716                 p[0] = data;
1717         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1718                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1719         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1720                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1721         else if (msr == MSR_IA32_CR_PAT)
1722                 vcpu->arch.pat = data;
1723         else {  /* Variable MTRRs */
1724                 int idx, is_mtrr_mask;
1725                 u64 *pt;
1726
1727                 idx = (msr - 0x200) / 2;
1728                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1729                 if (!is_mtrr_mask)
1730                         pt =
1731                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1732                 else
1733                         pt =
1734                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1735                 *pt = data;
1736         }
1737
1738         kvm_mmu_reset_context(vcpu);
1739         return 0;
1740 }
1741
1742 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1743 {
1744         u64 mcg_cap = vcpu->arch.mcg_cap;
1745         unsigned bank_num = mcg_cap & 0xff;
1746
1747         switch (msr) {
1748         case MSR_IA32_MCG_STATUS:
1749                 vcpu->arch.mcg_status = data;
1750                 break;
1751         case MSR_IA32_MCG_CTL:
1752                 if (!(mcg_cap & MCG_CTL_P))
1753                         return 1;
1754                 if (data != 0 && data != ~(u64)0)
1755                         return -1;
1756                 vcpu->arch.mcg_ctl = data;
1757                 break;
1758         default:
1759                 if (msr >= MSR_IA32_MC0_CTL &&
1760                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1761                         u32 offset = msr - MSR_IA32_MC0_CTL;
1762                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1763                          * some Linux kernels though clear bit 10 in bank 4 to
1764                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1765                          * this to avoid an uncatched #GP in the guest
1766                          */
1767                         if ((offset & 0x3) == 0 &&
1768                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1769                                 return -1;
1770                         vcpu->arch.mce_banks[offset] = data;
1771                         break;
1772                 }
1773                 return 1;
1774         }
1775         return 0;
1776 }
1777
1778 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1779 {
1780         struct kvm *kvm = vcpu->kvm;
1781         int lm = is_long_mode(vcpu);
1782         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1783                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1784         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1785                 : kvm->arch.xen_hvm_config.blob_size_32;
1786         u32 page_num = data & ~PAGE_MASK;
1787         u64 page_addr = data & PAGE_MASK;
1788         u8 *page;
1789         int r;
1790
1791         r = -E2BIG;
1792         if (page_num >= blob_size)
1793                 goto out;
1794         r = -ENOMEM;
1795         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1796         if (IS_ERR(page)) {
1797                 r = PTR_ERR(page);
1798                 goto out;
1799         }
1800         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1801                 goto out_free;
1802         r = 0;
1803 out_free:
1804         kfree(page);
1805 out:
1806         return r;
1807 }
1808
1809 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1810 {
1811         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1812 }
1813
1814 static bool kvm_hv_msr_partition_wide(u32 msr)
1815 {
1816         bool r = false;
1817         switch (msr) {
1818         case HV_X64_MSR_GUEST_OS_ID:
1819         case HV_X64_MSR_HYPERCALL:
1820                 r = true;
1821                 break;
1822         }
1823
1824         return r;
1825 }
1826
1827 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1828 {
1829         struct kvm *kvm = vcpu->kvm;
1830
1831         switch (msr) {
1832         case HV_X64_MSR_GUEST_OS_ID:
1833                 kvm->arch.hv_guest_os_id = data;
1834                 /* setting guest os id to zero disables hypercall page */
1835                 if (!kvm->arch.hv_guest_os_id)
1836                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1837                 break;
1838         case HV_X64_MSR_HYPERCALL: {
1839                 u64 gfn;
1840                 unsigned long addr;
1841                 u8 instructions[4];
1842
1843                 /* if guest os id is not set hypercall should remain disabled */
1844                 if (!kvm->arch.hv_guest_os_id)
1845                         break;
1846                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1847                         kvm->arch.hv_hypercall = data;
1848                         break;
1849                 }
1850                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1851                 addr = gfn_to_hva(kvm, gfn);
1852                 if (kvm_is_error_hva(addr))
1853                         return 1;
1854                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1855                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1856                 if (__copy_to_user((void __user *)addr, instructions, 4))
1857                         return 1;
1858                 kvm->arch.hv_hypercall = data;
1859                 break;
1860         }
1861         default:
1862                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1863                             "data 0x%llx\n", msr, data);
1864                 return 1;
1865         }
1866         return 0;
1867 }
1868
1869 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1870 {
1871         switch (msr) {
1872         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1873                 unsigned long addr;
1874
1875                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1876                         vcpu->arch.hv_vapic = data;
1877                         break;
1878                 }
1879                 addr = gfn_to_hva(vcpu->kvm, data >>
1880                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1881                 if (kvm_is_error_hva(addr))
1882                         return 1;
1883                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1884                         return 1;
1885                 vcpu->arch.hv_vapic = data;
1886                 break;
1887         }
1888         case HV_X64_MSR_EOI:
1889                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1890         case HV_X64_MSR_ICR:
1891                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1892         case HV_X64_MSR_TPR:
1893                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1894         default:
1895                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1896                             "data 0x%llx\n", msr, data);
1897                 return 1;
1898         }
1899
1900         return 0;
1901 }
1902
1903 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1904 {
1905         gpa_t gpa = data & ~0x3f;
1906
1907         /* Bits 2:5 are reserved, Should be zero */
1908         if (data & 0x3c)
1909                 return 1;
1910
1911         vcpu->arch.apf.msr_val = data;
1912
1913         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1914                 kvm_clear_async_pf_completion_queue(vcpu);
1915                 kvm_async_pf_hash_reset(vcpu);
1916                 return 0;
1917         }
1918
1919         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1920                                         sizeof(u32)))
1921                 return 1;
1922
1923         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1924         kvm_async_pf_wakeup_all(vcpu);
1925         return 0;
1926 }
1927
1928 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1929 {
1930         vcpu->arch.pv_time_enabled = false;
1931 }
1932
1933 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1934 {
1935         u64 delta;
1936
1937         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1938                 return;
1939
1940         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1941         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1942         vcpu->arch.st.accum_steal = delta;
1943 }
1944
1945 static void record_steal_time(struct kvm_vcpu *vcpu)
1946 {
1947         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1948                 return;
1949
1950         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1951                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1952                 return;
1953
1954         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1955         vcpu->arch.st.steal.version += 2;
1956         vcpu->arch.st.accum_steal = 0;
1957
1958         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1959                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1960 }
1961
1962 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1963 {
1964         bool pr = false;
1965         u32 msr = msr_info->index;
1966         u64 data = msr_info->data;
1967
1968         switch (msr) {
1969         case MSR_AMD64_NB_CFG:
1970         case MSR_IA32_UCODE_REV:
1971         case MSR_IA32_UCODE_WRITE:
1972         case MSR_VM_HSAVE_PA:
1973         case MSR_AMD64_PATCH_LOADER:
1974         case MSR_AMD64_BU_CFG2:
1975                 break;
1976
1977         case MSR_EFER:
1978                 return set_efer(vcpu, data);
1979         case MSR_K7_HWCR:
1980                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1981                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1982                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1983                 if (data != 0) {
1984                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1985                                     data);
1986                         return 1;
1987                 }
1988                 break;
1989         case MSR_FAM10H_MMIO_CONF_BASE:
1990                 if (data != 0) {
1991                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1992                                     "0x%llx\n", data);
1993                         return 1;
1994                 }
1995                 break;
1996         case MSR_IA32_DEBUGCTLMSR:
1997                 if (!data) {
1998                         /* We support the non-activated case already */
1999                         break;
2000                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2001                         /* Values other than LBR and BTF are vendor-specific,
2002                            thus reserved and should throw a #GP */
2003                         return 1;
2004                 }
2005                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2006                             __func__, data);
2007                 break;
2008         case 0x200 ... 0x2ff:
2009                 return set_msr_mtrr(vcpu, msr, data);
2010         case MSR_IA32_APICBASE:
2011                 kvm_set_apic_base(vcpu, data);
2012                 break;
2013         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2014                 return kvm_x2apic_msr_write(vcpu, msr, data);
2015         case MSR_IA32_TSCDEADLINE:
2016                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2017                 break;
2018         case MSR_IA32_TSC_ADJUST:
2019                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2020                         if (!msr_info->host_initiated) {
2021                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2022                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2023                         }
2024                         vcpu->arch.ia32_tsc_adjust_msr = data;
2025                 }
2026                 break;
2027         case MSR_IA32_MISC_ENABLE:
2028                 vcpu->arch.ia32_misc_enable_msr = data;
2029                 break;
2030         case MSR_KVM_WALL_CLOCK_NEW:
2031         case MSR_KVM_WALL_CLOCK:
2032                 vcpu->kvm->arch.wall_clock = data;
2033                 kvm_write_wall_clock(vcpu->kvm, data);
2034                 break;
2035         case MSR_KVM_SYSTEM_TIME_NEW:
2036         case MSR_KVM_SYSTEM_TIME: {
2037                 u64 gpa_offset;
2038                 kvmclock_reset(vcpu);
2039
2040                 vcpu->arch.time = data;
2041                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2042
2043                 /* we verify if the enable bit is set... */
2044                 if (!(data & 1))
2045                         break;
2046
2047                 gpa_offset = data & ~(PAGE_MASK | 1);
2048
2049                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2050                      &vcpu->arch.pv_time, data & ~1ULL,
2051                      sizeof(struct pvclock_vcpu_time_info)))
2052                         vcpu->arch.pv_time_enabled = false;
2053                 else
2054                         vcpu->arch.pv_time_enabled = true;
2055
2056                 break;
2057         }
2058         case MSR_KVM_ASYNC_PF_EN:
2059                 if (kvm_pv_enable_async_pf(vcpu, data))
2060                         return 1;
2061                 break;
2062         case MSR_KVM_STEAL_TIME:
2063
2064                 if (unlikely(!sched_info_on()))
2065                         return 1;
2066
2067                 if (data & KVM_STEAL_RESERVED_MASK)
2068                         return 1;
2069
2070                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2071                                                 data & KVM_STEAL_VALID_BITS,
2072                                                 sizeof(struct kvm_steal_time)))
2073                         return 1;
2074
2075                 vcpu->arch.st.msr_val = data;
2076
2077                 if (!(data & KVM_MSR_ENABLED))
2078                         break;
2079
2080                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2081
2082                 preempt_disable();
2083                 accumulate_steal_time(vcpu);
2084                 preempt_enable();
2085
2086                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2087
2088                 break;
2089         case MSR_KVM_PV_EOI_EN:
2090                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2091                         return 1;
2092                 break;
2093
2094         case MSR_IA32_MCG_CTL:
2095         case MSR_IA32_MCG_STATUS:
2096         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2097                 return set_msr_mce(vcpu, msr, data);
2098
2099         /* Performance counters are not protected by a CPUID bit,
2100          * so we should check all of them in the generic path for the sake of
2101          * cross vendor migration.
2102          * Writing a zero into the event select MSRs disables them,
2103          * which we perfectly emulate ;-). Any other value should be at least
2104          * reported, some guests depend on them.
2105          */
2106         case MSR_K7_EVNTSEL0:
2107         case MSR_K7_EVNTSEL1:
2108         case MSR_K7_EVNTSEL2:
2109         case MSR_K7_EVNTSEL3:
2110                 if (data != 0)
2111                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2112                                     "0x%x data 0x%llx\n", msr, data);
2113                 break;
2114         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2115          * so we ignore writes to make it happy.
2116          */
2117         case MSR_K7_PERFCTR0:
2118         case MSR_K7_PERFCTR1:
2119         case MSR_K7_PERFCTR2:
2120         case MSR_K7_PERFCTR3:
2121                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2122                             "0x%x data 0x%llx\n", msr, data);
2123                 break;
2124         case MSR_P6_PERFCTR0:
2125         case MSR_P6_PERFCTR1:
2126                 pr = true;
2127         case MSR_P6_EVNTSEL0:
2128         case MSR_P6_EVNTSEL1:
2129                 if (kvm_pmu_msr(vcpu, msr))
2130                         return kvm_pmu_set_msr(vcpu, msr_info);
2131
2132                 if (pr || data != 0)
2133                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2134                                     "0x%x data 0x%llx\n", msr, data);
2135                 break;
2136         case MSR_K7_CLK_CTL:
2137                 /*
2138                  * Ignore all writes to this no longer documented MSR.
2139                  * Writes are only relevant for old K7 processors,
2140                  * all pre-dating SVM, but a recommended workaround from
2141                  * AMD for these chips. It is possible to specify the
2142                  * affected processor models on the command line, hence
2143                  * the need to ignore the workaround.
2144                  */
2145                 break;
2146         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2147                 if (kvm_hv_msr_partition_wide(msr)) {
2148                         int r;
2149                         mutex_lock(&vcpu->kvm->lock);
2150                         r = set_msr_hyperv_pw(vcpu, msr, data);
2151                         mutex_unlock(&vcpu->kvm->lock);
2152                         return r;
2153                 } else
2154                         return set_msr_hyperv(vcpu, msr, data);
2155                 break;
2156         case MSR_IA32_BBL_CR_CTL3:
2157                 /* Drop writes to this legacy MSR -- see rdmsr
2158                  * counterpart for further detail.
2159                  */
2160                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2161                 break;
2162         case MSR_AMD64_OSVW_ID_LENGTH:
2163                 if (!guest_cpuid_has_osvw(vcpu))
2164                         return 1;
2165                 vcpu->arch.osvw.length = data;
2166                 break;
2167         case MSR_AMD64_OSVW_STATUS:
2168                 if (!guest_cpuid_has_osvw(vcpu))
2169                         return 1;
2170                 vcpu->arch.osvw.status = data;
2171                 break;
2172         default:
2173                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2174                         return xen_hvm_config(vcpu, data);
2175                 if (kvm_pmu_msr(vcpu, msr))
2176                         return kvm_pmu_set_msr(vcpu, msr_info);
2177                 if (!ignore_msrs) {
2178                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2179                                     msr, data);
2180                         return 1;
2181                 } else {
2182                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2183                                     msr, data);
2184                         break;
2185                 }
2186         }
2187         return 0;
2188 }
2189 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2190
2191
2192 /*
2193  * Reads an msr value (of 'msr_index') into 'pdata'.
2194  * Returns 0 on success, non-0 otherwise.
2195  * Assumes vcpu_load() was already called.
2196  */
2197 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2198 {
2199         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2200 }
2201
2202 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2203 {
2204         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2205
2206         if (!msr_mtrr_valid(msr))
2207                 return 1;
2208
2209         if (msr == MSR_MTRRdefType)
2210                 *pdata = vcpu->arch.mtrr_state.def_type +
2211                          (vcpu->arch.mtrr_state.enabled << 10);
2212         else if (msr == MSR_MTRRfix64K_00000)
2213                 *pdata = p[0];
2214         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2215                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2216         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2217                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2218         else if (msr == MSR_IA32_CR_PAT)
2219                 *pdata = vcpu->arch.pat;
2220         else {  /* Variable MTRRs */
2221                 int idx, is_mtrr_mask;
2222                 u64 *pt;
2223
2224                 idx = (msr - 0x200) / 2;
2225                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2226                 if (!is_mtrr_mask)
2227                         pt =
2228                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2229                 else
2230                         pt =
2231                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2232                 *pdata = *pt;
2233         }
2234
2235         return 0;
2236 }
2237
2238 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2239 {
2240         u64 data;
2241         u64 mcg_cap = vcpu->arch.mcg_cap;
2242         unsigned bank_num = mcg_cap & 0xff;
2243
2244         switch (msr) {
2245         case MSR_IA32_P5_MC_ADDR:
2246         case MSR_IA32_P5_MC_TYPE:
2247                 data = 0;
2248                 break;
2249         case MSR_IA32_MCG_CAP:
2250                 data = vcpu->arch.mcg_cap;
2251                 break;
2252         case MSR_IA32_MCG_CTL:
2253                 if (!(mcg_cap & MCG_CTL_P))
2254                         return 1;
2255                 data = vcpu->arch.mcg_ctl;
2256                 break;
2257         case MSR_IA32_MCG_STATUS:
2258                 data = vcpu->arch.mcg_status;
2259                 break;
2260         default:
2261                 if (msr >= MSR_IA32_MC0_CTL &&
2262                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2263                         u32 offset = msr - MSR_IA32_MC0_CTL;
2264                         data = vcpu->arch.mce_banks[offset];
2265                         break;
2266                 }
2267                 return 1;
2268         }
2269         *pdata = data;
2270         return 0;
2271 }
2272
2273 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2274 {
2275         u64 data = 0;
2276         struct kvm *kvm = vcpu->kvm;
2277
2278         switch (msr) {
2279         case HV_X64_MSR_GUEST_OS_ID:
2280                 data = kvm->arch.hv_guest_os_id;
2281                 break;
2282         case HV_X64_MSR_HYPERCALL:
2283                 data = kvm->arch.hv_hypercall;
2284                 break;
2285         default:
2286                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2287                 return 1;
2288         }
2289
2290         *pdata = data;
2291         return 0;
2292 }
2293
2294 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2295 {
2296         u64 data = 0;
2297
2298         switch (msr) {
2299         case HV_X64_MSR_VP_INDEX: {
2300                 int r;
2301                 struct kvm_vcpu *v;
2302                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2303                         if (v == vcpu)
2304                                 data = r;
2305                 break;
2306         }
2307         case HV_X64_MSR_EOI:
2308                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2309         case HV_X64_MSR_ICR:
2310                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2311         case HV_X64_MSR_TPR:
2312                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2313         case HV_X64_MSR_APIC_ASSIST_PAGE:
2314                 data = vcpu->arch.hv_vapic;
2315                 break;
2316         default:
2317                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2318                 return 1;
2319         }
2320         *pdata = data;
2321         return 0;
2322 }
2323
2324 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2325 {
2326         u64 data;
2327
2328         switch (msr) {
2329         case MSR_IA32_PLATFORM_ID:
2330         case MSR_IA32_EBL_CR_POWERON:
2331         case MSR_IA32_DEBUGCTLMSR:
2332         case MSR_IA32_LASTBRANCHFROMIP:
2333         case MSR_IA32_LASTBRANCHTOIP:
2334         case MSR_IA32_LASTINTFROMIP:
2335         case MSR_IA32_LASTINTTOIP:
2336         case MSR_K8_SYSCFG:
2337         case MSR_K7_HWCR:
2338         case MSR_VM_HSAVE_PA:
2339         case MSR_K7_EVNTSEL0:
2340         case MSR_K7_PERFCTR0:
2341         case MSR_K8_INT_PENDING_MSG:
2342         case MSR_AMD64_NB_CFG:
2343         case MSR_FAM10H_MMIO_CONF_BASE:
2344         case MSR_AMD64_BU_CFG2:
2345                 data = 0;
2346                 break;
2347         case MSR_P6_PERFCTR0:
2348         case MSR_P6_PERFCTR1:
2349         case MSR_P6_EVNTSEL0:
2350         case MSR_P6_EVNTSEL1:
2351                 if (kvm_pmu_msr(vcpu, msr))
2352                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2353                 data = 0;
2354                 break;
2355         case MSR_IA32_UCODE_REV:
2356                 data = 0x100000000ULL;
2357                 break;
2358         case MSR_MTRRcap:
2359                 data = 0x500 | KVM_NR_VAR_MTRR;
2360                 break;
2361         case 0x200 ... 0x2ff:
2362                 return get_msr_mtrr(vcpu, msr, pdata);
2363         case 0xcd: /* fsb frequency */
2364                 data = 3;
2365                 break;
2366                 /*
2367                  * MSR_EBC_FREQUENCY_ID
2368                  * Conservative value valid for even the basic CPU models.
2369                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2370                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2371                  * and 266MHz for model 3, or 4. Set Core Clock
2372                  * Frequency to System Bus Frequency Ratio to 1 (bits
2373                  * 31:24) even though these are only valid for CPU
2374                  * models > 2, however guests may end up dividing or
2375                  * multiplying by zero otherwise.
2376                  */
2377         case MSR_EBC_FREQUENCY_ID:
2378                 data = 1 << 24;
2379                 break;
2380         case MSR_IA32_APICBASE:
2381                 data = kvm_get_apic_base(vcpu);
2382                 break;
2383         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2384                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2385                 break;
2386         case MSR_IA32_TSCDEADLINE:
2387                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2388                 break;
2389         case MSR_IA32_TSC_ADJUST:
2390                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2391                 break;
2392         case MSR_IA32_MISC_ENABLE:
2393                 data = vcpu->arch.ia32_misc_enable_msr;
2394                 break;
2395         case MSR_IA32_PERF_STATUS:
2396                 /* TSC increment by tick */
2397                 data = 1000ULL;
2398                 /* CPU multiplier */
2399                 data |= (((uint64_t)4ULL) << 40);
2400                 break;
2401         case MSR_EFER:
2402                 data = vcpu->arch.efer;
2403                 break;
2404         case MSR_KVM_WALL_CLOCK:
2405         case MSR_KVM_WALL_CLOCK_NEW:
2406                 data = vcpu->kvm->arch.wall_clock;
2407                 break;
2408         case MSR_KVM_SYSTEM_TIME:
2409         case MSR_KVM_SYSTEM_TIME_NEW:
2410                 data = vcpu->arch.time;
2411                 break;
2412         case MSR_KVM_ASYNC_PF_EN:
2413                 data = vcpu->arch.apf.msr_val;
2414                 break;
2415         case MSR_KVM_STEAL_TIME:
2416                 data = vcpu->arch.st.msr_val;
2417                 break;
2418         case MSR_KVM_PV_EOI_EN:
2419                 data = vcpu->arch.pv_eoi.msr_val;
2420                 break;
2421         case MSR_IA32_P5_MC_ADDR:
2422         case MSR_IA32_P5_MC_TYPE:
2423         case MSR_IA32_MCG_CAP:
2424         case MSR_IA32_MCG_CTL:
2425         case MSR_IA32_MCG_STATUS:
2426         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2427                 return get_msr_mce(vcpu, msr, pdata);
2428         case MSR_K7_CLK_CTL:
2429                 /*
2430                  * Provide expected ramp-up count for K7. All other
2431                  * are set to zero, indicating minimum divisors for
2432                  * every field.
2433                  *
2434                  * This prevents guest kernels on AMD host with CPU
2435                  * type 6, model 8 and higher from exploding due to
2436                  * the rdmsr failing.
2437                  */
2438                 data = 0x20000000;
2439                 break;
2440         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2441                 if (kvm_hv_msr_partition_wide(msr)) {
2442                         int r;
2443                         mutex_lock(&vcpu->kvm->lock);
2444                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2445                         mutex_unlock(&vcpu->kvm->lock);
2446                         return r;
2447                 } else
2448                         return get_msr_hyperv(vcpu, msr, pdata);
2449                 break;
2450         case MSR_IA32_BBL_CR_CTL3:
2451                 /* This legacy MSR exists but isn't fully documented in current
2452                  * silicon.  It is however accessed by winxp in very narrow
2453                  * scenarios where it sets bit #19, itself documented as
2454                  * a "reserved" bit.  Best effort attempt to source coherent
2455                  * read data here should the balance of the register be
2456                  * interpreted by the guest:
2457                  *
2458                  * L2 cache control register 3: 64GB range, 256KB size,
2459                  * enabled, latency 0x1, configured
2460                  */
2461                 data = 0xbe702111;
2462                 break;
2463         case MSR_AMD64_OSVW_ID_LENGTH:
2464                 if (!guest_cpuid_has_osvw(vcpu))
2465                         return 1;
2466                 data = vcpu->arch.osvw.length;
2467                 break;
2468         case MSR_AMD64_OSVW_STATUS:
2469                 if (!guest_cpuid_has_osvw(vcpu))
2470                         return 1;
2471                 data = vcpu->arch.osvw.status;
2472                 break;
2473         default:
2474                 if (kvm_pmu_msr(vcpu, msr))
2475                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2476                 if (!ignore_msrs) {
2477                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2478                         return 1;
2479                 } else {
2480                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2481                         data = 0;
2482                 }
2483                 break;
2484         }
2485         *pdata = data;
2486         return 0;
2487 }
2488 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2489
2490 /*
2491  * Read or write a bunch of msrs. All parameters are kernel addresses.
2492  *
2493  * @return number of msrs set successfully.
2494  */
2495 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2496                     struct kvm_msr_entry *entries,
2497                     int (*do_msr)(struct kvm_vcpu *vcpu,
2498                                   unsigned index, u64 *data))
2499 {
2500         int i, idx;
2501
2502         idx = srcu_read_lock(&vcpu->kvm->srcu);
2503         for (i = 0; i < msrs->nmsrs; ++i)
2504                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2505                         break;
2506         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2507
2508         return i;
2509 }
2510
2511 /*
2512  * Read or write a bunch of msrs. Parameters are user addresses.
2513  *
2514  * @return number of msrs set successfully.
2515  */
2516 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2517                   int (*do_msr)(struct kvm_vcpu *vcpu,
2518                                 unsigned index, u64 *data),
2519                   int writeback)
2520 {
2521         struct kvm_msrs msrs;
2522         struct kvm_msr_entry *entries;
2523         int r, n;
2524         unsigned size;
2525
2526         r = -EFAULT;
2527         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2528                 goto out;
2529
2530         r = -E2BIG;
2531         if (msrs.nmsrs >= MAX_IO_MSRS)
2532                 goto out;
2533
2534         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2535         entries = memdup_user(user_msrs->entries, size);
2536         if (IS_ERR(entries)) {
2537                 r = PTR_ERR(entries);
2538                 goto out;
2539         }
2540
2541         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2542         if (r < 0)
2543                 goto out_free;
2544
2545         r = -EFAULT;
2546         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2547                 goto out_free;
2548
2549         r = n;
2550
2551 out_free:
2552         kfree(entries);
2553 out:
2554         return r;
2555 }
2556
2557 int kvm_dev_ioctl_check_extension(long ext)
2558 {
2559         int r;
2560
2561         switch (ext) {
2562         case KVM_CAP_IRQCHIP:
2563         case KVM_CAP_HLT:
2564         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2565         case KVM_CAP_SET_TSS_ADDR:
2566         case KVM_CAP_EXT_CPUID:
2567         case KVM_CAP_EXT_EMUL_CPUID:
2568         case KVM_CAP_CLOCKSOURCE:
2569         case KVM_CAP_PIT:
2570         case KVM_CAP_NOP_IO_DELAY:
2571         case KVM_CAP_MP_STATE:
2572         case KVM_CAP_SYNC_MMU:
2573         case KVM_CAP_USER_NMI:
2574         case KVM_CAP_REINJECT_CONTROL:
2575         case KVM_CAP_IRQ_INJECT_STATUS:
2576         case KVM_CAP_IRQFD:
2577         case KVM_CAP_IOEVENTFD:
2578         case KVM_CAP_PIT2:
2579         case KVM_CAP_PIT_STATE2:
2580         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2581         case KVM_CAP_XEN_HVM:
2582         case KVM_CAP_ADJUST_CLOCK:
2583         case KVM_CAP_VCPU_EVENTS:
2584         case KVM_CAP_HYPERV:
2585         case KVM_CAP_HYPERV_VAPIC:
2586         case KVM_CAP_HYPERV_SPIN:
2587         case KVM_CAP_PCI_SEGMENT:
2588         case KVM_CAP_DEBUGREGS:
2589         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2590         case KVM_CAP_XSAVE:
2591         case KVM_CAP_ASYNC_PF:
2592         case KVM_CAP_GET_TSC_KHZ:
2593         case KVM_CAP_KVMCLOCK_CTRL:
2594         case KVM_CAP_READONLY_MEM:
2595 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2596         case KVM_CAP_ASSIGN_DEV_IRQ:
2597         case KVM_CAP_PCI_2_3:
2598 #endif
2599                 r = 1;
2600                 break;
2601         case KVM_CAP_COALESCED_MMIO:
2602                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2603                 break;
2604         case KVM_CAP_VAPIC:
2605                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2606                 break;
2607         case KVM_CAP_NR_VCPUS:
2608                 r = KVM_SOFT_MAX_VCPUS;
2609                 break;
2610         case KVM_CAP_MAX_VCPUS:
2611                 r = KVM_MAX_VCPUS;
2612                 break;
2613         case KVM_CAP_NR_MEMSLOTS:
2614                 r = KVM_USER_MEM_SLOTS;
2615                 break;
2616         case KVM_CAP_PV_MMU:    /* obsolete */
2617                 r = 0;
2618                 break;
2619 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2620         case KVM_CAP_IOMMU:
2621                 r = iommu_present(&pci_bus_type);
2622                 break;
2623 #endif
2624         case KVM_CAP_MCE:
2625                 r = KVM_MAX_MCE_BANKS;
2626                 break;
2627         case KVM_CAP_XCRS:
2628                 r = cpu_has_xsave;
2629                 break;
2630         case KVM_CAP_TSC_CONTROL:
2631                 r = kvm_has_tsc_control;
2632                 break;
2633         case KVM_CAP_TSC_DEADLINE_TIMER:
2634                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2635                 break;
2636         default:
2637                 r = 0;
2638                 break;
2639         }
2640         return r;
2641
2642 }
2643
2644 long kvm_arch_dev_ioctl(struct file *filp,
2645                         unsigned int ioctl, unsigned long arg)
2646 {
2647         void __user *argp = (void __user *)arg;
2648         long r;
2649
2650         switch (ioctl) {
2651         case KVM_GET_MSR_INDEX_LIST: {
2652                 struct kvm_msr_list __user *user_msr_list = argp;
2653                 struct kvm_msr_list msr_list;
2654                 unsigned n;
2655
2656                 r = -EFAULT;
2657                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2658                         goto out;
2659                 n = msr_list.nmsrs;
2660                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2661                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2662                         goto out;
2663                 r = -E2BIG;
2664                 if (n < msr_list.nmsrs)
2665                         goto out;
2666                 r = -EFAULT;
2667                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2668                                  num_msrs_to_save * sizeof(u32)))
2669                         goto out;
2670                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2671                                  &emulated_msrs,
2672                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2673                         goto out;
2674                 r = 0;
2675                 break;
2676         }
2677         case KVM_GET_SUPPORTED_CPUID:
2678         case KVM_GET_EMULATED_CPUID: {
2679                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2680                 struct kvm_cpuid2 cpuid;
2681
2682                 r = -EFAULT;
2683                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2684                         goto out;
2685
2686                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2687                                             ioctl);
2688                 if (r)
2689                         goto out;
2690
2691                 r = -EFAULT;
2692                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2693                         goto out;
2694                 r = 0;
2695                 break;
2696         }
2697         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2698                 u64 mce_cap;
2699
2700                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2701                 r = -EFAULT;
2702                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2703                         goto out;
2704                 r = 0;
2705                 break;
2706         }
2707         default:
2708                 r = -EINVAL;
2709         }
2710 out:
2711         return r;
2712 }
2713
2714 static void wbinvd_ipi(void *garbage)
2715 {
2716         wbinvd();
2717 }
2718
2719 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2720 {
2721         return vcpu->kvm->arch.iommu_domain &&
2722                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2723 }
2724
2725 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2726 {
2727         /* Address WBINVD may be executed by guest */
2728         if (need_emulate_wbinvd(vcpu)) {
2729                 if (kvm_x86_ops->has_wbinvd_exit())
2730                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2731                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2732                         smp_call_function_single(vcpu->cpu,
2733                                         wbinvd_ipi, NULL, 1);
2734         }
2735
2736         kvm_x86_ops->vcpu_load(vcpu, cpu);
2737
2738         /* Apply any externally detected TSC adjustments (due to suspend) */
2739         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2740                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2741                 vcpu->arch.tsc_offset_adjustment = 0;
2742                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2743         }
2744
2745         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2746                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2747                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2748                 if (tsc_delta < 0)
2749                         mark_tsc_unstable("KVM discovered backwards TSC");
2750                 if (check_tsc_unstable()) {
2751                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2752                                                 vcpu->arch.last_guest_tsc);
2753                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2754                         vcpu->arch.tsc_catchup = 1;
2755                 }
2756                 /*
2757                  * On a host with synchronized TSC, there is no need to update
2758                  * kvmclock on vcpu->cpu migration
2759                  */
2760                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2761                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2762                 if (vcpu->cpu != cpu)
2763                         kvm_migrate_timers(vcpu);
2764                 vcpu->cpu = cpu;
2765         }
2766
2767         accumulate_steal_time(vcpu);
2768         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2769 }
2770
2771 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2772 {
2773         kvm_x86_ops->vcpu_put(vcpu);
2774         kvm_put_guest_fpu(vcpu);
2775         vcpu->arch.last_host_tsc = native_read_tsc();
2776 }
2777
2778 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2779                                     struct kvm_lapic_state *s)
2780 {
2781         kvm_x86_ops->sync_pir_to_irr(vcpu);
2782         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2783
2784         return 0;
2785 }
2786
2787 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2788                                     struct kvm_lapic_state *s)
2789 {
2790         kvm_apic_post_state_restore(vcpu, s);
2791         update_cr8_intercept(vcpu);
2792
2793         return 0;
2794 }
2795
2796 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2797                                     struct kvm_interrupt *irq)
2798 {
2799         if (irq->irq >= KVM_NR_INTERRUPTS)
2800                 return -EINVAL;
2801         if (irqchip_in_kernel(vcpu->kvm))
2802                 return -ENXIO;
2803
2804         kvm_queue_interrupt(vcpu, irq->irq, false);
2805         kvm_make_request(KVM_REQ_EVENT, vcpu);
2806
2807         return 0;
2808 }
2809
2810 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2811 {
2812         kvm_inject_nmi(vcpu);
2813
2814         return 0;
2815 }
2816
2817 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2818                                            struct kvm_tpr_access_ctl *tac)
2819 {
2820         if (tac->flags)
2821                 return -EINVAL;
2822         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2823         return 0;
2824 }
2825
2826 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2827                                         u64 mcg_cap)
2828 {
2829         int r;
2830         unsigned bank_num = mcg_cap & 0xff, bank;
2831
2832         r = -EINVAL;
2833         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2834                 goto out;
2835         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2836                 goto out;
2837         r = 0;
2838         vcpu->arch.mcg_cap = mcg_cap;
2839         /* Init IA32_MCG_CTL to all 1s */
2840         if (mcg_cap & MCG_CTL_P)
2841                 vcpu->arch.mcg_ctl = ~(u64)0;
2842         /* Init IA32_MCi_CTL to all 1s */
2843         for (bank = 0; bank < bank_num; bank++)
2844                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2845 out:
2846         return r;
2847 }
2848
2849 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2850                                       struct kvm_x86_mce *mce)
2851 {
2852         u64 mcg_cap = vcpu->arch.mcg_cap;
2853         unsigned bank_num = mcg_cap & 0xff;
2854         u64 *banks = vcpu->arch.mce_banks;
2855
2856         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2857                 return -EINVAL;
2858         /*
2859          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2860          * reporting is disabled
2861          */
2862         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2863             vcpu->arch.mcg_ctl != ~(u64)0)
2864                 return 0;
2865         banks += 4 * mce->bank;
2866         /*
2867          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2868          * reporting is disabled for the bank
2869          */
2870         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2871                 return 0;
2872         if (mce->status & MCI_STATUS_UC) {
2873                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2874                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2875                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2876                         return 0;
2877                 }
2878                 if (banks[1] & MCI_STATUS_VAL)
2879                         mce->status |= MCI_STATUS_OVER;
2880                 banks[2] = mce->addr;
2881                 banks[3] = mce->misc;
2882                 vcpu->arch.mcg_status = mce->mcg_status;
2883                 banks[1] = mce->status;
2884                 kvm_queue_exception(vcpu, MC_VECTOR);
2885         } else if (!(banks[1] & MCI_STATUS_VAL)
2886                    || !(banks[1] & MCI_STATUS_UC)) {
2887                 if (banks[1] & MCI_STATUS_VAL)
2888                         mce->status |= MCI_STATUS_OVER;
2889                 banks[2] = mce->addr;
2890                 banks[3] = mce->misc;
2891                 banks[1] = mce->status;
2892         } else
2893                 banks[1] |= MCI_STATUS_OVER;
2894         return 0;
2895 }
2896
2897 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2898                                                struct kvm_vcpu_events *events)
2899 {
2900         process_nmi(vcpu);
2901         events->exception.injected =
2902                 vcpu->arch.exception.pending &&
2903                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2904         events->exception.nr = vcpu->arch.exception.nr;
2905         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2906         events->exception.pad = 0;
2907         events->exception.error_code = vcpu->arch.exception.error_code;
2908
2909         events->interrupt.injected =
2910                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2911         events->interrupt.nr = vcpu->arch.interrupt.nr;
2912         events->interrupt.soft = 0;
2913         events->interrupt.shadow =
2914                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2915                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2916
2917         events->nmi.injected = vcpu->arch.nmi_injected;
2918         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2919         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2920         events->nmi.pad = 0;
2921
2922         events->sipi_vector = 0; /* never valid when reporting to user space */
2923
2924         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2925                          | KVM_VCPUEVENT_VALID_SHADOW);
2926         memset(&events->reserved, 0, sizeof(events->reserved));
2927 }
2928
2929 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2930                                               struct kvm_vcpu_events *events)
2931 {
2932         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2933                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2934                               | KVM_VCPUEVENT_VALID_SHADOW))
2935                 return -EINVAL;
2936
2937         process_nmi(vcpu);
2938         vcpu->arch.exception.pending = events->exception.injected;
2939         vcpu->arch.exception.nr = events->exception.nr;
2940         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2941         vcpu->arch.exception.error_code = events->exception.error_code;
2942
2943         vcpu->arch.interrupt.pending = events->interrupt.injected;
2944         vcpu->arch.interrupt.nr = events->interrupt.nr;
2945         vcpu->arch.interrupt.soft = events->interrupt.soft;
2946         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2947                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2948                                                   events->interrupt.shadow);
2949
2950         vcpu->arch.nmi_injected = events->nmi.injected;
2951         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2952                 vcpu->arch.nmi_pending = events->nmi.pending;
2953         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2954
2955         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2956             kvm_vcpu_has_lapic(vcpu))
2957                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2958
2959         kvm_make_request(KVM_REQ_EVENT, vcpu);
2960
2961         return 0;
2962 }
2963
2964 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2965                                              struct kvm_debugregs *dbgregs)
2966 {
2967         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2968         dbgregs->dr6 = vcpu->arch.dr6;
2969         dbgregs->dr7 = vcpu->arch.dr7;
2970         dbgregs->flags = 0;
2971         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2972 }
2973
2974 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2975                                             struct kvm_debugregs *dbgregs)
2976 {
2977         if (dbgregs->flags)
2978                 return -EINVAL;
2979
2980         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2981         vcpu->arch.dr6 = dbgregs->dr6;
2982         vcpu->arch.dr7 = dbgregs->dr7;
2983
2984         return 0;
2985 }
2986
2987 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2988                                          struct kvm_xsave *guest_xsave)
2989 {
2990         if (cpu_has_xsave) {
2991                 memcpy(guest_xsave->region,
2992                         &vcpu->arch.guest_fpu.state->xsave,
2993                         vcpu->arch.guest_xstate_size);
2994                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] &=
2995                         vcpu->arch.guest_supported_xcr0 | XSTATE_FPSSE;
2996         } else {
2997                 memcpy(guest_xsave->region,
2998                         &vcpu->arch.guest_fpu.state->fxsave,
2999                         sizeof(struct i387_fxsave_struct));
3000                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3001                         XSTATE_FPSSE;
3002         }
3003 }
3004
3005 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3006                                         struct kvm_xsave *guest_xsave)
3007 {
3008         u64 xstate_bv =
3009                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3010
3011         if (cpu_has_xsave) {
3012                 /*
3013                  * Here we allow setting states that are not present in
3014                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3015                  * with old userspace.
3016                  */
3017                 if (xstate_bv & ~KVM_SUPPORTED_XCR0)
3018                         return -EINVAL;
3019                 if (xstate_bv & ~host_xcr0)
3020                         return -EINVAL;
3021                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
3022                         guest_xsave->region, vcpu->arch.guest_xstate_size);
3023         } else {
3024                 if (xstate_bv & ~XSTATE_FPSSE)
3025                         return -EINVAL;
3026                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3027                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3028         }
3029         return 0;
3030 }
3031
3032 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3033                                         struct kvm_xcrs *guest_xcrs)
3034 {
3035         if (!cpu_has_xsave) {
3036                 guest_xcrs->nr_xcrs = 0;
3037                 return;
3038         }
3039
3040         guest_xcrs->nr_xcrs = 1;
3041         guest_xcrs->flags = 0;
3042         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3043         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3044 }
3045
3046 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3047                                        struct kvm_xcrs *guest_xcrs)
3048 {
3049         int i, r = 0;
3050
3051         if (!cpu_has_xsave)
3052                 return -EINVAL;
3053
3054         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3055                 return -EINVAL;
3056
3057         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3058                 /* Only support XCR0 currently */
3059                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3060                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3061                                 guest_xcrs->xcrs[0].value);
3062                         break;
3063                 }
3064         if (r)
3065                 r = -EINVAL;
3066         return r;
3067 }
3068
3069 /*
3070  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3071  * stopped by the hypervisor.  This function will be called from the host only.
3072  * EINVAL is returned when the host attempts to set the flag for a guest that
3073  * does not support pv clocks.
3074  */
3075 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3076 {
3077         if (!vcpu->arch.pv_time_enabled)
3078                 return -EINVAL;
3079         vcpu->arch.pvclock_set_guest_stopped_request = true;
3080         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3081         return 0;
3082 }
3083
3084 long kvm_arch_vcpu_ioctl(struct file *filp,
3085                          unsigned int ioctl, unsigned long arg)
3086 {
3087         struct kvm_vcpu *vcpu = filp->private_data;
3088         void __user *argp = (void __user *)arg;
3089         int r;
3090         union {
3091                 struct kvm_lapic_state *lapic;
3092                 struct kvm_xsave *xsave;
3093                 struct kvm_xcrs *xcrs;
3094                 void *buffer;
3095         } u;
3096
3097         u.buffer = NULL;
3098         switch (ioctl) {
3099         case KVM_GET_LAPIC: {
3100                 r = -EINVAL;
3101                 if (!vcpu->arch.apic)
3102                         goto out;
3103                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3104
3105                 r = -ENOMEM;
3106                 if (!u.lapic)
3107                         goto out;
3108                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3109                 if (r)
3110                         goto out;
3111                 r = -EFAULT;
3112                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3113                         goto out;
3114                 r = 0;
3115                 break;
3116         }
3117         case KVM_SET_LAPIC: {
3118                 r = -EINVAL;
3119                 if (!vcpu->arch.apic)
3120                         goto out;
3121                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3122                 if (IS_ERR(u.lapic))
3123                         return PTR_ERR(u.lapic);
3124
3125                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3126                 break;
3127         }
3128         case KVM_INTERRUPT: {
3129                 struct kvm_interrupt irq;
3130
3131                 r = -EFAULT;
3132                 if (copy_from_user(&irq, argp, sizeof irq))
3133                         goto out;
3134                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3135                 break;
3136         }
3137         case KVM_NMI: {
3138                 r = kvm_vcpu_ioctl_nmi(vcpu);
3139                 break;
3140         }
3141         case KVM_SET_CPUID: {
3142                 struct kvm_cpuid __user *cpuid_arg = argp;
3143                 struct kvm_cpuid cpuid;
3144
3145                 r = -EFAULT;
3146                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3147                         goto out;
3148                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3149                 break;
3150         }
3151         case KVM_SET_CPUID2: {
3152                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3153                 struct kvm_cpuid2 cpuid;
3154
3155                 r = -EFAULT;
3156                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3157                         goto out;
3158                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3159                                               cpuid_arg->entries);
3160                 break;
3161         }
3162         case KVM_GET_CPUID2: {
3163                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3164                 struct kvm_cpuid2 cpuid;
3165
3166                 r = -EFAULT;
3167                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3168                         goto out;
3169                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3170                                               cpuid_arg->entries);
3171                 if (r)
3172                         goto out;
3173                 r = -EFAULT;
3174                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3175                         goto out;
3176                 r = 0;
3177                 break;
3178         }
3179         case KVM_GET_MSRS:
3180                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3181                 break;
3182         case KVM_SET_MSRS:
3183                 r = msr_io(vcpu, argp, do_set_msr, 0);
3184                 break;
3185         case KVM_TPR_ACCESS_REPORTING: {
3186                 struct kvm_tpr_access_ctl tac;
3187
3188                 r = -EFAULT;
3189                 if (copy_from_user(&tac, argp, sizeof tac))
3190                         goto out;
3191                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3192                 if (r)
3193                         goto out;
3194                 r = -EFAULT;
3195                 if (copy_to_user(argp, &tac, sizeof tac))
3196                         goto out;
3197                 r = 0;
3198                 break;
3199         };
3200         case KVM_SET_VAPIC_ADDR: {
3201                 struct kvm_vapic_addr va;
3202
3203                 r = -EINVAL;
3204                 if (!irqchip_in_kernel(vcpu->kvm))
3205                         goto out;
3206                 r = -EFAULT;
3207                 if (copy_from_user(&va, argp, sizeof va))
3208                         goto out;
3209                 r = 0;
3210                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3211                 break;
3212         }
3213         case KVM_X86_SETUP_MCE: {
3214                 u64 mcg_cap;
3215
3216                 r = -EFAULT;
3217                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3218                         goto out;
3219                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3220                 break;
3221         }
3222         case KVM_X86_SET_MCE: {
3223                 struct kvm_x86_mce mce;
3224
3225                 r = -EFAULT;
3226                 if (copy_from_user(&mce, argp, sizeof mce))
3227                         goto out;
3228                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3229                 break;
3230         }
3231         case KVM_GET_VCPU_EVENTS: {
3232                 struct kvm_vcpu_events events;
3233
3234                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3235
3236                 r = -EFAULT;
3237                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3238                         break;
3239                 r = 0;
3240                 break;
3241         }
3242         case KVM_SET_VCPU_EVENTS: {
3243                 struct kvm_vcpu_events events;
3244
3245                 r = -EFAULT;
3246                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3247                         break;
3248
3249                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3250                 break;
3251         }
3252         case KVM_GET_DEBUGREGS: {
3253                 struct kvm_debugregs dbgregs;
3254
3255                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3256
3257                 r = -EFAULT;
3258                 if (copy_to_user(argp, &dbgregs,
3259                                  sizeof(struct kvm_debugregs)))
3260                         break;
3261                 r = 0;
3262                 break;
3263         }
3264         case KVM_SET_DEBUGREGS: {
3265                 struct kvm_debugregs dbgregs;
3266
3267                 r = -EFAULT;
3268                 if (copy_from_user(&dbgregs, argp,
3269                                    sizeof(struct kvm_debugregs)))
3270                         break;
3271
3272                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3273                 break;
3274         }
3275         case KVM_GET_XSAVE: {
3276                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3277                 r = -ENOMEM;
3278                 if (!u.xsave)
3279                         break;
3280
3281                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3282
3283                 r = -EFAULT;
3284                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3285                         break;
3286                 r = 0;
3287                 break;
3288         }
3289         case KVM_SET_XSAVE: {
3290                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3291                 if (IS_ERR(u.xsave))
3292                         return PTR_ERR(u.xsave);
3293
3294                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3295                 break;
3296         }
3297         case KVM_GET_XCRS: {
3298                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3299                 r = -ENOMEM;
3300                 if (!u.xcrs)
3301                         break;
3302
3303                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3304
3305                 r = -EFAULT;
3306                 if (copy_to_user(argp, u.xcrs,
3307                                  sizeof(struct kvm_xcrs)))
3308                         break;
3309                 r = 0;
3310                 break;
3311         }
3312         case KVM_SET_XCRS: {
3313                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3314                 if (IS_ERR(u.xcrs))
3315                         return PTR_ERR(u.xcrs);
3316
3317                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3318                 break;
3319         }
3320         case KVM_SET_TSC_KHZ: {
3321                 u32 user_tsc_khz;
3322
3323                 r = -EINVAL;
3324                 user_tsc_khz = (u32)arg;
3325
3326                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3327                         goto out;
3328
3329                 if (user_tsc_khz == 0)
3330                         user_tsc_khz = tsc_khz;
3331
3332                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3333
3334                 r = 0;
3335                 goto out;
3336         }
3337         case KVM_GET_TSC_KHZ: {
3338                 r = vcpu->arch.virtual_tsc_khz;
3339                 goto out;
3340         }
3341         case KVM_KVMCLOCK_CTRL: {
3342                 r = kvm_set_guest_paused(vcpu);
3343                 goto out;
3344         }
3345         default:
3346                 r = -EINVAL;
3347         }
3348 out:
3349         kfree(u.buffer);
3350         return r;
3351 }
3352
3353 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3354 {
3355         return VM_FAULT_SIGBUS;
3356 }
3357
3358 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3359 {
3360         int ret;
3361
3362         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3363                 return -EINVAL;
3364         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3365         return ret;
3366 }
3367
3368 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3369                                               u64 ident_addr)
3370 {
3371         kvm->arch.ept_identity_map_addr = ident_addr;
3372         return 0;
3373 }
3374
3375 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3376                                           u32 kvm_nr_mmu_pages)
3377 {
3378         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3379                 return -EINVAL;
3380
3381         mutex_lock(&kvm->slots_lock);
3382
3383         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3384         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3385
3386         mutex_unlock(&kvm->slots_lock);
3387         return 0;
3388 }
3389
3390 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3391 {
3392         return kvm->arch.n_max_mmu_pages;
3393 }
3394
3395 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3396 {
3397         int r;
3398
3399         r = 0;
3400         switch (chip->chip_id) {
3401         case KVM_IRQCHIP_PIC_MASTER:
3402                 memcpy(&chip->chip.pic,
3403                         &pic_irqchip(kvm)->pics[0],
3404                         sizeof(struct kvm_pic_state));
3405                 break;
3406         case KVM_IRQCHIP_PIC_SLAVE:
3407                 memcpy(&chip->chip.pic,
3408                         &pic_irqchip(kvm)->pics[1],
3409                         sizeof(struct kvm_pic_state));
3410                 break;
3411         case KVM_IRQCHIP_IOAPIC:
3412                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3413                 break;
3414         default:
3415                 r = -EINVAL;
3416                 break;
3417         }
3418         return r;
3419 }
3420
3421 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3422 {
3423         int r;
3424
3425         r = 0;
3426         switch (chip->chip_id) {
3427         case KVM_IRQCHIP_PIC_MASTER:
3428                 spin_lock(&pic_irqchip(kvm)->lock);
3429                 memcpy(&pic_irqchip(kvm)->pics[0],
3430                         &chip->chip.pic,
3431                         sizeof(struct kvm_pic_state));
3432                 spin_unlock(&pic_irqchip(kvm)->lock);
3433                 break;
3434         case KVM_IRQCHIP_PIC_SLAVE:
3435                 spin_lock(&pic_irqchip(kvm)->lock);
3436                 memcpy(&pic_irqchip(kvm)->pics[1],
3437                         &chip->chip.pic,
3438                         sizeof(struct kvm_pic_state));
3439                 spin_unlock(&pic_irqchip(kvm)->lock);
3440                 break;
3441         case KVM_IRQCHIP_IOAPIC:
3442                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3443                 break;
3444         default:
3445                 r = -EINVAL;
3446                 break;
3447         }
3448         kvm_pic_update_irq(pic_irqchip(kvm));
3449         return r;
3450 }
3451
3452 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3453 {
3454         int r = 0;
3455
3456         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3457         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3458         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3459         return r;
3460 }
3461
3462 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3463 {
3464         int r = 0;
3465
3466         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3467         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3468         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3469         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3470         return r;
3471 }
3472
3473 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3474 {
3475         int r = 0;
3476
3477         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3478         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3479                 sizeof(ps->channels));
3480         ps->flags = kvm->arch.vpit->pit_state.flags;
3481         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3482         memset(&ps->reserved, 0, sizeof(ps->reserved));
3483         return r;
3484 }
3485
3486 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3487 {
3488         int r = 0, start = 0;
3489         u32 prev_legacy, cur_legacy;
3490         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3491         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3492         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3493         if (!prev_legacy && cur_legacy)
3494                 start = 1;
3495         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3496                sizeof(kvm->arch.vpit->pit_state.channels));
3497         kvm->arch.vpit->pit_state.flags = ps->flags;
3498         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3499         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3500         return r;
3501 }
3502
3503 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3504                                  struct kvm_reinject_control *control)
3505 {
3506         if (!kvm->arch.vpit)
3507                 return -ENXIO;
3508         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3509         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3510         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3511         return 0;
3512 }
3513
3514 /**
3515  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3516  * @kvm: kvm instance
3517  * @log: slot id and address to which we copy the log
3518  *
3519  * We need to keep it in mind that VCPU threads can write to the bitmap
3520  * concurrently.  So, to avoid losing data, we keep the following order for
3521  * each bit:
3522  *
3523  *   1. Take a snapshot of the bit and clear it if needed.
3524  *   2. Write protect the corresponding page.
3525  *   3. Flush TLB's if needed.
3526  *   4. Copy the snapshot to the userspace.
3527  *
3528  * Between 2 and 3, the guest may write to the page using the remaining TLB
3529  * entry.  This is not a problem because the page will be reported dirty at
3530  * step 4 using the snapshot taken before and step 3 ensures that successive
3531  * writes will be logged for the next call.
3532  */
3533 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3534 {
3535         int r;
3536         struct kvm_memory_slot *memslot;
3537         unsigned long n, i;
3538         unsigned long *dirty_bitmap;
3539         unsigned long *dirty_bitmap_buffer;
3540         bool is_dirty = false;
3541
3542         mutex_lock(&kvm->slots_lock);
3543
3544         r = -EINVAL;
3545         if (log->slot >= KVM_USER_MEM_SLOTS)
3546                 goto out;
3547
3548         memslot = id_to_memslot(kvm->memslots, log->slot);
3549
3550         dirty_bitmap = memslot->dirty_bitmap;
3551         r = -ENOENT;
3552         if (!dirty_bitmap)
3553                 goto out;
3554
3555         n = kvm_dirty_bitmap_bytes(memslot);
3556
3557         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3558         memset(dirty_bitmap_buffer, 0, n);
3559
3560         spin_lock(&kvm->mmu_lock);
3561
3562         for (i = 0; i < n / sizeof(long); i++) {
3563                 unsigned long mask;
3564                 gfn_t offset;
3565
3566                 if (!dirty_bitmap[i])
3567                         continue;
3568
3569                 is_dirty = true;
3570
3571                 mask = xchg(&dirty_bitmap[i], 0);
3572                 dirty_bitmap_buffer[i] = mask;
3573
3574                 offset = i * BITS_PER_LONG;
3575                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3576         }
3577         if (is_dirty)
3578                 kvm_flush_remote_tlbs(kvm);
3579
3580         spin_unlock(&kvm->mmu_lock);
3581
3582         r = -EFAULT;
3583         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3584                 goto out;
3585
3586         r = 0;
3587 out:
3588         mutex_unlock(&kvm->slots_lock);
3589         return r;
3590 }
3591
3592 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3593                         bool line_status)
3594 {
3595         if (!irqchip_in_kernel(kvm))
3596                 return -ENXIO;
3597
3598         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3599                                         irq_event->irq, irq_event->level,
3600                                         line_status);
3601         return 0;
3602 }
3603
3604 long kvm_arch_vm_ioctl(struct file *filp,
3605                        unsigned int ioctl, unsigned long arg)
3606 {
3607         struct kvm *kvm = filp->private_data;
3608         void __user *argp = (void __user *)arg;
3609         int r = -ENOTTY;
3610         /*
3611          * This union makes it completely explicit to gcc-3.x
3612          * that these two variables' stack usage should be
3613          * combined, not added together.
3614          */
3615         union {
3616                 struct kvm_pit_state ps;
3617                 struct kvm_pit_state2 ps2;
3618                 struct kvm_pit_config pit_config;
3619         } u;
3620
3621         switch (ioctl) {
3622         case KVM_SET_TSS_ADDR:
3623                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3624                 break;
3625         case KVM_SET_IDENTITY_MAP_ADDR: {
3626                 u64 ident_addr;
3627
3628                 r = -EFAULT;
3629                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3630                         goto out;
3631                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3632                 break;
3633         }
3634         case KVM_SET_NR_MMU_PAGES:
3635                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3636                 break;
3637         case KVM_GET_NR_MMU_PAGES:
3638                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3639                 break;
3640         case KVM_CREATE_IRQCHIP: {
3641                 struct kvm_pic *vpic;
3642
3643                 mutex_lock(&kvm->lock);
3644                 r = -EEXIST;
3645                 if (kvm->arch.vpic)
3646                         goto create_irqchip_unlock;
3647                 r = -EINVAL;
3648                 if (atomic_read(&kvm->online_vcpus))
3649                         goto create_irqchip_unlock;
3650                 r = -ENOMEM;
3651                 vpic = kvm_create_pic(kvm);
3652                 if (vpic) {
3653                         r = kvm_ioapic_init(kvm);
3654                         if (r) {
3655                                 mutex_lock(&kvm->slots_lock);
3656                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3657                                                           &vpic->dev_master);
3658                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3659                                                           &vpic->dev_slave);
3660                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3661                                                           &vpic->dev_eclr);
3662                                 mutex_unlock(&kvm->slots_lock);
3663                                 kfree(vpic);
3664                                 goto create_irqchip_unlock;
3665                         }
3666                 } else
3667                         goto create_irqchip_unlock;
3668                 smp_wmb();
3669                 kvm->arch.vpic = vpic;
3670                 smp_wmb();
3671                 r = kvm_setup_default_irq_routing(kvm);
3672                 if (r) {
3673                         mutex_lock(&kvm->slots_lock);
3674                         mutex_lock(&kvm->irq_lock);
3675                         kvm_ioapic_destroy(kvm);
3676                         kvm_destroy_pic(kvm);
3677                         mutex_unlock(&kvm->irq_lock);
3678                         mutex_unlock(&kvm->slots_lock);
3679                 }
3680         create_irqchip_unlock:
3681                 mutex_unlock(&kvm->lock);
3682                 break;
3683         }
3684         case KVM_CREATE_PIT:
3685                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3686                 goto create_pit;
3687         case KVM_CREATE_PIT2:
3688                 r = -EFAULT;
3689                 if (copy_from_user(&u.pit_config, argp,
3690                                    sizeof(struct kvm_pit_config)))
3691                         goto out;
3692         create_pit:
3693                 mutex_lock(&kvm->slots_lock);
3694                 r = -EEXIST;
3695                 if (kvm->arch.vpit)
3696                         goto create_pit_unlock;
3697                 r = -ENOMEM;
3698                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3699                 if (kvm->arch.vpit)
3700                         r = 0;
3701         create_pit_unlock:
3702                 mutex_unlock(&kvm->slots_lock);
3703                 break;
3704         case KVM_GET_IRQCHIP: {
3705                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3706                 struct kvm_irqchip *chip;
3707
3708                 chip = memdup_user(argp, sizeof(*chip));
3709                 if (IS_ERR(chip)) {
3710                         r = PTR_ERR(chip);
3711                         goto out;
3712                 }
3713
3714                 r = -ENXIO;
3715                 if (!irqchip_in_kernel(kvm))
3716                         goto get_irqchip_out;
3717                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3718                 if (r)
3719                         goto get_irqchip_out;
3720                 r = -EFAULT;
3721                 if (copy_to_user(argp, chip, sizeof *chip))
3722                         goto get_irqchip_out;
3723                 r = 0;
3724         get_irqchip_out:
3725                 kfree(chip);
3726                 break;
3727         }
3728         case KVM_SET_IRQCHIP: {
3729                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3730                 struct kvm_irqchip *chip;
3731
3732                 chip = memdup_user(argp, sizeof(*chip));
3733                 if (IS_ERR(chip)) {
3734                         r = PTR_ERR(chip);
3735                         goto out;
3736                 }
3737
3738                 r = -ENXIO;
3739                 if (!irqchip_in_kernel(kvm))
3740                         goto set_irqchip_out;
3741                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3742                 if (r)
3743                         goto set_irqchip_out;
3744                 r = 0;
3745         set_irqchip_out:
3746                 kfree(chip);
3747                 break;
3748         }
3749         case KVM_GET_PIT: {
3750                 r = -EFAULT;
3751                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3752                         goto out;
3753                 r = -ENXIO;
3754                 if (!kvm->arch.vpit)
3755                         goto out;
3756                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3757                 if (r)
3758                         goto out;
3759                 r = -EFAULT;
3760                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3761                         goto out;
3762                 r = 0;
3763                 break;
3764         }
3765         case KVM_SET_PIT: {
3766                 r = -EFAULT;
3767                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3768                         goto out;
3769                 r = -ENXIO;
3770                 if (!kvm->arch.vpit)
3771                         goto out;
3772                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3773                 break;
3774         }
3775         case KVM_GET_PIT2: {
3776                 r = -ENXIO;
3777                 if (!kvm->arch.vpit)
3778                         goto out;
3779                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3780                 if (r)
3781                         goto out;
3782                 r = -EFAULT;
3783                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3784                         goto out;
3785                 r = 0;
3786                 break;
3787         }
3788         case KVM_SET_PIT2: {
3789                 r = -EFAULT;
3790                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3791                         goto out;
3792                 r = -ENXIO;
3793                 if (!kvm->arch.vpit)
3794                         goto out;
3795                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3796                 break;
3797         }
3798         case KVM_REINJECT_CONTROL: {
3799                 struct kvm_reinject_control control;
3800                 r =  -EFAULT;
3801                 if (copy_from_user(&control, argp, sizeof(control)))
3802                         goto out;
3803                 r = kvm_vm_ioctl_reinject(kvm, &control);
3804                 break;
3805         }
3806         case KVM_XEN_HVM_CONFIG: {
3807                 r = -EFAULT;
3808                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3809                                    sizeof(struct kvm_xen_hvm_config)))
3810                         goto out;
3811                 r = -EINVAL;
3812                 if (kvm->arch.xen_hvm_config.flags)
3813                         goto out;
3814                 r = 0;
3815                 break;
3816         }
3817         case KVM_SET_CLOCK: {
3818                 struct kvm_clock_data user_ns;
3819                 u64 now_ns;
3820                 s64 delta;
3821
3822                 r = -EFAULT;
3823                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3824                         goto out;
3825
3826                 r = -EINVAL;
3827                 if (user_ns.flags)
3828                         goto out;
3829
3830                 r = 0;
3831                 local_irq_disable();
3832                 now_ns = get_kernel_ns();
3833                 delta = user_ns.clock - now_ns;
3834                 local_irq_enable();
3835                 kvm->arch.kvmclock_offset = delta;
3836                 kvm_gen_update_masterclock(kvm);
3837                 break;
3838         }
3839         case KVM_GET_CLOCK: {
3840                 struct kvm_clock_data user_ns;
3841                 u64 now_ns;
3842
3843                 local_irq_disable();
3844                 now_ns = get_kernel_ns();
3845                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3846                 local_irq_enable();
3847                 user_ns.flags = 0;
3848                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3849
3850                 r = -EFAULT;
3851                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3852                         goto out;
3853                 r = 0;
3854                 break;
3855         }
3856
3857         default:
3858                 ;
3859         }
3860 out:
3861         return r;
3862 }
3863
3864 static void kvm_init_msr_list(void)
3865 {
3866         u32 dummy[2];
3867         unsigned i, j;
3868
3869         /* skip the first msrs in the list. KVM-specific */
3870         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3871                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3872                         continue;
3873                 if (j < i)
3874                         msrs_to_save[j] = msrs_to_save[i];
3875                 j++;
3876         }
3877         num_msrs_to_save = j;
3878 }
3879
3880 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3881                            const void *v)
3882 {
3883         int handled = 0;
3884         int n;
3885
3886         do {
3887                 n = min(len, 8);
3888                 if (!(vcpu->arch.apic &&
3889                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3890                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3891                         break;
3892                 handled += n;
3893                 addr += n;
3894                 len -= n;
3895                 v += n;
3896         } while (len);
3897
3898         return handled;
3899 }
3900
3901 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3902 {
3903         int handled = 0;
3904         int n;
3905
3906         do {
3907                 n = min(len, 8);
3908                 if (!(vcpu->arch.apic &&
3909                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3910                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3911                         break;
3912                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3913                 handled += n;
3914                 addr += n;
3915                 len -= n;
3916                 v += n;
3917         } while (len);
3918
3919         return handled;
3920 }
3921
3922 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3923                         struct kvm_segment *var, int seg)
3924 {
3925         kvm_x86_ops->set_segment(vcpu, var, seg);
3926 }
3927
3928 void kvm_get_segment(struct kvm_vcpu *vcpu,
3929                      struct kvm_segment *var, int seg)
3930 {
3931         kvm_x86_ops->get_segment(vcpu, var, seg);
3932 }
3933
3934 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3935 {
3936         gpa_t t_gpa;
3937         struct x86_exception exception;
3938
3939         BUG_ON(!mmu_is_nested(vcpu));
3940
3941         /* NPT walks are always user-walks */
3942         access |= PFERR_USER_MASK;
3943         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3944
3945         return t_gpa;
3946 }
3947
3948 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3949                               struct x86_exception *exception)
3950 {
3951         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3952         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3953 }
3954
3955  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3956                                 struct x86_exception *exception)
3957 {
3958         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3959         access |= PFERR_FETCH_MASK;
3960         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3961 }
3962
3963 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3964                                struct x86_exception *exception)
3965 {
3966         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3967         access |= PFERR_WRITE_MASK;
3968         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3969 }
3970
3971 /* uses this to access any guest's mapped memory without checking CPL */
3972 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3973                                 struct x86_exception *exception)
3974 {
3975         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3976 }
3977
3978 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3979                                       struct kvm_vcpu *vcpu, u32 access,
3980                                       struct x86_exception *exception)
3981 {
3982         void *data = val;
3983         int r = X86EMUL_CONTINUE;
3984
3985         while (bytes) {
3986                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3987                                                             exception);
3988                 unsigned offset = addr & (PAGE_SIZE-1);
3989                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3990                 int ret;
3991
3992                 if (gpa == UNMAPPED_GVA)
3993                         return X86EMUL_PROPAGATE_FAULT;
3994                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3995                 if (ret < 0) {
3996                         r = X86EMUL_IO_NEEDED;
3997                         goto out;
3998                 }
3999
4000                 bytes -= toread;
4001                 data += toread;
4002                 addr += toread;
4003         }
4004 out:
4005         return r;
4006 }
4007
4008 /* used for instruction fetching */
4009 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4010                                 gva_t addr, void *val, unsigned int bytes,
4011                                 struct x86_exception *exception)
4012 {
4013         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4014         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4015
4016         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4017                                           access | PFERR_FETCH_MASK,
4018                                           exception);
4019 }
4020
4021 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4022                                gva_t addr, void *val, unsigned int bytes,
4023                                struct x86_exception *exception)
4024 {
4025         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4026         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4027
4028         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4029                                           exception);
4030 }
4031 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4032
4033 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4034                                       gva_t addr, void *val, unsigned int bytes,
4035                                       struct x86_exception *exception)
4036 {
4037         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4038         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4039 }
4040
4041 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4042                                        gva_t addr, void *val,
4043                                        unsigned int bytes,
4044                                        struct x86_exception *exception)
4045 {
4046         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4047         void *data = val;
4048         int r = X86EMUL_CONTINUE;
4049
4050         while (bytes) {
4051                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4052                                                              PFERR_WRITE_MASK,
4053                                                              exception);
4054                 unsigned offset = addr & (PAGE_SIZE-1);
4055                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4056                 int ret;
4057
4058                 if (gpa == UNMAPPED_GVA)
4059                         return X86EMUL_PROPAGATE_FAULT;
4060                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4061                 if (ret < 0) {
4062                         r = X86EMUL_IO_NEEDED;
4063                         goto out;
4064                 }
4065
4066                 bytes -= towrite;
4067                 data += towrite;
4068                 addr += towrite;
4069         }
4070 out:
4071         return r;
4072 }
4073 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4074
4075 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4076                                 gpa_t *gpa, struct x86_exception *exception,
4077                                 bool write)
4078 {
4079         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4080                 | (write ? PFERR_WRITE_MASK : 0);
4081
4082         if (vcpu_match_mmio_gva(vcpu, gva)
4083             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4084                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4085                                         (gva & (PAGE_SIZE - 1));
4086                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4087                 return 1;
4088         }
4089
4090         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4091
4092         if (*gpa == UNMAPPED_GVA)
4093                 return -1;
4094
4095         /* For APIC access vmexit */
4096         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4097                 return 1;
4098
4099         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4100                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4101                 return 1;
4102         }
4103
4104         return 0;
4105 }
4106
4107 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4108                         const void *val, int bytes)
4109 {
4110         int ret;
4111
4112         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4113         if (ret < 0)
4114                 return 0;
4115         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4116         return 1;
4117 }
4118
4119 struct read_write_emulator_ops {
4120         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4121                                   int bytes);
4122         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4123                                   void *val, int bytes);
4124         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4125                                int bytes, void *val);
4126         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4127                                     void *val, int bytes);
4128         bool write;
4129 };
4130
4131 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4132 {
4133         if (vcpu->mmio_read_completed) {
4134                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4135                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4136                 vcpu->mmio_read_completed = 0;
4137                 return 1;
4138         }
4139
4140         return 0;
4141 }
4142
4143 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4144                         void *val, int bytes)
4145 {
4146         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4147 }
4148
4149 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4150                          void *val, int bytes)
4151 {
4152         return emulator_write_phys(vcpu, gpa, val, bytes);
4153 }
4154
4155 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4156 {
4157         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4158         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4159 }
4160
4161 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4162                           void *val, int bytes)
4163 {
4164         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4165         return X86EMUL_IO_NEEDED;
4166 }
4167
4168 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4169                            void *val, int bytes)
4170 {
4171         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4172
4173         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4174         return X86EMUL_CONTINUE;
4175 }
4176
4177 static const struct read_write_emulator_ops read_emultor = {
4178         .read_write_prepare = read_prepare,
4179         .read_write_emulate = read_emulate,
4180         .read_write_mmio = vcpu_mmio_read,
4181         .read_write_exit_mmio = read_exit_mmio,
4182 };
4183
4184 static const struct read_write_emulator_ops write_emultor = {
4185         .read_write_emulate = write_emulate,
4186         .read_write_mmio = write_mmio,
4187         .read_write_exit_mmio = write_exit_mmio,
4188         .write = true,
4189 };
4190
4191 static int emulator_read_write_onepage(unsigned long addr, void *val,
4192                                        unsigned int bytes,
4193                                        struct x86_exception *exception,
4194                                        struct kvm_vcpu *vcpu,
4195                                        const struct read_write_emulator_ops *ops)
4196 {
4197         gpa_t gpa;
4198         int handled, ret;
4199         bool write = ops->write;
4200         struct kvm_mmio_fragment *frag;
4201
4202         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4203
4204         if (ret < 0)
4205                 return X86EMUL_PROPAGATE_FAULT;
4206
4207         /* For APIC access vmexit */
4208         if (ret)
4209                 goto mmio;
4210
4211         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4212                 return X86EMUL_CONTINUE;
4213
4214 mmio:
4215         /*
4216          * Is this MMIO handled locally?
4217          */
4218         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4219         if (handled == bytes)
4220                 return X86EMUL_CONTINUE;
4221
4222         gpa += handled;
4223         bytes -= handled;
4224         val += handled;
4225
4226         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4227         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4228         frag->gpa = gpa;
4229         frag->data = val;
4230         frag->len = bytes;
4231         return X86EMUL_CONTINUE;
4232 }
4233
4234 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4235                         void *val, unsigned int bytes,
4236                         struct x86_exception *exception,
4237                         const struct read_write_emulator_ops *ops)
4238 {
4239         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4240         gpa_t gpa;
4241         int rc;
4242
4243         if (ops->read_write_prepare &&
4244                   ops->read_write_prepare(vcpu, val, bytes))
4245                 return X86EMUL_CONTINUE;
4246
4247         vcpu->mmio_nr_fragments = 0;
4248
4249         /* Crossing a page boundary? */
4250         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4251                 int now;
4252
4253                 now = -addr & ~PAGE_MASK;
4254                 rc = emulator_read_write_onepage(addr, val, now, exception,
4255                                                  vcpu, ops);
4256
4257                 if (rc != X86EMUL_CONTINUE)
4258                         return rc;
4259                 addr += now;
4260                 val += now;
4261                 bytes -= now;
4262         }
4263
4264         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4265                                          vcpu, ops);
4266         if (rc != X86EMUL_CONTINUE)
4267                 return rc;
4268
4269         if (!vcpu->mmio_nr_fragments)
4270                 return rc;
4271
4272         gpa = vcpu->mmio_fragments[0].gpa;
4273
4274         vcpu->mmio_needed = 1;
4275         vcpu->mmio_cur_fragment = 0;
4276
4277         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4278         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4279         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4280         vcpu->run->mmio.phys_addr = gpa;
4281
4282         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4283 }
4284
4285 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4286                                   unsigned long addr,
4287                                   void *val,
4288                                   unsigned int bytes,
4289                                   struct x86_exception *exception)
4290 {
4291         return emulator_read_write(ctxt, addr, val, bytes,
4292                                    exception, &read_emultor);
4293 }
4294
4295 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4296                             unsigned long addr,
4297                             const void *val,
4298                             unsigned int bytes,
4299                             struct x86_exception *exception)
4300 {
4301         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4302                                    exception, &write_emultor);
4303 }
4304
4305 #define CMPXCHG_TYPE(t, ptr, old, new) \
4306         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4307
4308 #ifdef CONFIG_X86_64
4309 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4310 #else
4311 #  define CMPXCHG64(ptr, old, new) \
4312         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4313 #endif
4314
4315 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4316                                      unsigned long addr,
4317                                      const void *old,
4318                                      const void *new,
4319                                      unsigned int bytes,
4320                                      struct x86_exception *exception)
4321 {
4322         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4323         gpa_t gpa;
4324         struct page *page;
4325         char *kaddr;
4326         bool exchanged;
4327
4328         /* guests cmpxchg8b have to be emulated atomically */
4329         if (bytes > 8 || (bytes & (bytes - 1)))
4330                 goto emul_write;
4331
4332         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4333
4334         if (gpa == UNMAPPED_GVA ||
4335             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4336                 goto emul_write;
4337
4338         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4339                 goto emul_write;
4340
4341         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4342         if (is_error_page(page))
4343                 goto emul_write;
4344
4345         kaddr = kmap_atomic(page);
4346         kaddr += offset_in_page(gpa);
4347         switch (bytes) {
4348         case 1:
4349                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4350                 break;
4351         case 2:
4352                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4353                 break;
4354         case 4:
4355                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4356                 break;
4357         case 8:
4358                 exchanged = CMPXCHG64(kaddr, old, new);
4359                 break;
4360         default:
4361                 BUG();
4362         }
4363         kunmap_atomic(kaddr);
4364         kvm_release_page_dirty(page);
4365
4366         if (!exchanged)
4367                 return X86EMUL_CMPXCHG_FAILED;
4368
4369         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4370
4371         return X86EMUL_CONTINUE;
4372
4373 emul_write:
4374         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4375
4376         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4377 }
4378
4379 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4380 {
4381         /* TODO: String I/O for in kernel device */
4382         int r;
4383
4384         if (vcpu->arch.pio.in)
4385                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4386                                     vcpu->arch.pio.size, pd);
4387         else
4388                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4389                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4390                                      pd);
4391         return r;
4392 }
4393
4394 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4395                                unsigned short port, void *val,
4396                                unsigned int count, bool in)
4397 {
4398         trace_kvm_pio(!in, port, size, count);
4399
4400         vcpu->arch.pio.port = port;
4401         vcpu->arch.pio.in = in;
4402         vcpu->arch.pio.count  = count;
4403         vcpu->arch.pio.size = size;
4404
4405         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4406                 vcpu->arch.pio.count = 0;
4407                 return 1;
4408         }
4409
4410         vcpu->run->exit_reason = KVM_EXIT_IO;
4411         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4412         vcpu->run->io.size = size;
4413         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4414         vcpu->run->io.count = count;
4415         vcpu->run->io.port = port;
4416
4417         return 0;
4418 }
4419
4420 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4421                                     int size, unsigned short port, void *val,
4422                                     unsigned int count)
4423 {
4424         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4425         int ret;
4426
4427         if (vcpu->arch.pio.count)
4428                 goto data_avail;
4429
4430         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4431         if (ret) {
4432 data_avail:
4433                 memcpy(val, vcpu->arch.pio_data, size * count);
4434                 vcpu->arch.pio.count = 0;
4435                 return 1;
4436         }
4437
4438         return 0;
4439 }
4440
4441 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4442                                      int size, unsigned short port,
4443                                      const void *val, unsigned int count)
4444 {
4445         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4446
4447         memcpy(vcpu->arch.pio_data, val, size * count);
4448         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4449 }
4450
4451 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4452 {
4453         return kvm_x86_ops->get_segment_base(vcpu, seg);
4454 }
4455
4456 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4457 {
4458         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4459 }
4460
4461 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4462 {
4463         if (!need_emulate_wbinvd(vcpu))
4464                 return X86EMUL_CONTINUE;
4465
4466         if (kvm_x86_ops->has_wbinvd_exit()) {
4467                 int cpu = get_cpu();
4468
4469                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4470                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4471                                 wbinvd_ipi, NULL, 1);
4472                 put_cpu();
4473                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4474         } else
4475                 wbinvd();
4476         return X86EMUL_CONTINUE;
4477 }
4478 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4479
4480 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4481 {
4482         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4483 }
4484
4485 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4486 {
4487         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4488 }
4489
4490 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4491 {
4492
4493         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4494 }
4495
4496 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4497 {
4498         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4499 }
4500
4501 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4502 {
4503         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4504         unsigned long value;
4505
4506         switch (cr) {
4507         case 0:
4508                 value = kvm_read_cr0(vcpu);
4509                 break;
4510         case 2:
4511                 value = vcpu->arch.cr2;
4512                 break;
4513         case 3:
4514                 value = kvm_read_cr3(vcpu);
4515                 break;
4516         case 4:
4517                 value = kvm_read_cr4(vcpu);
4518                 break;
4519         case 8:
4520                 value = kvm_get_cr8(vcpu);
4521                 break;
4522         default:
4523                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4524                 return 0;
4525         }
4526
4527         return value;
4528 }
4529
4530 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4531 {
4532         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4533         int res = 0;
4534
4535         switch (cr) {
4536         case 0:
4537                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4538                 break;
4539         case 2:
4540                 vcpu->arch.cr2 = val;
4541                 break;
4542         case 3:
4543                 res = kvm_set_cr3(vcpu, val);
4544                 break;
4545         case 4:
4546                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4547                 break;
4548         case 8:
4549                 res = kvm_set_cr8(vcpu, val);
4550                 break;
4551         default:
4552                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4553                 res = -1;
4554         }
4555
4556         return res;
4557 }
4558
4559 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4560 {
4561         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4562 }
4563
4564 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4565 {
4566         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4567 }
4568
4569 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4570 {
4571         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4572 }
4573
4574 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4575 {
4576         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4577 }
4578
4579 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4580 {
4581         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4582 }
4583
4584 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4585 {
4586         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4587 }
4588
4589 static unsigned long emulator_get_cached_segment_base(
4590         struct x86_emulate_ctxt *ctxt, int seg)
4591 {
4592         return get_segment_base(emul_to_vcpu(ctxt), seg);
4593 }
4594
4595 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4596                                  struct desc_struct *desc, u32 *base3,
4597                                  int seg)
4598 {
4599         struct kvm_segment var;
4600
4601         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4602         *selector = var.selector;
4603
4604         if (var.unusable) {
4605                 memset(desc, 0, sizeof(*desc));
4606                 return false;
4607         }
4608
4609         if (var.g)
4610                 var.limit >>= 12;
4611         set_desc_limit(desc, var.limit);
4612         set_desc_base(desc, (unsigned long)var.base);
4613 #ifdef CONFIG_X86_64
4614         if (base3)
4615                 *base3 = var.base >> 32;
4616 #endif
4617         desc->type = var.type;
4618         desc->s = var.s;
4619         desc->dpl = var.dpl;
4620         desc->p = var.present;
4621         desc->avl = var.avl;
4622         desc->l = var.l;
4623         desc->d = var.db;
4624         desc->g = var.g;
4625
4626         return true;
4627 }
4628
4629 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4630                                  struct desc_struct *desc, u32 base3,
4631                                  int seg)
4632 {
4633         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4634         struct kvm_segment var;
4635
4636         var.selector = selector;
4637         var.base = get_desc_base(desc);
4638 #ifdef CONFIG_X86_64
4639         var.base |= ((u64)base3) << 32;
4640 #endif
4641         var.limit = get_desc_limit(desc);
4642         if (desc->g)
4643                 var.limit = (var.limit << 12) | 0xfff;
4644         var.type = desc->type;
4645         var.present = desc->p;
4646         var.dpl = desc->dpl;
4647         var.db = desc->d;
4648         var.s = desc->s;
4649         var.l = desc->l;
4650         var.g = desc->g;
4651         var.avl = desc->avl;
4652         var.present = desc->p;
4653         var.unusable = !var.present;
4654         var.padding = 0;
4655
4656         kvm_set_segment(vcpu, &var, seg);
4657         return;
4658 }
4659
4660 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4661                             u32 msr_index, u64 *pdata)
4662 {
4663         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4664 }
4665
4666 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4667                             u32 msr_index, u64 data)
4668 {
4669         struct msr_data msr;
4670
4671         msr.data = data;
4672         msr.index = msr_index;
4673         msr.host_initiated = false;
4674         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4675 }
4676
4677 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4678                              u32 pmc, u64 *pdata)
4679 {
4680         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4681 }
4682
4683 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4684 {
4685         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4686 }
4687
4688 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4689 {
4690         preempt_disable();
4691         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4692         /*
4693          * CR0.TS may reference the host fpu state, not the guest fpu state,
4694          * so it may be clear at this point.
4695          */
4696         clts();
4697 }
4698
4699 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4700 {
4701         preempt_enable();
4702 }
4703
4704 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4705                               struct x86_instruction_info *info,
4706                               enum x86_intercept_stage stage)
4707 {
4708         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4709 }
4710
4711 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4712                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4713 {
4714         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4715 }
4716
4717 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4718 {
4719         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4720 }
4721
4722 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4723 {
4724         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4725 }
4726
4727 static const struct x86_emulate_ops emulate_ops = {
4728         .read_gpr            = emulator_read_gpr,
4729         .write_gpr           = emulator_write_gpr,
4730         .read_std            = kvm_read_guest_virt_system,
4731         .write_std           = kvm_write_guest_virt_system,
4732         .fetch               = kvm_fetch_guest_virt,
4733         .read_emulated       = emulator_read_emulated,
4734         .write_emulated      = emulator_write_emulated,
4735         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4736         .invlpg              = emulator_invlpg,
4737         .pio_in_emulated     = emulator_pio_in_emulated,
4738         .pio_out_emulated    = emulator_pio_out_emulated,
4739         .get_segment         = emulator_get_segment,
4740         .set_segment         = emulator_set_segment,
4741         .get_cached_segment_base = emulator_get_cached_segment_base,
4742         .get_gdt             = emulator_get_gdt,
4743         .get_idt             = emulator_get_idt,
4744         .set_gdt             = emulator_set_gdt,
4745         .set_idt             = emulator_set_idt,
4746         .get_cr              = emulator_get_cr,
4747         .set_cr              = emulator_set_cr,
4748         .set_rflags          = emulator_set_rflags,
4749         .cpl                 = emulator_get_cpl,
4750         .get_dr              = emulator_get_dr,
4751         .set_dr              = emulator_set_dr,
4752         .set_msr             = emulator_set_msr,
4753         .get_msr             = emulator_get_msr,
4754         .read_pmc            = emulator_read_pmc,
4755         .halt                = emulator_halt,
4756         .wbinvd              = emulator_wbinvd,
4757         .fix_hypercall       = emulator_fix_hypercall,
4758         .get_fpu             = emulator_get_fpu,
4759         .put_fpu             = emulator_put_fpu,
4760         .intercept           = emulator_intercept,
4761         .get_cpuid           = emulator_get_cpuid,
4762 };
4763
4764 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4765 {
4766         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4767         /*
4768          * an sti; sti; sequence only disable interrupts for the first
4769          * instruction. So, if the last instruction, be it emulated or
4770          * not, left the system with the INT_STI flag enabled, it
4771          * means that the last instruction is an sti. We should not
4772          * leave the flag on in this case. The same goes for mov ss
4773          */
4774         if (!(int_shadow & mask))
4775                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4776 }
4777
4778 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4779 {
4780         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4781         if (ctxt->exception.vector == PF_VECTOR)
4782                 kvm_propagate_fault(vcpu, &ctxt->exception);
4783         else if (ctxt->exception.error_code_valid)
4784                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4785                                       ctxt->exception.error_code);
4786         else
4787                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4788 }
4789
4790 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4791 {
4792         memset(&ctxt->opcode_len, 0,
4793                (void *)&ctxt->_regs - (void *)&ctxt->opcode_len);
4794
4795         ctxt->fetch.start = 0;
4796         ctxt->fetch.end = 0;
4797         ctxt->io_read.pos = 0;
4798         ctxt->io_read.end = 0;
4799         ctxt->mem_read.pos = 0;
4800         ctxt->mem_read.end = 0;
4801 }
4802
4803 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4804 {
4805         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4806         int cs_db, cs_l;
4807
4808         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4809
4810         ctxt->eflags = kvm_get_rflags(vcpu);
4811         ctxt->eip = kvm_rip_read(vcpu);
4812         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4813                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4814                      cs_l                               ? X86EMUL_MODE_PROT64 :
4815                      cs_db                              ? X86EMUL_MODE_PROT32 :
4816                                                           X86EMUL_MODE_PROT16;
4817         ctxt->guest_mode = is_guest_mode(vcpu);
4818
4819         init_decode_cache(ctxt);
4820         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4821 }
4822
4823 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4824 {
4825         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4826         int ret;
4827
4828         init_emulate_ctxt(vcpu);
4829
4830         ctxt->op_bytes = 2;
4831         ctxt->ad_bytes = 2;
4832         ctxt->_eip = ctxt->eip + inc_eip;
4833         ret = emulate_int_real(ctxt, irq);
4834
4835         if (ret != X86EMUL_CONTINUE)
4836                 return EMULATE_FAIL;
4837
4838         ctxt->eip = ctxt->_eip;
4839         kvm_rip_write(vcpu, ctxt->eip);
4840         kvm_set_rflags(vcpu, ctxt->eflags);
4841
4842         if (irq == NMI_VECTOR)
4843                 vcpu->arch.nmi_pending = 0;
4844         else
4845                 vcpu->arch.interrupt.pending = false;
4846
4847         return EMULATE_DONE;
4848 }
4849 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4850
4851 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4852 {
4853         int r = EMULATE_DONE;
4854
4855         ++vcpu->stat.insn_emulation_fail;
4856         trace_kvm_emulate_insn_failed(vcpu);
4857         if (!is_guest_mode(vcpu)) {
4858                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4859                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4860                 vcpu->run->internal.ndata = 0;
4861                 r = EMULATE_FAIL;
4862         }
4863         kvm_queue_exception(vcpu, UD_VECTOR);
4864
4865         return r;
4866 }
4867
4868 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4869                                   bool write_fault_to_shadow_pgtable,
4870                                   int emulation_type)
4871 {
4872         gpa_t gpa = cr2;
4873         pfn_t pfn;
4874
4875         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4876                 return false;
4877
4878         if (!vcpu->arch.mmu.direct_map) {
4879                 /*
4880                  * Write permission should be allowed since only
4881                  * write access need to be emulated.
4882                  */
4883                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4884
4885                 /*
4886                  * If the mapping is invalid in guest, let cpu retry
4887                  * it to generate fault.
4888                  */
4889                 if (gpa == UNMAPPED_GVA)
4890                         return true;
4891         }
4892
4893         /*
4894          * Do not retry the unhandleable instruction if it faults on the
4895          * readonly host memory, otherwise it will goto a infinite loop:
4896          * retry instruction -> write #PF -> emulation fail -> retry
4897          * instruction -> ...
4898          */
4899         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4900
4901         /*
4902          * If the instruction failed on the error pfn, it can not be fixed,
4903          * report the error to userspace.
4904          */
4905         if (is_error_noslot_pfn(pfn))
4906                 return false;
4907
4908         kvm_release_pfn_clean(pfn);
4909
4910         /* The instructions are well-emulated on direct mmu. */
4911         if (vcpu->arch.mmu.direct_map) {
4912                 unsigned int indirect_shadow_pages;
4913
4914                 spin_lock(&vcpu->kvm->mmu_lock);
4915                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4916                 spin_unlock(&vcpu->kvm->mmu_lock);
4917
4918                 if (indirect_shadow_pages)
4919                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4920
4921                 return true;
4922         }
4923
4924         /*
4925          * if emulation was due to access to shadowed page table
4926          * and it failed try to unshadow page and re-enter the
4927          * guest to let CPU execute the instruction.
4928          */
4929         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4930
4931         /*
4932          * If the access faults on its page table, it can not
4933          * be fixed by unprotecting shadow page and it should
4934          * be reported to userspace.
4935          */
4936         return !write_fault_to_shadow_pgtable;
4937 }
4938
4939 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4940                               unsigned long cr2,  int emulation_type)
4941 {
4942         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4943         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4944
4945         last_retry_eip = vcpu->arch.last_retry_eip;
4946         last_retry_addr = vcpu->arch.last_retry_addr;
4947
4948         /*
4949          * If the emulation is caused by #PF and it is non-page_table
4950          * writing instruction, it means the VM-EXIT is caused by shadow
4951          * page protected, we can zap the shadow page and retry this
4952          * instruction directly.
4953          *
4954          * Note: if the guest uses a non-page-table modifying instruction
4955          * on the PDE that points to the instruction, then we will unmap
4956          * the instruction and go to an infinite loop. So, we cache the
4957          * last retried eip and the last fault address, if we meet the eip
4958          * and the address again, we can break out of the potential infinite
4959          * loop.
4960          */
4961         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4962
4963         if (!(emulation_type & EMULTYPE_RETRY))
4964                 return false;
4965
4966         if (x86_page_table_writing_insn(ctxt))
4967                 return false;
4968
4969         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4970                 return false;
4971
4972         vcpu->arch.last_retry_eip = ctxt->eip;
4973         vcpu->arch.last_retry_addr = cr2;
4974
4975         if (!vcpu->arch.mmu.direct_map)
4976                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4977
4978         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4979
4980         return true;
4981 }
4982
4983 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4984 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4985
4986 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
4987                                 unsigned long *db)
4988 {
4989         u32 dr6 = 0;
4990         int i;
4991         u32 enable, rwlen;
4992
4993         enable = dr7;
4994         rwlen = dr7 >> 16;
4995         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
4996                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
4997                         dr6 |= (1 << i);
4998         return dr6;
4999 }
5000
5001 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, int *r)
5002 {
5003         struct kvm_run *kvm_run = vcpu->run;
5004
5005         /*
5006          * Use the "raw" value to see if TF was passed to the processor.
5007          * Note that the new value of the flags has not been saved yet.
5008          *
5009          * This is correct even for TF set by the guest, because "the
5010          * processor will not generate this exception after the instruction
5011          * that sets the TF flag".
5012          */
5013         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5014
5015         if (unlikely(rflags & X86_EFLAGS_TF)) {
5016                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5017                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1;
5018                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5019                         kvm_run->debug.arch.exception = DB_VECTOR;
5020                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5021                         *r = EMULATE_USER_EXIT;
5022                 } else {
5023                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5024                         /*
5025                          * "Certain debug exceptions may clear bit 0-3.  The
5026                          * remaining contents of the DR6 register are never
5027                          * cleared by the processor".
5028                          */
5029                         vcpu->arch.dr6 &= ~15;
5030                         vcpu->arch.dr6 |= DR6_BS;
5031                         kvm_queue_exception(vcpu, DB_VECTOR);
5032                 }
5033         }
5034 }
5035
5036 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5037 {
5038         struct kvm_run *kvm_run = vcpu->run;
5039         unsigned long eip = vcpu->arch.emulate_ctxt.eip;
5040         u32 dr6 = 0;
5041
5042         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5043             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5044                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5045                                            vcpu->arch.guest_debug_dr7,
5046                                            vcpu->arch.eff_db);
5047
5048                 if (dr6 != 0) {
5049                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
5050                         kvm_run->debug.arch.pc = kvm_rip_read(vcpu) +
5051                                 get_segment_base(vcpu, VCPU_SREG_CS);
5052
5053                         kvm_run->debug.arch.exception = DB_VECTOR;
5054                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5055                         *r = EMULATE_USER_EXIT;
5056                         return true;
5057                 }
5058         }
5059
5060         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK)) {
5061                 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5062                                            vcpu->arch.dr7,
5063                                            vcpu->arch.db);
5064
5065                 if (dr6 != 0) {
5066                         vcpu->arch.dr6 &= ~15;
5067                         vcpu->arch.dr6 |= dr6;
5068                         kvm_queue_exception(vcpu, DB_VECTOR);
5069                         *r = EMULATE_DONE;
5070                         return true;
5071                 }
5072         }
5073
5074         return false;
5075 }
5076
5077 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5078                             unsigned long cr2,
5079                             int emulation_type,
5080                             void *insn,
5081                             int insn_len)
5082 {
5083         int r;
5084         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5085         bool writeback = true;
5086         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5087
5088         /*
5089          * Clear write_fault_to_shadow_pgtable here to ensure it is
5090          * never reused.
5091          */
5092         vcpu->arch.write_fault_to_shadow_pgtable = false;
5093         kvm_clear_exception_queue(vcpu);
5094
5095         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5096                 init_emulate_ctxt(vcpu);
5097
5098                 /*
5099                  * We will reenter on the same instruction since
5100                  * we do not set complete_userspace_io.  This does not
5101                  * handle watchpoints yet, those would be handled in
5102                  * the emulate_ops.
5103                  */
5104                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5105                         return r;
5106
5107                 ctxt->interruptibility = 0;
5108                 ctxt->have_exception = false;
5109                 ctxt->perm_ok = false;
5110
5111                 ctxt->only_vendor_specific_insn
5112                         = emulation_type & EMULTYPE_TRAP_UD;
5113
5114                 r = x86_decode_insn(ctxt, insn, insn_len);
5115
5116                 trace_kvm_emulate_insn_start(vcpu);
5117                 ++vcpu->stat.insn_emulation;
5118                 if (r != EMULATION_OK)  {
5119                         if (emulation_type & EMULTYPE_TRAP_UD)
5120                                 return EMULATE_FAIL;
5121                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5122                                                 emulation_type))
5123                                 return EMULATE_DONE;
5124                         if (emulation_type & EMULTYPE_SKIP)
5125                                 return EMULATE_FAIL;
5126                         return handle_emulation_failure(vcpu);
5127                 }
5128         }
5129
5130         if (emulation_type & EMULTYPE_SKIP) {
5131                 kvm_rip_write(vcpu, ctxt->_eip);
5132                 return EMULATE_DONE;
5133         }
5134
5135         if (retry_instruction(ctxt, cr2, emulation_type))
5136                 return EMULATE_DONE;
5137
5138         /* this is needed for vmware backdoor interface to work since it
5139            changes registers values  during IO operation */
5140         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5141                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5142                 emulator_invalidate_register_cache(ctxt);
5143         }
5144
5145 restart:
5146         r = x86_emulate_insn(ctxt);
5147
5148         if (r == EMULATION_INTERCEPTED)
5149                 return EMULATE_DONE;
5150
5151         if (r == EMULATION_FAILED) {
5152                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5153                                         emulation_type))
5154                         return EMULATE_DONE;
5155
5156                 return handle_emulation_failure(vcpu);
5157         }
5158
5159         if (ctxt->have_exception) {
5160                 inject_emulated_exception(vcpu);
5161                 r = EMULATE_DONE;
5162         } else if (vcpu->arch.pio.count) {
5163                 if (!vcpu->arch.pio.in) {
5164                         /* FIXME: return into emulator if single-stepping.  */
5165                         vcpu->arch.pio.count = 0;
5166                 } else {
5167                         writeback = false;
5168                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5169                 }
5170                 r = EMULATE_USER_EXIT;
5171         } else if (vcpu->mmio_needed) {
5172                 if (!vcpu->mmio_is_write)
5173                         writeback = false;
5174                 r = EMULATE_USER_EXIT;
5175                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5176         } else if (r == EMULATION_RESTART)
5177                 goto restart;
5178         else
5179                 r = EMULATE_DONE;
5180
5181         if (writeback) {
5182                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5183                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5184                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5185                 kvm_rip_write(vcpu, ctxt->eip);
5186                 if (r == EMULATE_DONE)
5187                         kvm_vcpu_check_singlestep(vcpu, &r);
5188                 kvm_set_rflags(vcpu, ctxt->eflags);
5189         } else
5190                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5191
5192         return r;
5193 }
5194 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5195
5196 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5197 {
5198         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5199         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5200                                             size, port, &val, 1);
5201         /* do not return to emulator after return from userspace */
5202         vcpu->arch.pio.count = 0;
5203         return ret;
5204 }
5205 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5206
5207 static void tsc_bad(void *info)
5208 {
5209         __this_cpu_write(cpu_tsc_khz, 0);
5210 }
5211
5212 static void tsc_khz_changed(void *data)
5213 {
5214         struct cpufreq_freqs *freq = data;
5215         unsigned long khz = 0;
5216
5217         if (data)
5218                 khz = freq->new;
5219         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5220                 khz = cpufreq_quick_get(raw_smp_processor_id());
5221         if (!khz)
5222                 khz = tsc_khz;
5223         __this_cpu_write(cpu_tsc_khz, khz);
5224 }
5225
5226 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5227                                      void *data)
5228 {
5229         struct cpufreq_freqs *freq = data;
5230         struct kvm *kvm;
5231         struct kvm_vcpu *vcpu;
5232         int i, send_ipi = 0;
5233
5234         /*
5235          * We allow guests to temporarily run on slowing clocks,
5236          * provided we notify them after, or to run on accelerating
5237          * clocks, provided we notify them before.  Thus time never
5238          * goes backwards.
5239          *
5240          * However, we have a problem.  We can't atomically update
5241          * the frequency of a given CPU from this function; it is
5242          * merely a notifier, which can be called from any CPU.
5243          * Changing the TSC frequency at arbitrary points in time
5244          * requires a recomputation of local variables related to
5245          * the TSC for each VCPU.  We must flag these local variables
5246          * to be updated and be sure the update takes place with the
5247          * new frequency before any guests proceed.
5248          *
5249          * Unfortunately, the combination of hotplug CPU and frequency
5250          * change creates an intractable locking scenario; the order
5251          * of when these callouts happen is undefined with respect to
5252          * CPU hotplug, and they can race with each other.  As such,
5253          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5254          * undefined; you can actually have a CPU frequency change take
5255          * place in between the computation of X and the setting of the
5256          * variable.  To protect against this problem, all updates of
5257          * the per_cpu tsc_khz variable are done in an interrupt
5258          * protected IPI, and all callers wishing to update the value
5259          * must wait for a synchronous IPI to complete (which is trivial
5260          * if the caller is on the CPU already).  This establishes the
5261          * necessary total order on variable updates.
5262          *
5263          * Note that because a guest time update may take place
5264          * anytime after the setting of the VCPU's request bit, the
5265          * correct TSC value must be set before the request.  However,
5266          * to ensure the update actually makes it to any guest which
5267          * starts running in hardware virtualization between the set
5268          * and the acquisition of the spinlock, we must also ping the
5269          * CPU after setting the request bit.
5270          *
5271          */
5272
5273         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5274                 return 0;
5275         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5276                 return 0;
5277
5278         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5279
5280         spin_lock(&kvm_lock);
5281         list_for_each_entry(kvm, &vm_list, vm_list) {
5282                 kvm_for_each_vcpu(i, vcpu, kvm) {
5283                         if (vcpu->cpu != freq->cpu)
5284                                 continue;
5285                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5286                         if (vcpu->cpu != smp_processor_id())
5287                                 send_ipi = 1;
5288                 }
5289         }
5290         spin_unlock(&kvm_lock);
5291
5292         if (freq->old < freq->new && send_ipi) {
5293                 /*
5294                  * We upscale the frequency.  Must make the guest
5295                  * doesn't see old kvmclock values while running with
5296                  * the new frequency, otherwise we risk the guest sees
5297                  * time go backwards.
5298                  *
5299                  * In case we update the frequency for another cpu
5300                  * (which might be in guest context) send an interrupt
5301                  * to kick the cpu out of guest context.  Next time
5302                  * guest context is entered kvmclock will be updated,
5303                  * so the guest will not see stale values.
5304                  */
5305                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5306         }
5307         return 0;
5308 }
5309
5310 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5311         .notifier_call  = kvmclock_cpufreq_notifier
5312 };
5313
5314 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5315                                         unsigned long action, void *hcpu)
5316 {
5317         unsigned int cpu = (unsigned long)hcpu;
5318
5319         switch (action) {
5320                 case CPU_ONLINE:
5321                 case CPU_DOWN_FAILED:
5322                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5323                         break;
5324                 case CPU_DOWN_PREPARE:
5325                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5326                         break;
5327         }
5328         return NOTIFY_OK;
5329 }
5330
5331 static struct notifier_block kvmclock_cpu_notifier_block = {
5332         .notifier_call  = kvmclock_cpu_notifier,
5333         .priority = -INT_MAX
5334 };
5335
5336 static void kvm_timer_init(void)
5337 {
5338         int cpu;
5339
5340         max_tsc_khz = tsc_khz;
5341         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5342         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5343 #ifdef CONFIG_CPU_FREQ
5344                 struct cpufreq_policy policy;
5345                 memset(&policy, 0, sizeof(policy));
5346                 cpu = get_cpu();
5347                 cpufreq_get_policy(&policy, cpu);
5348                 if (policy.cpuinfo.max_freq)
5349                         max_tsc_khz = policy.cpuinfo.max_freq;
5350                 put_cpu();
5351 #endif
5352                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5353                                           CPUFREQ_TRANSITION_NOTIFIER);
5354         }
5355         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5356         for_each_online_cpu(cpu)
5357                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5358 }
5359
5360 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5361
5362 int kvm_is_in_guest(void)
5363 {
5364         return __this_cpu_read(current_vcpu) != NULL;
5365 }
5366
5367 static int kvm_is_user_mode(void)
5368 {
5369         int user_mode = 3;
5370
5371         if (__this_cpu_read(current_vcpu))
5372                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5373
5374         return user_mode != 0;
5375 }
5376
5377 static unsigned long kvm_get_guest_ip(void)
5378 {
5379         unsigned long ip = 0;
5380
5381         if (__this_cpu_read(current_vcpu))
5382                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5383
5384         return ip;
5385 }
5386
5387 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5388         .is_in_guest            = kvm_is_in_guest,
5389         .is_user_mode           = kvm_is_user_mode,
5390         .get_guest_ip           = kvm_get_guest_ip,
5391 };
5392
5393 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5394 {
5395         __this_cpu_write(current_vcpu, vcpu);
5396 }
5397 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5398
5399 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5400 {
5401         __this_cpu_write(current_vcpu, NULL);
5402 }
5403 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5404
5405 static void kvm_set_mmio_spte_mask(void)
5406 {
5407         u64 mask;
5408         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5409
5410         /*
5411          * Set the reserved bits and the present bit of an paging-structure
5412          * entry to generate page fault with PFER.RSV = 1.
5413          */
5414          /* Mask the reserved physical address bits. */
5415         mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5416
5417         /* Bit 62 is always reserved for 32bit host. */
5418         mask |= 0x3ull << 62;
5419
5420         /* Set the present bit. */
5421         mask |= 1ull;
5422
5423 #ifdef CONFIG_X86_64
5424         /*
5425          * If reserved bit is not supported, clear the present bit to disable
5426          * mmio page fault.
5427          */
5428         if (maxphyaddr == 52)
5429                 mask &= ~1ull;
5430 #endif
5431
5432         kvm_mmu_set_mmio_spte_mask(mask);
5433 }
5434
5435 #ifdef CONFIG_X86_64
5436 static void pvclock_gtod_update_fn(struct work_struct *work)
5437 {
5438         struct kvm *kvm;
5439
5440         struct kvm_vcpu *vcpu;
5441         int i;
5442
5443         spin_lock(&kvm_lock);
5444         list_for_each_entry(kvm, &vm_list, vm_list)
5445                 kvm_for_each_vcpu(i, vcpu, kvm)
5446                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5447         atomic_set(&kvm_guest_has_master_clock, 0);
5448         spin_unlock(&kvm_lock);
5449 }
5450
5451 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5452
5453 /*
5454  * Notification about pvclock gtod data update.
5455  */
5456 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5457                                void *priv)
5458 {
5459         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5460         struct timekeeper *tk = priv;
5461
5462         update_pvclock_gtod(tk);
5463
5464         /* disable master clock if host does not trust, or does not
5465          * use, TSC clocksource
5466          */
5467         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5468             atomic_read(&kvm_guest_has_master_clock) != 0)
5469                 queue_work(system_long_wq, &pvclock_gtod_work);
5470
5471         return 0;
5472 }
5473
5474 static struct notifier_block pvclock_gtod_notifier = {
5475         .notifier_call = pvclock_gtod_notify,
5476 };
5477 #endif
5478
5479 int kvm_arch_init(void *opaque)
5480 {
5481         int r;
5482         struct kvm_x86_ops *ops = opaque;
5483
5484         if (kvm_x86_ops) {
5485                 printk(KERN_ERR "kvm: already loaded the other module\n");
5486                 r = -EEXIST;
5487                 goto out;
5488         }
5489
5490         if (!ops->cpu_has_kvm_support()) {
5491                 printk(KERN_ERR "kvm: no hardware support\n");
5492                 r = -EOPNOTSUPP;
5493                 goto out;
5494         }
5495         if (ops->disabled_by_bios()) {
5496                 printk(KERN_ERR "kvm: disabled by bios\n");
5497                 r = -EOPNOTSUPP;
5498                 goto out;
5499         }
5500
5501         r = -ENOMEM;
5502         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5503         if (!shared_msrs) {
5504                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5505                 goto out;
5506         }
5507
5508         r = kvm_mmu_module_init();
5509         if (r)
5510                 goto out_free_percpu;
5511
5512         kvm_set_mmio_spte_mask();
5513         kvm_init_msr_list();
5514
5515         kvm_x86_ops = ops;
5516         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5517                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5518
5519         kvm_timer_init();
5520
5521         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5522
5523         if (cpu_has_xsave)
5524                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5525
5526         kvm_lapic_init();
5527 #ifdef CONFIG_X86_64
5528         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5529 #endif
5530
5531         return 0;
5532
5533 out_free_percpu:
5534         free_percpu(shared_msrs);
5535 out:
5536         return r;
5537 }
5538
5539 void kvm_arch_exit(void)
5540 {
5541         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5542
5543         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5544                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5545                                             CPUFREQ_TRANSITION_NOTIFIER);
5546         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5547 #ifdef CONFIG_X86_64
5548         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5549 #endif
5550         kvm_x86_ops = NULL;
5551         kvm_mmu_module_exit();
5552         free_percpu(shared_msrs);
5553 }
5554
5555 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5556 {
5557         ++vcpu->stat.halt_exits;
5558         if (irqchip_in_kernel(vcpu->kvm)) {
5559                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5560                 return 1;
5561         } else {
5562                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5563                 return 0;
5564         }
5565 }
5566 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5567
5568 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5569 {
5570         u64 param, ingpa, outgpa, ret;
5571         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5572         bool fast, longmode;
5573         int cs_db, cs_l;
5574
5575         /*
5576          * hypercall generates UD from non zero cpl and real mode
5577          * per HYPER-V spec
5578          */
5579         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5580                 kvm_queue_exception(vcpu, UD_VECTOR);
5581                 return 0;
5582         }
5583
5584         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5585         longmode = is_long_mode(vcpu) && cs_l == 1;
5586
5587         if (!longmode) {
5588                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5589                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5590                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5591                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5592                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5593                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5594         }
5595 #ifdef CONFIG_X86_64
5596         else {
5597                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5598                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5599                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5600         }
5601 #endif
5602
5603         code = param & 0xffff;
5604         fast = (param >> 16) & 0x1;
5605         rep_cnt = (param >> 32) & 0xfff;
5606         rep_idx = (param >> 48) & 0xfff;
5607
5608         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5609
5610         switch (code) {
5611         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5612                 kvm_vcpu_on_spin(vcpu);
5613                 break;
5614         default:
5615                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5616                 break;
5617         }
5618
5619         ret = res | (((u64)rep_done & 0xfff) << 32);
5620         if (longmode) {
5621                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5622         } else {
5623                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5624                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5625         }
5626
5627         return 1;
5628 }
5629
5630 /*
5631  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5632  *
5633  * @apicid - apicid of vcpu to be kicked.
5634  */
5635 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5636 {
5637         struct kvm_lapic_irq lapic_irq;
5638
5639         lapic_irq.shorthand = 0;
5640         lapic_irq.dest_mode = 0;
5641         lapic_irq.dest_id = apicid;
5642
5643         lapic_irq.delivery_mode = APIC_DM_REMRD;
5644         kvm_irq_delivery_to_apic(kvm, 0, &lapic_irq, NULL);
5645 }
5646
5647 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5648 {
5649         unsigned long nr, a0, a1, a2, a3, ret;
5650         int r = 1;
5651
5652         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5653                 return kvm_hv_hypercall(vcpu);
5654
5655         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5656         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5657         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5658         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5659         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5660
5661         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5662
5663         if (!is_long_mode(vcpu)) {
5664                 nr &= 0xFFFFFFFF;
5665                 a0 &= 0xFFFFFFFF;
5666                 a1 &= 0xFFFFFFFF;
5667                 a2 &= 0xFFFFFFFF;
5668                 a3 &= 0xFFFFFFFF;
5669         }
5670
5671         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5672                 ret = -KVM_EPERM;
5673                 goto out;
5674         }
5675
5676         switch (nr) {
5677         case KVM_HC_VAPIC_POLL_IRQ:
5678                 ret = 0;
5679                 break;
5680         case KVM_HC_KICK_CPU:
5681                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5682                 ret = 0;
5683                 break;
5684         default:
5685                 ret = -KVM_ENOSYS;
5686                 break;
5687         }
5688 out:
5689         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5690         ++vcpu->stat.hypercalls;
5691         return r;
5692 }
5693 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5694
5695 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5696 {
5697         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5698         char instruction[3];
5699         unsigned long rip = kvm_rip_read(vcpu);
5700
5701         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5702
5703         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5704 }
5705
5706 /*
5707  * Check if userspace requested an interrupt window, and that the
5708  * interrupt window is open.
5709  *
5710  * No need to exit to userspace if we already have an interrupt queued.
5711  */
5712 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5713 {
5714         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5715                 vcpu->run->request_interrupt_window &&
5716                 kvm_arch_interrupt_allowed(vcpu));
5717 }
5718
5719 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5720 {
5721         struct kvm_run *kvm_run = vcpu->run;
5722
5723         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5724         kvm_run->cr8 = kvm_get_cr8(vcpu);
5725         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5726         if (irqchip_in_kernel(vcpu->kvm))
5727                 kvm_run->ready_for_interrupt_injection = 1;
5728         else
5729                 kvm_run->ready_for_interrupt_injection =
5730                         kvm_arch_interrupt_allowed(vcpu) &&
5731                         !kvm_cpu_has_interrupt(vcpu) &&
5732                         !kvm_event_needs_reinjection(vcpu);
5733 }
5734
5735 static int vapic_enter(struct kvm_vcpu *vcpu)
5736 {
5737         struct kvm_lapic *apic = vcpu->arch.apic;
5738         struct page *page;
5739
5740         if (!apic || !apic->vapic_addr)
5741                 return 0;
5742
5743         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5744         if (is_error_page(page))
5745                 return -EFAULT;
5746
5747         vcpu->arch.apic->vapic_page = page;
5748         return 0;
5749 }
5750
5751 static void vapic_exit(struct kvm_vcpu *vcpu)
5752 {
5753         struct kvm_lapic *apic = vcpu->arch.apic;
5754         int idx;
5755
5756         if (!apic || !apic->vapic_addr)
5757                 return;
5758
5759         idx = srcu_read_lock(&vcpu->kvm->srcu);
5760         kvm_release_page_dirty(apic->vapic_page);
5761         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5762         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5763 }
5764
5765 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5766 {
5767         int max_irr, tpr;
5768
5769         if (!kvm_x86_ops->update_cr8_intercept)
5770                 return;
5771
5772         if (!vcpu->arch.apic)
5773                 return;
5774
5775         if (!vcpu->arch.apic->vapic_addr)
5776                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5777         else
5778                 max_irr = -1;
5779
5780         if (max_irr != -1)
5781                 max_irr >>= 4;
5782
5783         tpr = kvm_lapic_get_cr8(vcpu);
5784
5785         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5786 }
5787
5788 static void inject_pending_event(struct kvm_vcpu *vcpu)
5789 {
5790         /* try to reinject previous events if any */
5791         if (vcpu->arch.exception.pending) {
5792                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5793                                         vcpu->arch.exception.has_error_code,
5794                                         vcpu->arch.exception.error_code);
5795                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5796                                           vcpu->arch.exception.has_error_code,
5797                                           vcpu->arch.exception.error_code,
5798                                           vcpu->arch.exception.reinject);
5799                 return;
5800         }
5801
5802         if (vcpu->arch.nmi_injected) {
5803                 kvm_x86_ops->set_nmi(vcpu);
5804                 return;
5805         }
5806
5807         if (vcpu->arch.interrupt.pending) {
5808                 kvm_x86_ops->set_irq(vcpu);
5809                 return;
5810         }
5811
5812         /* try to inject new event if pending */
5813         if (vcpu->arch.nmi_pending) {
5814                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5815                         --vcpu->arch.nmi_pending;
5816                         vcpu->arch.nmi_injected = true;
5817                         kvm_x86_ops->set_nmi(vcpu);
5818                 }
5819         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5820                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5821                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5822                                             false);
5823                         kvm_x86_ops->set_irq(vcpu);
5824                 }
5825         }
5826 }
5827
5828 static void process_nmi(struct kvm_vcpu *vcpu)
5829 {
5830         unsigned limit = 2;
5831
5832         /*
5833          * x86 is limited to one NMI running, and one NMI pending after it.
5834          * If an NMI is already in progress, limit further NMIs to just one.
5835          * Otherwise, allow two (and we'll inject the first one immediately).
5836          */
5837         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5838                 limit = 1;
5839
5840         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5841         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5842         kvm_make_request(KVM_REQ_EVENT, vcpu);
5843 }
5844
5845 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5846 {
5847         u64 eoi_exit_bitmap[4];
5848         u32 tmr[8];
5849
5850         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5851                 return;
5852
5853         memset(eoi_exit_bitmap, 0, 32);
5854         memset(tmr, 0, 32);
5855
5856         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5857         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5858         kvm_apic_update_tmr(vcpu, tmr);
5859 }
5860
5861 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5862 {
5863         int r;
5864         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5865                 vcpu->run->request_interrupt_window;
5866         bool req_immediate_exit = false;
5867
5868         if (vcpu->requests) {
5869                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5870                         kvm_mmu_unload(vcpu);
5871                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5872                         __kvm_migrate_timers(vcpu);
5873                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5874                         kvm_gen_update_masterclock(vcpu->kvm);
5875                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5876                         kvm_gen_kvmclock_update(vcpu);
5877                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5878                         r = kvm_guest_time_update(vcpu);
5879                         if (unlikely(r))
5880                                 goto out;
5881                 }
5882                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5883                         kvm_mmu_sync_roots(vcpu);
5884                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5885                         kvm_x86_ops->tlb_flush(vcpu);
5886                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5887                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5888                         r = 0;
5889                         goto out;
5890                 }
5891                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5892                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5893                         r = 0;
5894                         goto out;
5895                 }
5896                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5897                         vcpu->fpu_active = 0;
5898                         kvm_x86_ops->fpu_deactivate(vcpu);
5899                 }
5900                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5901                         /* Page is swapped out. Do synthetic halt */
5902                         vcpu->arch.apf.halted = true;
5903                         r = 1;
5904                         goto out;
5905                 }
5906                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5907                         record_steal_time(vcpu);
5908                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5909                         process_nmi(vcpu);
5910                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5911                         kvm_handle_pmu_event(vcpu);
5912                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5913                         kvm_deliver_pmi(vcpu);
5914                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5915                         vcpu_scan_ioapic(vcpu);
5916         }
5917
5918         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5919                 kvm_apic_accept_events(vcpu);
5920                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5921                         r = 1;
5922                         goto out;
5923                 }
5924
5925                 inject_pending_event(vcpu);
5926
5927                 /* enable NMI/IRQ window open exits if needed */
5928                 if (vcpu->arch.nmi_pending)
5929                         req_immediate_exit =
5930                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5931                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5932                         req_immediate_exit =
5933                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5934
5935                 if (kvm_lapic_enabled(vcpu)) {
5936                         /*
5937                          * Update architecture specific hints for APIC
5938                          * virtual interrupt delivery.
5939                          */
5940                         if (kvm_x86_ops->hwapic_irr_update)
5941                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5942                                         kvm_lapic_find_highest_irr(vcpu));
5943                         update_cr8_intercept(vcpu);
5944                         kvm_lapic_sync_to_vapic(vcpu);
5945                 }
5946         }
5947
5948         r = kvm_mmu_reload(vcpu);
5949         if (unlikely(r)) {
5950                 goto cancel_injection;
5951         }
5952
5953         preempt_disable();
5954
5955         kvm_x86_ops->prepare_guest_switch(vcpu);
5956         if (vcpu->fpu_active)
5957                 kvm_load_guest_fpu(vcpu);
5958         kvm_load_guest_xcr0(vcpu);
5959
5960         vcpu->mode = IN_GUEST_MODE;
5961
5962         /* We should set ->mode before check ->requests,
5963          * see the comment in make_all_cpus_request.
5964          */
5965         smp_mb();
5966
5967         local_irq_disable();
5968
5969         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5970             || need_resched() || signal_pending(current)) {
5971                 vcpu->mode = OUTSIDE_GUEST_MODE;
5972                 smp_wmb();
5973                 local_irq_enable();
5974                 preempt_enable();
5975                 r = 1;
5976                 goto cancel_injection;
5977         }
5978
5979         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5980
5981         if (req_immediate_exit)
5982                 smp_send_reschedule(vcpu->cpu);
5983
5984         kvm_guest_enter();
5985
5986         if (unlikely(vcpu->arch.switch_db_regs)) {
5987                 set_debugreg(0, 7);
5988                 set_debugreg(vcpu->arch.eff_db[0], 0);
5989                 set_debugreg(vcpu->arch.eff_db[1], 1);
5990                 set_debugreg(vcpu->arch.eff_db[2], 2);
5991                 set_debugreg(vcpu->arch.eff_db[3], 3);
5992         }
5993
5994         trace_kvm_entry(vcpu->vcpu_id);
5995         kvm_x86_ops->run(vcpu);
5996
5997         /*
5998          * If the guest has used debug registers, at least dr7
5999          * will be disabled while returning to the host.
6000          * If we don't have active breakpoints in the host, we don't
6001          * care about the messed up debug address registers. But if
6002          * we have some of them active, restore the old state.
6003          */
6004         if (hw_breakpoint_active())
6005                 hw_breakpoint_restore();
6006
6007         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6008                                                            native_read_tsc());
6009
6010         vcpu->mode = OUTSIDE_GUEST_MODE;
6011         smp_wmb();
6012
6013         /* Interrupt is enabled by handle_external_intr() */
6014         kvm_x86_ops->handle_external_intr(vcpu);
6015
6016         ++vcpu->stat.exits;
6017
6018         /*
6019          * We must have an instruction between local_irq_enable() and
6020          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6021          * the interrupt shadow.  The stat.exits increment will do nicely.
6022          * But we need to prevent reordering, hence this barrier():
6023          */
6024         barrier();
6025
6026         kvm_guest_exit();
6027
6028         preempt_enable();
6029
6030         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6031
6032         /*
6033          * Profile KVM exit RIPs:
6034          */
6035         if (unlikely(prof_on == KVM_PROFILING)) {
6036                 unsigned long rip = kvm_rip_read(vcpu);
6037                 profile_hit(KVM_PROFILING, (void *)rip);
6038         }
6039
6040         if (unlikely(vcpu->arch.tsc_always_catchup))
6041                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6042
6043         if (vcpu->arch.apic_attention)
6044                 kvm_lapic_sync_from_vapic(vcpu);
6045
6046         r = kvm_x86_ops->handle_exit(vcpu);
6047         return r;
6048
6049 cancel_injection:
6050         kvm_x86_ops->cancel_injection(vcpu);
6051         if (unlikely(vcpu->arch.apic_attention))
6052                 kvm_lapic_sync_from_vapic(vcpu);
6053 out:
6054         return r;
6055 }
6056
6057
6058 static int __vcpu_run(struct kvm_vcpu *vcpu)
6059 {
6060         int r;
6061         struct kvm *kvm = vcpu->kvm;
6062
6063         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6064         r = vapic_enter(vcpu);
6065         if (r) {
6066                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6067                 return r;
6068         }
6069
6070         r = 1;
6071         while (r > 0) {
6072                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6073                     !vcpu->arch.apf.halted)
6074                         r = vcpu_enter_guest(vcpu);
6075                 else {
6076                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6077                         kvm_vcpu_block(vcpu);
6078                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6079                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
6080                                 kvm_apic_accept_events(vcpu);
6081                                 switch(vcpu->arch.mp_state) {
6082                                 case KVM_MP_STATE_HALTED:
6083                                         vcpu->arch.pv.pv_unhalted = false;
6084                                         vcpu->arch.mp_state =
6085                                                 KVM_MP_STATE_RUNNABLE;
6086                                 case KVM_MP_STATE_RUNNABLE:
6087                                         vcpu->arch.apf.halted = false;
6088                                         break;
6089                                 case KVM_MP_STATE_INIT_RECEIVED:
6090                                         break;
6091                                 default:
6092                                         r = -EINTR;
6093                                         break;
6094                                 }
6095                         }
6096                 }
6097
6098                 if (r <= 0)
6099                         break;
6100
6101                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6102                 if (kvm_cpu_has_pending_timer(vcpu))
6103                         kvm_inject_pending_timer_irqs(vcpu);
6104
6105                 if (dm_request_for_irq_injection(vcpu)) {
6106                         r = -EINTR;
6107                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6108                         ++vcpu->stat.request_irq_exits;
6109                 }
6110
6111                 kvm_check_async_pf_completion(vcpu);
6112
6113                 if (signal_pending(current)) {
6114                         r = -EINTR;
6115                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6116                         ++vcpu->stat.signal_exits;
6117                 }
6118                 if (need_resched()) {
6119                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6120                         kvm_resched(vcpu);
6121                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6122                 }
6123         }
6124
6125         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6126
6127         vapic_exit(vcpu);
6128
6129         return r;
6130 }
6131
6132 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6133 {
6134         int r;
6135         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6136         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6137         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6138         if (r != EMULATE_DONE)
6139                 return 0;
6140         return 1;
6141 }
6142
6143 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6144 {
6145         BUG_ON(!vcpu->arch.pio.count);
6146
6147         return complete_emulated_io(vcpu);
6148 }
6149
6150 /*
6151  * Implements the following, as a state machine:
6152  *
6153  * read:
6154  *   for each fragment
6155  *     for each mmio piece in the fragment
6156  *       write gpa, len
6157  *       exit
6158  *       copy data
6159  *   execute insn
6160  *
6161  * write:
6162  *   for each fragment
6163  *     for each mmio piece in the fragment
6164  *       write gpa, len
6165  *       copy data
6166  *       exit
6167  */
6168 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6169 {
6170         struct kvm_run *run = vcpu->run;
6171         struct kvm_mmio_fragment *frag;
6172         unsigned len;
6173
6174         BUG_ON(!vcpu->mmio_needed);
6175
6176         /* Complete previous fragment */
6177         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6178         len = min(8u, frag->len);
6179         if (!vcpu->mmio_is_write)
6180                 memcpy(frag->data, run->mmio.data, len);
6181
6182         if (frag->len <= 8) {
6183                 /* Switch to the next fragment. */
6184                 frag++;
6185                 vcpu->mmio_cur_fragment++;
6186         } else {
6187                 /* Go forward to the next mmio piece. */
6188                 frag->data += len;
6189                 frag->gpa += len;
6190                 frag->len -= len;
6191         }
6192
6193         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6194                 vcpu->mmio_needed = 0;
6195
6196                 /* FIXME: return into emulator if single-stepping.  */
6197                 if (vcpu->mmio_is_write)
6198                         return 1;
6199                 vcpu->mmio_read_completed = 1;
6200                 return complete_emulated_io(vcpu);
6201         }
6202
6203         run->exit_reason = KVM_EXIT_MMIO;
6204         run->mmio.phys_addr = frag->gpa;
6205         if (vcpu->mmio_is_write)
6206                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6207         run->mmio.len = min(8u, frag->len);
6208         run->mmio.is_write = vcpu->mmio_is_write;
6209         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6210         return 0;
6211 }
6212
6213
6214 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6215 {
6216         int r;
6217         sigset_t sigsaved;
6218
6219         if (!tsk_used_math(current) && init_fpu(current))
6220                 return -ENOMEM;
6221
6222         if (vcpu->sigset_active)
6223                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6224
6225         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6226                 kvm_vcpu_block(vcpu);
6227                 kvm_apic_accept_events(vcpu);
6228                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6229                 r = -EAGAIN;
6230                 goto out;
6231         }
6232
6233         /* re-sync apic's tpr */
6234         if (!irqchip_in_kernel(vcpu->kvm)) {
6235                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6236                         r = -EINVAL;
6237                         goto out;
6238                 }
6239         }
6240
6241         if (unlikely(vcpu->arch.complete_userspace_io)) {
6242                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6243                 vcpu->arch.complete_userspace_io = NULL;
6244                 r = cui(vcpu);
6245                 if (r <= 0)
6246                         goto out;
6247         } else
6248                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6249
6250         r = __vcpu_run(vcpu);
6251
6252 out:
6253         post_kvm_run_save(vcpu);
6254         if (vcpu->sigset_active)
6255                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6256
6257         return r;
6258 }
6259
6260 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6261 {
6262         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6263                 /*
6264                  * We are here if userspace calls get_regs() in the middle of
6265                  * instruction emulation. Registers state needs to be copied
6266                  * back from emulation context to vcpu. Userspace shouldn't do
6267                  * that usually, but some bad designed PV devices (vmware
6268                  * backdoor interface) need this to work
6269                  */
6270                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6271                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6272         }
6273         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6274         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6275         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6276         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6277         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6278         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6279         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6280         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6281 #ifdef CONFIG_X86_64
6282         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6283         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6284         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6285         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6286         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6287         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6288         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6289         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6290 #endif
6291
6292         regs->rip = kvm_rip_read(vcpu);
6293         regs->rflags = kvm_get_rflags(vcpu);
6294
6295         return 0;
6296 }
6297
6298 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6299 {
6300         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6301         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6302
6303         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6304         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6305         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6306         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6307         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6308         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6309         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6310         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6311 #ifdef CONFIG_X86_64
6312         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6313         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6314         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6315         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6316         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6317         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6318         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6319         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6320 #endif
6321
6322         kvm_rip_write(vcpu, regs->rip);
6323         kvm_set_rflags(vcpu, regs->rflags);
6324
6325         vcpu->arch.exception.pending = false;
6326
6327         kvm_make_request(KVM_REQ_EVENT, vcpu);
6328
6329         return 0;
6330 }
6331
6332 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6333 {
6334         struct kvm_segment cs;
6335
6336         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6337         *db = cs.db;
6338         *l = cs.l;
6339 }
6340 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6341
6342 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6343                                   struct kvm_sregs *sregs)
6344 {
6345         struct desc_ptr dt;
6346
6347         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6348         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6349         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6350         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6351         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6352         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6353
6354         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6355         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6356
6357         kvm_x86_ops->get_idt(vcpu, &dt);
6358         sregs->idt.limit = dt.size;
6359         sregs->idt.base = dt.address;
6360         kvm_x86_ops->get_gdt(vcpu, &dt);
6361         sregs->gdt.limit = dt.size;
6362         sregs->gdt.base = dt.address;
6363
6364         sregs->cr0 = kvm_read_cr0(vcpu);
6365         sregs->cr2 = vcpu->arch.cr2;
6366         sregs->cr3 = kvm_read_cr3(vcpu);
6367         sregs->cr4 = kvm_read_cr4(vcpu);
6368         sregs->cr8 = kvm_get_cr8(vcpu);
6369         sregs->efer = vcpu->arch.efer;
6370         sregs->apic_base = kvm_get_apic_base(vcpu);
6371
6372         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6373
6374         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6375                 set_bit(vcpu->arch.interrupt.nr,
6376                         (unsigned long *)sregs->interrupt_bitmap);
6377
6378         return 0;
6379 }
6380
6381 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6382                                     struct kvm_mp_state *mp_state)
6383 {
6384         kvm_apic_accept_events(vcpu);
6385         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6386                                         vcpu->arch.pv.pv_unhalted)
6387                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6388         else
6389                 mp_state->mp_state = vcpu->arch.mp_state;
6390
6391         return 0;
6392 }
6393
6394 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6395                                     struct kvm_mp_state *mp_state)
6396 {
6397         if (!kvm_vcpu_has_lapic(vcpu) &&
6398             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6399                 return -EINVAL;
6400
6401         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6402                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6403                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6404         } else
6405                 vcpu->arch.mp_state = mp_state->mp_state;
6406         kvm_make_request(KVM_REQ_EVENT, vcpu);
6407         return 0;
6408 }
6409
6410 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6411                     int reason, bool has_error_code, u32 error_code)
6412 {
6413         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6414         int ret;
6415
6416         init_emulate_ctxt(vcpu);
6417
6418         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6419                                    has_error_code, error_code);
6420
6421         if (ret)
6422                 return EMULATE_FAIL;
6423
6424         kvm_rip_write(vcpu, ctxt->eip);
6425         kvm_set_rflags(vcpu, ctxt->eflags);
6426         kvm_make_request(KVM_REQ_EVENT, vcpu);
6427         return EMULATE_DONE;
6428 }
6429 EXPORT_SYMBOL_GPL(kvm_task_switch);
6430
6431 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6432                                   struct kvm_sregs *sregs)
6433 {
6434         int mmu_reset_needed = 0;
6435         int pending_vec, max_bits, idx;
6436         struct desc_ptr dt;
6437
6438         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6439                 return -EINVAL;
6440
6441         dt.size = sregs->idt.limit;
6442         dt.address = sregs->idt.base;
6443         kvm_x86_ops->set_idt(vcpu, &dt);
6444         dt.size = sregs->gdt.limit;
6445         dt.address = sregs->gdt.base;
6446         kvm_x86_ops->set_gdt(vcpu, &dt);
6447
6448         vcpu->arch.cr2 = sregs->cr2;
6449         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6450         vcpu->arch.cr3 = sregs->cr3;
6451         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6452
6453         kvm_set_cr8(vcpu, sregs->cr8);
6454
6455         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6456         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6457         kvm_set_apic_base(vcpu, sregs->apic_base);
6458
6459         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6460         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6461         vcpu->arch.cr0 = sregs->cr0;
6462
6463         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6464         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6465         if (sregs->cr4 & X86_CR4_OSXSAVE)
6466                 kvm_update_cpuid(vcpu);
6467
6468         idx = srcu_read_lock(&vcpu->kvm->srcu);
6469         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6470                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6471                 mmu_reset_needed = 1;
6472         }
6473         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6474
6475         if (mmu_reset_needed)
6476                 kvm_mmu_reset_context(vcpu);
6477
6478         max_bits = KVM_NR_INTERRUPTS;
6479         pending_vec = find_first_bit(
6480                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6481         if (pending_vec < max_bits) {
6482                 kvm_queue_interrupt(vcpu, pending_vec, false);
6483                 pr_debug("Set back pending irq %d\n", pending_vec);
6484         }
6485
6486         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6487         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6488         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6489         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6490         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6491         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6492
6493         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6494         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6495
6496         update_cr8_intercept(vcpu);
6497
6498         /* Older userspace won't unhalt the vcpu on reset. */
6499         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6500             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6501             !is_protmode(vcpu))
6502                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6503
6504         kvm_make_request(KVM_REQ_EVENT, vcpu);
6505
6506         return 0;
6507 }
6508
6509 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6510                                         struct kvm_guest_debug *dbg)
6511 {
6512         unsigned long rflags;
6513         int i, r;
6514
6515         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6516                 r = -EBUSY;
6517                 if (vcpu->arch.exception.pending)
6518                         goto out;
6519                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6520                         kvm_queue_exception(vcpu, DB_VECTOR);
6521                 else
6522                         kvm_queue_exception(vcpu, BP_VECTOR);
6523         }
6524
6525         /*
6526          * Read rflags as long as potentially injected trace flags are still
6527          * filtered out.
6528          */
6529         rflags = kvm_get_rflags(vcpu);
6530
6531         vcpu->guest_debug = dbg->control;
6532         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6533                 vcpu->guest_debug = 0;
6534
6535         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6536                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6537                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6538                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6539         } else {
6540                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6541                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6542         }
6543         kvm_update_dr7(vcpu);
6544
6545         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6546                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6547                         get_segment_base(vcpu, VCPU_SREG_CS);
6548
6549         /*
6550          * Trigger an rflags update that will inject or remove the trace
6551          * flags.
6552          */
6553         kvm_set_rflags(vcpu, rflags);
6554
6555         kvm_x86_ops->update_db_bp_intercept(vcpu);
6556
6557         r = 0;
6558
6559 out:
6560
6561         return r;
6562 }
6563
6564 /*
6565  * Translate a guest virtual address to a guest physical address.
6566  */
6567 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6568                                     struct kvm_translation *tr)
6569 {
6570         unsigned long vaddr = tr->linear_address;
6571         gpa_t gpa;
6572         int idx;
6573
6574         idx = srcu_read_lock(&vcpu->kvm->srcu);
6575         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6576         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6577         tr->physical_address = gpa;
6578         tr->valid = gpa != UNMAPPED_GVA;
6579         tr->writeable = 1;
6580         tr->usermode = 0;
6581
6582         return 0;
6583 }
6584
6585 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6586 {
6587         struct i387_fxsave_struct *fxsave =
6588                         &vcpu->arch.guest_fpu.state->fxsave;
6589
6590         memcpy(fpu->fpr, fxsave->st_space, 128);
6591         fpu->fcw = fxsave->cwd;
6592         fpu->fsw = fxsave->swd;
6593         fpu->ftwx = fxsave->twd;
6594         fpu->last_opcode = fxsave->fop;
6595         fpu->last_ip = fxsave->rip;
6596         fpu->last_dp = fxsave->rdp;
6597         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6598
6599         return 0;
6600 }
6601
6602 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6603 {
6604         struct i387_fxsave_struct *fxsave =
6605                         &vcpu->arch.guest_fpu.state->fxsave;
6606
6607         memcpy(fxsave->st_space, fpu->fpr, 128);
6608         fxsave->cwd = fpu->fcw;
6609         fxsave->swd = fpu->fsw;
6610         fxsave->twd = fpu->ftwx;
6611         fxsave->fop = fpu->last_opcode;
6612         fxsave->rip = fpu->last_ip;
6613         fxsave->rdp = fpu->last_dp;
6614         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6615
6616         return 0;
6617 }
6618
6619 int fx_init(struct kvm_vcpu *vcpu)
6620 {
6621         int err;
6622
6623         err = fpu_alloc(&vcpu->arch.guest_fpu);
6624         if (err)
6625                 return err;
6626
6627         fpu_finit(&vcpu->arch.guest_fpu);
6628
6629         /*
6630          * Ensure guest xcr0 is valid for loading
6631          */
6632         vcpu->arch.xcr0 = XSTATE_FP;
6633
6634         vcpu->arch.cr0 |= X86_CR0_ET;
6635
6636         return 0;
6637 }
6638 EXPORT_SYMBOL_GPL(fx_init);
6639
6640 static void fx_free(struct kvm_vcpu *vcpu)
6641 {
6642         fpu_free(&vcpu->arch.guest_fpu);
6643 }
6644
6645 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6646 {
6647         if (vcpu->guest_fpu_loaded)
6648                 return;
6649
6650         /*
6651          * Restore all possible states in the guest,
6652          * and assume host would use all available bits.
6653          * Guest xcr0 would be loaded later.
6654          */
6655         kvm_put_guest_xcr0(vcpu);
6656         vcpu->guest_fpu_loaded = 1;
6657         __kernel_fpu_begin();
6658         fpu_restore_checking(&vcpu->arch.guest_fpu);
6659         trace_kvm_fpu(1);
6660 }
6661
6662 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6663 {
6664         kvm_put_guest_xcr0(vcpu);
6665
6666         if (!vcpu->guest_fpu_loaded)
6667                 return;
6668
6669         vcpu->guest_fpu_loaded = 0;
6670         fpu_save_init(&vcpu->arch.guest_fpu);
6671         __kernel_fpu_end();
6672         ++vcpu->stat.fpu_reload;
6673         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6674         trace_kvm_fpu(0);
6675 }
6676
6677 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6678 {
6679         kvmclock_reset(vcpu);
6680
6681         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6682         fx_free(vcpu);
6683         kvm_x86_ops->vcpu_free(vcpu);
6684 }
6685
6686 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6687                                                 unsigned int id)
6688 {
6689         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6690                 printk_once(KERN_WARNING
6691                 "kvm: SMP vm created on host with unstable TSC; "
6692                 "guest TSC will not be reliable\n");
6693         return kvm_x86_ops->vcpu_create(kvm, id);
6694 }
6695
6696 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6697 {
6698         int r;
6699
6700         vcpu->arch.mtrr_state.have_fixed = 1;
6701         r = vcpu_load(vcpu);
6702         if (r)
6703                 return r;
6704         kvm_vcpu_reset(vcpu);
6705         kvm_mmu_setup(vcpu);
6706         vcpu_put(vcpu);
6707
6708         return r;
6709 }
6710
6711 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6712 {
6713         int r;
6714         struct msr_data msr;
6715
6716         r = vcpu_load(vcpu);
6717         if (r)
6718                 return r;
6719         msr.data = 0x0;
6720         msr.index = MSR_IA32_TSC;
6721         msr.host_initiated = true;
6722         kvm_write_tsc(vcpu, &msr);
6723         vcpu_put(vcpu);
6724
6725         return r;
6726 }
6727
6728 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6729 {
6730         int r;
6731         vcpu->arch.apf.msr_val = 0;
6732
6733         r = vcpu_load(vcpu);
6734         BUG_ON(r);
6735         kvm_mmu_unload(vcpu);
6736         vcpu_put(vcpu);
6737
6738         fx_free(vcpu);
6739         kvm_x86_ops->vcpu_free(vcpu);
6740 }
6741
6742 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6743 {
6744         atomic_set(&vcpu->arch.nmi_queued, 0);
6745         vcpu->arch.nmi_pending = 0;
6746         vcpu->arch.nmi_injected = false;
6747
6748         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6749         vcpu->arch.dr6 = DR6_FIXED_1;
6750         vcpu->arch.dr7 = DR7_FIXED_1;
6751         kvm_update_dr7(vcpu);
6752
6753         kvm_make_request(KVM_REQ_EVENT, vcpu);
6754         vcpu->arch.apf.msr_val = 0;
6755         vcpu->arch.st.msr_val = 0;
6756
6757         kvmclock_reset(vcpu);
6758
6759         kvm_clear_async_pf_completion_queue(vcpu);
6760         kvm_async_pf_hash_reset(vcpu);
6761         vcpu->arch.apf.halted = false;
6762
6763         kvm_pmu_reset(vcpu);
6764
6765         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6766         vcpu->arch.regs_avail = ~0;
6767         vcpu->arch.regs_dirty = ~0;
6768
6769         kvm_x86_ops->vcpu_reset(vcpu);
6770 }
6771
6772 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6773 {
6774         struct kvm_segment cs;
6775
6776         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6777         cs.selector = vector << 8;
6778         cs.base = vector << 12;
6779         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6780         kvm_rip_write(vcpu, 0);
6781 }
6782
6783 int kvm_arch_hardware_enable(void *garbage)
6784 {
6785         struct kvm *kvm;
6786         struct kvm_vcpu *vcpu;
6787         int i;
6788         int ret;
6789         u64 local_tsc;
6790         u64 max_tsc = 0;
6791         bool stable, backwards_tsc = false;
6792
6793         kvm_shared_msr_cpu_online();
6794         ret = kvm_x86_ops->hardware_enable(garbage);
6795         if (ret != 0)
6796                 return ret;
6797
6798         local_tsc = native_read_tsc();
6799         stable = !check_tsc_unstable();
6800         list_for_each_entry(kvm, &vm_list, vm_list) {
6801                 kvm_for_each_vcpu(i, vcpu, kvm) {
6802                         if (!stable && vcpu->cpu == smp_processor_id())
6803                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6804                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6805                                 backwards_tsc = true;
6806                                 if (vcpu->arch.last_host_tsc > max_tsc)
6807                                         max_tsc = vcpu->arch.last_host_tsc;
6808                         }
6809                 }
6810         }
6811
6812         /*
6813          * Sometimes, even reliable TSCs go backwards.  This happens on
6814          * platforms that reset TSC during suspend or hibernate actions, but
6815          * maintain synchronization.  We must compensate.  Fortunately, we can
6816          * detect that condition here, which happens early in CPU bringup,
6817          * before any KVM threads can be running.  Unfortunately, we can't
6818          * bring the TSCs fully up to date with real time, as we aren't yet far
6819          * enough into CPU bringup that we know how much real time has actually
6820          * elapsed; our helper function, get_kernel_ns() will be using boot
6821          * variables that haven't been updated yet.
6822          *
6823          * So we simply find the maximum observed TSC above, then record the
6824          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6825          * the adjustment will be applied.  Note that we accumulate
6826          * adjustments, in case multiple suspend cycles happen before some VCPU
6827          * gets a chance to run again.  In the event that no KVM threads get a
6828          * chance to run, we will miss the entire elapsed period, as we'll have
6829          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6830          * loose cycle time.  This isn't too big a deal, since the loss will be
6831          * uniform across all VCPUs (not to mention the scenario is extremely
6832          * unlikely). It is possible that a second hibernate recovery happens
6833          * much faster than a first, causing the observed TSC here to be
6834          * smaller; this would require additional padding adjustment, which is
6835          * why we set last_host_tsc to the local tsc observed here.
6836          *
6837          * N.B. - this code below runs only on platforms with reliable TSC,
6838          * as that is the only way backwards_tsc is set above.  Also note
6839          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6840          * have the same delta_cyc adjustment applied if backwards_tsc
6841          * is detected.  Note further, this adjustment is only done once,
6842          * as we reset last_host_tsc on all VCPUs to stop this from being
6843          * called multiple times (one for each physical CPU bringup).
6844          *
6845          * Platforms with unreliable TSCs don't have to deal with this, they
6846          * will be compensated by the logic in vcpu_load, which sets the TSC to
6847          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6848          * guarantee that they stay in perfect synchronization.
6849          */
6850         if (backwards_tsc) {
6851                 u64 delta_cyc = max_tsc - local_tsc;
6852                 list_for_each_entry(kvm, &vm_list, vm_list) {
6853                         kvm_for_each_vcpu(i, vcpu, kvm) {
6854                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6855                                 vcpu->arch.last_host_tsc = local_tsc;
6856                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6857                                         &vcpu->requests);
6858                         }
6859
6860                         /*
6861                          * We have to disable TSC offset matching.. if you were
6862                          * booting a VM while issuing an S4 host suspend....
6863                          * you may have some problem.  Solving this issue is
6864                          * left as an exercise to the reader.
6865                          */
6866                         kvm->arch.last_tsc_nsec = 0;
6867                         kvm->arch.last_tsc_write = 0;
6868                 }
6869
6870         }
6871         return 0;
6872 }
6873
6874 void kvm_arch_hardware_disable(void *garbage)
6875 {
6876         kvm_x86_ops->hardware_disable(garbage);
6877         drop_user_return_notifiers(garbage);
6878 }
6879
6880 int kvm_arch_hardware_setup(void)
6881 {
6882         return kvm_x86_ops->hardware_setup();
6883 }
6884
6885 void kvm_arch_hardware_unsetup(void)
6886 {
6887         kvm_x86_ops->hardware_unsetup();
6888 }
6889
6890 void kvm_arch_check_processor_compat(void *rtn)
6891 {
6892         kvm_x86_ops->check_processor_compatibility(rtn);
6893 }
6894
6895 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6896 {
6897         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6898 }
6899
6900 struct static_key kvm_no_apic_vcpu __read_mostly;
6901
6902 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6903 {
6904         struct page *page;
6905         struct kvm *kvm;
6906         int r;
6907
6908         BUG_ON(vcpu->kvm == NULL);
6909         kvm = vcpu->kvm;
6910
6911         vcpu->arch.pv.pv_unhalted = false;
6912         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6913         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6914                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6915         else
6916                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6917
6918         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6919         if (!page) {
6920                 r = -ENOMEM;
6921                 goto fail;
6922         }
6923         vcpu->arch.pio_data = page_address(page);
6924
6925         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6926
6927         r = kvm_mmu_create(vcpu);
6928         if (r < 0)
6929                 goto fail_free_pio_data;
6930
6931         if (irqchip_in_kernel(kvm)) {
6932                 r = kvm_create_lapic(vcpu);
6933                 if (r < 0)
6934                         goto fail_mmu_destroy;
6935         } else
6936                 static_key_slow_inc(&kvm_no_apic_vcpu);
6937
6938         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6939                                        GFP_KERNEL);
6940         if (!vcpu->arch.mce_banks) {
6941                 r = -ENOMEM;
6942                 goto fail_free_lapic;
6943         }
6944         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6945
6946         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6947                 r = -ENOMEM;
6948                 goto fail_free_mce_banks;
6949         }
6950
6951         r = fx_init(vcpu);
6952         if (r)
6953                 goto fail_free_wbinvd_dirty_mask;
6954
6955         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6956         vcpu->arch.pv_time_enabled = false;
6957
6958         vcpu->arch.guest_supported_xcr0 = 0;
6959         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
6960
6961         kvm_async_pf_hash_reset(vcpu);
6962         kvm_pmu_init(vcpu);
6963
6964         return 0;
6965 fail_free_wbinvd_dirty_mask:
6966         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6967 fail_free_mce_banks:
6968         kfree(vcpu->arch.mce_banks);
6969 fail_free_lapic:
6970         kvm_free_lapic(vcpu);
6971 fail_mmu_destroy:
6972         kvm_mmu_destroy(vcpu);
6973 fail_free_pio_data:
6974         free_page((unsigned long)vcpu->arch.pio_data);
6975 fail:
6976         return r;
6977 }
6978
6979 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6980 {
6981         int idx;
6982
6983         kvm_pmu_destroy(vcpu);
6984         kfree(vcpu->arch.mce_banks);
6985         kvm_free_lapic(vcpu);
6986         idx = srcu_read_lock(&vcpu->kvm->srcu);
6987         kvm_mmu_destroy(vcpu);
6988         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6989         free_page((unsigned long)vcpu->arch.pio_data);
6990         if (!irqchip_in_kernel(vcpu->kvm))
6991                 static_key_slow_dec(&kvm_no_apic_vcpu);
6992 }
6993
6994 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6995 {
6996         if (type)
6997                 return -EINVAL;
6998
6999         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7000         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7001         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7002
7003         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7004         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7005         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7006         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7007                 &kvm->arch.irq_sources_bitmap);
7008
7009         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7010         mutex_init(&kvm->arch.apic_map_lock);
7011         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7012
7013         pvclock_update_vm_gtod_copy(kvm);
7014
7015         return 0;
7016 }
7017
7018 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7019 {
7020         int r;
7021         r = vcpu_load(vcpu);
7022         BUG_ON(r);
7023         kvm_mmu_unload(vcpu);
7024         vcpu_put(vcpu);
7025 }
7026
7027 static void kvm_free_vcpus(struct kvm *kvm)
7028 {
7029         unsigned int i;
7030         struct kvm_vcpu *vcpu;
7031
7032         /*
7033          * Unpin any mmu pages first.
7034          */
7035         kvm_for_each_vcpu(i, vcpu, kvm) {
7036                 kvm_clear_async_pf_completion_queue(vcpu);
7037                 kvm_unload_vcpu_mmu(vcpu);
7038         }
7039         kvm_for_each_vcpu(i, vcpu, kvm)
7040                 kvm_arch_vcpu_free(vcpu);
7041
7042         mutex_lock(&kvm->lock);
7043         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7044                 kvm->vcpus[i] = NULL;
7045
7046         atomic_set(&kvm->online_vcpus, 0);
7047         mutex_unlock(&kvm->lock);
7048 }
7049
7050 void kvm_arch_sync_events(struct kvm *kvm)
7051 {
7052         kvm_free_all_assigned_devices(kvm);
7053         kvm_free_pit(kvm);
7054 }
7055
7056 void kvm_arch_destroy_vm(struct kvm *kvm)
7057 {
7058         if (current->mm == kvm->mm) {
7059                 /*
7060                  * Free memory regions allocated on behalf of userspace,
7061                  * unless the the memory map has changed due to process exit
7062                  * or fd copying.
7063                  */
7064                 struct kvm_userspace_memory_region mem;
7065                 memset(&mem, 0, sizeof(mem));
7066                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7067                 kvm_set_memory_region(kvm, &mem);
7068
7069                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7070                 kvm_set_memory_region(kvm, &mem);
7071
7072                 mem.slot = TSS_PRIVATE_MEMSLOT;
7073                 kvm_set_memory_region(kvm, &mem);
7074         }
7075         kvm_iommu_unmap_guest(kvm);
7076         kfree(kvm->arch.vpic);
7077         kfree(kvm->arch.vioapic);
7078         kvm_free_vcpus(kvm);
7079         if (kvm->arch.apic_access_page)
7080                 put_page(kvm->arch.apic_access_page);
7081         if (kvm->arch.ept_identity_pagetable)
7082                 put_page(kvm->arch.ept_identity_pagetable);
7083         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7084 }
7085
7086 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
7087                            struct kvm_memory_slot *dont)
7088 {
7089         int i;
7090
7091         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7092                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7093                         kvm_kvfree(free->arch.rmap[i]);
7094                         free->arch.rmap[i] = NULL;
7095                 }
7096                 if (i == 0)
7097                         continue;
7098
7099                 if (!dont || free->arch.lpage_info[i - 1] !=
7100                              dont->arch.lpage_info[i - 1]) {
7101                         kvm_kvfree(free->arch.lpage_info[i - 1]);
7102                         free->arch.lpage_info[i - 1] = NULL;
7103                 }
7104         }
7105 }
7106
7107 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
7108 {
7109         int i;
7110
7111         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7112                 unsigned long ugfn;
7113                 int lpages;
7114                 int level = i + 1;
7115
7116                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7117                                       slot->base_gfn, level) + 1;
7118
7119                 slot->arch.rmap[i] =
7120                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7121                 if (!slot->arch.rmap[i])
7122                         goto out_free;
7123                 if (i == 0)
7124                         continue;
7125
7126                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7127                                         sizeof(*slot->arch.lpage_info[i - 1]));
7128                 if (!slot->arch.lpage_info[i - 1])
7129                         goto out_free;
7130
7131                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7132                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7133                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7134                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7135                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7136                 /*
7137                  * If the gfn and userspace address are not aligned wrt each
7138                  * other, or if explicitly asked to, disable large page
7139                  * support for this slot
7140                  */
7141                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7142                     !kvm_largepages_enabled()) {
7143                         unsigned long j;
7144
7145                         for (j = 0; j < lpages; ++j)
7146                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7147                 }
7148         }
7149
7150         return 0;
7151
7152 out_free:
7153         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7154                 kvm_kvfree(slot->arch.rmap[i]);
7155                 slot->arch.rmap[i] = NULL;
7156                 if (i == 0)
7157                         continue;
7158
7159                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7160                 slot->arch.lpage_info[i - 1] = NULL;
7161         }
7162         return -ENOMEM;
7163 }
7164
7165 void kvm_arch_memslots_updated(struct kvm *kvm)
7166 {
7167         /*
7168          * memslots->generation has been incremented.
7169          * mmio generation may have reached its maximum value.
7170          */
7171         kvm_mmu_invalidate_mmio_sptes(kvm);
7172 }
7173
7174 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7175                                 struct kvm_memory_slot *memslot,
7176                                 struct kvm_userspace_memory_region *mem,
7177                                 enum kvm_mr_change change)
7178 {
7179         /*
7180          * Only private memory slots need to be mapped here since
7181          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7182          */
7183         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7184                 unsigned long userspace_addr;
7185
7186                 /*
7187                  * MAP_SHARED to prevent internal slot pages from being moved
7188                  * by fork()/COW.
7189                  */
7190                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7191                                          PROT_READ | PROT_WRITE,
7192                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7193
7194                 if (IS_ERR((void *)userspace_addr))
7195                         return PTR_ERR((void *)userspace_addr);
7196
7197                 memslot->userspace_addr = userspace_addr;
7198         }
7199
7200         return 0;
7201 }
7202
7203 void kvm_arch_commit_memory_region(struct kvm *kvm,
7204                                 struct kvm_userspace_memory_region *mem,
7205                                 const struct kvm_memory_slot *old,
7206                                 enum kvm_mr_change change)
7207 {
7208
7209         int nr_mmu_pages = 0;
7210
7211         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7212                 int ret;
7213
7214                 ret = vm_munmap(old->userspace_addr,
7215                                 old->npages * PAGE_SIZE);
7216                 if (ret < 0)
7217                         printk(KERN_WARNING
7218                                "kvm_vm_ioctl_set_memory_region: "
7219                                "failed to munmap memory\n");
7220         }
7221
7222         if (!kvm->arch.n_requested_mmu_pages)
7223                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7224
7225         if (nr_mmu_pages)
7226                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7227         /*
7228          * Write protect all pages for dirty logging.
7229          * Existing largepage mappings are destroyed here and new ones will
7230          * not be created until the end of the logging.
7231          */
7232         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7233                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7234 }
7235
7236 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7237 {
7238         kvm_mmu_invalidate_zap_all_pages(kvm);
7239 }
7240
7241 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7242                                    struct kvm_memory_slot *slot)
7243 {
7244         kvm_mmu_invalidate_zap_all_pages(kvm);
7245 }
7246
7247 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7248 {
7249         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7250                 !vcpu->arch.apf.halted)
7251                 || !list_empty_careful(&vcpu->async_pf.done)
7252                 || kvm_apic_has_events(vcpu)
7253                 || vcpu->arch.pv.pv_unhalted
7254                 || atomic_read(&vcpu->arch.nmi_queued) ||
7255                 (kvm_arch_interrupt_allowed(vcpu) &&
7256                  kvm_cpu_has_interrupt(vcpu));
7257 }
7258
7259 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7260 {
7261         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7262 }
7263
7264 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7265 {
7266         return kvm_x86_ops->interrupt_allowed(vcpu);
7267 }
7268
7269 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7270 {
7271         unsigned long current_rip = kvm_rip_read(vcpu) +
7272                 get_segment_base(vcpu, VCPU_SREG_CS);
7273
7274         return current_rip == linear_rip;
7275 }
7276 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7277
7278 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7279 {
7280         unsigned long rflags;
7281
7282         rflags = kvm_x86_ops->get_rflags(vcpu);
7283         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7284                 rflags &= ~X86_EFLAGS_TF;
7285         return rflags;
7286 }
7287 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7288
7289 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7290 {
7291         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7292             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7293                 rflags |= X86_EFLAGS_TF;
7294         kvm_x86_ops->set_rflags(vcpu, rflags);
7295         kvm_make_request(KVM_REQ_EVENT, vcpu);
7296 }
7297 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7298
7299 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7300 {
7301         int r;
7302
7303         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7304               work->wakeup_all)
7305                 return;
7306
7307         r = kvm_mmu_reload(vcpu);
7308         if (unlikely(r))
7309                 return;
7310
7311         if (!vcpu->arch.mmu.direct_map &&
7312               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7313                 return;
7314
7315         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7316 }
7317
7318 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7319 {
7320         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7321 }
7322
7323 static inline u32 kvm_async_pf_next_probe(u32 key)
7324 {
7325         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7326 }
7327
7328 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7329 {
7330         u32 key = kvm_async_pf_hash_fn(gfn);
7331
7332         while (vcpu->arch.apf.gfns[key] != ~0)
7333                 key = kvm_async_pf_next_probe(key);
7334
7335         vcpu->arch.apf.gfns[key] = gfn;
7336 }
7337
7338 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7339 {
7340         int i;
7341         u32 key = kvm_async_pf_hash_fn(gfn);
7342
7343         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7344                      (vcpu->arch.apf.gfns[key] != gfn &&
7345                       vcpu->arch.apf.gfns[key] != ~0); i++)
7346                 key = kvm_async_pf_next_probe(key);
7347
7348         return key;
7349 }
7350
7351 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7352 {
7353         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7354 }
7355
7356 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7357 {
7358         u32 i, j, k;
7359
7360         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7361         while (true) {
7362                 vcpu->arch.apf.gfns[i] = ~0;
7363                 do {
7364                         j = kvm_async_pf_next_probe(j);
7365                         if (vcpu->arch.apf.gfns[j] == ~0)
7366                                 return;
7367                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7368                         /*
7369                          * k lies cyclically in ]i,j]
7370                          * |    i.k.j |
7371                          * |....j i.k.| or  |.k..j i...|
7372                          */
7373                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7374                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7375                 i = j;
7376         }
7377 }
7378
7379 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7380 {
7381
7382         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7383                                       sizeof(val));
7384 }
7385
7386 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7387                                      struct kvm_async_pf *work)
7388 {
7389         struct x86_exception fault;
7390
7391         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7392         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7393
7394         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7395             (vcpu->arch.apf.send_user_only &&
7396              kvm_x86_ops->get_cpl(vcpu) == 0))
7397                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7398         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7399                 fault.vector = PF_VECTOR;
7400                 fault.error_code_valid = true;
7401                 fault.error_code = 0;
7402                 fault.nested_page_fault = false;
7403                 fault.address = work->arch.token;
7404                 kvm_inject_page_fault(vcpu, &fault);
7405         }
7406 }
7407
7408 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7409                                  struct kvm_async_pf *work)
7410 {
7411         struct x86_exception fault;
7412
7413         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7414         if (work->wakeup_all)
7415                 work->arch.token = ~0; /* broadcast wakeup */
7416         else
7417                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7418
7419         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7420             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7421                 fault.vector = PF_VECTOR;
7422                 fault.error_code_valid = true;
7423                 fault.error_code = 0;
7424                 fault.nested_page_fault = false;
7425                 fault.address = work->arch.token;
7426                 kvm_inject_page_fault(vcpu, &fault);
7427         }
7428         vcpu->arch.apf.halted = false;
7429         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7430 }
7431
7432 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7433 {
7434         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7435                 return true;
7436         else
7437                 return !kvm_event_needs_reinjection(vcpu) &&
7438                         kvm_x86_ops->interrupt_allowed(vcpu);
7439 }
7440
7441 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7442 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7443 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7444 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7445 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7446 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7447 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7448 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7449 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7450 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7451 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7452 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7453 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);