2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
89 static void process_nmi(struct kvm_vcpu *vcpu);
91 struct kvm_x86_ops *kvm_x86_ops;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
94 static bool ignore_msrs = 0;
95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
97 bool kvm_has_tsc_control;
98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
99 u32 kvm_max_guest_tsc_khz;
100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
103 static u32 tsc_tolerance_ppm = 250;
104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
106 #define KVM_NR_SHARED_MSRS 16
108 struct kvm_shared_msrs_global {
110 u32 msrs[KVM_NR_SHARED_MSRS];
113 struct kvm_shared_msrs {
114 struct user_return_notifier urn;
116 struct kvm_shared_msr_values {
119 } values[KVM_NR_SHARED_MSRS];
122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
123 static struct kvm_shared_msrs __percpu *shared_msrs;
125 struct kvm_stats_debugfs_item debugfs_entries[] = {
126 { "pf_fixed", VCPU_STAT(pf_fixed) },
127 { "pf_guest", VCPU_STAT(pf_guest) },
128 { "tlb_flush", VCPU_STAT(tlb_flush) },
129 { "invlpg", VCPU_STAT(invlpg) },
130 { "exits", VCPU_STAT(exits) },
131 { "io_exits", VCPU_STAT(io_exits) },
132 { "mmio_exits", VCPU_STAT(mmio_exits) },
133 { "signal_exits", VCPU_STAT(signal_exits) },
134 { "irq_window", VCPU_STAT(irq_window_exits) },
135 { "nmi_window", VCPU_STAT(nmi_window_exits) },
136 { "halt_exits", VCPU_STAT(halt_exits) },
137 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
138 { "hypercalls", VCPU_STAT(hypercalls) },
139 { "request_irq", VCPU_STAT(request_irq_exits) },
140 { "irq_exits", VCPU_STAT(irq_exits) },
141 { "host_state_reload", VCPU_STAT(host_state_reload) },
142 { "efer_reload", VCPU_STAT(efer_reload) },
143 { "fpu_reload", VCPU_STAT(fpu_reload) },
144 { "insn_emulation", VCPU_STAT(insn_emulation) },
145 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
146 { "irq_injections", VCPU_STAT(irq_injections) },
147 { "nmi_injections", VCPU_STAT(nmi_injections) },
148 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
149 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
150 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
151 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
152 { "mmu_flooded", VM_STAT(mmu_flooded) },
153 { "mmu_recycled", VM_STAT(mmu_recycled) },
154 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
155 { "mmu_unsync", VM_STAT(mmu_unsync) },
156 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
157 { "largepages", VM_STAT(lpages) },
161 u64 __read_mostly host_xcr0;
163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
168 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
169 vcpu->arch.apf.gfns[i] = ~0;
172 static void kvm_on_user_return(struct user_return_notifier *urn)
175 struct kvm_shared_msrs *locals
176 = container_of(urn, struct kvm_shared_msrs, urn);
177 struct kvm_shared_msr_values *values;
179 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
180 values = &locals->values[slot];
181 if (values->host != values->curr) {
182 wrmsrl(shared_msrs_global.msrs[slot], values->host);
183 values->curr = values->host;
186 locals->registered = false;
187 user_return_notifier_unregister(urn);
190 static void shared_msr_update(unsigned slot, u32 msr)
193 unsigned int cpu = smp_processor_id();
194 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
196 /* only read, and nobody should modify it at this time,
197 * so don't need lock */
198 if (slot >= shared_msrs_global.nr) {
199 printk(KERN_ERR "kvm: invalid MSR slot!");
202 rdmsrl_safe(msr, &value);
203 smsr->values[slot].host = value;
204 smsr->values[slot].curr = value;
207 void kvm_define_shared_msr(unsigned slot, u32 msr)
209 if (slot >= shared_msrs_global.nr)
210 shared_msrs_global.nr = slot + 1;
211 shared_msrs_global.msrs[slot] = msr;
212 /* we need ensured the shared_msr_global have been updated */
215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
217 static void kvm_shared_msr_cpu_online(void)
221 for (i = 0; i < shared_msrs_global.nr; ++i)
222 shared_msr_update(i, shared_msrs_global.msrs[i]);
225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
227 unsigned int cpu = smp_processor_id();
228 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
230 if (((value ^ smsr->values[slot].curr) & mask) == 0)
232 smsr->values[slot].curr = value;
233 wrmsrl(shared_msrs_global.msrs[slot], value);
234 if (!smsr->registered) {
235 smsr->urn.on_user_return = kvm_on_user_return;
236 user_return_notifier_register(&smsr->urn);
237 smsr->registered = true;
240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
242 static void drop_user_return_notifiers(void *ignore)
244 unsigned int cpu = smp_processor_id();
245 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
247 if (smsr->registered)
248 kvm_on_user_return(&smsr->urn);
251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
253 return vcpu->arch.apic_base;
255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
259 /* TODO: reserve bits check */
260 kvm_lapic_set_base(vcpu, data);
262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
264 asmlinkage void kvm_spurious_fault(void)
266 /* Fault while not rebooting. We want the trace. */
269 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
271 #define EXCPT_BENIGN 0
272 #define EXCPT_CONTRIBUTORY 1
275 static int exception_class(int vector)
285 return EXCPT_CONTRIBUTORY;
292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
293 unsigned nr, bool has_error, u32 error_code,
299 kvm_make_request(KVM_REQ_EVENT, vcpu);
301 if (!vcpu->arch.exception.pending) {
303 vcpu->arch.exception.pending = true;
304 vcpu->arch.exception.has_error_code = has_error;
305 vcpu->arch.exception.nr = nr;
306 vcpu->arch.exception.error_code = error_code;
307 vcpu->arch.exception.reinject = reinject;
311 /* to check exception */
312 prev_nr = vcpu->arch.exception.nr;
313 if (prev_nr == DF_VECTOR) {
314 /* triple fault -> shutdown */
315 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
318 class1 = exception_class(prev_nr);
319 class2 = exception_class(nr);
320 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
321 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
322 /* generate double fault per SDM Table 5-5 */
323 vcpu->arch.exception.pending = true;
324 vcpu->arch.exception.has_error_code = true;
325 vcpu->arch.exception.nr = DF_VECTOR;
326 vcpu->arch.exception.error_code = 0;
328 /* replace previous exception with a new one in a hope
329 that instruction re-execution will regenerate lost
334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
336 kvm_multiple_exception(vcpu, nr, false, 0, false);
338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
340 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
342 kvm_multiple_exception(vcpu, nr, false, 0, true);
344 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
346 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
349 kvm_inject_gp(vcpu, 0);
351 kvm_x86_ops->skip_emulated_instruction(vcpu);
353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
355 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
357 ++vcpu->stat.pf_guest;
358 vcpu->arch.cr2 = fault->address;
359 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
363 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
365 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
366 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
368 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
371 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
373 atomic_inc(&vcpu->arch.nmi_queued);
374 kvm_make_request(KVM_REQ_NMI, vcpu);
376 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
378 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
380 kvm_multiple_exception(vcpu, nr, true, error_code, false);
382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
384 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
386 kvm_multiple_exception(vcpu, nr, true, error_code, true);
388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
391 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
392 * a #GP and return false.
394 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
396 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
398 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
401 EXPORT_SYMBOL_GPL(kvm_require_cpl);
404 * This function will be used to read from the physical memory of the currently
405 * running guest. The difference to kvm_read_guest_page is that this function
406 * can read from guest physical or from the guest's guest physical memory.
408 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
409 gfn_t ngfn, void *data, int offset, int len,
415 ngpa = gfn_to_gpa(ngfn);
416 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
417 if (real_gfn == UNMAPPED_GVA)
420 real_gfn = gpa_to_gfn(real_gfn);
422 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
426 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
427 void *data, int offset, int len, u32 access)
429 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
430 data, offset, len, access);
434 * Load the pae pdptrs. Return true is they are all valid.
436 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
438 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
439 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
442 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
444 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
445 offset * sizeof(u64), sizeof(pdpte),
446 PFERR_USER_MASK|PFERR_WRITE_MASK);
451 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
452 if (is_present_gpte(pdpte[i]) &&
453 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
460 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
461 __set_bit(VCPU_EXREG_PDPTR,
462 (unsigned long *)&vcpu->arch.regs_avail);
463 __set_bit(VCPU_EXREG_PDPTR,
464 (unsigned long *)&vcpu->arch.regs_dirty);
469 EXPORT_SYMBOL_GPL(load_pdptrs);
471 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
473 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
479 if (is_long_mode(vcpu) || !is_pae(vcpu))
482 if (!test_bit(VCPU_EXREG_PDPTR,
483 (unsigned long *)&vcpu->arch.regs_avail))
486 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
487 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
488 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
489 PFERR_USER_MASK | PFERR_WRITE_MASK);
492 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
498 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
500 unsigned long old_cr0 = kvm_read_cr0(vcpu);
501 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
502 X86_CR0_CD | X86_CR0_NW;
507 if (cr0 & 0xffffffff00000000UL)
511 cr0 &= ~CR0_RESERVED_BITS;
513 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
516 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
519 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
521 if ((vcpu->arch.efer & EFER_LME)) {
526 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
531 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
536 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
539 kvm_x86_ops->set_cr0(vcpu, cr0);
541 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
542 kvm_clear_async_pf_completion_queue(vcpu);
543 kvm_async_pf_hash_reset(vcpu);
546 if ((cr0 ^ old_cr0) & update_bits)
547 kvm_mmu_reset_context(vcpu);
550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
554 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
556 EXPORT_SYMBOL_GPL(kvm_lmsw);
558 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
560 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
561 !vcpu->guest_xcr0_loaded) {
562 /* kvm_set_xcr() also depends on this */
563 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
564 vcpu->guest_xcr0_loaded = 1;
568 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
570 if (vcpu->guest_xcr0_loaded) {
571 if (vcpu->arch.xcr0 != host_xcr0)
572 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
573 vcpu->guest_xcr0_loaded = 0;
577 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
581 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
582 if (index != XCR_XFEATURE_ENABLED_MASK)
585 if (!(xcr0 & XSTATE_FP))
587 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
589 if (xcr0 & ~host_xcr0)
591 kvm_put_guest_xcr0(vcpu);
592 vcpu->arch.xcr0 = xcr0;
596 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
598 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
599 __kvm_set_xcr(vcpu, index, xcr)) {
600 kvm_inject_gp(vcpu, 0);
605 EXPORT_SYMBOL_GPL(kvm_set_xcr);
607 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
609 unsigned long old_cr4 = kvm_read_cr4(vcpu);
610 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
611 X86_CR4_PAE | X86_CR4_SMEP;
612 if (cr4 & CR4_RESERVED_BITS)
615 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
618 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
621 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
624 if (is_long_mode(vcpu)) {
625 if (!(cr4 & X86_CR4_PAE))
627 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
628 && ((cr4 ^ old_cr4) & pdptr_bits)
629 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
633 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
634 if (!guest_cpuid_has_pcid(vcpu))
637 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
638 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
642 if (kvm_x86_ops->set_cr4(vcpu, cr4))
645 if (((cr4 ^ old_cr4) & pdptr_bits) ||
646 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
647 kvm_mmu_reset_context(vcpu);
649 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
650 kvm_update_cpuid(vcpu);
654 EXPORT_SYMBOL_GPL(kvm_set_cr4);
656 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
658 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
659 kvm_mmu_sync_roots(vcpu);
660 kvm_mmu_flush_tlb(vcpu);
664 if (is_long_mode(vcpu)) {
665 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
666 if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
669 if (cr3 & CR3_L_MODE_RESERVED_BITS)
673 if (cr3 & CR3_PAE_RESERVED_BITS)
675 if (is_paging(vcpu) &&
676 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
680 * We don't check reserved bits in nonpae mode, because
681 * this isn't enforced, and VMware depends on this.
686 * Does the new cr3 value map to physical memory? (Note, we
687 * catch an invalid cr3 even in real-mode, because it would
688 * cause trouble later on when we turn on paging anyway.)
690 * A real CPU would silently accept an invalid cr3 and would
691 * attempt to use it - with largely undefined (and often hard
692 * to debug) behavior on the guest side.
694 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
696 vcpu->arch.cr3 = cr3;
697 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
698 vcpu->arch.mmu.new_cr3(vcpu);
701 EXPORT_SYMBOL_GPL(kvm_set_cr3);
703 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
705 if (cr8 & CR8_RESERVED_BITS)
707 if (irqchip_in_kernel(vcpu->kvm))
708 kvm_lapic_set_tpr(vcpu, cr8);
710 vcpu->arch.cr8 = cr8;
713 EXPORT_SYMBOL_GPL(kvm_set_cr8);
715 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
717 if (irqchip_in_kernel(vcpu->kvm))
718 return kvm_lapic_get_cr8(vcpu);
720 return vcpu->arch.cr8;
722 EXPORT_SYMBOL_GPL(kvm_get_cr8);
724 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
728 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
729 dr7 = vcpu->arch.guest_debug_dr7;
731 dr7 = vcpu->arch.dr7;
732 kvm_x86_ops->set_dr7(vcpu, dr7);
733 vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
736 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
740 vcpu->arch.db[dr] = val;
741 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
742 vcpu->arch.eff_db[dr] = val;
745 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
749 if (val & 0xffffffff00000000ULL)
751 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
754 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
758 if (val & 0xffffffff00000000ULL)
760 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
761 kvm_update_dr7(vcpu);
768 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
772 res = __kvm_set_dr(vcpu, dr, val);
774 kvm_queue_exception(vcpu, UD_VECTOR);
776 kvm_inject_gp(vcpu, 0);
780 EXPORT_SYMBOL_GPL(kvm_set_dr);
782 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
786 *val = vcpu->arch.db[dr];
789 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
793 *val = vcpu->arch.dr6;
796 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
800 *val = vcpu->arch.dr7;
807 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
809 if (_kvm_get_dr(vcpu, dr, val)) {
810 kvm_queue_exception(vcpu, UD_VECTOR);
815 EXPORT_SYMBOL_GPL(kvm_get_dr);
817 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
819 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
823 err = kvm_pmu_read_pmc(vcpu, ecx, &data);
826 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
827 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
830 EXPORT_SYMBOL_GPL(kvm_rdpmc);
833 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
834 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
836 * This list is modified at module load time to reflect the
837 * capabilities of the host cpu. This capabilities test skips MSRs that are
838 * kvm-specific. Those are put in the beginning of the list.
841 #define KVM_SAVE_MSRS_BEGIN 10
842 static u32 msrs_to_save[] = {
843 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
844 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
845 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
846 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
848 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
851 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
853 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
856 static unsigned num_msrs_to_save;
858 static const u32 emulated_msrs[] = {
860 MSR_IA32_TSCDEADLINE,
861 MSR_IA32_MISC_ENABLE,
866 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
868 if (efer & efer_reserved_bits)
871 if (efer & EFER_FFXSR) {
872 struct kvm_cpuid_entry2 *feat;
874 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
875 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
879 if (efer & EFER_SVME) {
880 struct kvm_cpuid_entry2 *feat;
882 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
883 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
889 EXPORT_SYMBOL_GPL(kvm_valid_efer);
891 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
893 u64 old_efer = vcpu->arch.efer;
895 if (!kvm_valid_efer(vcpu, efer))
899 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
903 efer |= vcpu->arch.efer & EFER_LMA;
905 kvm_x86_ops->set_efer(vcpu, efer);
907 /* Update reserved bits */
908 if ((efer ^ old_efer) & EFER_NX)
909 kvm_mmu_reset_context(vcpu);
914 void kvm_enable_efer_bits(u64 mask)
916 efer_reserved_bits &= ~mask;
918 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
922 * Writes msr value into into the appropriate "register".
923 * Returns 0 on success, non-0 otherwise.
924 * Assumes vcpu_load() was already called.
926 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
928 return kvm_x86_ops->set_msr(vcpu, msr);
932 * Adapt set_msr() to msr_io()'s calling convention
934 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
940 msr.host_initiated = true;
941 return kvm_set_msr(vcpu, &msr);
945 struct pvclock_gtod_data {
948 struct { /* extract of a clocksource struct */
956 /* open coded 'struct timespec' */
957 u64 monotonic_time_snsec;
958 time_t monotonic_time_sec;
961 static struct pvclock_gtod_data pvclock_gtod_data;
963 static void update_pvclock_gtod(struct timekeeper *tk)
965 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
967 write_seqcount_begin(&vdata->seq);
969 /* copy pvclock gtod data */
970 vdata->clock.vclock_mode = tk->clock->archdata.vclock_mode;
971 vdata->clock.cycle_last = tk->clock->cycle_last;
972 vdata->clock.mask = tk->clock->mask;
973 vdata->clock.mult = tk->mult;
974 vdata->clock.shift = tk->shift;
976 vdata->monotonic_time_sec = tk->xtime_sec
977 + tk->wall_to_monotonic.tv_sec;
978 vdata->monotonic_time_snsec = tk->xtime_nsec
979 + (tk->wall_to_monotonic.tv_nsec
981 while (vdata->monotonic_time_snsec >=
982 (((u64)NSEC_PER_SEC) << tk->shift)) {
983 vdata->monotonic_time_snsec -=
984 ((u64)NSEC_PER_SEC) << tk->shift;
985 vdata->monotonic_time_sec++;
988 write_seqcount_end(&vdata->seq);
993 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
997 struct pvclock_wall_clock wc;
998 struct timespec boot;
1003 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1008 ++version; /* first time write, random junk */
1012 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1015 * The guest calculates current wall clock time by adding
1016 * system time (updated by kvm_guest_time_update below) to the
1017 * wall clock specified here. guest system time equals host
1018 * system time for us, thus we must fill in host boot time here.
1022 if (kvm->arch.kvmclock_offset) {
1023 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1024 boot = timespec_sub(boot, ts);
1026 wc.sec = boot.tv_sec;
1027 wc.nsec = boot.tv_nsec;
1028 wc.version = version;
1030 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1033 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1036 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1038 uint32_t quotient, remainder;
1040 /* Don't try to replace with do_div(), this one calculates
1041 * "(dividend << 32) / divisor" */
1043 : "=a" (quotient), "=d" (remainder)
1044 : "0" (0), "1" (dividend), "r" (divisor) );
1048 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1049 s8 *pshift, u32 *pmultiplier)
1056 tps64 = base_khz * 1000LL;
1057 scaled64 = scaled_khz * 1000LL;
1058 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1063 tps32 = (uint32_t)tps64;
1064 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1065 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1073 *pmultiplier = div_frac(scaled64, tps32);
1075 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1076 __func__, base_khz, scaled_khz, shift, *pmultiplier);
1079 static inline u64 get_kernel_ns(void)
1083 WARN_ON(preemptible());
1085 monotonic_to_bootbased(&ts);
1086 return timespec_to_ns(&ts);
1089 #ifdef CONFIG_X86_64
1090 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1093 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1094 unsigned long max_tsc_khz;
1096 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1098 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1099 vcpu->arch.virtual_tsc_shift);
1102 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1104 u64 v = (u64)khz * (1000000 + ppm);
1109 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1111 u32 thresh_lo, thresh_hi;
1112 int use_scaling = 0;
1114 /* tsc_khz can be zero if TSC calibration fails */
1115 if (this_tsc_khz == 0)
1118 /* Compute a scale to convert nanoseconds in TSC cycles */
1119 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1120 &vcpu->arch.virtual_tsc_shift,
1121 &vcpu->arch.virtual_tsc_mult);
1122 vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1125 * Compute the variation in TSC rate which is acceptable
1126 * within the range of tolerance and decide if the
1127 * rate being applied is within that bounds of the hardware
1128 * rate. If so, no scaling or compensation need be done.
1130 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1131 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1132 if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1133 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1136 kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1139 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1141 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1142 vcpu->arch.virtual_tsc_mult,
1143 vcpu->arch.virtual_tsc_shift);
1144 tsc += vcpu->arch.this_tsc_write;
1148 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1150 #ifdef CONFIG_X86_64
1152 bool do_request = false;
1153 struct kvm_arch *ka = &vcpu->kvm->arch;
1154 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1156 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1157 atomic_read(&vcpu->kvm->online_vcpus));
1159 if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1160 if (!ka->use_master_clock)
1163 if (!vcpus_matched && ka->use_master_clock)
1167 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1169 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1170 atomic_read(&vcpu->kvm->online_vcpus),
1171 ka->use_master_clock, gtod->clock.vclock_mode);
1175 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1177 u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1178 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1181 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1183 struct kvm *kvm = vcpu->kvm;
1184 u64 offset, ns, elapsed;
1185 unsigned long flags;
1188 u64 data = msr->data;
1190 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1191 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1192 ns = get_kernel_ns();
1193 elapsed = ns - kvm->arch.last_tsc_nsec;
1195 if (vcpu->arch.virtual_tsc_khz) {
1198 /* n.b - signed multiplication and division required */
1199 usdiff = data - kvm->arch.last_tsc_write;
1200 #ifdef CONFIG_X86_64
1201 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1203 /* do_div() only does unsigned */
1204 asm("1: idivl %[divisor]\n"
1205 "2: xor %%edx, %%edx\n"
1206 " movl $0, %[faulted]\n"
1208 ".section .fixup,\"ax\"\n"
1209 "4: movl $1, %[faulted]\n"
1213 _ASM_EXTABLE(1b, 4b)
1215 : "=A"(usdiff), [faulted] "=r" (faulted)
1216 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1219 do_div(elapsed, 1000);
1224 /* idivl overflow => difference is larger than USEC_PER_SEC */
1226 usdiff = USEC_PER_SEC;
1228 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1231 * Special case: TSC write with a small delta (1 second) of virtual
1232 * cycle time against real time is interpreted as an attempt to
1233 * synchronize the CPU.
1235 * For a reliable TSC, we can match TSC offsets, and for an unstable
1236 * TSC, we add elapsed time in this computation. We could let the
1237 * compensation code attempt to catch up if we fall behind, but
1238 * it's better to try to match offsets from the beginning.
1240 if (usdiff < USEC_PER_SEC &&
1241 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1242 if (!check_tsc_unstable()) {
1243 offset = kvm->arch.cur_tsc_offset;
1244 pr_debug("kvm: matched tsc offset for %llu\n", data);
1246 u64 delta = nsec_to_cycles(vcpu, elapsed);
1248 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1249 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1254 * We split periods of matched TSC writes into generations.
1255 * For each generation, we track the original measured
1256 * nanosecond time, offset, and write, so if TSCs are in
1257 * sync, we can match exact offset, and if not, we can match
1258 * exact software computation in compute_guest_tsc()
1260 * These values are tracked in kvm->arch.cur_xxx variables.
1262 kvm->arch.cur_tsc_generation++;
1263 kvm->arch.cur_tsc_nsec = ns;
1264 kvm->arch.cur_tsc_write = data;
1265 kvm->arch.cur_tsc_offset = offset;
1267 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1268 kvm->arch.cur_tsc_generation, data);
1272 * We also track th most recent recorded KHZ, write and time to
1273 * allow the matching interval to be extended at each write.
1275 kvm->arch.last_tsc_nsec = ns;
1276 kvm->arch.last_tsc_write = data;
1277 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1279 /* Reset of TSC must disable overshoot protection below */
1280 vcpu->arch.hv_clock.tsc_timestamp = 0;
1281 vcpu->arch.last_guest_tsc = data;
1283 /* Keep track of which generation this VCPU has synchronized to */
1284 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1285 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1286 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1288 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1289 update_ia32_tsc_adjust_msr(vcpu, offset);
1290 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1291 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1293 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1295 kvm->arch.nr_vcpus_matched_tsc++;
1297 kvm->arch.nr_vcpus_matched_tsc = 0;
1299 kvm_track_tsc_matching(vcpu);
1300 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1303 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1305 #ifdef CONFIG_X86_64
1307 static cycle_t read_tsc(void)
1313 * Empirically, a fence (of type that depends on the CPU)
1314 * before rdtsc is enough to ensure that rdtsc is ordered
1315 * with respect to loads. The various CPU manuals are unclear
1316 * as to whether rdtsc can be reordered with later loads,
1317 * but no one has ever seen it happen.
1320 ret = (cycle_t)vget_cycles();
1322 last = pvclock_gtod_data.clock.cycle_last;
1324 if (likely(ret >= last))
1328 * GCC likes to generate cmov here, but this branch is extremely
1329 * predictable (it's just a funciton of time and the likely is
1330 * very likely) and there's a data dependence, so force GCC
1331 * to generate a branch instead. I don't barrier() because
1332 * we don't actually need a barrier, and if this function
1333 * ever gets inlined it will generate worse code.
1339 static inline u64 vgettsc(cycle_t *cycle_now)
1342 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1344 *cycle_now = read_tsc();
1346 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1347 return v * gtod->clock.mult;
1350 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1355 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1359 seq = read_seqcount_begin(>od->seq);
1360 mode = gtod->clock.vclock_mode;
1361 ts->tv_sec = gtod->monotonic_time_sec;
1362 ns = gtod->monotonic_time_snsec;
1363 ns += vgettsc(cycle_now);
1364 ns >>= gtod->clock.shift;
1365 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1366 timespec_add_ns(ts, ns);
1371 /* returns true if host is using tsc clocksource */
1372 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1376 /* checked again under seqlock below */
1377 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1380 if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1383 monotonic_to_bootbased(&ts);
1384 *kernel_ns = timespec_to_ns(&ts);
1392 * Assuming a stable TSC across physical CPUS, and a stable TSC
1393 * across virtual CPUs, the following condition is possible.
1394 * Each numbered line represents an event visible to both
1395 * CPUs at the next numbered event.
1397 * "timespecX" represents host monotonic time. "tscX" represents
1400 * VCPU0 on CPU0 | VCPU1 on CPU1
1402 * 1. read timespec0,tsc0
1403 * 2. | timespec1 = timespec0 + N
1405 * 3. transition to guest | transition to guest
1406 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1407 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1408 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1410 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1413 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1415 * - 0 < N - M => M < N
1417 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1418 * always the case (the difference between two distinct xtime instances
1419 * might be smaller then the difference between corresponding TSC reads,
1420 * when updating guest vcpus pvclock areas).
1422 * To avoid that problem, do not allow visibility of distinct
1423 * system_timestamp/tsc_timestamp values simultaneously: use a master
1424 * copy of host monotonic time values. Update that master copy
1427 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1431 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1433 #ifdef CONFIG_X86_64
1434 struct kvm_arch *ka = &kvm->arch;
1436 bool host_tsc_clocksource, vcpus_matched;
1438 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1439 atomic_read(&kvm->online_vcpus));
1442 * If the host uses TSC clock, then passthrough TSC as stable
1445 host_tsc_clocksource = kvm_get_time_and_clockread(
1446 &ka->master_kernel_ns,
1447 &ka->master_cycle_now);
1449 ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1451 if (ka->use_master_clock)
1452 atomic_set(&kvm_guest_has_master_clock, 1);
1454 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1455 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1460 static int kvm_guest_time_update(struct kvm_vcpu *v)
1462 unsigned long flags, this_tsc_khz;
1463 struct kvm_vcpu_arch *vcpu = &v->arch;
1464 struct kvm_arch *ka = &v->kvm->arch;
1465 s64 kernel_ns, max_kernel_ns;
1466 u64 tsc_timestamp, host_tsc;
1467 struct pvclock_vcpu_time_info guest_hv_clock;
1469 bool use_master_clock;
1475 * If the host uses TSC clock, then passthrough TSC as stable
1478 spin_lock(&ka->pvclock_gtod_sync_lock);
1479 use_master_clock = ka->use_master_clock;
1480 if (use_master_clock) {
1481 host_tsc = ka->master_cycle_now;
1482 kernel_ns = ka->master_kernel_ns;
1484 spin_unlock(&ka->pvclock_gtod_sync_lock);
1486 /* Keep irq disabled to prevent changes to the clock */
1487 local_irq_save(flags);
1488 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1489 if (unlikely(this_tsc_khz == 0)) {
1490 local_irq_restore(flags);
1491 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1494 if (!use_master_clock) {
1495 host_tsc = native_read_tsc();
1496 kernel_ns = get_kernel_ns();
1499 tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1502 * We may have to catch up the TSC to match elapsed wall clock
1503 * time for two reasons, even if kvmclock is used.
1504 * 1) CPU could have been running below the maximum TSC rate
1505 * 2) Broken TSC compensation resets the base at each VCPU
1506 * entry to avoid unknown leaps of TSC even when running
1507 * again on the same CPU. This may cause apparent elapsed
1508 * time to disappear, and the guest to stand still or run
1511 if (vcpu->tsc_catchup) {
1512 u64 tsc = compute_guest_tsc(v, kernel_ns);
1513 if (tsc > tsc_timestamp) {
1514 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1515 tsc_timestamp = tsc;
1519 local_irq_restore(flags);
1521 if (!vcpu->pv_time_enabled)
1525 * Time as measured by the TSC may go backwards when resetting the base
1526 * tsc_timestamp. The reason for this is that the TSC resolution is
1527 * higher than the resolution of the other clock scales. Thus, many
1528 * possible measurments of the TSC correspond to one measurement of any
1529 * other clock, and so a spread of values is possible. This is not a
1530 * problem for the computation of the nanosecond clock; with TSC rates
1531 * around 1GHZ, there can only be a few cycles which correspond to one
1532 * nanosecond value, and any path through this code will inevitably
1533 * take longer than that. However, with the kernel_ns value itself,
1534 * the precision may be much lower, down to HZ granularity. If the
1535 * first sampling of TSC against kernel_ns ends in the low part of the
1536 * range, and the second in the high end of the range, we can get:
1538 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1540 * As the sampling errors potentially range in the thousands of cycles,
1541 * it is possible such a time value has already been observed by the
1542 * guest. To protect against this, we must compute the system time as
1543 * observed by the guest and ensure the new system time is greater.
1546 if (vcpu->hv_clock.tsc_timestamp) {
1547 max_kernel_ns = vcpu->last_guest_tsc -
1548 vcpu->hv_clock.tsc_timestamp;
1549 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1550 vcpu->hv_clock.tsc_to_system_mul,
1551 vcpu->hv_clock.tsc_shift);
1552 max_kernel_ns += vcpu->last_kernel_ns;
1555 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1556 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1557 &vcpu->hv_clock.tsc_shift,
1558 &vcpu->hv_clock.tsc_to_system_mul);
1559 vcpu->hw_tsc_khz = this_tsc_khz;
1562 /* with a master <monotonic time, tsc value> tuple,
1563 * pvclock clock reads always increase at the (scaled) rate
1564 * of guest TSC - no need to deal with sampling errors.
1566 if (!use_master_clock) {
1567 if (max_kernel_ns > kernel_ns)
1568 kernel_ns = max_kernel_ns;
1570 /* With all the info we got, fill in the values */
1571 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1572 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1573 vcpu->last_kernel_ns = kernel_ns;
1574 vcpu->last_guest_tsc = tsc_timestamp;
1577 * The interface expects us to write an even number signaling that the
1578 * update is finished. Since the guest won't see the intermediate
1579 * state, we just increase by 2 at the end.
1581 vcpu->hv_clock.version += 2;
1583 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1584 &guest_hv_clock, sizeof(guest_hv_clock))))
1587 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1588 pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1590 if (vcpu->pvclock_set_guest_stopped_request) {
1591 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1592 vcpu->pvclock_set_guest_stopped_request = false;
1595 /* If the host uses TSC clocksource, then it is stable */
1596 if (use_master_clock)
1597 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1599 vcpu->hv_clock.flags = pvclock_flags;
1601 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1603 sizeof(vcpu->hv_clock));
1608 * kvmclock updates which are isolated to a given vcpu, such as
1609 * vcpu->cpu migration, should not allow system_timestamp from
1610 * the rest of the vcpus to remain static. Otherwise ntp frequency
1611 * correction applies to one vcpu's system_timestamp but not
1614 * So in those cases, request a kvmclock update for all vcpus.
1615 * The worst case for a remote vcpu to update its kvmclock
1616 * is then bounded by maximum nohz sleep latency.
1619 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1622 struct kvm *kvm = v->kvm;
1623 struct kvm_vcpu *vcpu;
1625 kvm_for_each_vcpu(i, vcpu, kvm) {
1626 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
1627 kvm_vcpu_kick(vcpu);
1631 static bool msr_mtrr_valid(unsigned msr)
1634 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1635 case MSR_MTRRfix64K_00000:
1636 case MSR_MTRRfix16K_80000:
1637 case MSR_MTRRfix16K_A0000:
1638 case MSR_MTRRfix4K_C0000:
1639 case MSR_MTRRfix4K_C8000:
1640 case MSR_MTRRfix4K_D0000:
1641 case MSR_MTRRfix4K_D8000:
1642 case MSR_MTRRfix4K_E0000:
1643 case MSR_MTRRfix4K_E8000:
1644 case MSR_MTRRfix4K_F0000:
1645 case MSR_MTRRfix4K_F8000:
1646 case MSR_MTRRdefType:
1647 case MSR_IA32_CR_PAT:
1655 static bool valid_pat_type(unsigned t)
1657 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1660 static bool valid_mtrr_type(unsigned t)
1662 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1665 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1669 if (!msr_mtrr_valid(msr))
1672 if (msr == MSR_IA32_CR_PAT) {
1673 for (i = 0; i < 8; i++)
1674 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1677 } else if (msr == MSR_MTRRdefType) {
1680 return valid_mtrr_type(data & 0xff);
1681 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1682 for (i = 0; i < 8 ; i++)
1683 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1688 /* variable MTRRs */
1689 return valid_mtrr_type(data & 0xff);
1692 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1694 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1696 if (!mtrr_valid(vcpu, msr, data))
1699 if (msr == MSR_MTRRdefType) {
1700 vcpu->arch.mtrr_state.def_type = data;
1701 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1702 } else if (msr == MSR_MTRRfix64K_00000)
1704 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1705 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1706 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1707 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1708 else if (msr == MSR_IA32_CR_PAT)
1709 vcpu->arch.pat = data;
1710 else { /* Variable MTRRs */
1711 int idx, is_mtrr_mask;
1714 idx = (msr - 0x200) / 2;
1715 is_mtrr_mask = msr - 0x200 - 2 * idx;
1718 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1721 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1725 kvm_mmu_reset_context(vcpu);
1729 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1731 u64 mcg_cap = vcpu->arch.mcg_cap;
1732 unsigned bank_num = mcg_cap & 0xff;
1735 case MSR_IA32_MCG_STATUS:
1736 vcpu->arch.mcg_status = data;
1738 case MSR_IA32_MCG_CTL:
1739 if (!(mcg_cap & MCG_CTL_P))
1741 if (data != 0 && data != ~(u64)0)
1743 vcpu->arch.mcg_ctl = data;
1746 if (msr >= MSR_IA32_MC0_CTL &&
1747 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1748 u32 offset = msr - MSR_IA32_MC0_CTL;
1749 /* only 0 or all 1s can be written to IA32_MCi_CTL
1750 * some Linux kernels though clear bit 10 in bank 4 to
1751 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1752 * this to avoid an uncatched #GP in the guest
1754 if ((offset & 0x3) == 0 &&
1755 data != 0 && (data | (1 << 10)) != ~(u64)0)
1757 vcpu->arch.mce_banks[offset] = data;
1765 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1767 struct kvm *kvm = vcpu->kvm;
1768 int lm = is_long_mode(vcpu);
1769 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1770 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1771 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1772 : kvm->arch.xen_hvm_config.blob_size_32;
1773 u32 page_num = data & ~PAGE_MASK;
1774 u64 page_addr = data & PAGE_MASK;
1779 if (page_num >= blob_size)
1782 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1787 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1796 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1798 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1801 static bool kvm_hv_msr_partition_wide(u32 msr)
1805 case HV_X64_MSR_GUEST_OS_ID:
1806 case HV_X64_MSR_HYPERCALL:
1814 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1816 struct kvm *kvm = vcpu->kvm;
1819 case HV_X64_MSR_GUEST_OS_ID:
1820 kvm->arch.hv_guest_os_id = data;
1821 /* setting guest os id to zero disables hypercall page */
1822 if (!kvm->arch.hv_guest_os_id)
1823 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1825 case HV_X64_MSR_HYPERCALL: {
1830 /* if guest os id is not set hypercall should remain disabled */
1831 if (!kvm->arch.hv_guest_os_id)
1833 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1834 kvm->arch.hv_hypercall = data;
1837 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1838 addr = gfn_to_hva(kvm, gfn);
1839 if (kvm_is_error_hva(addr))
1841 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1842 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1843 if (__copy_to_user((void __user *)addr, instructions, 4))
1845 kvm->arch.hv_hypercall = data;
1849 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1850 "data 0x%llx\n", msr, data);
1856 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1859 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1862 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1863 vcpu->arch.hv_vapic = data;
1866 addr = gfn_to_hva(vcpu->kvm, data >>
1867 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1868 if (kvm_is_error_hva(addr))
1870 if (__clear_user((void __user *)addr, PAGE_SIZE))
1872 vcpu->arch.hv_vapic = data;
1875 case HV_X64_MSR_EOI:
1876 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1877 case HV_X64_MSR_ICR:
1878 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1879 case HV_X64_MSR_TPR:
1880 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1882 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1883 "data 0x%llx\n", msr, data);
1890 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1892 gpa_t gpa = data & ~0x3f;
1894 /* Bits 2:5 are reserved, Should be zero */
1898 vcpu->arch.apf.msr_val = data;
1900 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1901 kvm_clear_async_pf_completion_queue(vcpu);
1902 kvm_async_pf_hash_reset(vcpu);
1906 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1910 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1911 kvm_async_pf_wakeup_all(vcpu);
1915 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1917 vcpu->arch.pv_time_enabled = false;
1920 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1924 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1927 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1928 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1929 vcpu->arch.st.accum_steal = delta;
1932 static void record_steal_time(struct kvm_vcpu *vcpu)
1934 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1937 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1938 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1941 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1942 vcpu->arch.st.steal.version += 2;
1943 vcpu->arch.st.accum_steal = 0;
1945 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1946 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1949 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1952 u32 msr = msr_info->index;
1953 u64 data = msr_info->data;
1956 case MSR_AMD64_NB_CFG:
1957 case MSR_IA32_UCODE_REV:
1958 case MSR_IA32_UCODE_WRITE:
1959 case MSR_VM_HSAVE_PA:
1960 case MSR_AMD64_PATCH_LOADER:
1961 case MSR_AMD64_BU_CFG2:
1965 return set_efer(vcpu, data);
1967 data &= ~(u64)0x40; /* ignore flush filter disable */
1968 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1969 data &= ~(u64)0x8; /* ignore TLB cache disable */
1971 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1976 case MSR_FAM10H_MMIO_CONF_BASE:
1978 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1983 case MSR_IA32_DEBUGCTLMSR:
1985 /* We support the non-activated case already */
1987 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1988 /* Values other than LBR and BTF are vendor-specific,
1989 thus reserved and should throw a #GP */
1992 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1995 case 0x200 ... 0x2ff:
1996 return set_msr_mtrr(vcpu, msr, data);
1997 case MSR_IA32_APICBASE:
1998 kvm_set_apic_base(vcpu, data);
2000 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2001 return kvm_x2apic_msr_write(vcpu, msr, data);
2002 case MSR_IA32_TSCDEADLINE:
2003 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2005 case MSR_IA32_TSC_ADJUST:
2006 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2007 if (!msr_info->host_initiated) {
2008 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2009 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
2011 vcpu->arch.ia32_tsc_adjust_msr = data;
2014 case MSR_IA32_MISC_ENABLE:
2015 vcpu->arch.ia32_misc_enable_msr = data;
2017 case MSR_KVM_WALL_CLOCK_NEW:
2018 case MSR_KVM_WALL_CLOCK:
2019 vcpu->kvm->arch.wall_clock = data;
2020 kvm_write_wall_clock(vcpu->kvm, data);
2022 case MSR_KVM_SYSTEM_TIME_NEW:
2023 case MSR_KVM_SYSTEM_TIME: {
2025 kvmclock_reset(vcpu);
2027 vcpu->arch.time = data;
2028 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2030 /* we verify if the enable bit is set... */
2034 gpa_offset = data & ~(PAGE_MASK | 1);
2036 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2037 &vcpu->arch.pv_time, data & ~1ULL,
2038 sizeof(struct pvclock_vcpu_time_info)))
2039 vcpu->arch.pv_time_enabled = false;
2041 vcpu->arch.pv_time_enabled = true;
2045 case MSR_KVM_ASYNC_PF_EN:
2046 if (kvm_pv_enable_async_pf(vcpu, data))
2049 case MSR_KVM_STEAL_TIME:
2051 if (unlikely(!sched_info_on()))
2054 if (data & KVM_STEAL_RESERVED_MASK)
2057 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2058 data & KVM_STEAL_VALID_BITS,
2059 sizeof(struct kvm_steal_time)))
2062 vcpu->arch.st.msr_val = data;
2064 if (!(data & KVM_MSR_ENABLED))
2067 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2070 accumulate_steal_time(vcpu);
2073 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2076 case MSR_KVM_PV_EOI_EN:
2077 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2081 case MSR_IA32_MCG_CTL:
2082 case MSR_IA32_MCG_STATUS:
2083 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2084 return set_msr_mce(vcpu, msr, data);
2086 /* Performance counters are not protected by a CPUID bit,
2087 * so we should check all of them in the generic path for the sake of
2088 * cross vendor migration.
2089 * Writing a zero into the event select MSRs disables them,
2090 * which we perfectly emulate ;-). Any other value should be at least
2091 * reported, some guests depend on them.
2093 case MSR_K7_EVNTSEL0:
2094 case MSR_K7_EVNTSEL1:
2095 case MSR_K7_EVNTSEL2:
2096 case MSR_K7_EVNTSEL3:
2098 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2099 "0x%x data 0x%llx\n", msr, data);
2101 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2102 * so we ignore writes to make it happy.
2104 case MSR_K7_PERFCTR0:
2105 case MSR_K7_PERFCTR1:
2106 case MSR_K7_PERFCTR2:
2107 case MSR_K7_PERFCTR3:
2108 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2109 "0x%x data 0x%llx\n", msr, data);
2111 case MSR_P6_PERFCTR0:
2112 case MSR_P6_PERFCTR1:
2114 case MSR_P6_EVNTSEL0:
2115 case MSR_P6_EVNTSEL1:
2116 if (kvm_pmu_msr(vcpu, msr))
2117 return kvm_pmu_set_msr(vcpu, msr_info);
2119 if (pr || data != 0)
2120 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2121 "0x%x data 0x%llx\n", msr, data);
2123 case MSR_K7_CLK_CTL:
2125 * Ignore all writes to this no longer documented MSR.
2126 * Writes are only relevant for old K7 processors,
2127 * all pre-dating SVM, but a recommended workaround from
2128 * AMD for these chips. It is possible to specify the
2129 * affected processor models on the command line, hence
2130 * the need to ignore the workaround.
2133 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2134 if (kvm_hv_msr_partition_wide(msr)) {
2136 mutex_lock(&vcpu->kvm->lock);
2137 r = set_msr_hyperv_pw(vcpu, msr, data);
2138 mutex_unlock(&vcpu->kvm->lock);
2141 return set_msr_hyperv(vcpu, msr, data);
2143 case MSR_IA32_BBL_CR_CTL3:
2144 /* Drop writes to this legacy MSR -- see rdmsr
2145 * counterpart for further detail.
2147 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2149 case MSR_AMD64_OSVW_ID_LENGTH:
2150 if (!guest_cpuid_has_osvw(vcpu))
2152 vcpu->arch.osvw.length = data;
2154 case MSR_AMD64_OSVW_STATUS:
2155 if (!guest_cpuid_has_osvw(vcpu))
2157 vcpu->arch.osvw.status = data;
2160 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2161 return xen_hvm_config(vcpu, data);
2162 if (kvm_pmu_msr(vcpu, msr))
2163 return kvm_pmu_set_msr(vcpu, msr_info);
2165 vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2169 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2176 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2180 * Reads an msr value (of 'msr_index') into 'pdata'.
2181 * Returns 0 on success, non-0 otherwise.
2182 * Assumes vcpu_load() was already called.
2184 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2186 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2189 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2191 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2193 if (!msr_mtrr_valid(msr))
2196 if (msr == MSR_MTRRdefType)
2197 *pdata = vcpu->arch.mtrr_state.def_type +
2198 (vcpu->arch.mtrr_state.enabled << 10);
2199 else if (msr == MSR_MTRRfix64K_00000)
2201 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2202 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2203 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2204 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2205 else if (msr == MSR_IA32_CR_PAT)
2206 *pdata = vcpu->arch.pat;
2207 else { /* Variable MTRRs */
2208 int idx, is_mtrr_mask;
2211 idx = (msr - 0x200) / 2;
2212 is_mtrr_mask = msr - 0x200 - 2 * idx;
2215 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2218 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2225 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2228 u64 mcg_cap = vcpu->arch.mcg_cap;
2229 unsigned bank_num = mcg_cap & 0xff;
2232 case MSR_IA32_P5_MC_ADDR:
2233 case MSR_IA32_P5_MC_TYPE:
2236 case MSR_IA32_MCG_CAP:
2237 data = vcpu->arch.mcg_cap;
2239 case MSR_IA32_MCG_CTL:
2240 if (!(mcg_cap & MCG_CTL_P))
2242 data = vcpu->arch.mcg_ctl;
2244 case MSR_IA32_MCG_STATUS:
2245 data = vcpu->arch.mcg_status;
2248 if (msr >= MSR_IA32_MC0_CTL &&
2249 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2250 u32 offset = msr - MSR_IA32_MC0_CTL;
2251 data = vcpu->arch.mce_banks[offset];
2260 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2263 struct kvm *kvm = vcpu->kvm;
2266 case HV_X64_MSR_GUEST_OS_ID:
2267 data = kvm->arch.hv_guest_os_id;
2269 case HV_X64_MSR_HYPERCALL:
2270 data = kvm->arch.hv_hypercall;
2273 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2281 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2286 case HV_X64_MSR_VP_INDEX: {
2289 kvm_for_each_vcpu(r, v, vcpu->kvm)
2294 case HV_X64_MSR_EOI:
2295 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2296 case HV_X64_MSR_ICR:
2297 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2298 case HV_X64_MSR_TPR:
2299 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2300 case HV_X64_MSR_APIC_ASSIST_PAGE:
2301 data = vcpu->arch.hv_vapic;
2304 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2311 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2316 case MSR_IA32_PLATFORM_ID:
2317 case MSR_IA32_EBL_CR_POWERON:
2318 case MSR_IA32_DEBUGCTLMSR:
2319 case MSR_IA32_LASTBRANCHFROMIP:
2320 case MSR_IA32_LASTBRANCHTOIP:
2321 case MSR_IA32_LASTINTFROMIP:
2322 case MSR_IA32_LASTINTTOIP:
2325 case MSR_VM_HSAVE_PA:
2326 case MSR_K7_EVNTSEL0:
2327 case MSR_K7_PERFCTR0:
2328 case MSR_K8_INT_PENDING_MSG:
2329 case MSR_AMD64_NB_CFG:
2330 case MSR_FAM10H_MMIO_CONF_BASE:
2331 case MSR_AMD64_BU_CFG2:
2334 case MSR_P6_PERFCTR0:
2335 case MSR_P6_PERFCTR1:
2336 case MSR_P6_EVNTSEL0:
2337 case MSR_P6_EVNTSEL1:
2338 if (kvm_pmu_msr(vcpu, msr))
2339 return kvm_pmu_get_msr(vcpu, msr, pdata);
2342 case MSR_IA32_UCODE_REV:
2343 data = 0x100000000ULL;
2346 data = 0x500 | KVM_NR_VAR_MTRR;
2348 case 0x200 ... 0x2ff:
2349 return get_msr_mtrr(vcpu, msr, pdata);
2350 case 0xcd: /* fsb frequency */
2354 * MSR_EBC_FREQUENCY_ID
2355 * Conservative value valid for even the basic CPU models.
2356 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2357 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2358 * and 266MHz for model 3, or 4. Set Core Clock
2359 * Frequency to System Bus Frequency Ratio to 1 (bits
2360 * 31:24) even though these are only valid for CPU
2361 * models > 2, however guests may end up dividing or
2362 * multiplying by zero otherwise.
2364 case MSR_EBC_FREQUENCY_ID:
2367 case MSR_IA32_APICBASE:
2368 data = kvm_get_apic_base(vcpu);
2370 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2371 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2373 case MSR_IA32_TSCDEADLINE:
2374 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2376 case MSR_IA32_TSC_ADJUST:
2377 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2379 case MSR_IA32_MISC_ENABLE:
2380 data = vcpu->arch.ia32_misc_enable_msr;
2382 case MSR_IA32_PERF_STATUS:
2383 /* TSC increment by tick */
2385 /* CPU multiplier */
2386 data |= (((uint64_t)4ULL) << 40);
2389 data = vcpu->arch.efer;
2391 case MSR_KVM_WALL_CLOCK:
2392 case MSR_KVM_WALL_CLOCK_NEW:
2393 data = vcpu->kvm->arch.wall_clock;
2395 case MSR_KVM_SYSTEM_TIME:
2396 case MSR_KVM_SYSTEM_TIME_NEW:
2397 data = vcpu->arch.time;
2399 case MSR_KVM_ASYNC_PF_EN:
2400 data = vcpu->arch.apf.msr_val;
2402 case MSR_KVM_STEAL_TIME:
2403 data = vcpu->arch.st.msr_val;
2405 case MSR_KVM_PV_EOI_EN:
2406 data = vcpu->arch.pv_eoi.msr_val;
2408 case MSR_IA32_P5_MC_ADDR:
2409 case MSR_IA32_P5_MC_TYPE:
2410 case MSR_IA32_MCG_CAP:
2411 case MSR_IA32_MCG_CTL:
2412 case MSR_IA32_MCG_STATUS:
2413 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2414 return get_msr_mce(vcpu, msr, pdata);
2415 case MSR_K7_CLK_CTL:
2417 * Provide expected ramp-up count for K7. All other
2418 * are set to zero, indicating minimum divisors for
2421 * This prevents guest kernels on AMD host with CPU
2422 * type 6, model 8 and higher from exploding due to
2423 * the rdmsr failing.
2427 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2428 if (kvm_hv_msr_partition_wide(msr)) {
2430 mutex_lock(&vcpu->kvm->lock);
2431 r = get_msr_hyperv_pw(vcpu, msr, pdata);
2432 mutex_unlock(&vcpu->kvm->lock);
2435 return get_msr_hyperv(vcpu, msr, pdata);
2437 case MSR_IA32_BBL_CR_CTL3:
2438 /* This legacy MSR exists but isn't fully documented in current
2439 * silicon. It is however accessed by winxp in very narrow
2440 * scenarios where it sets bit #19, itself documented as
2441 * a "reserved" bit. Best effort attempt to source coherent
2442 * read data here should the balance of the register be
2443 * interpreted by the guest:
2445 * L2 cache control register 3: 64GB range, 256KB size,
2446 * enabled, latency 0x1, configured
2450 case MSR_AMD64_OSVW_ID_LENGTH:
2451 if (!guest_cpuid_has_osvw(vcpu))
2453 data = vcpu->arch.osvw.length;
2455 case MSR_AMD64_OSVW_STATUS:
2456 if (!guest_cpuid_has_osvw(vcpu))
2458 data = vcpu->arch.osvw.status;
2461 if (kvm_pmu_msr(vcpu, msr))
2462 return kvm_pmu_get_msr(vcpu, msr, pdata);
2464 vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2467 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2475 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2478 * Read or write a bunch of msrs. All parameters are kernel addresses.
2480 * @return number of msrs set successfully.
2482 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2483 struct kvm_msr_entry *entries,
2484 int (*do_msr)(struct kvm_vcpu *vcpu,
2485 unsigned index, u64 *data))
2489 idx = srcu_read_lock(&vcpu->kvm->srcu);
2490 for (i = 0; i < msrs->nmsrs; ++i)
2491 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2493 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2499 * Read or write a bunch of msrs. Parameters are user addresses.
2501 * @return number of msrs set successfully.
2503 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2504 int (*do_msr)(struct kvm_vcpu *vcpu,
2505 unsigned index, u64 *data),
2508 struct kvm_msrs msrs;
2509 struct kvm_msr_entry *entries;
2514 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2518 if (msrs.nmsrs >= MAX_IO_MSRS)
2521 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2522 entries = memdup_user(user_msrs->entries, size);
2523 if (IS_ERR(entries)) {
2524 r = PTR_ERR(entries);
2528 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2533 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2544 int kvm_dev_ioctl_check_extension(long ext)
2549 case KVM_CAP_IRQCHIP:
2551 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2552 case KVM_CAP_SET_TSS_ADDR:
2553 case KVM_CAP_EXT_CPUID:
2554 case KVM_CAP_CLOCKSOURCE:
2556 case KVM_CAP_NOP_IO_DELAY:
2557 case KVM_CAP_MP_STATE:
2558 case KVM_CAP_SYNC_MMU:
2559 case KVM_CAP_USER_NMI:
2560 case KVM_CAP_REINJECT_CONTROL:
2561 case KVM_CAP_IRQ_INJECT_STATUS:
2563 case KVM_CAP_IOEVENTFD:
2565 case KVM_CAP_PIT_STATE2:
2566 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2567 case KVM_CAP_XEN_HVM:
2568 case KVM_CAP_ADJUST_CLOCK:
2569 case KVM_CAP_VCPU_EVENTS:
2570 case KVM_CAP_HYPERV:
2571 case KVM_CAP_HYPERV_VAPIC:
2572 case KVM_CAP_HYPERV_SPIN:
2573 case KVM_CAP_PCI_SEGMENT:
2574 case KVM_CAP_DEBUGREGS:
2575 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2577 case KVM_CAP_ASYNC_PF:
2578 case KVM_CAP_GET_TSC_KHZ:
2579 case KVM_CAP_KVMCLOCK_CTRL:
2580 case KVM_CAP_READONLY_MEM:
2581 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2582 case KVM_CAP_ASSIGN_DEV_IRQ:
2583 case KVM_CAP_PCI_2_3:
2587 case KVM_CAP_COALESCED_MMIO:
2588 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2591 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2593 case KVM_CAP_NR_VCPUS:
2594 r = KVM_SOFT_MAX_VCPUS;
2596 case KVM_CAP_MAX_VCPUS:
2599 case KVM_CAP_NR_MEMSLOTS:
2600 r = KVM_USER_MEM_SLOTS;
2602 case KVM_CAP_PV_MMU: /* obsolete */
2605 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2607 r = iommu_present(&pci_bus_type);
2611 r = KVM_MAX_MCE_BANKS;
2616 case KVM_CAP_TSC_CONTROL:
2617 r = kvm_has_tsc_control;
2619 case KVM_CAP_TSC_DEADLINE_TIMER:
2620 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2630 long kvm_arch_dev_ioctl(struct file *filp,
2631 unsigned int ioctl, unsigned long arg)
2633 void __user *argp = (void __user *)arg;
2637 case KVM_GET_MSR_INDEX_LIST: {
2638 struct kvm_msr_list __user *user_msr_list = argp;
2639 struct kvm_msr_list msr_list;
2643 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2646 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2647 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2650 if (n < msr_list.nmsrs)
2653 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2654 num_msrs_to_save * sizeof(u32)))
2656 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2658 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2663 case KVM_GET_SUPPORTED_CPUID: {
2664 struct kvm_cpuid2 __user *cpuid_arg = argp;
2665 struct kvm_cpuid2 cpuid;
2668 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2670 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2671 cpuid_arg->entries);
2676 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2681 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2684 mce_cap = KVM_MCE_CAP_SUPPORTED;
2686 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2698 static void wbinvd_ipi(void *garbage)
2703 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2705 return vcpu->kvm->arch.iommu_domain &&
2706 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2709 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2711 /* Address WBINVD may be executed by guest */
2712 if (need_emulate_wbinvd(vcpu)) {
2713 if (kvm_x86_ops->has_wbinvd_exit())
2714 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2715 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2716 smp_call_function_single(vcpu->cpu,
2717 wbinvd_ipi, NULL, 1);
2720 kvm_x86_ops->vcpu_load(vcpu, cpu);
2722 /* Apply any externally detected TSC adjustments (due to suspend) */
2723 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2724 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2725 vcpu->arch.tsc_offset_adjustment = 0;
2726 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2729 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2730 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2731 native_read_tsc() - vcpu->arch.last_host_tsc;
2733 mark_tsc_unstable("KVM discovered backwards TSC");
2734 if (check_tsc_unstable()) {
2735 u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2736 vcpu->arch.last_guest_tsc);
2737 kvm_x86_ops->write_tsc_offset(vcpu, offset);
2738 vcpu->arch.tsc_catchup = 1;
2741 * On a host with synchronized TSC, there is no need to update
2742 * kvmclock on vcpu->cpu migration
2744 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2745 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2746 if (vcpu->cpu != cpu)
2747 kvm_migrate_timers(vcpu);
2751 accumulate_steal_time(vcpu);
2752 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2755 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2757 kvm_x86_ops->vcpu_put(vcpu);
2758 kvm_put_guest_fpu(vcpu);
2759 vcpu->arch.last_host_tsc = native_read_tsc();
2762 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2763 struct kvm_lapic_state *s)
2765 kvm_x86_ops->sync_pir_to_irr(vcpu);
2766 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2771 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2772 struct kvm_lapic_state *s)
2774 kvm_apic_post_state_restore(vcpu, s);
2775 update_cr8_intercept(vcpu);
2780 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2781 struct kvm_interrupt *irq)
2783 if (irq->irq >= KVM_NR_INTERRUPTS)
2785 if (irqchip_in_kernel(vcpu->kvm))
2788 kvm_queue_interrupt(vcpu, irq->irq, false);
2789 kvm_make_request(KVM_REQ_EVENT, vcpu);
2794 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2796 kvm_inject_nmi(vcpu);
2801 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2802 struct kvm_tpr_access_ctl *tac)
2806 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2810 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2814 unsigned bank_num = mcg_cap & 0xff, bank;
2817 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2819 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2822 vcpu->arch.mcg_cap = mcg_cap;
2823 /* Init IA32_MCG_CTL to all 1s */
2824 if (mcg_cap & MCG_CTL_P)
2825 vcpu->arch.mcg_ctl = ~(u64)0;
2826 /* Init IA32_MCi_CTL to all 1s */
2827 for (bank = 0; bank < bank_num; bank++)
2828 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2833 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2834 struct kvm_x86_mce *mce)
2836 u64 mcg_cap = vcpu->arch.mcg_cap;
2837 unsigned bank_num = mcg_cap & 0xff;
2838 u64 *banks = vcpu->arch.mce_banks;
2840 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2843 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2844 * reporting is disabled
2846 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2847 vcpu->arch.mcg_ctl != ~(u64)0)
2849 banks += 4 * mce->bank;
2851 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2852 * reporting is disabled for the bank
2854 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2856 if (mce->status & MCI_STATUS_UC) {
2857 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2858 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2859 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2862 if (banks[1] & MCI_STATUS_VAL)
2863 mce->status |= MCI_STATUS_OVER;
2864 banks[2] = mce->addr;
2865 banks[3] = mce->misc;
2866 vcpu->arch.mcg_status = mce->mcg_status;
2867 banks[1] = mce->status;
2868 kvm_queue_exception(vcpu, MC_VECTOR);
2869 } else if (!(banks[1] & MCI_STATUS_VAL)
2870 || !(banks[1] & MCI_STATUS_UC)) {
2871 if (banks[1] & MCI_STATUS_VAL)
2872 mce->status |= MCI_STATUS_OVER;
2873 banks[2] = mce->addr;
2874 banks[3] = mce->misc;
2875 banks[1] = mce->status;
2877 banks[1] |= MCI_STATUS_OVER;
2881 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2882 struct kvm_vcpu_events *events)
2885 events->exception.injected =
2886 vcpu->arch.exception.pending &&
2887 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2888 events->exception.nr = vcpu->arch.exception.nr;
2889 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2890 events->exception.pad = 0;
2891 events->exception.error_code = vcpu->arch.exception.error_code;
2893 events->interrupt.injected =
2894 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2895 events->interrupt.nr = vcpu->arch.interrupt.nr;
2896 events->interrupt.soft = 0;
2897 events->interrupt.shadow =
2898 kvm_x86_ops->get_interrupt_shadow(vcpu,
2899 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2901 events->nmi.injected = vcpu->arch.nmi_injected;
2902 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2903 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2904 events->nmi.pad = 0;
2906 events->sipi_vector = 0; /* never valid when reporting to user space */
2908 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2909 | KVM_VCPUEVENT_VALID_SHADOW);
2910 memset(&events->reserved, 0, sizeof(events->reserved));
2913 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2914 struct kvm_vcpu_events *events)
2916 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2917 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2918 | KVM_VCPUEVENT_VALID_SHADOW))
2922 vcpu->arch.exception.pending = events->exception.injected;
2923 vcpu->arch.exception.nr = events->exception.nr;
2924 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2925 vcpu->arch.exception.error_code = events->exception.error_code;
2927 vcpu->arch.interrupt.pending = events->interrupt.injected;
2928 vcpu->arch.interrupt.nr = events->interrupt.nr;
2929 vcpu->arch.interrupt.soft = events->interrupt.soft;
2930 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2931 kvm_x86_ops->set_interrupt_shadow(vcpu,
2932 events->interrupt.shadow);
2934 vcpu->arch.nmi_injected = events->nmi.injected;
2935 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2936 vcpu->arch.nmi_pending = events->nmi.pending;
2937 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2939 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2940 kvm_vcpu_has_lapic(vcpu))
2941 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2943 kvm_make_request(KVM_REQ_EVENT, vcpu);
2948 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2949 struct kvm_debugregs *dbgregs)
2951 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2952 dbgregs->dr6 = vcpu->arch.dr6;
2953 dbgregs->dr7 = vcpu->arch.dr7;
2955 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2958 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2959 struct kvm_debugregs *dbgregs)
2964 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2965 vcpu->arch.dr6 = dbgregs->dr6;
2966 vcpu->arch.dr7 = dbgregs->dr7;
2971 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2972 struct kvm_xsave *guest_xsave)
2975 memcpy(guest_xsave->region,
2976 &vcpu->arch.guest_fpu.state->xsave,
2979 memcpy(guest_xsave->region,
2980 &vcpu->arch.guest_fpu.state->fxsave,
2981 sizeof(struct i387_fxsave_struct));
2982 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2987 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2988 struct kvm_xsave *guest_xsave)
2991 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2994 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2995 guest_xsave->region, xstate_size);
2997 if (xstate_bv & ~XSTATE_FPSSE)
2999 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3000 guest_xsave->region, sizeof(struct i387_fxsave_struct));
3005 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3006 struct kvm_xcrs *guest_xcrs)
3008 if (!cpu_has_xsave) {
3009 guest_xcrs->nr_xcrs = 0;
3013 guest_xcrs->nr_xcrs = 1;
3014 guest_xcrs->flags = 0;
3015 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3016 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3019 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3020 struct kvm_xcrs *guest_xcrs)
3027 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3030 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3031 /* Only support XCR0 currently */
3032 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3033 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3034 guest_xcrs->xcrs[0].value);
3043 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3044 * stopped by the hypervisor. This function will be called from the host only.
3045 * EINVAL is returned when the host attempts to set the flag for a guest that
3046 * does not support pv clocks.
3048 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3050 if (!vcpu->arch.pv_time_enabled)
3052 vcpu->arch.pvclock_set_guest_stopped_request = true;
3053 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3057 long kvm_arch_vcpu_ioctl(struct file *filp,
3058 unsigned int ioctl, unsigned long arg)
3060 struct kvm_vcpu *vcpu = filp->private_data;
3061 void __user *argp = (void __user *)arg;
3064 struct kvm_lapic_state *lapic;
3065 struct kvm_xsave *xsave;
3066 struct kvm_xcrs *xcrs;
3072 case KVM_GET_LAPIC: {
3074 if (!vcpu->arch.apic)
3076 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3081 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3085 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3090 case KVM_SET_LAPIC: {
3092 if (!vcpu->arch.apic)
3094 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3095 if (IS_ERR(u.lapic))
3096 return PTR_ERR(u.lapic);
3098 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3101 case KVM_INTERRUPT: {
3102 struct kvm_interrupt irq;
3105 if (copy_from_user(&irq, argp, sizeof irq))
3107 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3111 r = kvm_vcpu_ioctl_nmi(vcpu);
3114 case KVM_SET_CPUID: {
3115 struct kvm_cpuid __user *cpuid_arg = argp;
3116 struct kvm_cpuid cpuid;
3119 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3121 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3124 case KVM_SET_CPUID2: {
3125 struct kvm_cpuid2 __user *cpuid_arg = argp;
3126 struct kvm_cpuid2 cpuid;
3129 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3131 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3132 cpuid_arg->entries);
3135 case KVM_GET_CPUID2: {
3136 struct kvm_cpuid2 __user *cpuid_arg = argp;
3137 struct kvm_cpuid2 cpuid;
3140 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3142 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3143 cpuid_arg->entries);
3147 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3153 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3156 r = msr_io(vcpu, argp, do_set_msr, 0);
3158 case KVM_TPR_ACCESS_REPORTING: {
3159 struct kvm_tpr_access_ctl tac;
3162 if (copy_from_user(&tac, argp, sizeof tac))
3164 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3168 if (copy_to_user(argp, &tac, sizeof tac))
3173 case KVM_SET_VAPIC_ADDR: {
3174 struct kvm_vapic_addr va;
3177 if (!irqchip_in_kernel(vcpu->kvm))
3180 if (copy_from_user(&va, argp, sizeof va))
3183 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3186 case KVM_X86_SETUP_MCE: {
3190 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3192 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3195 case KVM_X86_SET_MCE: {
3196 struct kvm_x86_mce mce;
3199 if (copy_from_user(&mce, argp, sizeof mce))
3201 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3204 case KVM_GET_VCPU_EVENTS: {
3205 struct kvm_vcpu_events events;
3207 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3210 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3215 case KVM_SET_VCPU_EVENTS: {
3216 struct kvm_vcpu_events events;
3219 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3222 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3225 case KVM_GET_DEBUGREGS: {
3226 struct kvm_debugregs dbgregs;
3228 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3231 if (copy_to_user(argp, &dbgregs,
3232 sizeof(struct kvm_debugregs)))
3237 case KVM_SET_DEBUGREGS: {
3238 struct kvm_debugregs dbgregs;
3241 if (copy_from_user(&dbgregs, argp,
3242 sizeof(struct kvm_debugregs)))
3245 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3248 case KVM_GET_XSAVE: {
3249 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3254 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3257 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3262 case KVM_SET_XSAVE: {
3263 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3264 if (IS_ERR(u.xsave))
3265 return PTR_ERR(u.xsave);
3267 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3270 case KVM_GET_XCRS: {
3271 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3276 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3279 if (copy_to_user(argp, u.xcrs,
3280 sizeof(struct kvm_xcrs)))
3285 case KVM_SET_XCRS: {
3286 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3288 return PTR_ERR(u.xcrs);
3290 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3293 case KVM_SET_TSC_KHZ: {
3297 user_tsc_khz = (u32)arg;
3299 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3302 if (user_tsc_khz == 0)
3303 user_tsc_khz = tsc_khz;
3305 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3310 case KVM_GET_TSC_KHZ: {
3311 r = vcpu->arch.virtual_tsc_khz;
3314 case KVM_KVMCLOCK_CTRL: {
3315 r = kvm_set_guest_paused(vcpu);
3326 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3328 return VM_FAULT_SIGBUS;
3331 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3335 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3337 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3341 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3344 kvm->arch.ept_identity_map_addr = ident_addr;
3348 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3349 u32 kvm_nr_mmu_pages)
3351 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3354 mutex_lock(&kvm->slots_lock);
3356 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3357 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3359 mutex_unlock(&kvm->slots_lock);
3363 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3365 return kvm->arch.n_max_mmu_pages;
3368 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3373 switch (chip->chip_id) {
3374 case KVM_IRQCHIP_PIC_MASTER:
3375 memcpy(&chip->chip.pic,
3376 &pic_irqchip(kvm)->pics[0],
3377 sizeof(struct kvm_pic_state));
3379 case KVM_IRQCHIP_PIC_SLAVE:
3380 memcpy(&chip->chip.pic,
3381 &pic_irqchip(kvm)->pics[1],
3382 sizeof(struct kvm_pic_state));
3384 case KVM_IRQCHIP_IOAPIC:
3385 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3394 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3399 switch (chip->chip_id) {
3400 case KVM_IRQCHIP_PIC_MASTER:
3401 spin_lock(&pic_irqchip(kvm)->lock);
3402 memcpy(&pic_irqchip(kvm)->pics[0],
3404 sizeof(struct kvm_pic_state));
3405 spin_unlock(&pic_irqchip(kvm)->lock);
3407 case KVM_IRQCHIP_PIC_SLAVE:
3408 spin_lock(&pic_irqchip(kvm)->lock);
3409 memcpy(&pic_irqchip(kvm)->pics[1],
3411 sizeof(struct kvm_pic_state));
3412 spin_unlock(&pic_irqchip(kvm)->lock);
3414 case KVM_IRQCHIP_IOAPIC:
3415 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3421 kvm_pic_update_irq(pic_irqchip(kvm));
3425 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3429 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3430 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3431 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3435 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3439 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3440 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3441 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3442 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3446 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3450 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3451 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3452 sizeof(ps->channels));
3453 ps->flags = kvm->arch.vpit->pit_state.flags;
3454 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3455 memset(&ps->reserved, 0, sizeof(ps->reserved));
3459 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3461 int r = 0, start = 0;
3462 u32 prev_legacy, cur_legacy;
3463 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3464 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3465 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3466 if (!prev_legacy && cur_legacy)
3468 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3469 sizeof(kvm->arch.vpit->pit_state.channels));
3470 kvm->arch.vpit->pit_state.flags = ps->flags;
3471 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3472 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3476 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3477 struct kvm_reinject_control *control)
3479 if (!kvm->arch.vpit)
3481 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3482 kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3483 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3488 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3489 * @kvm: kvm instance
3490 * @log: slot id and address to which we copy the log
3492 * We need to keep it in mind that VCPU threads can write to the bitmap
3493 * concurrently. So, to avoid losing data, we keep the following order for
3496 * 1. Take a snapshot of the bit and clear it if needed.
3497 * 2. Write protect the corresponding page.
3498 * 3. Flush TLB's if needed.
3499 * 4. Copy the snapshot to the userspace.
3501 * Between 2 and 3, the guest may write to the page using the remaining TLB
3502 * entry. This is not a problem because the page will be reported dirty at
3503 * step 4 using the snapshot taken before and step 3 ensures that successive
3504 * writes will be logged for the next call.
3506 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3509 struct kvm_memory_slot *memslot;
3511 unsigned long *dirty_bitmap;
3512 unsigned long *dirty_bitmap_buffer;
3513 bool is_dirty = false;
3515 mutex_lock(&kvm->slots_lock);
3518 if (log->slot >= KVM_USER_MEM_SLOTS)
3521 memslot = id_to_memslot(kvm->memslots, log->slot);
3523 dirty_bitmap = memslot->dirty_bitmap;
3528 n = kvm_dirty_bitmap_bytes(memslot);
3530 dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3531 memset(dirty_bitmap_buffer, 0, n);
3533 spin_lock(&kvm->mmu_lock);
3535 for (i = 0; i < n / sizeof(long); i++) {
3539 if (!dirty_bitmap[i])
3544 mask = xchg(&dirty_bitmap[i], 0);
3545 dirty_bitmap_buffer[i] = mask;
3547 offset = i * BITS_PER_LONG;
3548 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3551 kvm_flush_remote_tlbs(kvm);
3553 spin_unlock(&kvm->mmu_lock);
3556 if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3561 mutex_unlock(&kvm->slots_lock);
3565 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3568 if (!irqchip_in_kernel(kvm))
3571 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3572 irq_event->irq, irq_event->level,
3577 long kvm_arch_vm_ioctl(struct file *filp,
3578 unsigned int ioctl, unsigned long arg)
3580 struct kvm *kvm = filp->private_data;
3581 void __user *argp = (void __user *)arg;
3584 * This union makes it completely explicit to gcc-3.x
3585 * that these two variables' stack usage should be
3586 * combined, not added together.
3589 struct kvm_pit_state ps;
3590 struct kvm_pit_state2 ps2;
3591 struct kvm_pit_config pit_config;
3595 case KVM_SET_TSS_ADDR:
3596 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3598 case KVM_SET_IDENTITY_MAP_ADDR: {
3602 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3604 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3607 case KVM_SET_NR_MMU_PAGES:
3608 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3610 case KVM_GET_NR_MMU_PAGES:
3611 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3613 case KVM_CREATE_IRQCHIP: {
3614 struct kvm_pic *vpic;
3616 mutex_lock(&kvm->lock);
3619 goto create_irqchip_unlock;
3621 if (atomic_read(&kvm->online_vcpus))
3622 goto create_irqchip_unlock;
3624 vpic = kvm_create_pic(kvm);
3626 r = kvm_ioapic_init(kvm);
3628 mutex_lock(&kvm->slots_lock);
3629 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3631 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3633 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3635 mutex_unlock(&kvm->slots_lock);
3637 goto create_irqchip_unlock;
3640 goto create_irqchip_unlock;
3642 kvm->arch.vpic = vpic;
3644 r = kvm_setup_default_irq_routing(kvm);
3646 mutex_lock(&kvm->slots_lock);
3647 mutex_lock(&kvm->irq_lock);
3648 kvm_ioapic_destroy(kvm);
3649 kvm_destroy_pic(kvm);
3650 mutex_unlock(&kvm->irq_lock);
3651 mutex_unlock(&kvm->slots_lock);
3653 create_irqchip_unlock:
3654 mutex_unlock(&kvm->lock);
3657 case KVM_CREATE_PIT:
3658 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3660 case KVM_CREATE_PIT2:
3662 if (copy_from_user(&u.pit_config, argp,
3663 sizeof(struct kvm_pit_config)))
3666 mutex_lock(&kvm->slots_lock);
3669 goto create_pit_unlock;
3671 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3675 mutex_unlock(&kvm->slots_lock);
3677 case KVM_GET_IRQCHIP: {
3678 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3679 struct kvm_irqchip *chip;
3681 chip = memdup_user(argp, sizeof(*chip));
3688 if (!irqchip_in_kernel(kvm))
3689 goto get_irqchip_out;
3690 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3692 goto get_irqchip_out;
3694 if (copy_to_user(argp, chip, sizeof *chip))
3695 goto get_irqchip_out;
3701 case KVM_SET_IRQCHIP: {
3702 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3703 struct kvm_irqchip *chip;
3705 chip = memdup_user(argp, sizeof(*chip));
3712 if (!irqchip_in_kernel(kvm))
3713 goto set_irqchip_out;
3714 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3716 goto set_irqchip_out;
3724 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3727 if (!kvm->arch.vpit)
3729 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3733 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3740 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3743 if (!kvm->arch.vpit)
3745 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3748 case KVM_GET_PIT2: {
3750 if (!kvm->arch.vpit)
3752 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3756 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3761 case KVM_SET_PIT2: {
3763 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3766 if (!kvm->arch.vpit)
3768 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3771 case KVM_REINJECT_CONTROL: {
3772 struct kvm_reinject_control control;
3774 if (copy_from_user(&control, argp, sizeof(control)))
3776 r = kvm_vm_ioctl_reinject(kvm, &control);
3779 case KVM_XEN_HVM_CONFIG: {
3781 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3782 sizeof(struct kvm_xen_hvm_config)))
3785 if (kvm->arch.xen_hvm_config.flags)
3790 case KVM_SET_CLOCK: {
3791 struct kvm_clock_data user_ns;
3796 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3804 local_irq_disable();
3805 now_ns = get_kernel_ns();
3806 delta = user_ns.clock - now_ns;
3808 kvm->arch.kvmclock_offset = delta;
3811 case KVM_GET_CLOCK: {
3812 struct kvm_clock_data user_ns;
3815 local_irq_disable();
3816 now_ns = get_kernel_ns();
3817 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3820 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3823 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3836 static void kvm_init_msr_list(void)
3841 /* skip the first msrs in the list. KVM-specific */
3842 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3843 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3846 msrs_to_save[j] = msrs_to_save[i];
3849 num_msrs_to_save = j;
3852 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3860 if (!(vcpu->arch.apic &&
3861 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3862 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3873 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3880 if (!(vcpu->arch.apic &&
3881 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3882 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3884 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3894 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3895 struct kvm_segment *var, int seg)
3897 kvm_x86_ops->set_segment(vcpu, var, seg);
3900 void kvm_get_segment(struct kvm_vcpu *vcpu,
3901 struct kvm_segment *var, int seg)
3903 kvm_x86_ops->get_segment(vcpu, var, seg);
3906 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3909 struct x86_exception exception;
3911 BUG_ON(!mmu_is_nested(vcpu));
3913 /* NPT walks are always user-walks */
3914 access |= PFERR_USER_MASK;
3915 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3920 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3921 struct x86_exception *exception)
3923 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3924 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3927 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3928 struct x86_exception *exception)
3930 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3931 access |= PFERR_FETCH_MASK;
3932 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3935 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3936 struct x86_exception *exception)
3938 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3939 access |= PFERR_WRITE_MASK;
3940 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3943 /* uses this to access any guest's mapped memory without checking CPL */
3944 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3945 struct x86_exception *exception)
3947 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3950 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3951 struct kvm_vcpu *vcpu, u32 access,
3952 struct x86_exception *exception)
3955 int r = X86EMUL_CONTINUE;
3958 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3960 unsigned offset = addr & (PAGE_SIZE-1);
3961 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3964 if (gpa == UNMAPPED_GVA)
3965 return X86EMUL_PROPAGATE_FAULT;
3966 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3968 r = X86EMUL_IO_NEEDED;
3980 /* used for instruction fetching */
3981 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3982 gva_t addr, void *val, unsigned int bytes,
3983 struct x86_exception *exception)
3985 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3986 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3988 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3989 access | PFERR_FETCH_MASK,
3993 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3994 gva_t addr, void *val, unsigned int bytes,
3995 struct x86_exception *exception)
3997 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3998 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4000 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4003 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4005 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4006 gva_t addr, void *val, unsigned int bytes,
4007 struct x86_exception *exception)
4009 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4010 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4013 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4014 gva_t addr, void *val,
4016 struct x86_exception *exception)
4018 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4020 int r = X86EMUL_CONTINUE;
4023 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4026 unsigned offset = addr & (PAGE_SIZE-1);
4027 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4030 if (gpa == UNMAPPED_GVA)
4031 return X86EMUL_PROPAGATE_FAULT;
4032 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4034 r = X86EMUL_IO_NEEDED;
4045 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4047 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4048 gpa_t *gpa, struct x86_exception *exception,
4051 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4052 | (write ? PFERR_WRITE_MASK : 0);
4054 if (vcpu_match_mmio_gva(vcpu, gva)
4055 && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4056 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4057 (gva & (PAGE_SIZE - 1));
4058 trace_vcpu_match_mmio(gva, *gpa, write, false);
4062 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4064 if (*gpa == UNMAPPED_GVA)
4067 /* For APIC access vmexit */
4068 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4071 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4072 trace_vcpu_match_mmio(gva, *gpa, write, true);
4079 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4080 const void *val, int bytes)
4084 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4087 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4091 struct read_write_emulator_ops {
4092 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4094 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4095 void *val, int bytes);
4096 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4097 int bytes, void *val);
4098 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4099 void *val, int bytes);
4103 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4105 if (vcpu->mmio_read_completed) {
4106 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4107 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4108 vcpu->mmio_read_completed = 0;
4115 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4116 void *val, int bytes)
4118 return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4121 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4122 void *val, int bytes)
4124 return emulator_write_phys(vcpu, gpa, val, bytes);
4127 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4129 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4130 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4133 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4134 void *val, int bytes)
4136 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4137 return X86EMUL_IO_NEEDED;
4140 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4141 void *val, int bytes)
4143 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4145 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4146 return X86EMUL_CONTINUE;
4149 static const struct read_write_emulator_ops read_emultor = {
4150 .read_write_prepare = read_prepare,
4151 .read_write_emulate = read_emulate,
4152 .read_write_mmio = vcpu_mmio_read,
4153 .read_write_exit_mmio = read_exit_mmio,
4156 static const struct read_write_emulator_ops write_emultor = {
4157 .read_write_emulate = write_emulate,
4158 .read_write_mmio = write_mmio,
4159 .read_write_exit_mmio = write_exit_mmio,
4163 static int emulator_read_write_onepage(unsigned long addr, void *val,
4165 struct x86_exception *exception,
4166 struct kvm_vcpu *vcpu,
4167 const struct read_write_emulator_ops *ops)
4171 bool write = ops->write;
4172 struct kvm_mmio_fragment *frag;
4174 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4177 return X86EMUL_PROPAGATE_FAULT;
4179 /* For APIC access vmexit */
4183 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4184 return X86EMUL_CONTINUE;
4188 * Is this MMIO handled locally?
4190 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4191 if (handled == bytes)
4192 return X86EMUL_CONTINUE;
4198 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4199 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4203 return X86EMUL_CONTINUE;
4206 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4207 void *val, unsigned int bytes,
4208 struct x86_exception *exception,
4209 const struct read_write_emulator_ops *ops)
4211 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4215 if (ops->read_write_prepare &&
4216 ops->read_write_prepare(vcpu, val, bytes))
4217 return X86EMUL_CONTINUE;
4219 vcpu->mmio_nr_fragments = 0;
4221 /* Crossing a page boundary? */
4222 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4225 now = -addr & ~PAGE_MASK;
4226 rc = emulator_read_write_onepage(addr, val, now, exception,
4229 if (rc != X86EMUL_CONTINUE)
4236 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4238 if (rc != X86EMUL_CONTINUE)
4241 if (!vcpu->mmio_nr_fragments)
4244 gpa = vcpu->mmio_fragments[0].gpa;
4246 vcpu->mmio_needed = 1;
4247 vcpu->mmio_cur_fragment = 0;
4249 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4250 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4251 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4252 vcpu->run->mmio.phys_addr = gpa;
4254 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4257 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4261 struct x86_exception *exception)
4263 return emulator_read_write(ctxt, addr, val, bytes,
4264 exception, &read_emultor);
4267 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4271 struct x86_exception *exception)
4273 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4274 exception, &write_emultor);
4277 #define CMPXCHG_TYPE(t, ptr, old, new) \
4278 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4280 #ifdef CONFIG_X86_64
4281 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4283 # define CMPXCHG64(ptr, old, new) \
4284 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4287 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4292 struct x86_exception *exception)
4294 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4300 /* guests cmpxchg8b have to be emulated atomically */
4301 if (bytes > 8 || (bytes & (bytes - 1)))
4304 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4306 if (gpa == UNMAPPED_GVA ||
4307 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4310 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4313 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4314 if (is_error_page(page))
4317 kaddr = kmap_atomic(page);
4318 kaddr += offset_in_page(gpa);
4321 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4324 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4327 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4330 exchanged = CMPXCHG64(kaddr, old, new);
4335 kunmap_atomic(kaddr);
4336 kvm_release_page_dirty(page);
4339 return X86EMUL_CMPXCHG_FAILED;
4341 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4343 return X86EMUL_CONTINUE;
4346 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4348 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4351 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4353 /* TODO: String I/O for in kernel device */
4356 if (vcpu->arch.pio.in)
4357 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4358 vcpu->arch.pio.size, pd);
4360 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4361 vcpu->arch.pio.port, vcpu->arch.pio.size,
4366 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4367 unsigned short port, void *val,
4368 unsigned int count, bool in)
4370 trace_kvm_pio(!in, port, size, count);
4372 vcpu->arch.pio.port = port;
4373 vcpu->arch.pio.in = in;
4374 vcpu->arch.pio.count = count;
4375 vcpu->arch.pio.size = size;
4377 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4378 vcpu->arch.pio.count = 0;
4382 vcpu->run->exit_reason = KVM_EXIT_IO;
4383 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4384 vcpu->run->io.size = size;
4385 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4386 vcpu->run->io.count = count;
4387 vcpu->run->io.port = port;
4392 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4393 int size, unsigned short port, void *val,
4396 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4399 if (vcpu->arch.pio.count)
4402 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4405 memcpy(val, vcpu->arch.pio_data, size * count);
4406 vcpu->arch.pio.count = 0;
4413 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4414 int size, unsigned short port,
4415 const void *val, unsigned int count)
4417 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4419 memcpy(vcpu->arch.pio_data, val, size * count);
4420 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4423 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4425 return kvm_x86_ops->get_segment_base(vcpu, seg);
4428 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4430 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4433 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4435 if (!need_emulate_wbinvd(vcpu))
4436 return X86EMUL_CONTINUE;
4438 if (kvm_x86_ops->has_wbinvd_exit()) {
4439 int cpu = get_cpu();
4441 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4442 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4443 wbinvd_ipi, NULL, 1);
4445 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4448 return X86EMUL_CONTINUE;
4450 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4452 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4454 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4457 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4459 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4462 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4465 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4468 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4470 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4473 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4475 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4476 unsigned long value;
4480 value = kvm_read_cr0(vcpu);
4483 value = vcpu->arch.cr2;
4486 value = kvm_read_cr3(vcpu);
4489 value = kvm_read_cr4(vcpu);
4492 value = kvm_get_cr8(vcpu);
4495 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4502 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4504 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4509 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4512 vcpu->arch.cr2 = val;
4515 res = kvm_set_cr3(vcpu, val);
4518 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4521 res = kvm_set_cr8(vcpu, val);
4524 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4531 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4533 kvm_set_rflags(emul_to_vcpu(ctxt), val);
4536 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4538 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4541 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4543 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4546 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4548 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4551 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4553 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4556 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4558 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4561 static unsigned long emulator_get_cached_segment_base(
4562 struct x86_emulate_ctxt *ctxt, int seg)
4564 return get_segment_base(emul_to_vcpu(ctxt), seg);
4567 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4568 struct desc_struct *desc, u32 *base3,
4571 struct kvm_segment var;
4573 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4574 *selector = var.selector;
4577 memset(desc, 0, sizeof(*desc));
4583 set_desc_limit(desc, var.limit);
4584 set_desc_base(desc, (unsigned long)var.base);
4585 #ifdef CONFIG_X86_64
4587 *base3 = var.base >> 32;
4589 desc->type = var.type;
4591 desc->dpl = var.dpl;
4592 desc->p = var.present;
4593 desc->avl = var.avl;
4601 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4602 struct desc_struct *desc, u32 base3,
4605 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4606 struct kvm_segment var;
4608 var.selector = selector;
4609 var.base = get_desc_base(desc);
4610 #ifdef CONFIG_X86_64
4611 var.base |= ((u64)base3) << 32;
4613 var.limit = get_desc_limit(desc);
4615 var.limit = (var.limit << 12) | 0xfff;
4616 var.type = desc->type;
4617 var.present = desc->p;
4618 var.dpl = desc->dpl;
4623 var.avl = desc->avl;
4624 var.present = desc->p;
4625 var.unusable = !var.present;
4628 kvm_set_segment(vcpu, &var, seg);
4632 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4633 u32 msr_index, u64 *pdata)
4635 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4638 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4639 u32 msr_index, u64 data)
4641 struct msr_data msr;
4644 msr.index = msr_index;
4645 msr.host_initiated = false;
4646 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4649 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4650 u32 pmc, u64 *pdata)
4652 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4655 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4657 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4660 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4663 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4665 * CR0.TS may reference the host fpu state, not the guest fpu state,
4666 * so it may be clear at this point.
4671 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4676 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4677 struct x86_instruction_info *info,
4678 enum x86_intercept_stage stage)
4680 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4683 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4684 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4686 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4689 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4691 return kvm_register_read(emul_to_vcpu(ctxt), reg);
4694 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4696 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4699 static const struct x86_emulate_ops emulate_ops = {
4700 .read_gpr = emulator_read_gpr,
4701 .write_gpr = emulator_write_gpr,
4702 .read_std = kvm_read_guest_virt_system,
4703 .write_std = kvm_write_guest_virt_system,
4704 .fetch = kvm_fetch_guest_virt,
4705 .read_emulated = emulator_read_emulated,
4706 .write_emulated = emulator_write_emulated,
4707 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4708 .invlpg = emulator_invlpg,
4709 .pio_in_emulated = emulator_pio_in_emulated,
4710 .pio_out_emulated = emulator_pio_out_emulated,
4711 .get_segment = emulator_get_segment,
4712 .set_segment = emulator_set_segment,
4713 .get_cached_segment_base = emulator_get_cached_segment_base,
4714 .get_gdt = emulator_get_gdt,
4715 .get_idt = emulator_get_idt,
4716 .set_gdt = emulator_set_gdt,
4717 .set_idt = emulator_set_idt,
4718 .get_cr = emulator_get_cr,
4719 .set_cr = emulator_set_cr,
4720 .set_rflags = emulator_set_rflags,
4721 .cpl = emulator_get_cpl,
4722 .get_dr = emulator_get_dr,
4723 .set_dr = emulator_set_dr,
4724 .set_msr = emulator_set_msr,
4725 .get_msr = emulator_get_msr,
4726 .read_pmc = emulator_read_pmc,
4727 .halt = emulator_halt,
4728 .wbinvd = emulator_wbinvd,
4729 .fix_hypercall = emulator_fix_hypercall,
4730 .get_fpu = emulator_get_fpu,
4731 .put_fpu = emulator_put_fpu,
4732 .intercept = emulator_intercept,
4733 .get_cpuid = emulator_get_cpuid,
4736 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4738 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4740 * an sti; sti; sequence only disable interrupts for the first
4741 * instruction. So, if the last instruction, be it emulated or
4742 * not, left the system with the INT_STI flag enabled, it
4743 * means that the last instruction is an sti. We should not
4744 * leave the flag on in this case. The same goes for mov ss
4746 if (!(int_shadow & mask))
4747 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4750 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4752 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4753 if (ctxt->exception.vector == PF_VECTOR)
4754 kvm_propagate_fault(vcpu, &ctxt->exception);
4755 else if (ctxt->exception.error_code_valid)
4756 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4757 ctxt->exception.error_code);
4759 kvm_queue_exception(vcpu, ctxt->exception.vector);
4762 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4764 memset(&ctxt->twobyte, 0,
4765 (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4767 ctxt->fetch.start = 0;
4768 ctxt->fetch.end = 0;
4769 ctxt->io_read.pos = 0;
4770 ctxt->io_read.end = 0;
4771 ctxt->mem_read.pos = 0;
4772 ctxt->mem_read.end = 0;
4775 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4777 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4780 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4782 ctxt->eflags = kvm_get_rflags(vcpu);
4783 ctxt->eip = kvm_rip_read(vcpu);
4784 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4785 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
4786 cs_l ? X86EMUL_MODE_PROT64 :
4787 cs_db ? X86EMUL_MODE_PROT32 :
4788 X86EMUL_MODE_PROT16;
4789 ctxt->guest_mode = is_guest_mode(vcpu);
4791 init_decode_cache(ctxt);
4792 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4795 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4797 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4800 init_emulate_ctxt(vcpu);
4804 ctxt->_eip = ctxt->eip + inc_eip;
4805 ret = emulate_int_real(ctxt, irq);
4807 if (ret != X86EMUL_CONTINUE)
4808 return EMULATE_FAIL;
4810 ctxt->eip = ctxt->_eip;
4811 kvm_rip_write(vcpu, ctxt->eip);
4812 kvm_set_rflags(vcpu, ctxt->eflags);
4814 if (irq == NMI_VECTOR)
4815 vcpu->arch.nmi_pending = 0;
4817 vcpu->arch.interrupt.pending = false;
4819 return EMULATE_DONE;
4821 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4823 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4825 int r = EMULATE_DONE;
4827 ++vcpu->stat.insn_emulation_fail;
4828 trace_kvm_emulate_insn_failed(vcpu);
4829 if (!is_guest_mode(vcpu)) {
4830 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4831 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4832 vcpu->run->internal.ndata = 0;
4835 kvm_queue_exception(vcpu, UD_VECTOR);
4840 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4841 bool write_fault_to_shadow_pgtable,
4847 if (emulation_type & EMULTYPE_NO_REEXECUTE)
4850 if (!vcpu->arch.mmu.direct_map) {
4852 * Write permission should be allowed since only
4853 * write access need to be emulated.
4855 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4858 * If the mapping is invalid in guest, let cpu retry
4859 * it to generate fault.
4861 if (gpa == UNMAPPED_GVA)
4866 * Do not retry the unhandleable instruction if it faults on the
4867 * readonly host memory, otherwise it will goto a infinite loop:
4868 * retry instruction -> write #PF -> emulation fail -> retry
4869 * instruction -> ...
4871 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4874 * If the instruction failed on the error pfn, it can not be fixed,
4875 * report the error to userspace.
4877 if (is_error_noslot_pfn(pfn))
4880 kvm_release_pfn_clean(pfn);
4882 /* The instructions are well-emulated on direct mmu. */
4883 if (vcpu->arch.mmu.direct_map) {
4884 unsigned int indirect_shadow_pages;
4886 spin_lock(&vcpu->kvm->mmu_lock);
4887 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4888 spin_unlock(&vcpu->kvm->mmu_lock);
4890 if (indirect_shadow_pages)
4891 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4897 * if emulation was due to access to shadowed page table
4898 * and it failed try to unshadow page and re-enter the
4899 * guest to let CPU execute the instruction.
4901 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4904 * If the access faults on its page table, it can not
4905 * be fixed by unprotecting shadow page and it should
4906 * be reported to userspace.
4908 return !write_fault_to_shadow_pgtable;
4911 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4912 unsigned long cr2, int emulation_type)
4914 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4915 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4917 last_retry_eip = vcpu->arch.last_retry_eip;
4918 last_retry_addr = vcpu->arch.last_retry_addr;
4921 * If the emulation is caused by #PF and it is non-page_table
4922 * writing instruction, it means the VM-EXIT is caused by shadow
4923 * page protected, we can zap the shadow page and retry this
4924 * instruction directly.
4926 * Note: if the guest uses a non-page-table modifying instruction
4927 * on the PDE that points to the instruction, then we will unmap
4928 * the instruction and go to an infinite loop. So, we cache the
4929 * last retried eip and the last fault address, if we meet the eip
4930 * and the address again, we can break out of the potential infinite
4933 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4935 if (!(emulation_type & EMULTYPE_RETRY))
4938 if (x86_page_table_writing_insn(ctxt))
4941 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4944 vcpu->arch.last_retry_eip = ctxt->eip;
4945 vcpu->arch.last_retry_addr = cr2;
4947 if (!vcpu->arch.mmu.direct_map)
4948 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4950 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4955 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4956 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4958 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4965 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4966 bool writeback = true;
4967 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4970 * Clear write_fault_to_shadow_pgtable here to ensure it is
4973 vcpu->arch.write_fault_to_shadow_pgtable = false;
4974 kvm_clear_exception_queue(vcpu);
4976 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4977 init_emulate_ctxt(vcpu);
4978 ctxt->interruptibility = 0;
4979 ctxt->have_exception = false;
4980 ctxt->perm_ok = false;
4982 ctxt->only_vendor_specific_insn
4983 = emulation_type & EMULTYPE_TRAP_UD;
4985 r = x86_decode_insn(ctxt, insn, insn_len);
4987 trace_kvm_emulate_insn_start(vcpu);
4988 ++vcpu->stat.insn_emulation;
4989 if (r != EMULATION_OK) {
4990 if (emulation_type & EMULTYPE_TRAP_UD)
4991 return EMULATE_FAIL;
4992 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4994 return EMULATE_DONE;
4995 if (emulation_type & EMULTYPE_SKIP)
4996 return EMULATE_FAIL;
4997 return handle_emulation_failure(vcpu);
5001 if (emulation_type & EMULTYPE_SKIP) {
5002 kvm_rip_write(vcpu, ctxt->_eip);
5003 return EMULATE_DONE;
5006 if (retry_instruction(ctxt, cr2, emulation_type))
5007 return EMULATE_DONE;
5009 /* this is needed for vmware backdoor interface to work since it
5010 changes registers values during IO operation */
5011 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5012 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5013 emulator_invalidate_register_cache(ctxt);
5017 r = x86_emulate_insn(ctxt);
5019 if (r == EMULATION_INTERCEPTED)
5020 return EMULATE_DONE;
5022 if (r == EMULATION_FAILED) {
5023 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5025 return EMULATE_DONE;
5027 return handle_emulation_failure(vcpu);
5030 if (ctxt->have_exception) {
5031 inject_emulated_exception(vcpu);
5033 } else if (vcpu->arch.pio.count) {
5034 if (!vcpu->arch.pio.in)
5035 vcpu->arch.pio.count = 0;
5038 vcpu->arch.complete_userspace_io = complete_emulated_pio;
5040 r = EMULATE_DO_MMIO;
5041 } else if (vcpu->mmio_needed) {
5042 if (!vcpu->mmio_is_write)
5044 r = EMULATE_DO_MMIO;
5045 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5046 } else if (r == EMULATION_RESTART)
5052 toggle_interruptibility(vcpu, ctxt->interruptibility);
5053 kvm_set_rflags(vcpu, ctxt->eflags);
5054 kvm_make_request(KVM_REQ_EVENT, vcpu);
5055 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5056 kvm_rip_write(vcpu, ctxt->eip);
5058 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5062 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5064 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5066 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5067 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5068 size, port, &val, 1);
5069 /* do not return to emulator after return from userspace */
5070 vcpu->arch.pio.count = 0;
5073 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5075 static void tsc_bad(void *info)
5077 __this_cpu_write(cpu_tsc_khz, 0);
5080 static void tsc_khz_changed(void *data)
5082 struct cpufreq_freqs *freq = data;
5083 unsigned long khz = 0;
5087 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5088 khz = cpufreq_quick_get(raw_smp_processor_id());
5091 __this_cpu_write(cpu_tsc_khz, khz);
5094 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5097 struct cpufreq_freqs *freq = data;
5099 struct kvm_vcpu *vcpu;
5100 int i, send_ipi = 0;
5103 * We allow guests to temporarily run on slowing clocks,
5104 * provided we notify them after, or to run on accelerating
5105 * clocks, provided we notify them before. Thus time never
5108 * However, we have a problem. We can't atomically update
5109 * the frequency of a given CPU from this function; it is
5110 * merely a notifier, which can be called from any CPU.
5111 * Changing the TSC frequency at arbitrary points in time
5112 * requires a recomputation of local variables related to
5113 * the TSC for each VCPU. We must flag these local variables
5114 * to be updated and be sure the update takes place with the
5115 * new frequency before any guests proceed.
5117 * Unfortunately, the combination of hotplug CPU and frequency
5118 * change creates an intractable locking scenario; the order
5119 * of when these callouts happen is undefined with respect to
5120 * CPU hotplug, and they can race with each other. As such,
5121 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5122 * undefined; you can actually have a CPU frequency change take
5123 * place in between the computation of X and the setting of the
5124 * variable. To protect against this problem, all updates of
5125 * the per_cpu tsc_khz variable are done in an interrupt
5126 * protected IPI, and all callers wishing to update the value
5127 * must wait for a synchronous IPI to complete (which is trivial
5128 * if the caller is on the CPU already). This establishes the
5129 * necessary total order on variable updates.
5131 * Note that because a guest time update may take place
5132 * anytime after the setting of the VCPU's request bit, the
5133 * correct TSC value must be set before the request. However,
5134 * to ensure the update actually makes it to any guest which
5135 * starts running in hardware virtualization between the set
5136 * and the acquisition of the spinlock, we must also ping the
5137 * CPU after setting the request bit.
5141 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5143 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5146 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5148 raw_spin_lock(&kvm_lock);
5149 list_for_each_entry(kvm, &vm_list, vm_list) {
5150 kvm_for_each_vcpu(i, vcpu, kvm) {
5151 if (vcpu->cpu != freq->cpu)
5153 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5154 if (vcpu->cpu != smp_processor_id())
5158 raw_spin_unlock(&kvm_lock);
5160 if (freq->old < freq->new && send_ipi) {
5162 * We upscale the frequency. Must make the guest
5163 * doesn't see old kvmclock values while running with
5164 * the new frequency, otherwise we risk the guest sees
5165 * time go backwards.
5167 * In case we update the frequency for another cpu
5168 * (which might be in guest context) send an interrupt
5169 * to kick the cpu out of guest context. Next time
5170 * guest context is entered kvmclock will be updated,
5171 * so the guest will not see stale values.
5173 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5178 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5179 .notifier_call = kvmclock_cpufreq_notifier
5182 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5183 unsigned long action, void *hcpu)
5185 unsigned int cpu = (unsigned long)hcpu;
5189 case CPU_DOWN_FAILED:
5190 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5192 case CPU_DOWN_PREPARE:
5193 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5199 static struct notifier_block kvmclock_cpu_notifier_block = {
5200 .notifier_call = kvmclock_cpu_notifier,
5201 .priority = -INT_MAX
5204 static void kvm_timer_init(void)
5208 max_tsc_khz = tsc_khz;
5209 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5210 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5211 #ifdef CONFIG_CPU_FREQ
5212 struct cpufreq_policy policy;
5213 memset(&policy, 0, sizeof(policy));
5215 cpufreq_get_policy(&policy, cpu);
5216 if (policy.cpuinfo.max_freq)
5217 max_tsc_khz = policy.cpuinfo.max_freq;
5220 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5221 CPUFREQ_TRANSITION_NOTIFIER);
5223 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5224 for_each_online_cpu(cpu)
5225 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5228 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5230 int kvm_is_in_guest(void)
5232 return __this_cpu_read(current_vcpu) != NULL;
5235 static int kvm_is_user_mode(void)
5239 if (__this_cpu_read(current_vcpu))
5240 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5242 return user_mode != 0;
5245 static unsigned long kvm_get_guest_ip(void)
5247 unsigned long ip = 0;
5249 if (__this_cpu_read(current_vcpu))
5250 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5255 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5256 .is_in_guest = kvm_is_in_guest,
5257 .is_user_mode = kvm_is_user_mode,
5258 .get_guest_ip = kvm_get_guest_ip,
5261 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5263 __this_cpu_write(current_vcpu, vcpu);
5265 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5267 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5269 __this_cpu_write(current_vcpu, NULL);
5271 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5273 static void kvm_set_mmio_spte_mask(void)
5276 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5279 * Set the reserved bits and the present bit of an paging-structure
5280 * entry to generate page fault with PFER.RSV = 1.
5282 /* Mask the reserved physical address bits. */
5283 mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
5285 /* Bit 62 is always reserved for 32bit host. */
5286 mask |= 0x3ull << 62;
5288 /* Set the present bit. */
5291 #ifdef CONFIG_X86_64
5293 * If reserved bit is not supported, clear the present bit to disable
5296 if (maxphyaddr == 52)
5300 kvm_mmu_set_mmio_spte_mask(mask);
5303 #ifdef CONFIG_X86_64
5304 static void pvclock_gtod_update_fn(struct work_struct *work)
5308 struct kvm_vcpu *vcpu;
5311 raw_spin_lock(&kvm_lock);
5312 list_for_each_entry(kvm, &vm_list, vm_list)
5313 kvm_for_each_vcpu(i, vcpu, kvm)
5314 set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5315 atomic_set(&kvm_guest_has_master_clock, 0);
5316 raw_spin_unlock(&kvm_lock);
5319 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5322 * Notification about pvclock gtod data update.
5324 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5327 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5328 struct timekeeper *tk = priv;
5330 update_pvclock_gtod(tk);
5332 /* disable master clock if host does not trust, or does not
5333 * use, TSC clocksource
5335 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5336 atomic_read(&kvm_guest_has_master_clock) != 0)
5337 queue_work(system_long_wq, &pvclock_gtod_work);
5342 static struct notifier_block pvclock_gtod_notifier = {
5343 .notifier_call = pvclock_gtod_notify,
5347 int kvm_arch_init(void *opaque)
5350 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5353 printk(KERN_ERR "kvm: already loaded the other module\n");
5358 if (!ops->cpu_has_kvm_support()) {
5359 printk(KERN_ERR "kvm: no hardware support\n");
5363 if (ops->disabled_by_bios()) {
5364 printk(KERN_ERR "kvm: disabled by bios\n");
5370 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5372 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5376 r = kvm_mmu_module_init();
5378 goto out_free_percpu;
5380 kvm_set_mmio_spte_mask();
5381 kvm_init_msr_list();
5384 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5385 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5389 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5392 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5395 #ifdef CONFIG_X86_64
5396 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5402 free_percpu(shared_msrs);
5407 void kvm_arch_exit(void)
5409 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5411 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5412 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5413 CPUFREQ_TRANSITION_NOTIFIER);
5414 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5415 #ifdef CONFIG_X86_64
5416 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5419 kvm_mmu_module_exit();
5420 free_percpu(shared_msrs);
5423 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5425 ++vcpu->stat.halt_exits;
5426 if (irqchip_in_kernel(vcpu->kvm)) {
5427 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5430 vcpu->run->exit_reason = KVM_EXIT_HLT;
5434 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5436 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5438 u64 param, ingpa, outgpa, ret;
5439 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5440 bool fast, longmode;
5444 * hypercall generates UD from non zero cpl and real mode
5447 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5448 kvm_queue_exception(vcpu, UD_VECTOR);
5452 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5453 longmode = is_long_mode(vcpu) && cs_l == 1;
5456 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5457 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5458 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5459 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5460 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5461 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5463 #ifdef CONFIG_X86_64
5465 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5466 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5467 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5471 code = param & 0xffff;
5472 fast = (param >> 16) & 0x1;
5473 rep_cnt = (param >> 32) & 0xfff;
5474 rep_idx = (param >> 48) & 0xfff;
5476 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5479 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5480 kvm_vcpu_on_spin(vcpu);
5483 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5487 ret = res | (((u64)rep_done & 0xfff) << 32);
5489 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5491 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5492 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5498 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5500 unsigned long nr, a0, a1, a2, a3, ret;
5503 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5504 return kvm_hv_hypercall(vcpu);
5506 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5507 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5508 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5509 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5510 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5512 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5514 if (!is_long_mode(vcpu)) {
5522 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5528 case KVM_HC_VAPIC_POLL_IRQ:
5536 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5537 ++vcpu->stat.hypercalls;
5540 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5542 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5544 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5545 char instruction[3];
5546 unsigned long rip = kvm_rip_read(vcpu);
5548 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5550 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5554 * Check if userspace requested an interrupt window, and that the
5555 * interrupt window is open.
5557 * No need to exit to userspace if we already have an interrupt queued.
5559 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5561 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5562 vcpu->run->request_interrupt_window &&
5563 kvm_arch_interrupt_allowed(vcpu));
5566 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5568 struct kvm_run *kvm_run = vcpu->run;
5570 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5571 kvm_run->cr8 = kvm_get_cr8(vcpu);
5572 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5573 if (irqchip_in_kernel(vcpu->kvm))
5574 kvm_run->ready_for_interrupt_injection = 1;
5576 kvm_run->ready_for_interrupt_injection =
5577 kvm_arch_interrupt_allowed(vcpu) &&
5578 !kvm_cpu_has_interrupt(vcpu) &&
5579 !kvm_event_needs_reinjection(vcpu);
5582 static int vapic_enter(struct kvm_vcpu *vcpu)
5584 struct kvm_lapic *apic = vcpu->arch.apic;
5587 if (!apic || !apic->vapic_addr)
5590 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5591 if (is_error_page(page))
5594 vcpu->arch.apic->vapic_page = page;
5598 static void vapic_exit(struct kvm_vcpu *vcpu)
5600 struct kvm_lapic *apic = vcpu->arch.apic;
5603 if (!apic || !apic->vapic_addr)
5606 idx = srcu_read_lock(&vcpu->kvm->srcu);
5607 kvm_release_page_dirty(apic->vapic_page);
5608 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5609 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5612 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5616 if (!kvm_x86_ops->update_cr8_intercept)
5619 if (!vcpu->arch.apic)
5622 if (!vcpu->arch.apic->vapic_addr)
5623 max_irr = kvm_lapic_find_highest_irr(vcpu);
5630 tpr = kvm_lapic_get_cr8(vcpu);
5632 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5635 static void inject_pending_event(struct kvm_vcpu *vcpu)
5637 /* try to reinject previous events if any */
5638 if (vcpu->arch.exception.pending) {
5639 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5640 vcpu->arch.exception.has_error_code,
5641 vcpu->arch.exception.error_code);
5642 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5643 vcpu->arch.exception.has_error_code,
5644 vcpu->arch.exception.error_code,
5645 vcpu->arch.exception.reinject);
5649 if (vcpu->arch.nmi_injected) {
5650 kvm_x86_ops->set_nmi(vcpu);
5654 if (vcpu->arch.interrupt.pending) {
5655 kvm_x86_ops->set_irq(vcpu);
5659 /* try to inject new event if pending */
5660 if (vcpu->arch.nmi_pending) {
5661 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5662 --vcpu->arch.nmi_pending;
5663 vcpu->arch.nmi_injected = true;
5664 kvm_x86_ops->set_nmi(vcpu);
5666 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5667 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5668 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5670 kvm_x86_ops->set_irq(vcpu);
5675 static void process_nmi(struct kvm_vcpu *vcpu)
5680 * x86 is limited to one NMI running, and one NMI pending after it.
5681 * If an NMI is already in progress, limit further NMIs to just one.
5682 * Otherwise, allow two (and we'll inject the first one immediately).
5684 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5687 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5688 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5689 kvm_make_request(KVM_REQ_EVENT, vcpu);
5692 static void kvm_gen_update_masterclock(struct kvm *kvm)
5694 #ifdef CONFIG_X86_64
5696 struct kvm_vcpu *vcpu;
5697 struct kvm_arch *ka = &kvm->arch;
5699 spin_lock(&ka->pvclock_gtod_sync_lock);
5700 kvm_make_mclock_inprogress_request(kvm);
5701 /* no guest entries from this point */
5702 pvclock_update_vm_gtod_copy(kvm);
5704 kvm_for_each_vcpu(i, vcpu, kvm)
5705 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5707 /* guest entries allowed */
5708 kvm_for_each_vcpu(i, vcpu, kvm)
5709 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5711 spin_unlock(&ka->pvclock_gtod_sync_lock);
5715 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5717 u64 eoi_exit_bitmap[4];
5720 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5723 memset(eoi_exit_bitmap, 0, 32);
5726 kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5727 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5728 kvm_apic_update_tmr(vcpu, tmr);
5731 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5734 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5735 vcpu->run->request_interrupt_window;
5736 bool req_immediate_exit = false;
5738 if (vcpu->requests) {
5739 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5740 kvm_mmu_unload(vcpu);
5741 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5742 __kvm_migrate_timers(vcpu);
5743 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5744 kvm_gen_update_masterclock(vcpu->kvm);
5745 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
5746 kvm_gen_kvmclock_update(vcpu);
5747 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5748 r = kvm_guest_time_update(vcpu);
5752 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5753 kvm_mmu_sync_roots(vcpu);
5754 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5755 kvm_x86_ops->tlb_flush(vcpu);
5756 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5757 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5761 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5762 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5766 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5767 vcpu->fpu_active = 0;
5768 kvm_x86_ops->fpu_deactivate(vcpu);
5770 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5771 /* Page is swapped out. Do synthetic halt */
5772 vcpu->arch.apf.halted = true;
5776 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5777 record_steal_time(vcpu);
5778 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5780 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5781 kvm_handle_pmu_event(vcpu);
5782 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5783 kvm_deliver_pmi(vcpu);
5784 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5785 vcpu_scan_ioapic(vcpu);
5788 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5789 kvm_apic_accept_events(vcpu);
5790 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5795 inject_pending_event(vcpu);
5797 /* enable NMI/IRQ window open exits if needed */
5798 if (vcpu->arch.nmi_pending)
5799 req_immediate_exit =
5800 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5801 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5802 req_immediate_exit =
5803 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5805 if (kvm_lapic_enabled(vcpu)) {
5807 * Update architecture specific hints for APIC
5808 * virtual interrupt delivery.
5810 if (kvm_x86_ops->hwapic_irr_update)
5811 kvm_x86_ops->hwapic_irr_update(vcpu,
5812 kvm_lapic_find_highest_irr(vcpu));
5813 update_cr8_intercept(vcpu);
5814 kvm_lapic_sync_to_vapic(vcpu);
5818 r = kvm_mmu_reload(vcpu);
5820 goto cancel_injection;
5825 kvm_x86_ops->prepare_guest_switch(vcpu);
5826 if (vcpu->fpu_active)
5827 kvm_load_guest_fpu(vcpu);
5828 kvm_load_guest_xcr0(vcpu);
5830 vcpu->mode = IN_GUEST_MODE;
5832 /* We should set ->mode before check ->requests,
5833 * see the comment in make_all_cpus_request.
5837 local_irq_disable();
5839 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5840 || need_resched() || signal_pending(current)) {
5841 vcpu->mode = OUTSIDE_GUEST_MODE;
5846 goto cancel_injection;
5849 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5851 if (req_immediate_exit)
5852 smp_send_reschedule(vcpu->cpu);
5856 if (unlikely(vcpu->arch.switch_db_regs)) {
5858 set_debugreg(vcpu->arch.eff_db[0], 0);
5859 set_debugreg(vcpu->arch.eff_db[1], 1);
5860 set_debugreg(vcpu->arch.eff_db[2], 2);
5861 set_debugreg(vcpu->arch.eff_db[3], 3);
5864 trace_kvm_entry(vcpu->vcpu_id);
5865 kvm_x86_ops->run(vcpu);
5868 * If the guest has used debug registers, at least dr7
5869 * will be disabled while returning to the host.
5870 * If we don't have active breakpoints in the host, we don't
5871 * care about the messed up debug address registers. But if
5872 * we have some of them active, restore the old state.
5874 if (hw_breakpoint_active())
5875 hw_breakpoint_restore();
5877 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5880 vcpu->mode = OUTSIDE_GUEST_MODE;
5883 /* Interrupt is enabled by handle_external_intr() */
5884 kvm_x86_ops->handle_external_intr(vcpu);
5889 * We must have an instruction between local_irq_enable() and
5890 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5891 * the interrupt shadow. The stat.exits increment will do nicely.
5892 * But we need to prevent reordering, hence this barrier():
5900 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5903 * Profile KVM exit RIPs:
5905 if (unlikely(prof_on == KVM_PROFILING)) {
5906 unsigned long rip = kvm_rip_read(vcpu);
5907 profile_hit(KVM_PROFILING, (void *)rip);
5910 if (unlikely(vcpu->arch.tsc_always_catchup))
5911 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5913 if (vcpu->arch.apic_attention)
5914 kvm_lapic_sync_from_vapic(vcpu);
5916 r = kvm_x86_ops->handle_exit(vcpu);
5920 kvm_x86_ops->cancel_injection(vcpu);
5921 if (unlikely(vcpu->arch.apic_attention))
5922 kvm_lapic_sync_from_vapic(vcpu);
5928 static int __vcpu_run(struct kvm_vcpu *vcpu)
5931 struct kvm *kvm = vcpu->kvm;
5933 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5934 r = vapic_enter(vcpu);
5936 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5942 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5943 !vcpu->arch.apf.halted)
5944 r = vcpu_enter_guest(vcpu);
5946 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5947 kvm_vcpu_block(vcpu);
5948 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5949 if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
5950 kvm_apic_accept_events(vcpu);
5951 switch(vcpu->arch.mp_state) {
5952 case KVM_MP_STATE_HALTED:
5953 vcpu->arch.mp_state =
5954 KVM_MP_STATE_RUNNABLE;
5955 case KVM_MP_STATE_RUNNABLE:
5956 vcpu->arch.apf.halted = false;
5958 case KVM_MP_STATE_INIT_RECEIVED:
5970 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5971 if (kvm_cpu_has_pending_timer(vcpu))
5972 kvm_inject_pending_timer_irqs(vcpu);
5974 if (dm_request_for_irq_injection(vcpu)) {
5976 vcpu->run->exit_reason = KVM_EXIT_INTR;
5977 ++vcpu->stat.request_irq_exits;
5980 kvm_check_async_pf_completion(vcpu);
5982 if (signal_pending(current)) {
5984 vcpu->run->exit_reason = KVM_EXIT_INTR;
5985 ++vcpu->stat.signal_exits;
5987 if (need_resched()) {
5988 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5990 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5994 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6001 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6004 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6005 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6006 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6007 if (r != EMULATE_DONE)
6012 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6014 BUG_ON(!vcpu->arch.pio.count);
6016 return complete_emulated_io(vcpu);
6020 * Implements the following, as a state machine:
6024 * for each mmio piece in the fragment
6032 * for each mmio piece in the fragment
6037 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6039 struct kvm_run *run = vcpu->run;
6040 struct kvm_mmio_fragment *frag;
6043 BUG_ON(!vcpu->mmio_needed);
6045 /* Complete previous fragment */
6046 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6047 len = min(8u, frag->len);
6048 if (!vcpu->mmio_is_write)
6049 memcpy(frag->data, run->mmio.data, len);
6051 if (frag->len <= 8) {
6052 /* Switch to the next fragment. */
6054 vcpu->mmio_cur_fragment++;
6056 /* Go forward to the next mmio piece. */
6062 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6063 vcpu->mmio_needed = 0;
6064 if (vcpu->mmio_is_write)
6066 vcpu->mmio_read_completed = 1;
6067 return complete_emulated_io(vcpu);
6070 run->exit_reason = KVM_EXIT_MMIO;
6071 run->mmio.phys_addr = frag->gpa;
6072 if (vcpu->mmio_is_write)
6073 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6074 run->mmio.len = min(8u, frag->len);
6075 run->mmio.is_write = vcpu->mmio_is_write;
6076 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6081 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6086 if (!tsk_used_math(current) && init_fpu(current))
6089 if (vcpu->sigset_active)
6090 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6092 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6093 kvm_vcpu_block(vcpu);
6094 kvm_apic_accept_events(vcpu);
6095 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6100 /* re-sync apic's tpr */
6101 if (!irqchip_in_kernel(vcpu->kvm)) {
6102 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6108 if (unlikely(vcpu->arch.complete_userspace_io)) {
6109 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6110 vcpu->arch.complete_userspace_io = NULL;
6115 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6117 r = __vcpu_run(vcpu);
6120 post_kvm_run_save(vcpu);
6121 if (vcpu->sigset_active)
6122 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6127 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6129 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6131 * We are here if userspace calls get_regs() in the middle of
6132 * instruction emulation. Registers state needs to be copied
6133 * back from emulation context to vcpu. Userspace shouldn't do
6134 * that usually, but some bad designed PV devices (vmware
6135 * backdoor interface) need this to work
6137 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6138 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6140 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6141 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6142 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6143 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6144 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6145 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6146 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6147 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6148 #ifdef CONFIG_X86_64
6149 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6150 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6151 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6152 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6153 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6154 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6155 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6156 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6159 regs->rip = kvm_rip_read(vcpu);
6160 regs->rflags = kvm_get_rflags(vcpu);
6165 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6167 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6168 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6170 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6171 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6172 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6173 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6174 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6175 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6176 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6177 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6178 #ifdef CONFIG_X86_64
6179 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6180 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6181 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6182 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6183 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6184 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6185 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6186 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6189 kvm_rip_write(vcpu, regs->rip);
6190 kvm_set_rflags(vcpu, regs->rflags);
6192 vcpu->arch.exception.pending = false;
6194 kvm_make_request(KVM_REQ_EVENT, vcpu);
6199 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6201 struct kvm_segment cs;
6203 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6207 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6209 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6210 struct kvm_sregs *sregs)
6214 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6215 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6216 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6217 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6218 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6219 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6221 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6222 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6224 kvm_x86_ops->get_idt(vcpu, &dt);
6225 sregs->idt.limit = dt.size;
6226 sregs->idt.base = dt.address;
6227 kvm_x86_ops->get_gdt(vcpu, &dt);
6228 sregs->gdt.limit = dt.size;
6229 sregs->gdt.base = dt.address;
6231 sregs->cr0 = kvm_read_cr0(vcpu);
6232 sregs->cr2 = vcpu->arch.cr2;
6233 sregs->cr3 = kvm_read_cr3(vcpu);
6234 sregs->cr4 = kvm_read_cr4(vcpu);
6235 sregs->cr8 = kvm_get_cr8(vcpu);
6236 sregs->efer = vcpu->arch.efer;
6237 sregs->apic_base = kvm_get_apic_base(vcpu);
6239 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6241 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6242 set_bit(vcpu->arch.interrupt.nr,
6243 (unsigned long *)sregs->interrupt_bitmap);
6248 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6249 struct kvm_mp_state *mp_state)
6251 kvm_apic_accept_events(vcpu);
6252 mp_state->mp_state = vcpu->arch.mp_state;
6256 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6257 struct kvm_mp_state *mp_state)
6259 if (!kvm_vcpu_has_lapic(vcpu) &&
6260 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6263 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6264 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6265 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6267 vcpu->arch.mp_state = mp_state->mp_state;
6268 kvm_make_request(KVM_REQ_EVENT, vcpu);
6272 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6273 int reason, bool has_error_code, u32 error_code)
6275 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6278 init_emulate_ctxt(vcpu);
6280 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6281 has_error_code, error_code);
6284 return EMULATE_FAIL;
6286 kvm_rip_write(vcpu, ctxt->eip);
6287 kvm_set_rflags(vcpu, ctxt->eflags);
6288 kvm_make_request(KVM_REQ_EVENT, vcpu);
6289 return EMULATE_DONE;
6291 EXPORT_SYMBOL_GPL(kvm_task_switch);
6293 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6294 struct kvm_sregs *sregs)
6296 int mmu_reset_needed = 0;
6297 int pending_vec, max_bits, idx;
6300 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6303 dt.size = sregs->idt.limit;
6304 dt.address = sregs->idt.base;
6305 kvm_x86_ops->set_idt(vcpu, &dt);
6306 dt.size = sregs->gdt.limit;
6307 dt.address = sregs->gdt.base;
6308 kvm_x86_ops->set_gdt(vcpu, &dt);
6310 vcpu->arch.cr2 = sregs->cr2;
6311 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6312 vcpu->arch.cr3 = sregs->cr3;
6313 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6315 kvm_set_cr8(vcpu, sregs->cr8);
6317 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6318 kvm_x86_ops->set_efer(vcpu, sregs->efer);
6319 kvm_set_apic_base(vcpu, sregs->apic_base);
6321 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6322 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6323 vcpu->arch.cr0 = sregs->cr0;
6325 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6326 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6327 if (sregs->cr4 & X86_CR4_OSXSAVE)
6328 kvm_update_cpuid(vcpu);
6330 idx = srcu_read_lock(&vcpu->kvm->srcu);
6331 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6332 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6333 mmu_reset_needed = 1;
6335 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6337 if (mmu_reset_needed)
6338 kvm_mmu_reset_context(vcpu);
6340 max_bits = KVM_NR_INTERRUPTS;
6341 pending_vec = find_first_bit(
6342 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6343 if (pending_vec < max_bits) {
6344 kvm_queue_interrupt(vcpu, pending_vec, false);
6345 pr_debug("Set back pending irq %d\n", pending_vec);
6348 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6349 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6350 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6351 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6352 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6353 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6355 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6356 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6358 update_cr8_intercept(vcpu);
6360 /* Older userspace won't unhalt the vcpu on reset. */
6361 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6362 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6364 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6366 kvm_make_request(KVM_REQ_EVENT, vcpu);
6371 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6372 struct kvm_guest_debug *dbg)
6374 unsigned long rflags;
6377 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6379 if (vcpu->arch.exception.pending)
6381 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6382 kvm_queue_exception(vcpu, DB_VECTOR);
6384 kvm_queue_exception(vcpu, BP_VECTOR);
6388 * Read rflags as long as potentially injected trace flags are still
6391 rflags = kvm_get_rflags(vcpu);
6393 vcpu->guest_debug = dbg->control;
6394 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6395 vcpu->guest_debug = 0;
6397 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6398 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6399 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6400 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6402 for (i = 0; i < KVM_NR_DB_REGS; i++)
6403 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6405 kvm_update_dr7(vcpu);
6407 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6408 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6409 get_segment_base(vcpu, VCPU_SREG_CS);
6412 * Trigger an rflags update that will inject or remove the trace
6415 kvm_set_rflags(vcpu, rflags);
6417 kvm_x86_ops->update_db_bp_intercept(vcpu);
6427 * Translate a guest virtual address to a guest physical address.
6429 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6430 struct kvm_translation *tr)
6432 unsigned long vaddr = tr->linear_address;
6436 idx = srcu_read_lock(&vcpu->kvm->srcu);
6437 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6438 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6439 tr->physical_address = gpa;
6440 tr->valid = gpa != UNMAPPED_GVA;
6447 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6449 struct i387_fxsave_struct *fxsave =
6450 &vcpu->arch.guest_fpu.state->fxsave;
6452 memcpy(fpu->fpr, fxsave->st_space, 128);
6453 fpu->fcw = fxsave->cwd;
6454 fpu->fsw = fxsave->swd;
6455 fpu->ftwx = fxsave->twd;
6456 fpu->last_opcode = fxsave->fop;
6457 fpu->last_ip = fxsave->rip;
6458 fpu->last_dp = fxsave->rdp;
6459 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6464 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6466 struct i387_fxsave_struct *fxsave =
6467 &vcpu->arch.guest_fpu.state->fxsave;
6469 memcpy(fxsave->st_space, fpu->fpr, 128);
6470 fxsave->cwd = fpu->fcw;
6471 fxsave->swd = fpu->fsw;
6472 fxsave->twd = fpu->ftwx;
6473 fxsave->fop = fpu->last_opcode;
6474 fxsave->rip = fpu->last_ip;
6475 fxsave->rdp = fpu->last_dp;
6476 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6481 int fx_init(struct kvm_vcpu *vcpu)
6485 err = fpu_alloc(&vcpu->arch.guest_fpu);
6489 fpu_finit(&vcpu->arch.guest_fpu);
6492 * Ensure guest xcr0 is valid for loading
6494 vcpu->arch.xcr0 = XSTATE_FP;
6496 vcpu->arch.cr0 |= X86_CR0_ET;
6500 EXPORT_SYMBOL_GPL(fx_init);
6502 static void fx_free(struct kvm_vcpu *vcpu)
6504 fpu_free(&vcpu->arch.guest_fpu);
6507 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6509 if (vcpu->guest_fpu_loaded)
6513 * Restore all possible states in the guest,
6514 * and assume host would use all available bits.
6515 * Guest xcr0 would be loaded later.
6517 kvm_put_guest_xcr0(vcpu);
6518 vcpu->guest_fpu_loaded = 1;
6519 __kernel_fpu_begin();
6520 fpu_restore_checking(&vcpu->arch.guest_fpu);
6524 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6526 kvm_put_guest_xcr0(vcpu);
6528 if (!vcpu->guest_fpu_loaded)
6531 vcpu->guest_fpu_loaded = 0;
6532 fpu_save_init(&vcpu->arch.guest_fpu);
6534 ++vcpu->stat.fpu_reload;
6535 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6539 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6541 kvmclock_reset(vcpu);
6543 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6545 kvm_x86_ops->vcpu_free(vcpu);
6548 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6551 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6552 printk_once(KERN_WARNING
6553 "kvm: SMP vm created on host with unstable TSC; "
6554 "guest TSC will not be reliable\n");
6555 return kvm_x86_ops->vcpu_create(kvm, id);
6558 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6562 vcpu->arch.mtrr_state.have_fixed = 1;
6563 r = vcpu_load(vcpu);
6566 kvm_vcpu_reset(vcpu);
6567 r = kvm_mmu_setup(vcpu);
6573 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6576 struct msr_data msr;
6578 r = vcpu_load(vcpu);
6582 msr.index = MSR_IA32_TSC;
6583 msr.host_initiated = true;
6584 kvm_write_tsc(vcpu, &msr);
6590 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6593 vcpu->arch.apf.msr_val = 0;
6595 r = vcpu_load(vcpu);
6597 kvm_mmu_unload(vcpu);
6601 kvm_x86_ops->vcpu_free(vcpu);
6604 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6606 atomic_set(&vcpu->arch.nmi_queued, 0);
6607 vcpu->arch.nmi_pending = 0;
6608 vcpu->arch.nmi_injected = false;
6610 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6611 vcpu->arch.dr6 = DR6_FIXED_1;
6612 vcpu->arch.dr7 = DR7_FIXED_1;
6613 kvm_update_dr7(vcpu);
6615 kvm_make_request(KVM_REQ_EVENT, vcpu);
6616 vcpu->arch.apf.msr_val = 0;
6617 vcpu->arch.st.msr_val = 0;
6619 kvmclock_reset(vcpu);
6621 kvm_clear_async_pf_completion_queue(vcpu);
6622 kvm_async_pf_hash_reset(vcpu);
6623 vcpu->arch.apf.halted = false;
6625 kvm_pmu_reset(vcpu);
6627 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6628 vcpu->arch.regs_avail = ~0;
6629 vcpu->arch.regs_dirty = ~0;
6631 kvm_x86_ops->vcpu_reset(vcpu);
6634 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6636 struct kvm_segment cs;
6638 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6639 cs.selector = vector << 8;
6640 cs.base = vector << 12;
6641 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6642 kvm_rip_write(vcpu, 0);
6645 int kvm_arch_hardware_enable(void *garbage)
6648 struct kvm_vcpu *vcpu;
6653 bool stable, backwards_tsc = false;
6655 kvm_shared_msr_cpu_online();
6656 ret = kvm_x86_ops->hardware_enable(garbage);
6660 local_tsc = native_read_tsc();
6661 stable = !check_tsc_unstable();
6662 list_for_each_entry(kvm, &vm_list, vm_list) {
6663 kvm_for_each_vcpu(i, vcpu, kvm) {
6664 if (!stable && vcpu->cpu == smp_processor_id())
6665 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6666 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6667 backwards_tsc = true;
6668 if (vcpu->arch.last_host_tsc > max_tsc)
6669 max_tsc = vcpu->arch.last_host_tsc;
6675 * Sometimes, even reliable TSCs go backwards. This happens on
6676 * platforms that reset TSC during suspend or hibernate actions, but
6677 * maintain synchronization. We must compensate. Fortunately, we can
6678 * detect that condition here, which happens early in CPU bringup,
6679 * before any KVM threads can be running. Unfortunately, we can't
6680 * bring the TSCs fully up to date with real time, as we aren't yet far
6681 * enough into CPU bringup that we know how much real time has actually
6682 * elapsed; our helper function, get_kernel_ns() will be using boot
6683 * variables that haven't been updated yet.
6685 * So we simply find the maximum observed TSC above, then record the
6686 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6687 * the adjustment will be applied. Note that we accumulate
6688 * adjustments, in case multiple suspend cycles happen before some VCPU
6689 * gets a chance to run again. In the event that no KVM threads get a
6690 * chance to run, we will miss the entire elapsed period, as we'll have
6691 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6692 * loose cycle time. This isn't too big a deal, since the loss will be
6693 * uniform across all VCPUs (not to mention the scenario is extremely
6694 * unlikely). It is possible that a second hibernate recovery happens
6695 * much faster than a first, causing the observed TSC here to be
6696 * smaller; this would require additional padding adjustment, which is
6697 * why we set last_host_tsc to the local tsc observed here.
6699 * N.B. - this code below runs only on platforms with reliable TSC,
6700 * as that is the only way backwards_tsc is set above. Also note
6701 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6702 * have the same delta_cyc adjustment applied if backwards_tsc
6703 * is detected. Note further, this adjustment is only done once,
6704 * as we reset last_host_tsc on all VCPUs to stop this from being
6705 * called multiple times (one for each physical CPU bringup).
6707 * Platforms with unreliable TSCs don't have to deal with this, they
6708 * will be compensated by the logic in vcpu_load, which sets the TSC to
6709 * catchup mode. This will catchup all VCPUs to real time, but cannot
6710 * guarantee that they stay in perfect synchronization.
6712 if (backwards_tsc) {
6713 u64 delta_cyc = max_tsc - local_tsc;
6714 list_for_each_entry(kvm, &vm_list, vm_list) {
6715 kvm_for_each_vcpu(i, vcpu, kvm) {
6716 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6717 vcpu->arch.last_host_tsc = local_tsc;
6718 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6723 * We have to disable TSC offset matching.. if you were
6724 * booting a VM while issuing an S4 host suspend....
6725 * you may have some problem. Solving this issue is
6726 * left as an exercise to the reader.
6728 kvm->arch.last_tsc_nsec = 0;
6729 kvm->arch.last_tsc_write = 0;
6736 void kvm_arch_hardware_disable(void *garbage)
6738 kvm_x86_ops->hardware_disable(garbage);
6739 drop_user_return_notifiers(garbage);
6742 int kvm_arch_hardware_setup(void)
6744 return kvm_x86_ops->hardware_setup();
6747 void kvm_arch_hardware_unsetup(void)
6749 kvm_x86_ops->hardware_unsetup();
6752 void kvm_arch_check_processor_compat(void *rtn)
6754 kvm_x86_ops->check_processor_compatibility(rtn);
6757 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6759 return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6762 struct static_key kvm_no_apic_vcpu __read_mostly;
6764 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6770 BUG_ON(vcpu->kvm == NULL);
6773 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6774 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6775 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6777 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6779 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6784 vcpu->arch.pio_data = page_address(page);
6786 kvm_set_tsc_khz(vcpu, max_tsc_khz);
6788 r = kvm_mmu_create(vcpu);
6790 goto fail_free_pio_data;
6792 if (irqchip_in_kernel(kvm)) {
6793 r = kvm_create_lapic(vcpu);
6795 goto fail_mmu_destroy;
6797 static_key_slow_inc(&kvm_no_apic_vcpu);
6799 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6801 if (!vcpu->arch.mce_banks) {
6803 goto fail_free_lapic;
6805 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6807 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6809 goto fail_free_mce_banks;
6814 goto fail_free_wbinvd_dirty_mask;
6816 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6817 vcpu->arch.pv_time_enabled = false;
6818 kvm_async_pf_hash_reset(vcpu);
6822 fail_free_wbinvd_dirty_mask:
6823 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6824 fail_free_mce_banks:
6825 kfree(vcpu->arch.mce_banks);
6827 kvm_free_lapic(vcpu);
6829 kvm_mmu_destroy(vcpu);
6831 free_page((unsigned long)vcpu->arch.pio_data);
6836 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6840 kvm_pmu_destroy(vcpu);
6841 kfree(vcpu->arch.mce_banks);
6842 kvm_free_lapic(vcpu);
6843 idx = srcu_read_lock(&vcpu->kvm->srcu);
6844 kvm_mmu_destroy(vcpu);
6845 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6846 free_page((unsigned long)vcpu->arch.pio_data);
6847 if (!irqchip_in_kernel(vcpu->kvm))
6848 static_key_slow_dec(&kvm_no_apic_vcpu);
6851 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6856 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6857 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6858 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6860 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6861 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6862 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6863 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6864 &kvm->arch.irq_sources_bitmap);
6866 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6867 mutex_init(&kvm->arch.apic_map_lock);
6868 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6870 pvclock_update_vm_gtod_copy(kvm);
6875 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6878 r = vcpu_load(vcpu);
6880 kvm_mmu_unload(vcpu);
6884 static void kvm_free_vcpus(struct kvm *kvm)
6887 struct kvm_vcpu *vcpu;
6890 * Unpin any mmu pages first.
6892 kvm_for_each_vcpu(i, vcpu, kvm) {
6893 kvm_clear_async_pf_completion_queue(vcpu);
6894 kvm_unload_vcpu_mmu(vcpu);
6896 kvm_for_each_vcpu(i, vcpu, kvm)
6897 kvm_arch_vcpu_free(vcpu);
6899 mutex_lock(&kvm->lock);
6900 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6901 kvm->vcpus[i] = NULL;
6903 atomic_set(&kvm->online_vcpus, 0);
6904 mutex_unlock(&kvm->lock);
6907 void kvm_arch_sync_events(struct kvm *kvm)
6909 kvm_free_all_assigned_devices(kvm);
6913 void kvm_arch_destroy_vm(struct kvm *kvm)
6915 if (current->mm == kvm->mm) {
6917 * Free memory regions allocated on behalf of userspace,
6918 * unless the the memory map has changed due to process exit
6921 struct kvm_userspace_memory_region mem;
6922 memset(&mem, 0, sizeof(mem));
6923 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
6924 kvm_set_memory_region(kvm, &mem);
6926 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
6927 kvm_set_memory_region(kvm, &mem);
6929 mem.slot = TSS_PRIVATE_MEMSLOT;
6930 kvm_set_memory_region(kvm, &mem);
6932 kvm_iommu_unmap_guest(kvm);
6933 kfree(kvm->arch.vpic);
6934 kfree(kvm->arch.vioapic);
6935 kvm_free_vcpus(kvm);
6936 if (kvm->arch.apic_access_page)
6937 put_page(kvm->arch.apic_access_page);
6938 if (kvm->arch.ept_identity_pagetable)
6939 put_page(kvm->arch.ept_identity_pagetable);
6940 kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6943 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6944 struct kvm_memory_slot *dont)
6948 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6949 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6950 kvm_kvfree(free->arch.rmap[i]);
6951 free->arch.rmap[i] = NULL;
6956 if (!dont || free->arch.lpage_info[i - 1] !=
6957 dont->arch.lpage_info[i - 1]) {
6958 kvm_kvfree(free->arch.lpage_info[i - 1]);
6959 free->arch.lpage_info[i - 1] = NULL;
6964 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6968 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6973 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6974 slot->base_gfn, level) + 1;
6976 slot->arch.rmap[i] =
6977 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6978 if (!slot->arch.rmap[i])
6983 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6984 sizeof(*slot->arch.lpage_info[i - 1]));
6985 if (!slot->arch.lpage_info[i - 1])
6988 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6989 slot->arch.lpage_info[i - 1][0].write_count = 1;
6990 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6991 slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6992 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6994 * If the gfn and userspace address are not aligned wrt each
6995 * other, or if explicitly asked to, disable large page
6996 * support for this slot
6998 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6999 !kvm_largepages_enabled()) {
7002 for (j = 0; j < lpages; ++j)
7003 slot->arch.lpage_info[i - 1][j].write_count = 1;
7010 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7011 kvm_kvfree(slot->arch.rmap[i]);
7012 slot->arch.rmap[i] = NULL;
7016 kvm_kvfree(slot->arch.lpage_info[i - 1]);
7017 slot->arch.lpage_info[i - 1] = NULL;
7022 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7023 struct kvm_memory_slot *memslot,
7024 struct kvm_userspace_memory_region *mem,
7025 enum kvm_mr_change change)
7028 * Only private memory slots need to be mapped here since
7029 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7031 if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7032 unsigned long userspace_addr;
7035 * MAP_SHARED to prevent internal slot pages from being moved
7038 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7039 PROT_READ | PROT_WRITE,
7040 MAP_SHARED | MAP_ANONYMOUS, 0);
7042 if (IS_ERR((void *)userspace_addr))
7043 return PTR_ERR((void *)userspace_addr);
7045 memslot->userspace_addr = userspace_addr;
7051 void kvm_arch_commit_memory_region(struct kvm *kvm,
7052 struct kvm_userspace_memory_region *mem,
7053 const struct kvm_memory_slot *old,
7054 enum kvm_mr_change change)
7057 int nr_mmu_pages = 0;
7059 if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7062 ret = vm_munmap(old->userspace_addr,
7063 old->npages * PAGE_SIZE);
7066 "kvm_vm_ioctl_set_memory_region: "
7067 "failed to munmap memory\n");
7070 if (!kvm->arch.n_requested_mmu_pages)
7071 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7074 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7076 * Write protect all pages for dirty logging.
7077 * Existing largepage mappings are destroyed here and new ones will
7078 * not be created until the end of the logging.
7080 if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7081 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7083 * If memory slot is created, or moved, we need to clear all
7086 kvm_mmu_invalidate_mmio_sptes(kvm);
7089 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7091 kvm_mmu_invalidate_zap_all_pages(kvm);
7094 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7095 struct kvm_memory_slot *slot)
7097 kvm_mmu_invalidate_zap_all_pages(kvm);
7100 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7102 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7103 !vcpu->arch.apf.halted)
7104 || !list_empty_careful(&vcpu->async_pf.done)
7105 || kvm_apic_has_events(vcpu)
7106 || atomic_read(&vcpu->arch.nmi_queued) ||
7107 (kvm_arch_interrupt_allowed(vcpu) &&
7108 kvm_cpu_has_interrupt(vcpu));
7111 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7113 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7116 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7118 return kvm_x86_ops->interrupt_allowed(vcpu);
7121 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7123 unsigned long current_rip = kvm_rip_read(vcpu) +
7124 get_segment_base(vcpu, VCPU_SREG_CS);
7126 return current_rip == linear_rip;
7128 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7130 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7132 unsigned long rflags;
7134 rflags = kvm_x86_ops->get_rflags(vcpu);
7135 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7136 rflags &= ~X86_EFLAGS_TF;
7139 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7141 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7143 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7144 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7145 rflags |= X86_EFLAGS_TF;
7146 kvm_x86_ops->set_rflags(vcpu, rflags);
7147 kvm_make_request(KVM_REQ_EVENT, vcpu);
7149 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7151 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7155 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7156 is_error_page(work->page))
7159 r = kvm_mmu_reload(vcpu);
7163 if (!vcpu->arch.mmu.direct_map &&
7164 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7167 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7170 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7172 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7175 static inline u32 kvm_async_pf_next_probe(u32 key)
7177 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7180 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7182 u32 key = kvm_async_pf_hash_fn(gfn);
7184 while (vcpu->arch.apf.gfns[key] != ~0)
7185 key = kvm_async_pf_next_probe(key);
7187 vcpu->arch.apf.gfns[key] = gfn;
7190 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7193 u32 key = kvm_async_pf_hash_fn(gfn);
7195 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7196 (vcpu->arch.apf.gfns[key] != gfn &&
7197 vcpu->arch.apf.gfns[key] != ~0); i++)
7198 key = kvm_async_pf_next_probe(key);
7203 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7205 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7208 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7212 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7214 vcpu->arch.apf.gfns[i] = ~0;
7216 j = kvm_async_pf_next_probe(j);
7217 if (vcpu->arch.apf.gfns[j] == ~0)
7219 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7221 * k lies cyclically in ]i,j]
7223 * |....j i.k.| or |.k..j i...|
7225 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7226 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7231 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7234 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7238 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7239 struct kvm_async_pf *work)
7241 struct x86_exception fault;
7243 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7244 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7246 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7247 (vcpu->arch.apf.send_user_only &&
7248 kvm_x86_ops->get_cpl(vcpu) == 0))
7249 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7250 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7251 fault.vector = PF_VECTOR;
7252 fault.error_code_valid = true;
7253 fault.error_code = 0;
7254 fault.nested_page_fault = false;
7255 fault.address = work->arch.token;
7256 kvm_inject_page_fault(vcpu, &fault);
7260 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7261 struct kvm_async_pf *work)
7263 struct x86_exception fault;
7265 trace_kvm_async_pf_ready(work->arch.token, work->gva);
7266 if (is_error_page(work->page))
7267 work->arch.token = ~0; /* broadcast wakeup */
7269 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7271 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7272 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7273 fault.vector = PF_VECTOR;
7274 fault.error_code_valid = true;
7275 fault.error_code = 0;
7276 fault.nested_page_fault = false;
7277 fault.address = work->arch.token;
7278 kvm_inject_page_fault(vcpu, &fault);
7280 vcpu->arch.apf.halted = false;
7281 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7284 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7286 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7289 return !kvm_event_needs_reinjection(vcpu) &&
7290 kvm_x86_ops->interrupt_allowed(vcpu);
7293 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7294 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7295 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
7305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);