2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
24 #include "kvm_cache_regs.h"
26 #include <linux/kvm_host.h>
27 #include <linux/types.h>
28 #include <linux/string.h>
30 #include <linux/highmem.h>
31 #include <linux/module.h>
32 #include <linux/swap.h>
33 #include <linux/hugetlb.h>
34 #include <linux/compiler.h>
35 #include <linux/srcu.h>
36 #include <linux/slab.h>
37 #include <linux/uaccess.h>
40 #include <asm/cmpxchg.h>
45 * When setting this variable to true it enables Two-Dimensional-Paging
46 * where the hardware walks 2 page tables:
47 * 1. the guest-virtual to guest-physical
48 * 2. while doing 1. it walks guest-physical to host-physical
49 * If the hardware supports that we don't need to do shadow paging.
51 bool tdp_enabled = false;
55 AUDIT_POST_PAGE_FAULT,
66 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
67 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
71 #define pgprintk(x...) do { } while (0)
72 #define rmap_printk(x...) do { } while (0)
78 module_param(dbg, bool, 0644);
82 #define ASSERT(x) do { } while (0)
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
91 #define PTE_PREFETCH_NUM 8
93 #define PT_FIRST_AVAIL_BITS_SHIFT 10
94 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96 #define PT64_LEVEL_BITS 9
98 #define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105 #define PT32_LEVEL_BITS 10
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110 #define PT32_LVL_OFFSET_MASK(level) \
111 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
112 * PT32_LEVEL_BITS))) - 1))
114 #define PT32_INDEX(address, level)\
115 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
118 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
119 #define PT64_DIR_BASE_ADDR_MASK \
120 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
121 #define PT64_LVL_ADDR_MASK(level) \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
123 * PT64_LEVEL_BITS))) - 1))
124 #define PT64_LVL_OFFSET_MASK(level) \
125 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
126 * PT64_LEVEL_BITS))) - 1))
128 #define PT32_BASE_ADDR_MASK PAGE_MASK
129 #define PT32_DIR_BASE_ADDR_MASK \
130 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
131 #define PT32_LVL_ADDR_MASK(level) \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
133 * PT32_LEVEL_BITS))) - 1))
135 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
138 #define ACC_EXEC_MASK 1
139 #define ACC_WRITE_MASK PT_WRITABLE_MASK
140 #define ACC_USER_MASK PT_USER_MASK
141 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
143 #include <trace/events/kvm.h>
145 #define CREATE_TRACE_POINTS
146 #include "mmutrace.h"
148 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
149 #define SPTE_MMU_WRITEABLE (1ULL << (PT_FIRST_AVAIL_BITS_SHIFT + 1))
151 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
153 /* make pte_list_desc fit well in cache line */
154 #define PTE_LIST_EXT 3
156 struct pte_list_desc {
157 u64 *sptes[PTE_LIST_EXT];
158 struct pte_list_desc *more;
161 struct kvm_shadow_walk_iterator {
169 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
170 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
171 shadow_walk_okay(&(_walker)); \
172 shadow_walk_next(&(_walker)))
174 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)) && \
177 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
178 __shadow_walk_next(&(_walker), spte))
180 static struct kmem_cache *pte_list_desc_cache;
181 static struct kmem_cache *mmu_page_header_cache;
182 static struct percpu_counter kvm_total_used_mmu_pages;
184 static u64 __read_mostly shadow_nx_mask;
185 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
186 static u64 __read_mostly shadow_user_mask;
187 static u64 __read_mostly shadow_accessed_mask;
188 static u64 __read_mostly shadow_dirty_mask;
189 static u64 __read_mostly shadow_mmio_mask;
191 static void mmu_spte_set(u64 *sptep, u64 spte);
192 static void mmu_free_roots(struct kvm_vcpu *vcpu);
194 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask)
196 shadow_mmio_mask = mmio_mask;
198 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask);
201 * spte bits of bit 3 ~ bit 11 are used as low 9 bits of generation number,
202 * the bits of bits 52 ~ bit 61 are used as high 10 bits of generation
205 #define MMIO_SPTE_GEN_LOW_SHIFT 3
206 #define MMIO_SPTE_GEN_HIGH_SHIFT 52
208 #define MMIO_GEN_SHIFT 19
209 #define MMIO_GEN_LOW_SHIFT 9
210 #define MMIO_GEN_LOW_MASK ((1 << MMIO_GEN_LOW_SHIFT) - 1)
211 #define MMIO_GEN_MASK ((1 << MMIO_GEN_SHIFT) - 1)
212 #define MMIO_MAX_GEN ((1 << MMIO_GEN_SHIFT) - 1)
214 static u64 generation_mmio_spte_mask(unsigned int gen)
218 WARN_ON(gen > MMIO_MAX_GEN);
220 mask = (gen & MMIO_GEN_LOW_MASK) << MMIO_SPTE_GEN_LOW_SHIFT;
221 mask |= ((u64)gen >> MMIO_GEN_LOW_SHIFT) << MMIO_SPTE_GEN_HIGH_SHIFT;
225 static unsigned int get_mmio_spte_generation(u64 spte)
229 spte &= ~shadow_mmio_mask;
231 gen = (spte >> MMIO_SPTE_GEN_LOW_SHIFT) & MMIO_GEN_LOW_MASK;
232 gen |= (spte >> MMIO_SPTE_GEN_HIGH_SHIFT) << MMIO_GEN_LOW_SHIFT;
236 static unsigned int kvm_current_mmio_generation(struct kvm *kvm)
238 return kvm_memslots(kvm)->generation & MMIO_GEN_MASK;
241 static void mark_mmio_spte(struct kvm *kvm, u64 *sptep, u64 gfn,
244 struct kvm_mmu_page *sp = page_header(__pa(sptep));
245 unsigned int gen = kvm_current_mmio_generation(kvm);
246 u64 mask = generation_mmio_spte_mask(gen);
248 access &= ACC_WRITE_MASK | ACC_USER_MASK;
249 mask |= shadow_mmio_mask | access | gfn << PAGE_SHIFT;
250 sp->mmio_cached = true;
252 trace_mark_mmio_spte(sptep, gfn, access, gen);
253 mmu_spte_set(sptep, mask);
256 static bool is_mmio_spte(u64 spte)
258 return (spte & shadow_mmio_mask) == shadow_mmio_mask;
261 static gfn_t get_mmio_spte_gfn(u64 spte)
263 u64 mask = generation_mmio_spte_mask(MMIO_MAX_GEN) | shadow_mmio_mask;
264 return (spte & ~mask) >> PAGE_SHIFT;
267 static unsigned get_mmio_spte_access(u64 spte)
269 u64 mask = generation_mmio_spte_mask(MMIO_MAX_GEN) | shadow_mmio_mask;
270 return (spte & ~mask) & ~PAGE_MASK;
273 static bool set_mmio_spte(struct kvm *kvm, u64 *sptep, gfn_t gfn,
274 pfn_t pfn, unsigned access)
276 if (unlikely(is_noslot_pfn(pfn))) {
277 mark_mmio_spte(kvm, sptep, gfn, access);
284 static bool check_mmio_spte(struct kvm *kvm, u64 spte)
286 unsigned int kvm_gen, spte_gen;
288 kvm_gen = kvm_current_mmio_generation(kvm);
289 spte_gen = get_mmio_spte_generation(spte);
291 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
292 return likely(kvm_gen == spte_gen);
295 static inline u64 rsvd_bits(int s, int e)
297 return ((1ULL << (e - s + 1)) - 1) << s;
300 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
301 u64 dirty_mask, u64 nx_mask, u64 x_mask)
303 shadow_user_mask = user_mask;
304 shadow_accessed_mask = accessed_mask;
305 shadow_dirty_mask = dirty_mask;
306 shadow_nx_mask = nx_mask;
307 shadow_x_mask = x_mask;
309 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
311 static int is_cpuid_PSE36(void)
316 static int is_nx(struct kvm_vcpu *vcpu)
318 return vcpu->arch.efer & EFER_NX;
321 static int is_shadow_present_pte(u64 pte)
323 return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
326 static int is_large_pte(u64 pte)
328 return pte & PT_PAGE_SIZE_MASK;
331 static int is_dirty_gpte(unsigned long pte)
333 return pte & PT_DIRTY_MASK;
336 static int is_rmap_spte(u64 pte)
338 return is_shadow_present_pte(pte);
341 static int is_last_spte(u64 pte, int level)
343 if (level == PT_PAGE_TABLE_LEVEL)
345 if (is_large_pte(pte))
350 static pfn_t spte_to_pfn(u64 pte)
352 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
355 static gfn_t pse36_gfn_delta(u32 gpte)
357 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
359 return (gpte & PT32_DIR_PSE36_MASK) << shift;
363 static void __set_spte(u64 *sptep, u64 spte)
368 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
373 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
375 return xchg(sptep, spte);
378 static u64 __get_spte_lockless(u64 *sptep)
380 return ACCESS_ONCE(*sptep);
383 static bool __check_direct_spte_mmio_pf(u64 spte)
385 /* It is valid if the spte is zapped. */
397 static void count_spte_clear(u64 *sptep, u64 spte)
399 struct kvm_mmu_page *sp = page_header(__pa(sptep));
401 if (is_shadow_present_pte(spte))
404 /* Ensure the spte is completely set before we increase the count */
406 sp->clear_spte_count++;
409 static void __set_spte(u64 *sptep, u64 spte)
411 union split_spte *ssptep, sspte;
413 ssptep = (union split_spte *)sptep;
414 sspte = (union split_spte)spte;
416 ssptep->spte_high = sspte.spte_high;
419 * If we map the spte from nonpresent to present, We should store
420 * the high bits firstly, then set present bit, so cpu can not
421 * fetch this spte while we are setting the spte.
425 ssptep->spte_low = sspte.spte_low;
428 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
430 union split_spte *ssptep, sspte;
432 ssptep = (union split_spte *)sptep;
433 sspte = (union split_spte)spte;
435 ssptep->spte_low = sspte.spte_low;
438 * If we map the spte from present to nonpresent, we should clear
439 * present bit firstly to avoid vcpu fetch the old high bits.
443 ssptep->spte_high = sspte.spte_high;
444 count_spte_clear(sptep, spte);
447 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
449 union split_spte *ssptep, sspte, orig;
451 ssptep = (union split_spte *)sptep;
452 sspte = (union split_spte)spte;
454 /* xchg acts as a barrier before the setting of the high bits */
455 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
456 orig.spte_high = ssptep->spte_high;
457 ssptep->spte_high = sspte.spte_high;
458 count_spte_clear(sptep, spte);
464 * The idea using the light way get the spte on x86_32 guest is from
465 * gup_get_pte(arch/x86/mm/gup.c).
466 * The difference is we can not catch the spte tlb flush if we leave
467 * guest mode, so we emulate it by increase clear_spte_count when spte
470 static u64 __get_spte_lockless(u64 *sptep)
472 struct kvm_mmu_page *sp = page_header(__pa(sptep));
473 union split_spte spte, *orig = (union split_spte *)sptep;
477 count = sp->clear_spte_count;
480 spte.spte_low = orig->spte_low;
483 spte.spte_high = orig->spte_high;
486 if (unlikely(spte.spte_low != orig->spte_low ||
487 count != sp->clear_spte_count))
493 static bool __check_direct_spte_mmio_pf(u64 spte)
495 union split_spte sspte = (union split_spte)spte;
496 u32 high_mmio_mask = shadow_mmio_mask >> 32;
498 /* It is valid if the spte is zapped. */
502 /* It is valid if the spte is being zapped. */
503 if (sspte.spte_low == 0ull &&
504 (sspte.spte_high & high_mmio_mask) == high_mmio_mask)
511 static bool spte_is_locklessly_modifiable(u64 spte)
513 return (spte & (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE)) ==
514 (SPTE_HOST_WRITEABLE | SPTE_MMU_WRITEABLE);
517 static bool spte_has_volatile_bits(u64 spte)
520 * Always atomicly update spte if it can be updated
521 * out of mmu-lock, it can ensure dirty bit is not lost,
522 * also, it can help us to get a stable is_writable_pte()
523 * to ensure tlb flush is not missed.
525 if (spte_is_locklessly_modifiable(spte))
528 if (!shadow_accessed_mask)
531 if (!is_shadow_present_pte(spte))
534 if ((spte & shadow_accessed_mask) &&
535 (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
541 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
543 return (old_spte & bit_mask) && !(new_spte & bit_mask);
546 /* Rules for using mmu_spte_set:
547 * Set the sptep from nonpresent to present.
548 * Note: the sptep being assigned *must* be either not present
549 * or in a state where the hardware will not attempt to update
552 static void mmu_spte_set(u64 *sptep, u64 new_spte)
554 WARN_ON(is_shadow_present_pte(*sptep));
555 __set_spte(sptep, new_spte);
558 /* Rules for using mmu_spte_update:
559 * Update the state bits, it means the mapped pfn is not changged.
561 * Whenever we overwrite a writable spte with a read-only one we
562 * should flush remote TLBs. Otherwise rmap_write_protect
563 * will find a read-only spte, even though the writable spte
564 * might be cached on a CPU's TLB, the return value indicates this
567 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
569 u64 old_spte = *sptep;
572 WARN_ON(!is_rmap_spte(new_spte));
574 if (!is_shadow_present_pte(old_spte)) {
575 mmu_spte_set(sptep, new_spte);
579 if (!spte_has_volatile_bits(old_spte))
580 __update_clear_spte_fast(sptep, new_spte);
582 old_spte = __update_clear_spte_slow(sptep, new_spte);
585 * For the spte updated out of mmu-lock is safe, since
586 * we always atomicly update it, see the comments in
587 * spte_has_volatile_bits().
589 if (is_writable_pte(old_spte) && !is_writable_pte(new_spte))
592 if (!shadow_accessed_mask)
595 if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
596 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
597 if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
598 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
604 * Rules for using mmu_spte_clear_track_bits:
605 * It sets the sptep from present to nonpresent, and track the
606 * state bits, it is used to clear the last level sptep.
608 static int mmu_spte_clear_track_bits(u64 *sptep)
611 u64 old_spte = *sptep;
613 if (!spte_has_volatile_bits(old_spte))
614 __update_clear_spte_fast(sptep, 0ull);
616 old_spte = __update_clear_spte_slow(sptep, 0ull);
618 if (!is_rmap_spte(old_spte))
621 pfn = spte_to_pfn(old_spte);
624 * KVM does not hold the refcount of the page used by
625 * kvm mmu, before reclaiming the page, we should
626 * unmap it from mmu first.
628 WARN_ON(!kvm_is_mmio_pfn(pfn) && !page_count(pfn_to_page(pfn)));
630 if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
631 kvm_set_pfn_accessed(pfn);
632 if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
633 kvm_set_pfn_dirty(pfn);
638 * Rules for using mmu_spte_clear_no_track:
639 * Directly clear spte without caring the state bits of sptep,
640 * it is used to set the upper level spte.
642 static void mmu_spte_clear_no_track(u64 *sptep)
644 __update_clear_spte_fast(sptep, 0ull);
647 static u64 mmu_spte_get_lockless(u64 *sptep)
649 return __get_spte_lockless(sptep);
652 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
655 * Prevent page table teardown by making any free-er wait during
656 * kvm_flush_remote_tlbs() IPI to all active vcpus.
659 vcpu->mode = READING_SHADOW_PAGE_TABLES;
661 * Make sure a following spte read is not reordered ahead of the write
667 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
670 * Make sure the write to vcpu->mode is not reordered in front of
671 * reads to sptes. If it does, kvm_commit_zap_page() can see us
672 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
675 vcpu->mode = OUTSIDE_GUEST_MODE;
679 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
680 struct kmem_cache *base_cache, int min)
684 if (cache->nobjs >= min)
686 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
687 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
690 cache->objects[cache->nobjs++] = obj;
695 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache)
700 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
701 struct kmem_cache *cache)
704 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
707 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
712 if (cache->nobjs >= min)
714 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
715 page = (void *)__get_free_page(GFP_KERNEL);
718 cache->objects[cache->nobjs++] = page;
723 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
726 free_page((unsigned long)mc->objects[--mc->nobjs]);
729 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
733 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
734 pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
737 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
740 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
741 mmu_page_header_cache, 4);
746 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
748 mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
749 pte_list_desc_cache);
750 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
751 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
752 mmu_page_header_cache);
755 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
760 p = mc->objects[--mc->nobjs];
764 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
766 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
769 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
771 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
774 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
776 if (!sp->role.direct)
777 return sp->gfns[index];
779 return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
782 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
785 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
787 sp->gfns[index] = gfn;
791 * Return the pointer to the large page information for a given gfn,
792 * handling slots that are not large page aligned.
794 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
795 struct kvm_memory_slot *slot,
800 idx = gfn_to_index(gfn, slot->base_gfn, level);
801 return &slot->arch.lpage_info[level - 2][idx];
804 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
806 struct kvm_memory_slot *slot;
807 struct kvm_lpage_info *linfo;
810 slot = gfn_to_memslot(kvm, gfn);
811 for (i = PT_DIRECTORY_LEVEL;
812 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
813 linfo = lpage_info_slot(gfn, slot, i);
814 linfo->write_count += 1;
816 kvm->arch.indirect_shadow_pages++;
819 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
821 struct kvm_memory_slot *slot;
822 struct kvm_lpage_info *linfo;
825 slot = gfn_to_memslot(kvm, gfn);
826 for (i = PT_DIRECTORY_LEVEL;
827 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
828 linfo = lpage_info_slot(gfn, slot, i);
829 linfo->write_count -= 1;
830 WARN_ON(linfo->write_count < 0);
832 kvm->arch.indirect_shadow_pages--;
835 static int has_wrprotected_page(struct kvm *kvm,
839 struct kvm_memory_slot *slot;
840 struct kvm_lpage_info *linfo;
842 slot = gfn_to_memslot(kvm, gfn);
844 linfo = lpage_info_slot(gfn, slot, level);
845 return linfo->write_count;
851 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
853 unsigned long page_size;
856 page_size = kvm_host_page_size(kvm, gfn);
858 for (i = PT_PAGE_TABLE_LEVEL;
859 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
860 if (page_size >= KVM_HPAGE_SIZE(i))
869 static struct kvm_memory_slot *
870 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
873 struct kvm_memory_slot *slot;
875 slot = gfn_to_memslot(vcpu->kvm, gfn);
876 if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
877 (no_dirty_log && slot->dirty_bitmap))
883 static bool mapping_level_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t large_gfn)
885 return !gfn_to_memslot_dirty_bitmap(vcpu, large_gfn, true);
888 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
890 int host_level, level, max_level;
892 host_level = host_mapping_level(vcpu->kvm, large_gfn);
894 if (host_level == PT_PAGE_TABLE_LEVEL)
897 max_level = min(kvm_x86_ops->get_lpage_level(), host_level);
899 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
900 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
907 * Pte mapping structures:
909 * If pte_list bit zero is zero, then pte_list point to the spte.
911 * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
912 * pte_list_desc containing more mappings.
914 * Returns the number of pte entries before the spte was added or zero if
915 * the spte was not added.
918 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
919 unsigned long *pte_list)
921 struct pte_list_desc *desc;
925 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
926 *pte_list = (unsigned long)spte;
927 } else if (!(*pte_list & 1)) {
928 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
929 desc = mmu_alloc_pte_list_desc(vcpu);
930 desc->sptes[0] = (u64 *)*pte_list;
931 desc->sptes[1] = spte;
932 *pte_list = (unsigned long)desc | 1;
935 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
936 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
937 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
939 count += PTE_LIST_EXT;
941 if (desc->sptes[PTE_LIST_EXT-1]) {
942 desc->more = mmu_alloc_pte_list_desc(vcpu);
945 for (i = 0; desc->sptes[i]; ++i)
947 desc->sptes[i] = spte;
953 pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,
954 int i, struct pte_list_desc *prev_desc)
958 for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
960 desc->sptes[i] = desc->sptes[j];
961 desc->sptes[j] = NULL;
964 if (!prev_desc && !desc->more)
965 *pte_list = (unsigned long)desc->sptes[0];
968 prev_desc->more = desc->more;
970 *pte_list = (unsigned long)desc->more | 1;
971 mmu_free_pte_list_desc(desc);
974 static void pte_list_remove(u64 *spte, unsigned long *pte_list)
976 struct pte_list_desc *desc;
977 struct pte_list_desc *prev_desc;
981 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
983 } else if (!(*pte_list & 1)) {
984 rmap_printk("pte_list_remove: %p 1->0\n", spte);
985 if ((u64 *)*pte_list != spte) {
986 printk(KERN_ERR "pte_list_remove: %p 1->BUG\n", spte);
991 rmap_printk("pte_list_remove: %p many->many\n", spte);
992 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
995 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
996 if (desc->sptes[i] == spte) {
997 pte_list_desc_remove_entry(pte_list,
1005 pr_err("pte_list_remove: %p many->many\n", spte);
1010 typedef void (*pte_list_walk_fn) (u64 *spte);
1011 static void pte_list_walk(unsigned long *pte_list, pte_list_walk_fn fn)
1013 struct pte_list_desc *desc;
1019 if (!(*pte_list & 1))
1020 return fn((u64 *)*pte_list);
1022 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
1024 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
1030 static unsigned long *__gfn_to_rmap(gfn_t gfn, int level,
1031 struct kvm_memory_slot *slot)
1035 idx = gfn_to_index(gfn, slot->base_gfn, level);
1036 return &slot->arch.rmap[level - PT_PAGE_TABLE_LEVEL][idx];
1040 * Take gfn and return the reverse mapping to it.
1042 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
1044 struct kvm_memory_slot *slot;
1046 slot = gfn_to_memslot(kvm, gfn);
1047 return __gfn_to_rmap(gfn, level, slot);
1050 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1052 struct kvm_mmu_memory_cache *cache;
1054 cache = &vcpu->arch.mmu_pte_list_desc_cache;
1055 return mmu_memory_cache_free_objects(cache);
1058 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1060 struct kvm_mmu_page *sp;
1061 unsigned long *rmapp;
1063 sp = page_header(__pa(spte));
1064 kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
1065 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
1066 return pte_list_add(vcpu, spte, rmapp);
1069 static void rmap_remove(struct kvm *kvm, u64 *spte)
1071 struct kvm_mmu_page *sp;
1073 unsigned long *rmapp;
1075 sp = page_header(__pa(spte));
1076 gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
1077 rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
1078 pte_list_remove(spte, rmapp);
1082 * Used by the following functions to iterate through the sptes linked by a
1083 * rmap. All fields are private and not assumed to be used outside.
1085 struct rmap_iterator {
1086 /* private fields */
1087 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1088 int pos; /* index of the sptep */
1092 * Iteration must be started by this function. This should also be used after
1093 * removing/dropping sptes from the rmap link because in such cases the
1094 * information in the itererator may not be valid.
1096 * Returns sptep if found, NULL otherwise.
1098 static u64 *rmap_get_first(unsigned long rmap, struct rmap_iterator *iter)
1108 iter->desc = (struct pte_list_desc *)(rmap & ~1ul);
1110 return iter->desc->sptes[iter->pos];
1114 * Must be used with a valid iterator: e.g. after rmap_get_first().
1116 * Returns sptep if found, NULL otherwise.
1118 static u64 *rmap_get_next(struct rmap_iterator *iter)
1121 if (iter->pos < PTE_LIST_EXT - 1) {
1125 sptep = iter->desc->sptes[iter->pos];
1130 iter->desc = iter->desc->more;
1134 /* desc->sptes[0] cannot be NULL */
1135 return iter->desc->sptes[iter->pos];
1142 static void drop_spte(struct kvm *kvm, u64 *sptep)
1144 if (mmu_spte_clear_track_bits(sptep))
1145 rmap_remove(kvm, sptep);
1149 static bool __drop_large_spte(struct kvm *kvm, u64 *sptep)
1151 if (is_large_pte(*sptep)) {
1152 WARN_ON(page_header(__pa(sptep))->role.level ==
1153 PT_PAGE_TABLE_LEVEL);
1154 drop_spte(kvm, sptep);
1162 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1164 if (__drop_large_spte(vcpu->kvm, sptep))
1165 kvm_flush_remote_tlbs(vcpu->kvm);
1169 * Write-protect on the specified @sptep, @pt_protect indicates whether
1170 * spte writ-protection is caused by protecting shadow page table.
1171 * @flush indicates whether tlb need be flushed.
1173 * Note: write protection is difference between drity logging and spte
1175 * - for dirty logging, the spte can be set to writable at anytime if
1176 * its dirty bitmap is properly set.
1177 * - for spte protection, the spte can be writable only after unsync-ing
1180 * Return true if the spte is dropped.
1183 spte_write_protect(struct kvm *kvm, u64 *sptep, bool *flush, bool pt_protect)
1187 if (!is_writable_pte(spte) &&
1188 !(pt_protect && spte_is_locklessly_modifiable(spte)))
1191 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep);
1193 if (__drop_large_spte(kvm, sptep)) {
1199 spte &= ~SPTE_MMU_WRITEABLE;
1200 spte = spte & ~PT_WRITABLE_MASK;
1202 *flush |= mmu_spte_update(sptep, spte);
1206 static bool __rmap_write_protect(struct kvm *kvm, unsigned long *rmapp,
1210 struct rmap_iterator iter;
1213 for (sptep = rmap_get_first(*rmapp, &iter); sptep;) {
1214 BUG_ON(!(*sptep & PT_PRESENT_MASK));
1215 if (spte_write_protect(kvm, sptep, &flush, pt_protect)) {
1216 sptep = rmap_get_first(*rmapp, &iter);
1220 sptep = rmap_get_next(&iter);
1227 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1228 * @kvm: kvm instance
1229 * @slot: slot to protect
1230 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1231 * @mask: indicates which pages we should protect
1233 * Used when we do not need to care about huge page mappings: e.g. during dirty
1234 * logging we do not have any such mappings.
1236 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1237 struct kvm_memory_slot *slot,
1238 gfn_t gfn_offset, unsigned long mask)
1240 unsigned long *rmapp;
1243 rmapp = __gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1244 PT_PAGE_TABLE_LEVEL, slot);
1245 __rmap_write_protect(kvm, rmapp, false);
1247 /* clear the first set bit */
1252 static bool rmap_write_protect(struct kvm *kvm, u64 gfn)
1254 struct kvm_memory_slot *slot;
1255 unsigned long *rmapp;
1257 bool write_protected = false;
1259 slot = gfn_to_memslot(kvm, gfn);
1261 for (i = PT_PAGE_TABLE_LEVEL;
1262 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
1263 rmapp = __gfn_to_rmap(gfn, i, slot);
1264 write_protected |= __rmap_write_protect(kvm, rmapp, true);
1267 return write_protected;
1270 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
1271 struct kvm_memory_slot *slot, unsigned long data)
1274 struct rmap_iterator iter;
1275 int need_tlb_flush = 0;
1277 while ((sptep = rmap_get_first(*rmapp, &iter))) {
1278 BUG_ON(!(*sptep & PT_PRESENT_MASK));
1279 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", sptep, *sptep);
1281 drop_spte(kvm, sptep);
1285 return need_tlb_flush;
1288 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
1289 struct kvm_memory_slot *slot, unsigned long data)
1292 struct rmap_iterator iter;
1295 pte_t *ptep = (pte_t *)data;
1298 WARN_ON(pte_huge(*ptep));
1299 new_pfn = pte_pfn(*ptep);
1301 for (sptep = rmap_get_first(*rmapp, &iter); sptep;) {
1302 BUG_ON(!is_shadow_present_pte(*sptep));
1303 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", sptep, *sptep);
1307 if (pte_write(*ptep)) {
1308 drop_spte(kvm, sptep);
1309 sptep = rmap_get_first(*rmapp, &iter);
1311 new_spte = *sptep & ~PT64_BASE_ADDR_MASK;
1312 new_spte |= (u64)new_pfn << PAGE_SHIFT;
1314 new_spte &= ~PT_WRITABLE_MASK;
1315 new_spte &= ~SPTE_HOST_WRITEABLE;
1316 new_spte &= ~shadow_accessed_mask;
1318 mmu_spte_clear_track_bits(sptep);
1319 mmu_spte_set(sptep, new_spte);
1320 sptep = rmap_get_next(&iter);
1325 kvm_flush_remote_tlbs(kvm);
1330 static int kvm_handle_hva_range(struct kvm *kvm,
1331 unsigned long start,
1334 int (*handler)(struct kvm *kvm,
1335 unsigned long *rmapp,
1336 struct kvm_memory_slot *slot,
1337 unsigned long data))
1341 struct kvm_memslots *slots;
1342 struct kvm_memory_slot *memslot;
1344 slots = kvm_memslots(kvm);
1346 kvm_for_each_memslot(memslot, slots) {
1347 unsigned long hva_start, hva_end;
1348 gfn_t gfn_start, gfn_end;
1350 hva_start = max(start, memslot->userspace_addr);
1351 hva_end = min(end, memslot->userspace_addr +
1352 (memslot->npages << PAGE_SHIFT));
1353 if (hva_start >= hva_end)
1356 * {gfn(page) | page intersects with [hva_start, hva_end)} =
1357 * {gfn_start, gfn_start+1, ..., gfn_end-1}.
1359 gfn_start = hva_to_gfn_memslot(hva_start, memslot);
1360 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
1362 for (j = PT_PAGE_TABLE_LEVEL;
1363 j < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++j) {
1364 unsigned long idx, idx_end;
1365 unsigned long *rmapp;
1368 * {idx(page_j) | page_j intersects with
1369 * [hva_start, hva_end)} = {idx, idx+1, ..., idx_end}.
1371 idx = gfn_to_index(gfn_start, memslot->base_gfn, j);
1372 idx_end = gfn_to_index(gfn_end - 1, memslot->base_gfn, j);
1374 rmapp = __gfn_to_rmap(gfn_start, j, memslot);
1376 for (; idx <= idx_end; ++idx)
1377 ret |= handler(kvm, rmapp++, memslot, data);
1384 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
1386 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
1387 struct kvm_memory_slot *slot,
1388 unsigned long data))
1390 return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler);
1393 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1395 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
1398 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
1400 return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp);
1403 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1405 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
1408 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1409 struct kvm_memory_slot *slot, unsigned long data)
1412 struct rmap_iterator uninitialized_var(iter);
1416 * In case of absence of EPT Access and Dirty Bits supports,
1417 * emulate the accessed bit for EPT, by checking if this page has
1418 * an EPT mapping, and clearing it if it does. On the next access,
1419 * a new EPT mapping will be established.
1420 * This has some overhead, but not as much as the cost of swapping
1421 * out actively used pages or breaking up actively used hugepages.
1423 if (!shadow_accessed_mask) {
1424 young = kvm_unmap_rmapp(kvm, rmapp, slot, data);
1428 for (sptep = rmap_get_first(*rmapp, &iter); sptep;
1429 sptep = rmap_get_next(&iter)) {
1430 BUG_ON(!is_shadow_present_pte(*sptep));
1432 if (*sptep & shadow_accessed_mask) {
1434 clear_bit((ffs(shadow_accessed_mask) - 1),
1435 (unsigned long *)sptep);
1439 /* @data has hva passed to kvm_age_hva(). */
1440 trace_kvm_age_page(data, slot, young);
1444 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1445 struct kvm_memory_slot *slot, unsigned long data)
1448 struct rmap_iterator iter;
1452 * If there's no access bit in the secondary pte set by the
1453 * hardware it's up to gup-fast/gup to set the access bit in
1454 * the primary pte or in the page structure.
1456 if (!shadow_accessed_mask)
1459 for (sptep = rmap_get_first(*rmapp, &iter); sptep;
1460 sptep = rmap_get_next(&iter)) {
1461 BUG_ON(!is_shadow_present_pte(*sptep));
1463 if (*sptep & shadow_accessed_mask) {
1472 #define RMAP_RECYCLE_THRESHOLD 1000
1474 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1476 unsigned long *rmapp;
1477 struct kvm_mmu_page *sp;
1479 sp = page_header(__pa(spte));
1481 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
1483 kvm_unmap_rmapp(vcpu->kvm, rmapp, NULL, 0);
1484 kvm_flush_remote_tlbs(vcpu->kvm);
1487 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
1489 return kvm_handle_hva(kvm, hva, hva, kvm_age_rmapp);
1492 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1494 return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1498 static int is_empty_shadow_page(u64 *spt)
1503 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1504 if (is_shadow_present_pte(*pos)) {
1505 printk(KERN_ERR "%s: %p %llx\n", __func__,
1514 * This value is the sum of all of the kvm instances's
1515 * kvm->arch.n_used_mmu_pages values. We need a global,
1516 * aggregate version in order to make the slab shrinker
1519 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1521 kvm->arch.n_used_mmu_pages += nr;
1522 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1525 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1527 ASSERT(is_empty_shadow_page(sp->spt));
1528 hlist_del(&sp->hash_link);
1529 list_del(&sp->link);
1530 free_page((unsigned long)sp->spt);
1531 if (!sp->role.direct)
1532 free_page((unsigned long)sp->gfns);
1533 kmem_cache_free(mmu_page_header_cache, sp);
1536 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1538 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1541 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1542 struct kvm_mmu_page *sp, u64 *parent_pte)
1547 pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1550 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1553 pte_list_remove(parent_pte, &sp->parent_ptes);
1556 static void drop_parent_pte(struct kvm_mmu_page *sp,
1559 mmu_page_remove_parent_pte(sp, parent_pte);
1560 mmu_spte_clear_no_track(parent_pte);
1563 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1564 u64 *parent_pte, int direct)
1566 struct kvm_mmu_page *sp;
1568 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1569 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1571 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1572 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1575 * The active_mmu_pages list is the FIFO list, do not move the
1576 * page until it is zapped. kvm_zap_obsolete_pages depends on
1577 * this feature. See the comments in kvm_zap_obsolete_pages().
1579 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1580 sp->parent_ptes = 0;
1581 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1582 kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1586 static void mark_unsync(u64 *spte);
1587 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1589 pte_list_walk(&sp->parent_ptes, mark_unsync);
1592 static void mark_unsync(u64 *spte)
1594 struct kvm_mmu_page *sp;
1597 sp = page_header(__pa(spte));
1598 index = spte - sp->spt;
1599 if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1601 if (sp->unsync_children++)
1603 kvm_mmu_mark_parents_unsync(sp);
1606 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1607 struct kvm_mmu_page *sp)
1612 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1616 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1617 struct kvm_mmu_page *sp, u64 *spte,
1623 #define KVM_PAGE_ARRAY_NR 16
1625 struct kvm_mmu_pages {
1626 struct mmu_page_and_offset {
1627 struct kvm_mmu_page *sp;
1629 } page[KVM_PAGE_ARRAY_NR];
1633 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1639 for (i=0; i < pvec->nr; i++)
1640 if (pvec->page[i].sp == sp)
1643 pvec->page[pvec->nr].sp = sp;
1644 pvec->page[pvec->nr].idx = idx;
1646 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1649 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1650 struct kvm_mmu_pages *pvec)
1652 int i, ret, nr_unsync_leaf = 0;
1654 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1655 struct kvm_mmu_page *child;
1656 u64 ent = sp->spt[i];
1658 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1659 goto clear_child_bitmap;
1661 child = page_header(ent & PT64_BASE_ADDR_MASK);
1663 if (child->unsync_children) {
1664 if (mmu_pages_add(pvec, child, i))
1667 ret = __mmu_unsync_walk(child, pvec);
1669 goto clear_child_bitmap;
1671 nr_unsync_leaf += ret;
1674 } else if (child->unsync) {
1676 if (mmu_pages_add(pvec, child, i))
1679 goto clear_child_bitmap;
1684 __clear_bit(i, sp->unsync_child_bitmap);
1685 sp->unsync_children--;
1686 WARN_ON((int)sp->unsync_children < 0);
1690 return nr_unsync_leaf;
1693 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1694 struct kvm_mmu_pages *pvec)
1696 if (!sp->unsync_children)
1699 mmu_pages_add(pvec, sp, 0);
1700 return __mmu_unsync_walk(sp, pvec);
1703 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1705 WARN_ON(!sp->unsync);
1706 trace_kvm_mmu_sync_page(sp);
1708 --kvm->stat.mmu_unsync;
1711 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1712 struct list_head *invalid_list);
1713 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1714 struct list_head *invalid_list);
1717 * NOTE: we should pay more attention on the zapped-obsolete page
1718 * (is_obsolete_sp(sp) && sp->role.invalid) when you do hash list walk
1719 * since it has been deleted from active_mmu_pages but still can be found
1722 * for_each_gfn_indirect_valid_sp has skipped that kind of page and
1723 * kvm_mmu_get_page(), the only user of for_each_gfn_sp(), has skipped
1724 * all the obsolete pages.
1726 #define for_each_gfn_sp(_kvm, _sp, _gfn) \
1727 hlist_for_each_entry(_sp, \
1728 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)], hash_link) \
1729 if ((_sp)->gfn != (_gfn)) {} else
1731 #define for_each_gfn_indirect_valid_sp(_kvm, _sp, _gfn) \
1732 for_each_gfn_sp(_kvm, _sp, _gfn) \
1733 if ((_sp)->role.direct || (_sp)->role.invalid) {} else
1735 /* @sp->gfn should be write-protected at the call site */
1736 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1737 struct list_head *invalid_list, bool clear_unsync)
1739 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1740 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1745 kvm_unlink_unsync_page(vcpu->kvm, sp);
1747 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1748 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1752 kvm_mmu_flush_tlb(vcpu);
1756 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1757 struct kvm_mmu_page *sp)
1759 LIST_HEAD(invalid_list);
1762 ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1764 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1769 #ifdef CONFIG_KVM_MMU_AUDIT
1770 #include "mmu_audit.c"
1772 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { }
1773 static void mmu_audit_disable(void) { }
1776 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1777 struct list_head *invalid_list)
1779 return __kvm_sync_page(vcpu, sp, invalid_list, true);
1782 /* @gfn should be write-protected at the call site */
1783 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1785 struct kvm_mmu_page *s;
1786 LIST_HEAD(invalid_list);
1789 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
1793 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1794 kvm_unlink_unsync_page(vcpu->kvm, s);
1795 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1796 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1797 kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1803 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1805 kvm_mmu_flush_tlb(vcpu);
1808 struct mmu_page_path {
1809 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1810 unsigned int idx[PT64_ROOT_LEVEL-1];
1813 #define for_each_sp(pvec, sp, parents, i) \
1814 for (i = mmu_pages_next(&pvec, &parents, -1), \
1815 sp = pvec.page[i].sp; \
1816 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1817 i = mmu_pages_next(&pvec, &parents, i))
1819 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1820 struct mmu_page_path *parents,
1825 for (n = i+1; n < pvec->nr; n++) {
1826 struct kvm_mmu_page *sp = pvec->page[n].sp;
1828 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1829 parents->idx[0] = pvec->page[n].idx;
1833 parents->parent[sp->role.level-2] = sp;
1834 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1840 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1842 struct kvm_mmu_page *sp;
1843 unsigned int level = 0;
1846 unsigned int idx = parents->idx[level];
1848 sp = parents->parent[level];
1852 --sp->unsync_children;
1853 WARN_ON((int)sp->unsync_children < 0);
1854 __clear_bit(idx, sp->unsync_child_bitmap);
1856 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1859 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1860 struct mmu_page_path *parents,
1861 struct kvm_mmu_pages *pvec)
1863 parents->parent[parent->role.level-1] = NULL;
1867 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1868 struct kvm_mmu_page *parent)
1871 struct kvm_mmu_page *sp;
1872 struct mmu_page_path parents;
1873 struct kvm_mmu_pages pages;
1874 LIST_HEAD(invalid_list);
1876 kvm_mmu_pages_init(parent, &parents, &pages);
1877 while (mmu_unsync_walk(parent, &pages)) {
1878 bool protected = false;
1880 for_each_sp(pages, sp, parents, i)
1881 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1884 kvm_flush_remote_tlbs(vcpu->kvm);
1886 for_each_sp(pages, sp, parents, i) {
1887 kvm_sync_page(vcpu, sp, &invalid_list);
1888 mmu_pages_clear_parents(&parents);
1890 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1891 cond_resched_lock(&vcpu->kvm->mmu_lock);
1892 kvm_mmu_pages_init(parent, &parents, &pages);
1896 static void init_shadow_page_table(struct kvm_mmu_page *sp)
1900 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1904 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
1906 sp->write_flooding_count = 0;
1909 static void clear_sp_write_flooding_count(u64 *spte)
1911 struct kvm_mmu_page *sp = page_header(__pa(spte));
1913 __clear_sp_write_flooding_count(sp);
1916 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
1918 return unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
1921 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1929 union kvm_mmu_page_role role;
1931 struct kvm_mmu_page *sp;
1932 bool need_sync = false;
1934 role = vcpu->arch.mmu.base_role;
1936 role.direct = direct;
1939 role.access = access;
1940 if (!vcpu->arch.mmu.direct_map
1941 && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1942 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1943 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1944 role.quadrant = quadrant;
1946 for_each_gfn_sp(vcpu->kvm, sp, gfn) {
1947 if (is_obsolete_sp(vcpu->kvm, sp))
1950 if (!need_sync && sp->unsync)
1953 if (sp->role.word != role.word)
1956 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1959 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1960 if (sp->unsync_children) {
1961 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1962 kvm_mmu_mark_parents_unsync(sp);
1963 } else if (sp->unsync)
1964 kvm_mmu_mark_parents_unsync(sp);
1966 __clear_sp_write_flooding_count(sp);
1967 trace_kvm_mmu_get_page(sp, false);
1970 ++vcpu->kvm->stat.mmu_cache_miss;
1971 sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1976 hlist_add_head(&sp->hash_link,
1977 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1979 if (rmap_write_protect(vcpu->kvm, gfn))
1980 kvm_flush_remote_tlbs(vcpu->kvm);
1981 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1982 kvm_sync_pages(vcpu, gfn);
1984 account_shadowed(vcpu->kvm, gfn);
1986 sp->mmu_valid_gen = vcpu->kvm->arch.mmu_valid_gen;
1987 init_shadow_page_table(sp);
1988 trace_kvm_mmu_get_page(sp, true);
1992 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1993 struct kvm_vcpu *vcpu, u64 addr)
1995 iterator->addr = addr;
1996 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1997 iterator->level = vcpu->arch.mmu.shadow_root_level;
1999 if (iterator->level == PT64_ROOT_LEVEL &&
2000 vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
2001 !vcpu->arch.mmu.direct_map)
2004 if (iterator->level == PT32E_ROOT_LEVEL) {
2005 iterator->shadow_addr
2006 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
2007 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
2009 if (!iterator->shadow_addr)
2010 iterator->level = 0;
2014 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2016 if (iterator->level < PT_PAGE_TABLE_LEVEL)
2019 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
2020 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2024 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2027 if (is_last_spte(spte, iterator->level)) {
2028 iterator->level = 0;
2032 iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK;
2036 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2038 return __shadow_walk_next(iterator, *iterator->sptep);
2041 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
2045 spte = __pa(sp->spt) | PT_PRESENT_MASK | PT_WRITABLE_MASK |
2046 shadow_user_mask | shadow_x_mask | shadow_accessed_mask;
2048 mmu_spte_set(sptep, spte);
2051 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2052 unsigned direct_access)
2054 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2055 struct kvm_mmu_page *child;
2058 * For the direct sp, if the guest pte's dirty bit
2059 * changed form clean to dirty, it will corrupt the
2060 * sp's access: allow writable in the read-only sp,
2061 * so we should update the spte at this point to get
2062 * a new sp with the correct access.
2064 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
2065 if (child->role.access == direct_access)
2068 drop_parent_pte(child, sptep);
2069 kvm_flush_remote_tlbs(vcpu->kvm);
2073 static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2077 struct kvm_mmu_page *child;
2080 if (is_shadow_present_pte(pte)) {
2081 if (is_last_spte(pte, sp->role.level)) {
2082 drop_spte(kvm, spte);
2083 if (is_large_pte(pte))
2086 child = page_header(pte & PT64_BASE_ADDR_MASK);
2087 drop_parent_pte(child, spte);
2092 if (is_mmio_spte(pte))
2093 mmu_spte_clear_no_track(spte);
2098 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
2099 struct kvm_mmu_page *sp)
2103 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2104 mmu_page_zap_pte(kvm, sp, sp->spt + i);
2107 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
2109 mmu_page_remove_parent_pte(sp, parent_pte);
2112 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
2115 struct rmap_iterator iter;
2117 while ((sptep = rmap_get_first(sp->parent_ptes, &iter)))
2118 drop_parent_pte(sp, sptep);
2121 static int mmu_zap_unsync_children(struct kvm *kvm,
2122 struct kvm_mmu_page *parent,
2123 struct list_head *invalid_list)
2126 struct mmu_page_path parents;
2127 struct kvm_mmu_pages pages;
2129 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
2132 kvm_mmu_pages_init(parent, &parents, &pages);
2133 while (mmu_unsync_walk(parent, &pages)) {
2134 struct kvm_mmu_page *sp;
2136 for_each_sp(pages, sp, parents, i) {
2137 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2138 mmu_pages_clear_parents(&parents);
2141 kvm_mmu_pages_init(parent, &parents, &pages);
2147 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2148 struct list_head *invalid_list)
2152 trace_kvm_mmu_prepare_zap_page(sp);
2153 ++kvm->stat.mmu_shadow_zapped;
2154 ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
2155 kvm_mmu_page_unlink_children(kvm, sp);
2156 kvm_mmu_unlink_parents(kvm, sp);
2158 if (!sp->role.invalid && !sp->role.direct)
2159 unaccount_shadowed(kvm, sp->gfn);
2162 kvm_unlink_unsync_page(kvm, sp);
2163 if (!sp->root_count) {
2166 list_move(&sp->link, invalid_list);
2167 kvm_mod_used_mmu_pages(kvm, -1);
2169 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2172 * The obsolete pages can not be used on any vcpus.
2173 * See the comments in kvm_mmu_invalidate_zap_all_pages().
2175 if (!sp->role.invalid && !is_obsolete_sp(kvm, sp))
2176 kvm_reload_remote_mmus(kvm);
2179 sp->role.invalid = 1;
2183 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2184 struct list_head *invalid_list)
2186 struct kvm_mmu_page *sp, *nsp;
2188 if (list_empty(invalid_list))
2192 * wmb: make sure everyone sees our modifications to the page tables
2193 * rmb: make sure we see changes to vcpu->mode
2198 * Wait for all vcpus to exit guest mode and/or lockless shadow
2201 kvm_flush_remote_tlbs(kvm);
2203 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2204 WARN_ON(!sp->role.invalid || sp->root_count);
2205 kvm_mmu_free_page(sp);
2209 static bool prepare_zap_oldest_mmu_page(struct kvm *kvm,
2210 struct list_head *invalid_list)
2212 struct kvm_mmu_page *sp;
2214 if (list_empty(&kvm->arch.active_mmu_pages))
2217 sp = list_entry(kvm->arch.active_mmu_pages.prev,
2218 struct kvm_mmu_page, link);
2219 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2225 * Changing the number of mmu pages allocated to the vm
2226 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2228 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
2230 LIST_HEAD(invalid_list);
2232 spin_lock(&kvm->mmu_lock);
2234 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2235 /* Need to free some mmu pages to achieve the goal. */
2236 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages)
2237 if (!prepare_zap_oldest_mmu_page(kvm, &invalid_list))
2240 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2241 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2244 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2246 spin_unlock(&kvm->mmu_lock);
2249 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2251 struct kvm_mmu_page *sp;
2252 LIST_HEAD(invalid_list);
2255 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2257 spin_lock(&kvm->mmu_lock);
2258 for_each_gfn_indirect_valid_sp(kvm, sp, gfn) {
2259 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2262 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2264 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2265 spin_unlock(&kvm->mmu_lock);
2269 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page);
2272 * The function is based on mtrr_type_lookup() in
2273 * arch/x86/kernel/cpu/mtrr/generic.c
2275 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
2280 u8 prev_match, curr_match;
2281 int num_var_ranges = KVM_NR_VAR_MTRR;
2283 if (!mtrr_state->enabled)
2286 /* Make end inclusive end, instead of exclusive */
2289 /* Look in fixed ranges. Just return the type as per start */
2290 if (mtrr_state->have_fixed && (start < 0x100000)) {
2293 if (start < 0x80000) {
2295 idx += (start >> 16);
2296 return mtrr_state->fixed_ranges[idx];
2297 } else if (start < 0xC0000) {
2299 idx += ((start - 0x80000) >> 14);
2300 return mtrr_state->fixed_ranges[idx];
2301 } else if (start < 0x1000000) {
2303 idx += ((start - 0xC0000) >> 12);
2304 return mtrr_state->fixed_ranges[idx];
2309 * Look in variable ranges
2310 * Look of multiple ranges matching this address and pick type
2311 * as per MTRR precedence
2313 if (!(mtrr_state->enabled & 2))
2314 return mtrr_state->def_type;
2317 for (i = 0; i < num_var_ranges; ++i) {
2318 unsigned short start_state, end_state;
2320 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
2323 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
2324 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
2325 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
2326 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
2328 start_state = ((start & mask) == (base & mask));
2329 end_state = ((end & mask) == (base & mask));
2330 if (start_state != end_state)
2333 if ((start & mask) != (base & mask))
2336 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
2337 if (prev_match == 0xFF) {
2338 prev_match = curr_match;
2342 if (prev_match == MTRR_TYPE_UNCACHABLE ||
2343 curr_match == MTRR_TYPE_UNCACHABLE)
2344 return MTRR_TYPE_UNCACHABLE;
2346 if ((prev_match == MTRR_TYPE_WRBACK &&
2347 curr_match == MTRR_TYPE_WRTHROUGH) ||
2348 (prev_match == MTRR_TYPE_WRTHROUGH &&
2349 curr_match == MTRR_TYPE_WRBACK)) {
2350 prev_match = MTRR_TYPE_WRTHROUGH;
2351 curr_match = MTRR_TYPE_WRTHROUGH;
2354 if (prev_match != curr_match)
2355 return MTRR_TYPE_UNCACHABLE;
2358 if (prev_match != 0xFF)
2361 return mtrr_state->def_type;
2364 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
2368 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
2369 (gfn << PAGE_SHIFT) + PAGE_SIZE);
2370 if (mtrr == 0xfe || mtrr == 0xff)
2371 mtrr = MTRR_TYPE_WRBACK;
2374 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
2376 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
2378 trace_kvm_mmu_unsync_page(sp);
2379 ++vcpu->kvm->stat.mmu_unsync;
2382 kvm_mmu_mark_parents_unsync(sp);
2385 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
2387 struct kvm_mmu_page *s;
2389 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2392 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
2393 __kvm_unsync_page(vcpu, s);
2397 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
2400 struct kvm_mmu_page *s;
2401 bool need_unsync = false;
2403 for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn) {
2407 if (s->role.level != PT_PAGE_TABLE_LEVEL)
2414 kvm_unsync_pages(vcpu, gfn);
2418 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2419 unsigned pte_access, int level,
2420 gfn_t gfn, pfn_t pfn, bool speculative,
2421 bool can_unsync, bool host_writable)
2426 if (set_mmio_spte(vcpu->kvm, sptep, gfn, pfn, pte_access))
2429 spte = PT_PRESENT_MASK;
2431 spte |= shadow_accessed_mask;
2433 if (pte_access & ACC_EXEC_MASK)
2434 spte |= shadow_x_mask;
2436 spte |= shadow_nx_mask;
2438 if (pte_access & ACC_USER_MASK)
2439 spte |= shadow_user_mask;
2441 if (level > PT_PAGE_TABLE_LEVEL)
2442 spte |= PT_PAGE_SIZE_MASK;
2444 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
2445 kvm_is_mmio_pfn(pfn));
2448 spte |= SPTE_HOST_WRITEABLE;
2450 pte_access &= ~ACC_WRITE_MASK;
2452 spte |= (u64)pfn << PAGE_SHIFT;
2454 if (pte_access & ACC_WRITE_MASK) {
2457 * Other vcpu creates new sp in the window between
2458 * mapping_level() and acquiring mmu-lock. We can
2459 * allow guest to retry the access, the mapping can
2460 * be fixed if guest refault.
2462 if (level > PT_PAGE_TABLE_LEVEL &&
2463 has_wrprotected_page(vcpu->kvm, gfn, level))
2466 spte |= PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE;
2469 * Optimization: for pte sync, if spte was writable the hash
2470 * lookup is unnecessary (and expensive). Write protection
2471 * is responsibility of mmu_get_page / kvm_sync_page.
2472 * Same reasoning can be applied to dirty page accounting.
2474 if (!can_unsync && is_writable_pte(*sptep))
2477 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2478 pgprintk("%s: found shadow page for %llx, marking ro\n",
2481 pte_access &= ~ACC_WRITE_MASK;
2482 spte &= ~(PT_WRITABLE_MASK | SPTE_MMU_WRITEABLE);
2486 if (pte_access & ACC_WRITE_MASK)
2487 mark_page_dirty(vcpu->kvm, gfn);
2490 if (mmu_spte_update(sptep, spte))
2491 kvm_flush_remote_tlbs(vcpu->kvm);
2496 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2497 unsigned pte_access, int write_fault, int *emulate,
2498 int level, gfn_t gfn, pfn_t pfn, bool speculative,
2501 int was_rmapped = 0;
2504 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2505 *sptep, write_fault, gfn);
2507 if (is_rmap_spte(*sptep)) {
2509 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2510 * the parent of the now unreachable PTE.
2512 if (level > PT_PAGE_TABLE_LEVEL &&
2513 !is_large_pte(*sptep)) {
2514 struct kvm_mmu_page *child;
2517 child = page_header(pte & PT64_BASE_ADDR_MASK);
2518 drop_parent_pte(child, sptep);
2519 kvm_flush_remote_tlbs(vcpu->kvm);
2520 } else if (pfn != spte_to_pfn(*sptep)) {
2521 pgprintk("hfn old %llx new %llx\n",
2522 spte_to_pfn(*sptep), pfn);
2523 drop_spte(vcpu->kvm, sptep);
2524 kvm_flush_remote_tlbs(vcpu->kvm);
2529 if (set_spte(vcpu, sptep, pte_access, level, gfn, pfn, speculative,
2530 true, host_writable)) {
2533 kvm_mmu_flush_tlb(vcpu);
2536 if (unlikely(is_mmio_spte(*sptep) && emulate))
2539 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2540 pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2541 is_large_pte(*sptep)? "2MB" : "4kB",
2542 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2544 if (!was_rmapped && is_large_pte(*sptep))
2545 ++vcpu->kvm->stat.lpages;
2547 if (is_shadow_present_pte(*sptep)) {
2549 rmap_count = rmap_add(vcpu, sptep, gfn);
2550 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2551 rmap_recycle(vcpu, sptep, gfn);
2555 kvm_release_pfn_clean(pfn);
2558 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2560 mmu_free_roots(vcpu);
2563 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2567 bit7 = (gpte >> 7) & 1;
2568 return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2571 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2574 struct kvm_memory_slot *slot;
2576 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2578 return KVM_PFN_ERR_FAULT;
2580 return gfn_to_pfn_memslot_atomic(slot, gfn);
2583 static bool prefetch_invalid_gpte(struct kvm_vcpu *vcpu,
2584 struct kvm_mmu_page *sp, u64 *spte,
2587 if (is_rsvd_bits_set(&vcpu->arch.mmu, gpte, PT_PAGE_TABLE_LEVEL))
2590 if (!is_present_gpte(gpte))
2593 if (!(gpte & PT_ACCESSED_MASK))
2599 drop_spte(vcpu->kvm, spte);
2603 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2604 struct kvm_mmu_page *sp,
2605 u64 *start, u64 *end)
2607 struct page *pages[PTE_PREFETCH_NUM];
2608 unsigned access = sp->role.access;
2612 gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2613 if (!gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK))
2616 ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2620 for (i = 0; i < ret; i++, gfn++, start++)
2621 mmu_set_spte(vcpu, start, access, 0, NULL,
2622 sp->role.level, gfn, page_to_pfn(pages[i]),
2628 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2629 struct kvm_mmu_page *sp, u64 *sptep)
2631 u64 *spte, *start = NULL;
2634 WARN_ON(!sp->role.direct);
2636 i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2639 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2640 if (is_shadow_present_pte(*spte) || spte == sptep) {
2643 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2651 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2653 struct kvm_mmu_page *sp;
2656 * Since it's no accessed bit on EPT, it's no way to
2657 * distinguish between actually accessed translations
2658 * and prefetched, so disable pte prefetch if EPT is
2661 if (!shadow_accessed_mask)
2664 sp = page_header(__pa(sptep));
2665 if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2668 __direct_pte_prefetch(vcpu, sp, sptep);
2671 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2672 int map_writable, int level, gfn_t gfn, pfn_t pfn,
2675 struct kvm_shadow_walk_iterator iterator;
2676 struct kvm_mmu_page *sp;
2680 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2681 if (iterator.level == level) {
2682 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL,
2683 write, &emulate, level, gfn, pfn,
2684 prefault, map_writable);
2685 direct_pte_prefetch(vcpu, iterator.sptep);
2686 ++vcpu->stat.pf_fixed;
2690 if (!is_shadow_present_pte(*iterator.sptep)) {
2691 u64 base_addr = iterator.addr;
2693 base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2694 pseudo_gfn = base_addr >> PAGE_SHIFT;
2695 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2697 1, ACC_ALL, iterator.sptep);
2699 link_shadow_page(iterator.sptep, sp);
2705 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2709 info.si_signo = SIGBUS;
2711 info.si_code = BUS_MCEERR_AR;
2712 info.si_addr = (void __user *)address;
2713 info.si_addr_lsb = PAGE_SHIFT;
2715 send_sig_info(SIGBUS, &info, tsk);
2718 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, pfn_t pfn)
2721 * Do not cache the mmio info caused by writing the readonly gfn
2722 * into the spte otherwise read access on readonly gfn also can
2723 * caused mmio page fault and treat it as mmio access.
2724 * Return 1 to tell kvm to emulate it.
2726 if (pfn == KVM_PFN_ERR_RO_FAULT)
2729 if (pfn == KVM_PFN_ERR_HWPOISON) {
2730 kvm_send_hwpoison_signal(gfn_to_hva(vcpu->kvm, gfn), current);
2737 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2738 gfn_t *gfnp, pfn_t *pfnp, int *levelp)
2742 int level = *levelp;
2745 * Check if it's a transparent hugepage. If this would be an
2746 * hugetlbfs page, level wouldn't be set to
2747 * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2750 if (!is_error_noslot_pfn(pfn) && !kvm_is_mmio_pfn(pfn) &&
2751 level == PT_PAGE_TABLE_LEVEL &&
2752 PageTransCompound(pfn_to_page(pfn)) &&
2753 !has_wrprotected_page(vcpu->kvm, gfn, PT_DIRECTORY_LEVEL)) {
2756 * mmu_notifier_retry was successful and we hold the
2757 * mmu_lock here, so the pmd can't become splitting
2758 * from under us, and in turn
2759 * __split_huge_page_refcount() can't run from under
2760 * us and we can safely transfer the refcount from
2761 * PG_tail to PG_head as we switch the pfn to tail to
2764 *levelp = level = PT_DIRECTORY_LEVEL;
2765 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2766 VM_BUG_ON((gfn & mask) != (pfn & mask));
2770 kvm_release_pfn_clean(pfn);
2778 static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn,
2779 pfn_t pfn, unsigned access, int *ret_val)
2783 /* The pfn is invalid, report the error! */
2784 if (unlikely(is_error_pfn(pfn))) {
2785 *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn);
2789 if (unlikely(is_noslot_pfn(pfn)))
2790 vcpu_cache_mmio_info(vcpu, gva, gfn, access);
2797 static bool page_fault_can_be_fast(struct kvm_vcpu *vcpu, u32 error_code)
2800 * #PF can be fast only if the shadow page table is present and it
2801 * is caused by write-protect, that means we just need change the
2802 * W bit of the spte which can be done out of mmu-lock.
2804 if (!(error_code & PFERR_PRESENT_MASK) ||
2805 !(error_code & PFERR_WRITE_MASK))
2812 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 spte)
2814 struct kvm_mmu_page *sp = page_header(__pa(sptep));
2817 WARN_ON(!sp->role.direct);
2820 * The gfn of direct spte is stable since it is calculated
2823 gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt);
2825 if (cmpxchg64(sptep, spte, spte | PT_WRITABLE_MASK) == spte)
2826 mark_page_dirty(vcpu->kvm, gfn);
2833 * - true: let the vcpu to access on the same address again.
2834 * - false: let the real page fault path to fix it.
2836 static bool fast_page_fault(struct kvm_vcpu *vcpu, gva_t gva, int level,
2839 struct kvm_shadow_walk_iterator iterator;
2843 if (!page_fault_can_be_fast(vcpu, error_code))
2846 walk_shadow_page_lockless_begin(vcpu);
2847 for_each_shadow_entry_lockless(vcpu, gva, iterator, spte)
2848 if (!is_shadow_present_pte(spte) || iterator.level < level)
2852 * If the mapping has been changed, let the vcpu fault on the
2853 * same address again.
2855 if (!is_rmap_spte(spte)) {
2860 if (!is_last_spte(spte, level))
2864 * Check if it is a spurious fault caused by TLB lazily flushed.
2866 * Need not check the access of upper level table entries since
2867 * they are always ACC_ALL.
2869 if (is_writable_pte(spte)) {
2875 * Currently, to simplify the code, only the spte write-protected
2876 * by dirty-log can be fast fixed.
2878 if (!spte_is_locklessly_modifiable(spte))
2882 * Currently, fast page fault only works for direct mapping since
2883 * the gfn is not stable for indirect shadow page.
2884 * See Documentation/virtual/kvm/locking.txt to get more detail.
2886 ret = fast_pf_fix_direct_spte(vcpu, iterator.sptep, spte);
2888 trace_fast_page_fault(vcpu, gva, error_code, iterator.sptep,
2890 walk_shadow_page_lockless_end(vcpu);
2895 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2896 gva_t gva, pfn_t *pfn, bool write, bool *writable);
2897 static void make_mmu_pages_available(struct kvm_vcpu *vcpu);
2899 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, u32 error_code,
2900 gfn_t gfn, bool prefault)
2906 unsigned long mmu_seq;
2907 bool map_writable, write = error_code & PFERR_WRITE_MASK;
2909 force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
2910 if (likely(!force_pt_level)) {
2911 level = mapping_level(vcpu, gfn);
2913 * This path builds a PAE pagetable - so we can map
2914 * 2mb pages at maximum. Therefore check if the level
2915 * is larger than that.
2917 if (level > PT_DIRECTORY_LEVEL)
2918 level = PT_DIRECTORY_LEVEL;
2920 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2922 level = PT_PAGE_TABLE_LEVEL;
2924 if (fast_page_fault(vcpu, v, level, error_code))
2927 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2930 if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
2933 if (handle_abnormal_pfn(vcpu, v, gfn, pfn, ACC_ALL, &r))
2936 spin_lock(&vcpu->kvm->mmu_lock);
2937 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
2939 make_mmu_pages_available(vcpu);
2940 if (likely(!force_pt_level))
2941 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
2942 r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
2944 spin_unlock(&vcpu->kvm->mmu_lock);
2950 spin_unlock(&vcpu->kvm->mmu_lock);
2951 kvm_release_pfn_clean(pfn);
2956 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2959 struct kvm_mmu_page *sp;
2960 LIST_HEAD(invalid_list);
2962 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2965 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2966 (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2967 vcpu->arch.mmu.direct_map)) {
2968 hpa_t root = vcpu->arch.mmu.root_hpa;
2970 spin_lock(&vcpu->kvm->mmu_lock);
2971 sp = page_header(root);
2973 if (!sp->root_count && sp->role.invalid) {
2974 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2975 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2977 spin_unlock(&vcpu->kvm->mmu_lock);
2978 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2982 spin_lock(&vcpu->kvm->mmu_lock);
2983 for (i = 0; i < 4; ++i) {
2984 hpa_t root = vcpu->arch.mmu.pae_root[i];
2987 root &= PT64_BASE_ADDR_MASK;
2988 sp = page_header(root);
2990 if (!sp->root_count && sp->role.invalid)
2991 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2994 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2996 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2997 spin_unlock(&vcpu->kvm->mmu_lock);
2998 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3001 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3005 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
3006 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3013 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3015 struct kvm_mmu_page *sp;
3018 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3019 spin_lock(&vcpu->kvm->mmu_lock);
3020 make_mmu_pages_available(vcpu);
3021 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
3024 spin_unlock(&vcpu->kvm->mmu_lock);
3025 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
3026 } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
3027 for (i = 0; i < 4; ++i) {
3028 hpa_t root = vcpu->arch.mmu.pae_root[i];
3030 ASSERT(!VALID_PAGE(root));
3031 spin_lock(&vcpu->kvm->mmu_lock);
3032 make_mmu_pages_available(vcpu);
3033 sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
3035 PT32_ROOT_LEVEL, 1, ACC_ALL,
3037 root = __pa(sp->spt);
3039 spin_unlock(&vcpu->kvm->mmu_lock);
3040 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
3042 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3049 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3051 struct kvm_mmu_page *sp;
3056 root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
3058 if (mmu_check_root(vcpu, root_gfn))
3062 * Do we shadow a long mode page table? If so we need to
3063 * write-protect the guests page table root.
3065 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3066 hpa_t root = vcpu->arch.mmu.root_hpa;
3068 ASSERT(!VALID_PAGE(root));
3070 spin_lock(&vcpu->kvm->mmu_lock);
3071 make_mmu_pages_available(vcpu);
3072 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
3074 root = __pa(sp->spt);
3076 spin_unlock(&vcpu->kvm->mmu_lock);
3077 vcpu->arch.mmu.root_hpa = root;
3082 * We shadow a 32 bit page table. This may be a legacy 2-level
3083 * or a PAE 3-level page table. In either case we need to be aware that
3084 * the shadow page table may be a PAE or a long mode page table.
3086 pm_mask = PT_PRESENT_MASK;
3087 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
3088 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3090 for (i = 0; i < 4; ++i) {
3091 hpa_t root = vcpu->arch.mmu.pae_root[i];
3093 ASSERT(!VALID_PAGE(root));
3094 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
3095 pdptr = vcpu->arch.mmu.get_pdptr(vcpu, i);
3096 if (!is_present_gpte(pdptr)) {
3097 vcpu->arch.mmu.pae_root[i] = 0;
3100 root_gfn = pdptr >> PAGE_SHIFT;
3101 if (mmu_check_root(vcpu, root_gfn))
3104 spin_lock(&vcpu->kvm->mmu_lock);
3105 make_mmu_pages_available(vcpu);
3106 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
3109 root = __pa(sp->spt);
3111 spin_unlock(&vcpu->kvm->mmu_lock);
3113 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
3115 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
3118 * If we shadow a 32 bit page table with a long mode page
3119 * table we enter this path.
3121 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3122 if (vcpu->arch.mmu.lm_root == NULL) {
3124 * The additional page necessary for this is only
3125 * allocated on demand.
3130 lm_root = (void*)get_zeroed_page(GFP_KERNEL);
3131 if (lm_root == NULL)
3134 lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
3136 vcpu->arch.mmu.lm_root = lm_root;
3139 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
3145 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
3147 if (vcpu->arch.mmu.direct_map)
3148 return mmu_alloc_direct_roots(vcpu);
3150 return mmu_alloc_shadow_roots(vcpu);
3153 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
3156 struct kvm_mmu_page *sp;
3158 if (vcpu->arch.mmu.direct_map)
3161 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3164 vcpu_clear_mmio_info(vcpu, ~0ul);
3165 kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
3166 if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
3167 hpa_t root = vcpu->arch.mmu.root_hpa;
3168 sp = page_header(root);
3169 mmu_sync_children(vcpu, sp);
3170 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3173 for (i = 0; i < 4; ++i) {
3174 hpa_t root = vcpu->arch.mmu.pae_root[i];
3176 if (root && VALID_PAGE(root)) {
3177 root &= PT64_BASE_ADDR_MASK;
3178 sp = page_header(root);
3179 mmu_sync_children(vcpu, sp);
3182 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
3185 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3187 spin_lock(&vcpu->kvm->mmu_lock);
3188 mmu_sync_roots(vcpu);
3189 spin_unlock(&vcpu->kvm->mmu_lock);
3192 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
3193 u32 access, struct x86_exception *exception)
3196 exception->error_code = 0;
3200 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
3202 struct x86_exception *exception)
3205 exception->error_code = 0;
3206 return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
3209 static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3212 return vcpu_match_mmio_gpa(vcpu, addr);
3214 return vcpu_match_mmio_gva(vcpu, addr);
3219 * On direct hosts, the last spte is only allows two states
3220 * for mmio page fault:
3221 * - It is the mmio spte
3222 * - It is zapped or it is being zapped.
3224 * This function completely checks the spte when the last spte
3225 * is not the mmio spte.
3227 static bool check_direct_spte_mmio_pf(u64 spte)
3229 return __check_direct_spte_mmio_pf(spte);
3232 static u64 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr)
3234 struct kvm_shadow_walk_iterator iterator;
3237 walk_shadow_page_lockless_begin(vcpu);
3238 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
3239 if (!is_shadow_present_pte(spte))
3241 walk_shadow_page_lockless_end(vcpu);
3246 int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct)
3250 if (quickly_check_mmio_pf(vcpu, addr, direct))
3251 return RET_MMIO_PF_EMULATE;
3253 spte = walk_shadow_page_get_mmio_spte(vcpu, addr);
3255 if (is_mmio_spte(spte)) {
3256 gfn_t gfn = get_mmio_spte_gfn(spte);
3257 unsigned access = get_mmio_spte_access(spte);
3259 if (!check_mmio_spte(vcpu->kvm, spte))
3260 return RET_MMIO_PF_INVALID;
3265 trace_handle_mmio_page_fault(addr, gfn, access);
3266 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
3267 return RET_MMIO_PF_EMULATE;
3271 * It's ok if the gva is remapped by other cpus on shadow guest,
3272 * it's a BUG if the gfn is not a mmio page.
3274 if (direct && !check_direct_spte_mmio_pf(spte))
3275 return RET_MMIO_PF_BUG;
3278 * If the page table is zapped by other cpus, let CPU fault again on
3281 return RET_MMIO_PF_RETRY;
3283 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common);
3285 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr,
3286 u32 error_code, bool direct)
3290 ret = handle_mmio_page_fault_common(vcpu, addr, direct);
3291 WARN_ON(ret == RET_MMIO_PF_BUG);
3295 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3296 u32 error_code, bool prefault)
3301 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
3303 if (unlikely(error_code & PFERR_RSVD_MASK)) {
3304 r = handle_mmio_page_fault(vcpu, gva, error_code, true);
3306 if (likely(r != RET_MMIO_PF_INVALID))
3310 r = mmu_topup_memory_caches(vcpu);
3315 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
3317 gfn = gva >> PAGE_SHIFT;
3319 return nonpaging_map(vcpu, gva & PAGE_MASK,
3320 error_code, gfn, prefault);
3323 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
3325 struct kvm_arch_async_pf arch;
3327 arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3329 arch.direct_map = vcpu->arch.mmu.direct_map;
3330 arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
3332 return kvm_setup_async_pf(vcpu, gva, gfn, &arch);
3335 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
3337 if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
3338 kvm_event_needs_reinjection(vcpu)))
3341 return kvm_x86_ops->interrupt_allowed(vcpu);
3344 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3345 gva_t gva, pfn_t *pfn, bool write, bool *writable)
3349 *pfn = gfn_to_pfn_async(vcpu->kvm, gfn, &async, write, writable);
3352 return false; /* *pfn has correct page already */
3354 if (!prefault && can_do_async_pf(vcpu)) {
3355 trace_kvm_try_async_get_page(gva, gfn);
3356 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
3357 trace_kvm_async_pf_doublefault(gva, gfn);
3358 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
3360 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
3364 *pfn = gfn_to_pfn_prot(vcpu->kvm, gfn, write, writable);
3369 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
3376 gfn_t gfn = gpa >> PAGE_SHIFT;
3377 unsigned long mmu_seq;
3378 int write = error_code & PFERR_WRITE_MASK;
3382 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
3384 if (unlikely(error_code & PFERR_RSVD_MASK)) {
3385 r = handle_mmio_page_fault(vcpu, gpa, error_code, true);
3387 if (likely(r != RET_MMIO_PF_INVALID))
3391 r = mmu_topup_memory_caches(vcpu);
3395 force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
3396 if (likely(!force_pt_level)) {
3397 level = mapping_level(vcpu, gfn);
3398 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3400 level = PT_PAGE_TABLE_LEVEL;
3402 if (fast_page_fault(vcpu, gpa, level, error_code))
3405 mmu_seq = vcpu->kvm->mmu_notifier_seq;
3408 if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
3411 if (handle_abnormal_pfn(vcpu, 0, gfn, pfn, ACC_ALL, &r))
3414 spin_lock(&vcpu->kvm->mmu_lock);
3415 if (mmu_notifier_retry(vcpu->kvm, mmu_seq))
3417 make_mmu_pages_available(vcpu);
3418 if (likely(!force_pt_level))
3419 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3420 r = __direct_map(vcpu, gpa, write, map_writable,
3421 level, gfn, pfn, prefault);
3422 spin_unlock(&vcpu->kvm->mmu_lock);
3427 spin_unlock(&vcpu->kvm->mmu_lock);
3428 kvm_release_pfn_clean(pfn);
3432 static void nonpaging_free(struct kvm_vcpu *vcpu)
3434 mmu_free_roots(vcpu);
3437 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
3438 struct kvm_mmu *context)
3440 context->new_cr3 = nonpaging_new_cr3;
3441 context->page_fault = nonpaging_page_fault;
3442 context->gva_to_gpa = nonpaging_gva_to_gpa;
3443 context->free = nonpaging_free;
3444 context->sync_page = nonpaging_sync_page;
3445 context->invlpg = nonpaging_invlpg;
3446 context->update_pte = nonpaging_update_pte;
3447 context->root_level = 0;
3448 context->shadow_root_level = PT32E_ROOT_LEVEL;
3449 context->root_hpa = INVALID_PAGE;
3450 context->direct_map = true;
3451 context->nx = false;
3455 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3457 ++vcpu->stat.tlb_flush;
3458 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
3461 static void paging_new_cr3(struct kvm_vcpu *vcpu)
3463 pgprintk("%s: cr3 %lx\n", __func__, kvm_read_cr3(vcpu));
3464 mmu_free_roots(vcpu);
3467 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
3469 return kvm_read_cr3(vcpu);
3472 static void inject_page_fault(struct kvm_vcpu *vcpu,
3473 struct x86_exception *fault)
3475 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
3478 static void paging_free(struct kvm_vcpu *vcpu)
3480 nonpaging_free(vcpu);
3483 static inline void protect_clean_gpte(unsigned *access, unsigned gpte)
3487 BUILD_BUG_ON(PT_WRITABLE_MASK != ACC_WRITE_MASK);
3489 mask = (unsigned)~ACC_WRITE_MASK;
3490 /* Allow write access to dirty gptes */
3491 mask |= (gpte >> (PT_DIRTY_SHIFT - PT_WRITABLE_SHIFT)) & PT_WRITABLE_MASK;
3495 static bool sync_mmio_spte(struct kvm *kvm, u64 *sptep, gfn_t gfn,
3496 unsigned access, int *nr_present)
3498 if (unlikely(is_mmio_spte(*sptep))) {
3499 if (gfn != get_mmio_spte_gfn(*sptep)) {
3500 mmu_spte_clear_no_track(sptep);
3505 mark_mmio_spte(kvm, sptep, gfn, access);
3512 static inline unsigned gpte_access(struct kvm_vcpu *vcpu, u64 gpte)
3516 access = (gpte & (PT_WRITABLE_MASK | PT_USER_MASK)) | ACC_EXEC_MASK;
3517 access &= ~(gpte >> PT64_NX_SHIFT);
3522 static inline bool is_last_gpte(struct kvm_mmu *mmu, unsigned level, unsigned gpte)
3527 index |= (gpte & PT_PAGE_SIZE_MASK) >> (PT_PAGE_SIZE_SHIFT - 2);
3528 return mmu->last_pte_bitmap & (1 << index);
3532 #include "paging_tmpl.h"
3536 #include "paging_tmpl.h"
3539 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3540 struct kvm_mmu *context)
3542 int maxphyaddr = cpuid_maxphyaddr(vcpu);
3543 u64 exb_bit_rsvd = 0;
3546 exb_bit_rsvd = rsvd_bits(63, 63);
3547 switch (context->root_level) {
3548 case PT32_ROOT_LEVEL:
3549 /* no rsvd bits for 2 level 4K page table entries */
3550 context->rsvd_bits_mask[0][1] = 0;
3551 context->rsvd_bits_mask[0][0] = 0;
3552 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3554 if (!is_pse(vcpu)) {
3555 context->rsvd_bits_mask[1][1] = 0;
3559 if (is_cpuid_PSE36())
3560 /* 36bits PSE 4MB page */
3561 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
3563 /* 32 bits PSE 4MB page */
3564 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
3566 case PT32E_ROOT_LEVEL:
3567 context->rsvd_bits_mask[0][2] =
3568 rsvd_bits(maxphyaddr, 63) |
3569 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
3570 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3571 rsvd_bits(maxphyaddr, 62); /* PDE */
3572 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3573 rsvd_bits(maxphyaddr, 62); /* PTE */
3574 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3575 rsvd_bits(maxphyaddr, 62) |
3576 rsvd_bits(13, 20); /* large page */
3577 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3579 case PT64_ROOT_LEVEL:
3580 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
3581 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
3582 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
3583 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
3584 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3585 rsvd_bits(maxphyaddr, 51);
3586 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3587 rsvd_bits(maxphyaddr, 51);
3588 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
3589 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
3590 rsvd_bits(maxphyaddr, 51) |
3592 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3593 rsvd_bits(maxphyaddr, 51) |
3594 rsvd_bits(13, 20); /* large page */
3595 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3600 static void update_permission_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
3602 unsigned bit, byte, pfec;
3604 bool fault, x, w, u, wf, uf, ff, smep;
3606 smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3607 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
3610 wf = pfec & PFERR_WRITE_MASK;
3611 uf = pfec & PFERR_USER_MASK;
3612 ff = pfec & PFERR_FETCH_MASK;
3613 for (bit = 0; bit < 8; ++bit) {
3614 x = bit & ACC_EXEC_MASK;
3615 w = bit & ACC_WRITE_MASK;
3616 u = bit & ACC_USER_MASK;
3618 /* Not really needed: !nx will cause pte.nx to fault */
3620 /* Allow supervisor writes if !cr0.wp */
3621 w |= !is_write_protection(vcpu) && !uf;
3622 /* Disallow supervisor fetches of user code if cr4.smep */
3623 x &= !(smep && u && !uf);
3625 fault = (ff && !x) || (uf && !u) || (wf && !w);
3626 map |= fault << bit;
3628 mmu->permissions[byte] = map;
3632 static void update_last_pte_bitmap(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
3635 unsigned level, root_level = mmu->root_level;
3636 const unsigned ps_set_index = 1 << 2; /* bit 2 of index: ps */
3638 if (root_level == PT32E_ROOT_LEVEL)
3640 /* PT_PAGE_TABLE_LEVEL always terminates */
3641 map = 1 | (1 << ps_set_index);
3642 for (level = PT_DIRECTORY_LEVEL; level <= root_level; ++level) {
3643 if (level <= PT_PDPE_LEVEL
3644 && (mmu->root_level >= PT32E_ROOT_LEVEL || is_pse(vcpu)))
3645 map |= 1 << (ps_set_index | (level - 1));
3647 mmu->last_pte_bitmap = map;
3650 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
3651 struct kvm_mmu *context,
3654 context->nx = is_nx(vcpu);
3655 context->root_level = level;
3657 reset_rsvds_bits_mask(vcpu, context);
3658 update_permission_bitmask(vcpu, context);
3659 update_last_pte_bitmap(vcpu, context);
3661 ASSERT(is_pae(vcpu));
3662 context->new_cr3 = paging_new_cr3;
3663 context->page_fault = paging64_page_fault;
3664 context->gva_to_gpa = paging64_gva_to_gpa;
3665 context->sync_page = paging64_sync_page;
3666 context->invlpg = paging64_invlpg;
3667 context->update_pte = paging64_update_pte;
3668 context->free = paging_free;
3669 context->shadow_root_level = level;
3670 context->root_hpa = INVALID_PAGE;
3671 context->direct_map = false;
3675 static int paging64_init_context(struct kvm_vcpu *vcpu,
3676 struct kvm_mmu *context)
3678 return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
3681 static int paging32_init_context(struct kvm_vcpu *vcpu,
3682 struct kvm_mmu *context)
3684 context->nx = false;
3685 context->root_level = PT32_ROOT_LEVEL;
3687 reset_rsvds_bits_mask(vcpu, context);
3688 update_permission_bitmask(vcpu, context);
3689 update_last_pte_bitmap(vcpu, context);
3691 context->new_cr3 = paging_new_cr3;
3692 context->page_fault = paging32_page_fault;
3693 context->gva_to_gpa = paging32_gva_to_gpa;
3694 context->free = paging_free;
3695 context->sync_page = paging32_sync_page;
3696 context->invlpg = paging32_invlpg;
3697 context->update_pte = paging32_update_pte;
3698 context->shadow_root_level = PT32E_ROOT_LEVEL;
3699 context->root_hpa = INVALID_PAGE;
3700 context->direct_map = false;
3704 static int paging32E_init_context(struct kvm_vcpu *vcpu,
3705 struct kvm_mmu *context)
3707 return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
3710 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
3712 struct kvm_mmu *context = vcpu->arch.walk_mmu;
3714 context->base_role.word = 0;
3715 context->new_cr3 = nonpaging_new_cr3;
3716 context->page_fault = tdp_page_fault;
3717 context->free = nonpaging_free;
3718 context->sync_page = nonpaging_sync_page;
3719 context->invlpg = nonpaging_invlpg;
3720 context->update_pte = nonpaging_update_pte;
3721 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3722 context->root_hpa = INVALID_PAGE;
3723 context->direct_map = true;
3724 context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
3725 context->get_cr3 = get_cr3;
3726 context->get_pdptr = kvm_pdptr_read;
3727 context->inject_page_fault = kvm_inject_page_fault;
3729 if (!is_paging(vcpu)) {
3730 context->nx = false;
3731 context->gva_to_gpa = nonpaging_gva_to_gpa;
3732 context->root_level = 0;
3733 } else if (is_long_mode(vcpu)) {
3734 context->nx = is_nx(vcpu);
3735 context->root_level = PT64_ROOT_LEVEL;
3736 reset_rsvds_bits_mask(vcpu, context);
3737 context->gva_to_gpa = paging64_gva_to_gpa;
3738 } else if (is_pae(vcpu)) {
3739 context->nx = is_nx(vcpu);
3740 context->root_level = PT32E_ROOT_LEVEL;
3741 reset_rsvds_bits_mask(vcpu, context);
3742 context->gva_to_gpa = paging64_gva_to_gpa;
3744 context->nx = false;
3745 context->root_level = PT32_ROOT_LEVEL;
3746 reset_rsvds_bits_mask(vcpu, context);
3747 context->gva_to_gpa = paging32_gva_to_gpa;
3750 update_permission_bitmask(vcpu, context);
3751 update_last_pte_bitmap(vcpu, context);
3756 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
3759 bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3761 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3763 if (!is_paging(vcpu))
3764 r = nonpaging_init_context(vcpu, context);
3765 else if (is_long_mode(vcpu))
3766 r = paging64_init_context(vcpu, context);
3767 else if (is_pae(vcpu))
3768 r = paging32E_init_context(vcpu, context);
3770 r = paging32_init_context(vcpu, context);
3772 vcpu->arch.mmu.base_role.nxe = is_nx(vcpu);
3773 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
3774 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
3775 vcpu->arch.mmu.base_role.smep_andnot_wp
3776 = smep && !is_write_protection(vcpu);
3780 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
3782 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
3784 int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
3786 vcpu->arch.walk_mmu->set_cr3 = kvm_x86_ops->set_cr3;
3787 vcpu->arch.walk_mmu->get_cr3 = get_cr3;
3788 vcpu->arch.walk_mmu->get_pdptr = kvm_pdptr_read;
3789 vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
3794 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
3796 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
3798 g_context->get_cr3 = get_cr3;
3799 g_context->get_pdptr = kvm_pdptr_read;
3800 g_context->inject_page_fault = kvm_inject_page_fault;
3803 * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3804 * translation of l2_gpa to l1_gpa addresses is done using the
3805 * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3806 * functions between mmu and nested_mmu are swapped.
3808 if (!is_paging(vcpu)) {
3809 g_context->nx = false;
3810 g_context->root_level = 0;
3811 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
3812 } else if (is_long_mode(vcpu)) {
3813 g_context->nx = is_nx(vcpu);
3814 g_context->root_level = PT64_ROOT_LEVEL;
3815 reset_rsvds_bits_mask(vcpu, g_context);
3816 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3817 } else if (is_pae(vcpu)) {
3818 g_context->nx = is_nx(vcpu);
3819 g_context->root_level = PT32E_ROOT_LEVEL;
3820 reset_rsvds_bits_mask(vcpu, g_context);
3821 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3823 g_context->nx = false;
3824 g_context->root_level = PT32_ROOT_LEVEL;
3825 reset_rsvds_bits_mask(vcpu, g_context);
3826 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
3829 update_permission_bitmask(vcpu, g_context);
3830 update_last_pte_bitmap(vcpu, g_context);
3835 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
3837 if (mmu_is_nested(vcpu))
3838 return init_kvm_nested_mmu(vcpu);
3839 else if (tdp_enabled)
3840 return init_kvm_tdp_mmu(vcpu);
3842 return init_kvm_softmmu(vcpu);
3845 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
3848 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
3849 /* mmu.free() should set root_hpa = INVALID_PAGE */
3850 vcpu->arch.mmu.free(vcpu);
3853 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
3855 destroy_kvm_mmu(vcpu);
3856 return init_kvm_mmu(vcpu);
3858 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
3860 int kvm_mmu_load(struct kvm_vcpu *vcpu)
3864 r = mmu_topup_memory_caches(vcpu);
3867 r = mmu_alloc_roots(vcpu);
3868 kvm_mmu_sync_roots(vcpu);
3871 /* set_cr3() should ensure TLB has been flushed */
3872 vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
3876 EXPORT_SYMBOL_GPL(kvm_mmu_load);
3878 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
3880 mmu_free_roots(vcpu);
3882 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
3884 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
3885 struct kvm_mmu_page *sp, u64 *spte,
3888 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
3889 ++vcpu->kvm->stat.mmu_pde_zapped;
3893 ++vcpu->kvm->stat.mmu_pte_updated;
3894 vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
3897 static bool need_remote_flush(u64 old, u64 new)
3899 if (!is_shadow_present_pte(old))
3901 if (!is_shadow_present_pte(new))
3903 if ((old ^ new) & PT64_BASE_ADDR_MASK)
3905 old ^= PT64_NX_MASK;
3906 new ^= PT64_NX_MASK;
3907 return (old & ~new & PT64_PERM_MASK) != 0;
3910 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3911 bool remote_flush, bool local_flush)
3917 kvm_flush_remote_tlbs(vcpu->kvm);
3918 else if (local_flush)
3919 kvm_mmu_flush_tlb(vcpu);
3922 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
3923 const u8 *new, int *bytes)
3929 * Assume that the pte write on a page table of the same type
3930 * as the current vcpu paging mode since we update the sptes only
3931 * when they have the same mode.
3933 if (is_pae(vcpu) && *bytes == 4) {
3934 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3937 r = kvm_read_guest(vcpu->kvm, *gpa, &gentry, 8);
3940 new = (const u8 *)&gentry;
3945 gentry = *(const u32 *)new;
3948 gentry = *(const u64 *)new;
3959 * If we're seeing too many writes to a page, it may no longer be a page table,
3960 * or we may be forking, in which case it is better to unmap the page.
3962 static bool detect_write_flooding(struct kvm_mmu_page *sp)
3965 * Skip write-flooding detected for the sp whose level is 1, because
3966 * it can become unsync, then the guest page is not write-protected.
3968 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
3971 return ++sp->write_flooding_count >= 3;
3975 * Misaligned accesses are too much trouble to fix up; also, they usually
3976 * indicate a page is not used as a page table.
3978 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
3981 unsigned offset, pte_size, misaligned;
3983 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3984 gpa, bytes, sp->role.word);
3986 offset = offset_in_page(gpa);
3987 pte_size = sp->role.cr4_pae ? 8 : 4;
3990 * Sometimes, the OS only writes the last one bytes to update status
3991 * bits, for example, in linux, andb instruction is used in clear_bit().
3993 if (!(offset & (pte_size - 1)) && bytes == 1)
3996 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3997 misaligned |= bytes < 4;
4002 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
4004 unsigned page_offset, quadrant;
4008 page_offset = offset_in_page(gpa);
4009 level = sp->role.level;
4011 if (!sp->role.cr4_pae) {
4012 page_offset <<= 1; /* 32->64 */
4014 * A 32-bit pde maps 4MB while the shadow pdes map
4015 * only 2MB. So we need to double the offset again
4016 * and zap two pdes instead of one.
4018 if (level == PT32_ROOT_LEVEL) {
4019 page_offset &= ~7; /* kill rounding error */
4023 quadrant = page_offset >> PAGE_SHIFT;
4024 page_offset &= ~PAGE_MASK;
4025 if (quadrant != sp->role.quadrant)
4029 spte = &sp->spt[page_offset / sizeof(*spte)];
4033 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
4034 const u8 *new, int bytes)
4036 gfn_t gfn = gpa >> PAGE_SHIFT;
4037 union kvm_mmu_page_role mask = { .word = 0 };
4038 struct kvm_mmu_page *sp;
4039 LIST_HEAD(invalid_list);
4040 u64 entry, gentry, *spte;
4042 bool remote_flush, local_flush, zap_page;
4045 * If we don't have indirect shadow pages, it means no page is
4046 * write-protected, so we can exit simply.
4048 if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
4051 zap_page = remote_flush = local_flush = false;
4053 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
4055 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, new, &bytes);
4058 * No need to care whether allocation memory is successful
4059 * or not since pte prefetch is skiped if it does not have
4060 * enough objects in the cache.
4062 mmu_topup_memory_caches(vcpu);
4064 spin_lock(&vcpu->kvm->mmu_lock);
4065 ++vcpu->kvm->stat.mmu_pte_write;
4066 kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
4068 mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
4069 for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn) {
4070 if (detect_write_misaligned(sp, gpa, bytes) ||
4071 detect_write_flooding(sp)) {
4072 zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
4074 ++vcpu->kvm->stat.mmu_flooded;
4078 spte = get_written_sptes(sp, gpa, &npte);
4085 mmu_page_zap_pte(vcpu->kvm, sp, spte);
4087 !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
4088 & mask.word) && rmap_can_add(vcpu))
4089 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
4090 if (need_remote_flush(entry, *spte))
4091 remote_flush = true;
4095 mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
4096 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4097 kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
4098 spin_unlock(&vcpu->kvm->mmu_lock);
4101 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
4106 if (vcpu->arch.mmu.direct_map)
4109 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
4111 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4115 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
4117 static void make_mmu_pages_available(struct kvm_vcpu *vcpu)
4119 LIST_HEAD(invalid_list);
4121 if (likely(kvm_mmu_available_pages(vcpu->kvm) >= KVM_MIN_FREE_MMU_PAGES))
4124 while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES) {
4125 if (!prepare_zap_oldest_mmu_page(vcpu->kvm, &invalid_list))
4128 ++vcpu->kvm->stat.mmu_recycled;
4130 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
4133 static bool is_mmio_page_fault(struct kvm_vcpu *vcpu, gva_t addr)
4135 if (vcpu->arch.mmu.direct_map || mmu_is_nested(vcpu))
4136 return vcpu_match_mmio_gpa(vcpu, addr);
4138 return vcpu_match_mmio_gva(vcpu, addr);
4141 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
4142 void *insn, int insn_len)
4144 int r, emulation_type = EMULTYPE_RETRY;
4145 enum emulation_result er;
4147 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
4156 if (is_mmio_page_fault(vcpu, cr2))
4159 er = x86_emulate_instruction(vcpu, cr2, emulation_type, insn, insn_len);
4164 case EMULATE_DO_MMIO:
4165 ++vcpu->stat.mmio_exits;
4175 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
4177 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
4179 vcpu->arch.mmu.invlpg(vcpu, gva);
4180 kvm_mmu_flush_tlb(vcpu);
4181 ++vcpu->stat.invlpg;
4183 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
4185 void kvm_enable_tdp(void)
4189 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
4191 void kvm_disable_tdp(void)
4193 tdp_enabled = false;
4195 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
4197 static void free_mmu_pages(struct kvm_vcpu *vcpu)
4199 free_page((unsigned long)vcpu->arch.mmu.pae_root);
4200 if (vcpu->arch.mmu.lm_root != NULL)
4201 free_page((unsigned long)vcpu->arch.mmu.lm_root);
4204 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
4212 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
4213 * Therefore we need to allocate shadow page tables in the first
4214 * 4GB of memory, which happens to fit the DMA32 zone.
4216 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
4220 vcpu->arch.mmu.pae_root = page_address(page);
4221 for (i = 0; i < 4; ++i)
4222 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
4227 int kvm_mmu_create(struct kvm_vcpu *vcpu)
4231 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
4232 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4233 vcpu->arch.mmu.translate_gpa = translate_gpa;
4234 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
4236 return alloc_mmu_pages(vcpu);
4239 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
4242 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
4244 return init_kvm_mmu(vcpu);
4247 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
4249 struct kvm_memory_slot *memslot;
4253 memslot = id_to_memslot(kvm->memslots, slot);
4254 last_gfn = memslot->base_gfn + memslot->npages - 1;
4256 spin_lock(&kvm->mmu_lock);
4258 for (i = PT_PAGE_TABLE_LEVEL;
4259 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
4260 unsigned long *rmapp;
4261 unsigned long last_index, index;
4263 rmapp = memslot->arch.rmap[i - PT_PAGE_TABLE_LEVEL];
4264 last_index = gfn_to_index(last_gfn, memslot->base_gfn, i);
4266 for (index = 0; index <= last_index; ++index, ++rmapp) {
4268 __rmap_write_protect(kvm, rmapp, false);
4270 if (need_resched() || spin_needbreak(&kvm->mmu_lock)) {
4271 kvm_flush_remote_tlbs(kvm);
4272 cond_resched_lock(&kvm->mmu_lock);
4277 kvm_flush_remote_tlbs(kvm);
4278 spin_unlock(&kvm->mmu_lock);
4281 #define BATCH_ZAP_PAGES 10
4282 static void kvm_zap_obsolete_pages(struct kvm *kvm)
4284 struct kvm_mmu_page *sp, *node;
4288 list_for_each_entry_safe_reverse(sp, node,
4289 &kvm->arch.active_mmu_pages, link) {
4293 * No obsolete page exists before new created page since
4294 * active_mmu_pages is the FIFO list.
4296 if (!is_obsolete_sp(kvm, sp))
4300 * Since we are reversely walking the list and the invalid
4301 * list will be moved to the head, skip the invalid page
4302 * can help us to avoid the infinity list walking.
4304 if (sp->role.invalid)
4308 * Need not flush tlb since we only zap the sp with invalid
4309 * generation number.
4311 if (batch >= BATCH_ZAP_PAGES &&
4312 cond_resched_lock(&kvm->mmu_lock)) {
4317 ret = kvm_mmu_prepare_zap_page(kvm, sp,
4318 &kvm->arch.zapped_obsolete_pages);
4326 * Should flush tlb before free page tables since lockless-walking
4327 * may use the pages.
4329 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
4333 * Fast invalidate all shadow pages and use lock-break technique
4334 * to zap obsolete pages.
4336 * It's required when memslot is being deleted or VM is being
4337 * destroyed, in these cases, we should ensure that KVM MMU does
4338 * not use any resource of the being-deleted slot or all slots
4339 * after calling the function.
4341 void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm)
4343 spin_lock(&kvm->mmu_lock);
4344 trace_kvm_mmu_invalidate_zap_all_pages(kvm);
4345 kvm->arch.mmu_valid_gen++;
4348 * Notify all vcpus to reload its shadow page table
4349 * and flush TLB. Then all vcpus will switch to new
4350 * shadow page table with the new mmu_valid_gen.
4352 * Note: we should do this under the protection of
4353 * mmu-lock, otherwise, vcpu would purge shadow page
4354 * but miss tlb flush.
4356 kvm_reload_remote_mmus(kvm);
4358 kvm_zap_obsolete_pages(kvm);
4359 spin_unlock(&kvm->mmu_lock);
4362 static void kvm_mmu_zap_mmio_sptes(struct kvm *kvm)
4364 struct kvm_mmu_page *sp, *node;
4365 LIST_HEAD(invalid_list);
4367 spin_lock(&kvm->mmu_lock);
4369 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) {
4370 if (!sp->mmio_cached)
4372 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
4376 kvm_mmu_commit_zap_page(kvm, &invalid_list);
4377 spin_unlock(&kvm->mmu_lock);
4380 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
4382 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
4385 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm)
4388 * The very rare case: if the generation-number is round,
4389 * zap all shadow pages.
4391 * The max value is MMIO_MAX_GEN - 1 since it is not called
4392 * when mark memslot invalid.
4394 if (unlikely(kvm_current_mmio_generation(kvm) >= (MMIO_MAX_GEN - 1)))
4395 kvm_mmu_zap_mmio_sptes(kvm);
4398 static int mmu_shrink(struct shrinker *shrink, struct shrink_control *sc)
4401 int nr_to_scan = sc->nr_to_scan;
4403 if (nr_to_scan == 0)
4406 raw_spin_lock(&kvm_lock);
4408 list_for_each_entry(kvm, &vm_list, vm_list) {
4410 LIST_HEAD(invalid_list);
4413 * Never scan more than sc->nr_to_scan VM instances.
4414 * Will not hit this condition practically since we do not try
4415 * to shrink more than one VM and it is very unlikely to see
4416 * !n_used_mmu_pages so many times.
4421 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
4422 * here. We may skip a VM instance errorneosly, but we do not
4423 * want to shrink a VM that only started to populate its MMU
4426 if (!kvm->arch.n_used_mmu_pages &&
4427 !kvm_has_zapped_obsolete_pages(kvm))
4430 idx = srcu_read_lock(&kvm->srcu);
4431 spin_lock(&kvm->mmu_lock);
4433 if (kvm_has_zapped_obsolete_pages(kvm)) {
4434 kvm_mmu_commit_zap_page(kvm,
4435 &kvm->arch.zapped_obsolete_pages);
4439 prepare_zap_oldest_mmu_page(kvm, &invalid_list);
4440 kvm_mmu_commit_zap_page(kvm, &invalid_list);
4443 spin_unlock(&kvm->mmu_lock);
4444 srcu_read_unlock(&kvm->srcu, idx);
4446 list_move_tail(&kvm->vm_list, &vm_list);
4450 raw_spin_unlock(&kvm_lock);
4453 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
4456 static struct shrinker mmu_shrinker = {
4457 .shrink = mmu_shrink,
4458 .seeks = DEFAULT_SEEKS * 10,
4461 static void mmu_destroy_caches(void)
4463 if (pte_list_desc_cache)
4464 kmem_cache_destroy(pte_list_desc_cache);
4465 if (mmu_page_header_cache)
4466 kmem_cache_destroy(mmu_page_header_cache);
4469 int kvm_mmu_module_init(void)
4471 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
4472 sizeof(struct pte_list_desc),
4474 if (!pte_list_desc_cache)
4477 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
4478 sizeof(struct kvm_mmu_page),
4480 if (!mmu_page_header_cache)
4483 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
4486 register_shrinker(&mmu_shrinker);
4491 mmu_destroy_caches();
4496 * Caculate mmu pages needed for kvm.
4498 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
4500 unsigned int nr_mmu_pages;
4501 unsigned int nr_pages = 0;
4502 struct kvm_memslots *slots;
4503 struct kvm_memory_slot *memslot;
4505 slots = kvm_memslots(kvm);
4507 kvm_for_each_memslot(memslot, slots)
4508 nr_pages += memslot->npages;
4510 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
4511 nr_mmu_pages = max(nr_mmu_pages,
4512 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
4514 return nr_mmu_pages;
4517 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
4519 struct kvm_shadow_walk_iterator iterator;
4523 walk_shadow_page_lockless_begin(vcpu);
4524 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) {
4525 sptes[iterator.level-1] = spte;
4527 if (!is_shadow_present_pte(spte))
4530 walk_shadow_page_lockless_end(vcpu);
4534 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
4536 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
4540 destroy_kvm_mmu(vcpu);
4541 free_mmu_pages(vcpu);
4542 mmu_free_memory_caches(vcpu);
4545 void kvm_mmu_module_exit(void)
4547 mmu_destroy_caches();
4548 percpu_counter_destroy(&kvm_total_used_mmu_pages);
4549 unregister_shrinker(&mmu_shrinker);
4550 mmu_audit_disable();