2 * Architecture specific OF callbacks.
4 #include <linux/bootmem.h>
6 #include <linux/interrupt.h>
7 #include <linux/list.h>
9 #include <linux/of_fdt.h>
10 #include <linux/of_address.h>
11 #include <linux/of_platform.h>
12 #include <linux/of_irq.h>
13 #include <linux/slab.h>
14 #include <linux/pci.h>
15 #include <linux/of_pci.h>
16 #include <linux/initrd.h>
19 #include <asm/irq_controller.h>
21 #include <asm/pci_x86.h>
23 __initdata u64 initial_dtb;
24 char __initdata cmd_line[COMMAND_LINE_SIZE];
25 static LIST_HEAD(irq_domains);
26 static DEFINE_RAW_SPINLOCK(big_irq_lock);
28 int __initdata of_ioapic;
30 #ifdef CONFIG_X86_IO_APIC
31 static void add_interrupt_host(struct irq_domain *ih)
35 raw_spin_lock_irqsave(&big_irq_lock, flags);
36 list_add(&ih->l, &irq_domains);
37 raw_spin_unlock_irqrestore(&big_irq_lock, flags);
41 static struct irq_domain *get_ih_from_node(struct device_node *controller)
43 struct irq_domain *ih, *found = NULL;
46 raw_spin_lock_irqsave(&big_irq_lock, flags);
47 list_for_each_entry(ih, &irq_domains, l) {
48 if (ih->controller == controller) {
53 raw_spin_unlock_irqrestore(&big_irq_lock, flags);
57 unsigned int irq_create_of_mapping(struct device_node *controller,
58 const u32 *intspec, unsigned int intsize)
60 struct irq_domain *ih;
64 ih = get_ih_from_node(controller);
67 ret = ih->xlate(ih, intspec, intsize, &virq, &type);
70 if (type == IRQ_TYPE_NONE)
72 irq_set_irq_type(virq, type);
75 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
77 unsigned long pci_address_to_pio(phys_addr_t address)
80 * The ioport address can be directly used by inX / outX
82 BUG_ON(address >= (1 << 16));
83 return (unsigned long)address;
85 EXPORT_SYMBOL_GPL(pci_address_to_pio);
87 void __init early_init_dt_scan_chosen_arch(unsigned long node)
92 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
97 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
99 return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
102 #ifdef CONFIG_BLK_DEV_INITRD
103 void __init early_init_dt_setup_initrd_arch(unsigned long start,
106 initrd_start = (unsigned long)__va(start);
107 initrd_end = (unsigned long)__va(end);
108 initrd_below_start_ok = 1;
112 void __init add_dtb(u64 data)
114 initial_dtb = data + offsetof(struct setup_data, data);
118 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
120 static struct of_device_id __initdata ce4100_ids[] = {
121 { .compatible = "intel,ce4100-cp", },
122 { .compatible = "isa", },
123 { .compatible = "pci", },
127 static int __init add_bus_probe(void)
129 if (!of_have_populated_dt())
132 return of_platform_bus_probe(NULL, ce4100_ids, NULL);
134 module_init(add_bus_probe);
137 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
139 struct device_node *np;
141 for_each_node_by_type(np, "pci") {
143 unsigned int bus_min;
145 prop = of_get_property(np, "bus-range", NULL);
148 bus_min = be32_to_cpup(prop);
149 if (bus->number == bus_min)
155 static int x86_of_pci_irq_enable(struct pci_dev *dev)
162 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
168 ret = of_irq_map_pci(dev, &oirq);
172 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
180 static void x86_of_pci_irq_disable(struct pci_dev *dev)
184 void __cpuinit x86_of_pci_init(void)
186 pcibios_enable_irq = x86_of_pci_irq_enable;
187 pcibios_disable_irq = x86_of_pci_irq_disable;
191 static void __init dtb_setup_hpet(void)
193 #ifdef CONFIG_HPET_TIMER
194 struct device_node *dn;
198 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
201 ret = of_address_to_resource(dn, 0, &r);
206 hpet_address = r.start;
210 static void __init dtb_lapic_setup(void)
212 #ifdef CONFIG_X86_LOCAL_APIC
213 struct device_node *dn;
217 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
221 ret = of_address_to_resource(dn, 0, &r);
225 /* Did the boot loader setup the local APIC ? */
227 if (apic_force_enable(r.start))
230 smp_found_config = 1;
232 register_lapic_address(r.start);
233 generic_processor_info(boot_cpu_physical_apicid,
234 GET_APIC_VERSION(apic_read(APIC_LVR)));
238 #ifdef CONFIG_X86_IO_APIC
239 static unsigned int ioapic_id;
241 static void __init dtb_add_ioapic(struct device_node *dn)
246 ret = of_address_to_resource(dn, 0, &r);
248 printk(KERN_ERR "Can't obtain address from node %s.\n",
252 mp_register_ioapic(++ioapic_id, r.start, gsi_top);
255 static void __init dtb_ioapic_setup(void)
257 struct device_node *dn;
259 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
266 printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
269 static void __init dtb_ioapic_setup(void) {}
272 static void __init dtb_apic_setup(void)
278 #ifdef CONFIG_OF_FLATTREE
279 static void __init x86_flattree_get_config(void)
287 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
288 (u64)sizeof(struct boot_param_header));
290 initial_boot_params = early_memremap(initial_dtb, map_len);
291 size = be32_to_cpu(initial_boot_params->totalsize);
292 if (map_len < size) {
293 early_iounmap(initial_boot_params, map_len);
294 initial_boot_params = early_memremap(initial_dtb, size);
298 new_dtb = alloc_bootmem(size);
299 memcpy(new_dtb, initial_boot_params, size);
300 early_iounmap(initial_boot_params, map_len);
302 initial_boot_params = new_dtb;
304 /* root level address cells */
305 of_scan_flat_dt(early_init_dt_scan_root, NULL);
307 unflatten_device_tree();
310 static inline void x86_flattree_get_config(void) { }
313 void __init x86_dtb_init(void)
315 x86_flattree_get_config();
317 if (!of_have_populated_dt())
324 #ifdef CONFIG_X86_IO_APIC
326 struct of_ioapic_type {
332 static struct of_ioapic_type of_ioapic_type[] =
335 .out_type = IRQ_TYPE_EDGE_RISING,
336 .trigger = IOAPIC_EDGE,
340 .out_type = IRQ_TYPE_LEVEL_LOW,
341 .trigger = IOAPIC_LEVEL,
345 .out_type = IRQ_TYPE_LEVEL_HIGH,
346 .trigger = IOAPIC_LEVEL,
350 .out_type = IRQ_TYPE_EDGE_FALLING,
351 .trigger = IOAPIC_EDGE,
356 static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
357 u32 *out_hwirq, u32 *out_type)
359 struct mp_ioapic_gsi *gsi_cfg;
360 struct io_apic_irq_attr attr;
361 struct of_ioapic_type *it;
368 idx = (u32) id->priv;
369 gsi_cfg = mp_ioapic_gsi_routing(idx);
370 *out_hwirq = line + gsi_cfg->gsi_base;
375 if (type >= ARRAY_SIZE(of_ioapic_type))
378 it = of_ioapic_type + type;
379 *out_type = it->out_type;
381 set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
383 return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr);
386 static void __init ioapic_add_ofnode(struct device_node *np)
391 ret = of_address_to_resource(np, 0, &r);
393 printk(KERN_ERR "Failed to obtain address for %s\n",
398 for (i = 0; i < nr_ioapics; i++) {
399 if (r.start == mpc_ioapic_addr(i)) {
400 struct irq_domain *id;
402 id = kzalloc(sizeof(*id), GFP_KERNEL);
405 id->xlate = ioapic_xlate;
406 id->priv = (void *)i;
407 add_interrupt_host(id);
411 printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
414 void __init x86_add_irq_domains(void)
416 struct device_node *dp;
418 if (!of_have_populated_dt())
421 for_each_node_with_property(dp, "interrupt-controller") {
422 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
423 ioapic_add_ofnode(dp);
427 void __init x86_add_irq_domains(void) { }