1 #ifndef __ASM_X86_XSAVE_H
2 #define __ASM_X86_XSAVE_H
4 #include <linux/types.h>
5 #include <asm/processor.h>
7 #define XSTATE_CPUID 0x0000000d
10 #define XSTATE_SSE 0x2
11 #define XSTATE_YMM 0x4
12 #define XSTATE_BNDREGS 0x8
13 #define XSTATE_BNDCSR 0x10
15 #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
17 #define FXSAVE_SIZE 512
19 #define XSAVE_HDR_SIZE 64
20 #define XSAVE_HDR_OFFSET FXSAVE_SIZE
22 #define XSAVE_YMM_SIZE 256
23 #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
25 /* Supported features which support lazy state saving */
26 #define XSTATE_LAZY (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
28 /* Supported features which require eager state saving */
29 #define XSTATE_EAGER (XSTATE_BNDREGS | XSTATE_BNDCSR)
31 /* All currently supported features */
32 #define XCNTXT_MASK (XSTATE_LAZY | XSTATE_EAGER)
35 #define REX_PREFIX "0x48, "
40 extern unsigned int xstate_size;
41 extern u64 pcntxt_mask;
42 extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
43 extern struct xsave_struct *init_xstate_buf;
45 extern void xsave_init(void);
46 extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
47 extern int init_fpu(struct task_struct *child);
49 static inline int fpu_xrstor_checking(struct xsave_struct *fx)
53 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
55 ".section .fixup,\"ax\"\n"
56 "3: movl $-1,%[err]\n"
61 : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
67 static inline int xsave_user(struct xsave_struct __user *buf)
72 * Clear the xsave header first, so that reserved fields are
73 * initialized to zero.
75 err = __clear_user(&buf->xsave_hdr, sizeof(buf->xsave_hdr));
79 __asm__ __volatile__(ASM_STAC "\n"
80 "1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
82 ".section .fixup,\"ax\"\n"
83 "3: movl $-1,%[err]\n"
88 : "D" (buf), "a" (-1), "d" (-1), "0" (0)
93 static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
96 struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
98 u32 hmask = mask >> 32;
100 __asm__ __volatile__(ASM_STAC "\n"
101 "1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
103 ".section .fixup,\"ax\"\n"
104 "3: movl $-1,%[err]\n"
109 : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
110 : "memory"); /* memory required? */
114 static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
117 u32 hmask = mask >> 32;
119 asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
120 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
124 static inline void xsave_state(struct xsave_struct *fx, u64 mask)
127 u32 hmask = mask >> 32;
129 asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t"
130 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
134 static inline void fpu_xsave(struct fpu *fpu)
136 /* This, however, we can work around by forcing the compiler to select
137 an addressing mode that doesn't require extended registers. */
139 ".byte " REX_PREFIX "0x0f,0xae,0x27",
140 ".byte " REX_PREFIX "0x0f,0xae,0x37",
141 X86_FEATURE_XSAVEOPT,
142 [fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) :