1 #ifndef _ASM_X86_AMD_NB_H
2 #define _ASM_X86_AMD_NB_H
6 struct amd_nb_bus_dev_range {
12 extern const struct pci_device_id amd_nb_misc_ids[];
13 extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
16 extern int early_is_amd_nb(u32 value);
17 extern int amd_cache_northbridges(void);
18 extern void amd_flush_garts(void);
19 extern int amd_numa_init(void);
20 extern int amd_get_subcaches(int);
21 extern int amd_set_subcaches(int, int);
23 #ifdef CONFIG_NUMA_EMU
24 extern void amd_fake_nodes(const struct bootnode *nodes, int nr_nodes);
27 struct amd_northbridge {
32 struct amd_northbridge_info {
35 struct amd_northbridge *nb;
37 extern struct amd_northbridge_info amd_northbridges;
39 #define AMD_NB_GART 0x1
40 #define AMD_NB_L3_INDEX_DISABLE 0x2
41 #define AMD_NB_L3_PARTITIONING 0x4
45 static inline int amd_nb_num(void)
47 return amd_northbridges.num;
50 static inline int amd_nb_has_feature(int feature)
52 return ((amd_northbridges.flags & feature) == feature);
55 static inline struct amd_northbridge *node_to_amd_nb(int node)
57 return (node < amd_northbridges.num) ? &amd_northbridges.nb[node] : NULL;
62 #define amd_nb_num(x) 0
63 #define amd_nb_has_feature(x) false
64 #define node_to_amd_nb(x) NULL
69 #endif /* _ASM_X86_AMD_NB_H */