1 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
10 #include <linux/linkage.h>
11 #include <linux/errno.h>
16 #include <asm/contregs.h>
17 #include <asm/ptrace.h>
18 #include <asm/asm-offsets.h>
20 #include <asm/vaddrs.h>
22 #include <asm/pgtable.h>
23 #include <asm/winmacro.h>
24 #include <asm/signal.h>
27 #include <asm/thread_info.h>
28 #include <asm/param.h>
29 #include <asm/unistd.h>
31 #include <asm/asmmacro.h>
35 /* These are just handy. */
36 #define _SV save %sp, -STACKFRAME_SZ, %sp
39 #define FLUSH_ALL_KERNEL_WINDOWS \
40 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
41 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
47 .globl arch_kgdb_breakpoint
48 .type arch_kgdb_breakpoint,#function
53 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
56 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
61 * This code cannot touch registers %l0 %l1 and %l2
62 * because SAVE_ALL depends on their values. It depends
63 * on %l3 also, but we regenerate it before a call.
64 * Other registers are:
65 * %l3 -- base address of fdc registers
67 * %l5 -- scratch for ld/st address
69 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
72 /* Do we have work to do? */
73 sethi %hi(doing_pdma), %l7
74 ld [%l7 + %lo(doing_pdma)], %l7
79 /* Load fdc register base */
80 sethi %hi(fdc_status), %l3
81 ld [%l3 + %lo(fdc_status)], %l3
83 /* Setup register addresses */
84 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
85 ld [%l5 + %lo(pdma_vaddr)], %l4
86 sethi %hi(pdma_size), %l5 ! bytes to go
87 ld [%l5 + %lo(pdma_size)], %l6
91 andcc %l7, 0x80, %g0 ! Does fifo still have data
92 bz floppy_fifo_emptied ! fifo has been emptied...
93 andcc %l7, 0x20, %g0 ! in non-dma mode still?
94 bz floppy_overrun ! nope, overrun
95 andcc %l7, 0x40, %g0 ! 0=write 1=read
99 /* Ok, actually read this byte */
110 /* Ok, actually write this byte */
117 /* fall through... */
119 sethi %hi(pdma_vaddr), %l5
120 st %l4, [%l5 + %lo(pdma_vaddr)]
121 sethi %hi(pdma_size), %l5
122 st %l6, [%l5 + %lo(pdma_size)]
123 /* Flip terminal count pin */
124 set auxio_register, %l7
134 /* Kill some time so the bits set */
140 /* Prevent recursion */
141 sethi %hi(doing_pdma), %l7
143 st %g0, [%l7 + %lo(doing_pdma)]
145 /* We emptied the FIFO, but we haven't read everything
146 * as of yet. Store the current transfer address and
147 * bytes left to read so we can continue when the next
151 sethi %hi(pdma_vaddr), %l5
152 st %l4, [%l5 + %lo(pdma_vaddr)]
153 sethi %hi(pdma_size), %l7
154 st %l6, [%l7 + %lo(pdma_size)]
156 /* Restore condition codes */
164 sethi %hi(pdma_vaddr), %l5
165 st %l4, [%l5 + %lo(pdma_vaddr)]
166 sethi %hi(pdma_size), %l5
167 st %l6, [%l5 + %lo(pdma_size)]
168 /* Prevent recursion */
169 sethi %hi(doing_pdma), %l7
170 st %g0, [%l7 + %lo(doing_pdma)]
172 /* fall through... */
177 /* Set all IRQs off. */
184 mov 11, %o0 ! floppy irq level (unused anyway)
185 mov %g0, %o1 ! devid is not used in fast interrupts
186 call sparc_floppy_irq
187 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
191 #endif /* (CONFIG_BLK_DEV_FD) */
193 /* Bad trap handler */
194 .globl bad_trap_handler
201 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
203 mov %l7, %o1 ! trap number
207 /* For now all IRQ's not registered get sent here. handler_irq() will
208 * see if a routine is registered to handle this interrupt and if not
209 * it will say so on the console.
213 .globl real_irq_entry, patch_handler_irq
218 .globl patchme_maybe_smp_msg
221 patchme_maybe_smp_msg:
232 mov %l7, %o0 ! irq level
235 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
236 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
237 wr %g2, PSR_ET, %psr ! keep ET up
243 /* SMP per-cpu ticker interrupts are handled specially. */
245 bne real_irq_continue+4
251 call smp4m_percpu_timer_interrupt
252 add %sp, STACKFRAME_SZ, %o0
257 #define GET_PROCESSOR4M_ID(reg) \
259 srl %reg, 12, %reg; \
262 /* Here is where we check for possible SMP IPI passed to us
263 * on some level other than 15 which is the NMI and only used
264 * for cross calls. That has a separate entry point below.
266 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
269 GET_PROCESSOR4M_ID(o3)
270 sethi %hi(sun4m_irq_percpu), %l5
272 or %l5, %lo(sun4m_irq_percpu), %o5
273 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
275 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
280 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
282 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
289 srl %o3, 28, %o2 ! shift for simpler checks below
290 maybe_smp4m_msg_check_single:
292 beq,a maybe_smp4m_msg_check_mask
294 call smp_call_function_single_interrupt
297 maybe_smp4m_msg_check_mask:
298 beq,a maybe_smp4m_msg_check_resched
300 call smp_call_function_interrupt
303 maybe_smp4m_msg_check_resched:
304 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
305 beq,a maybe_smp4m_msg_out
307 call smp_resched_interrupt
313 .globl linux_trap_ipi15_sun4m
314 linux_trap_ipi15_sun4m:
316 sethi %hi(0x80000000), %o2
317 GET_PROCESSOR4M_ID(o0)
318 sethi %hi(sun4m_irq_percpu), %l5
319 or %l5, %lo(sun4m_irq_percpu), %o5
322 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
324 be sun4m_nmi_error ! Must be an NMI async memory error
325 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
327 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
334 call smp4m_cross_call_irq
336 b ret_trap_lockless_ipi
340 /* SMP per-cpu ticker interrupts are handled specially. */
344 sethi %hi(CC_ICLR), %o0
345 sethi %hi(1 << 14), %o1
346 or %o0, %lo(CC_ICLR), %o0
347 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
352 call smp4d_percpu_timer_interrupt
353 add %sp, STACKFRAME_SZ, %o0
359 .globl linux_trap_ipi15_sun4d
360 linux_trap_ipi15_sun4d:
362 sethi %hi(CC_BASE), %o4
363 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
364 or %o4, (CC_EREG - CC_BASE), %o0
365 ldda [%o0] ASI_M_MXCC, %o0
368 sethi %hi(BB_STAT2), %o2
369 lduba [%o2] ASI_M_CTL, %o2
370 andcc %o2, BB_STAT2_MASK, %g0
372 or %o4, (CC_ICLR - CC_BASE), %o0
373 sethi %hi(1 << 15), %o1
374 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
380 call smp4d_cross_call_irq
382 b ret_trap_lockless_ipi
389 lduha [%l4] ASI_M_MXCC, %l5
390 sethi %hi(1 << 15), %l7
392 stha %l5, [%l4] ASI_M_MXCC
397 .extern leon_ipi_interrupt
398 /* SMP per-cpu IPI interrupts are handled specially. */
406 call leonsmp_ipi_interrupt
407 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
413 .globl linux_trap_ipi15_leon
414 linux_trap_ipi15_leon:
421 call leon_cross_call_irq
423 b ret_trap_lockless_ipi
426 #endif /* CONFIG_SMP */
428 /* This routine handles illegal instructions and privileged
429 * instruction attempts from user code.
432 .globl bad_instruction
434 sethi %hi(0xc1f80000), %l4
436 sethi %hi(0x81d80000), %l7
442 wr %l0, PSR_ET, %psr ! re-enable traps
445 add %sp, STACKFRAME_SZ, %o0
448 call do_illegal_instruction
453 1: /* unimplemented flush - just skip */
458 .globl priv_instruction
465 add %sp, STACKFRAME_SZ, %o0
468 call do_priv_instruction
473 /* This routine handles unaligned data accesses. */
477 andcc %l0, PSR_PS, %g0
487 call kernel_unaligned_trap
488 add %sp, STACKFRAME_SZ, %o0
495 wr %l0, PSR_ET, %psr ! re-enable traps
499 call user_unaligned_trap
500 add %sp, STACKFRAME_SZ, %o0
504 /* This routine handles floating point disabled traps. */
506 .globl fpd_trap_handler
510 wr %l0, PSR_ET, %psr ! re-enable traps
513 add %sp, STACKFRAME_SZ, %o0
521 /* This routine handles Floating Point Exceptions. */
523 .globl fpe_trap_handler
525 set fpsave_magic, %l5
528 sethi %hi(fpsave), %l5
529 or %l5, %lo(fpsave), %l5
532 sethi %hi(fpsave_catch2), %l5
533 or %l5, %lo(fpsave_catch2), %l5
539 sethi %hi(fpsave_catch), %l5
540 or %l5, %lo(fpsave_catch), %l5
549 wr %l0, PSR_ET, %psr ! re-enable traps
552 add %sp, STACKFRAME_SZ, %o0
560 /* This routine handles Tag Overflow Exceptions. */
562 .globl do_tag_overflow
566 wr %l0, PSR_ET, %psr ! re-enable traps
569 add %sp, STACKFRAME_SZ, %o0
572 call handle_tag_overflow
577 /* This routine handles Watchpoint Exceptions. */
583 wr %l0, PSR_ET, %psr ! re-enable traps
586 add %sp, STACKFRAME_SZ, %o0
589 call handle_watchpoint
594 /* This routine handles Register Access Exceptions. */
600 wr %l0, PSR_ET, %psr ! re-enable traps
603 add %sp, STACKFRAME_SZ, %o0
606 call handle_reg_access
611 /* This routine handles Co-Processor Disabled Exceptions. */
613 .globl do_cp_disabled
617 wr %l0, PSR_ET, %psr ! re-enable traps
620 add %sp, STACKFRAME_SZ, %o0
623 call handle_cp_disabled
628 /* This routine handles Co-Processor Exceptions. */
630 .globl do_cp_exception
634 wr %l0, PSR_ET, %psr ! re-enable traps
637 add %sp, STACKFRAME_SZ, %o0
640 call handle_cp_exception
645 /* This routine handles Hardware Divide By Zero Exceptions. */
651 wr %l0, PSR_ET, %psr ! re-enable traps
654 add %sp, STACKFRAME_SZ, %o0
657 call handle_hw_divzero
663 .globl do_flush_windows
670 andcc %l0, PSR_PS, %g0
674 call flush_user_windows
677 /* Advance over the trap instruction. */
678 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
680 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
681 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
685 .globl flush_patch_one
687 /* We get these for debugging routines using __builtin_return_address() */
690 FLUSH_ALL_KERNEL_WINDOWS
692 /* Advance over the trap instruction. */
693 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
695 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
696 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
700 /* The getcc software trap. The user wants the condition codes from
701 * the %psr in register %g1.
705 .globl getcc_trap_handler
707 srl %l0, 20, %g1 ! give user
708 and %g1, 0xf, %g1 ! only ICC bits in %psr
709 jmp %l2 ! advance over trap instruction
710 rett %l2 + 0x4 ! like this...
712 /* The setcc software trap. The user has condition codes in %g1
713 * that it would like placed in the %psr. Be careful not to flip
714 * any unintentional bits!
718 .globl setcc_trap_handler
722 andn %l0, %l5, %l0 ! clear ICC bits in %psr
723 and %l4, %l5, %l4 ! clear non-ICC bits in user value
724 or %l4, %l0, %l4 ! or them in... mix mix mix
726 wr %l4, 0x0, %psr ! set new %psr
727 WRITE_PAUSE ! TI scumbags...
729 jmp %l2 ! advance over trap instruction
730 rett %l2 + 0x4 ! like this...
733 /* NMI async memory error handling. */
734 sethi %hi(0x80000000), %l4
735 sethi %hi(sun4m_irq_global), %o5
736 ld [%o5 + %lo(sun4m_irq_global)], %l5
737 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
739 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
748 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
750 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
756 .globl linux_trap_ipi15_sun4m
757 linux_trap_ipi15_sun4m:
762 #endif /* CONFIG_SMP */
770 LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) ! read sfar first
771 SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) ! read sfar first
773 LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last
774 SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last
777 srl %l5, 6, %l5 ! and encode all info into l7
782 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
788 and %o1, 1, %o1 ! arg2 = text_faultp
790 and %o2, 2, %o2 ! arg3 = writep
791 andn %o3, 0xfff, %o3 ! arg4 = faulting address
797 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
802 .globl sys_nis_syscall
805 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
806 call c_sys_nis_syscall
815 .globl sys_sparc_pipe
818 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
823 .globl sys_sigaltstack
842 add %sp, STACKFRAME_SZ, %o0
844 ld [%curptr + TI_FLAGS], %l5
845 andcc %l5, _TIF_SYSCALL_TRACE, %g0
853 /* We don't want to muck with user registers like a
854 * normal syscall, just return.
859 .globl sys_rt_sigreturn
862 add %sp, STACKFRAME_SZ, %o0
864 ld [%curptr + TI_FLAGS], %l5
865 andcc %l5, _TIF_SYSCALL_TRACE, %g0
869 add %sp, STACKFRAME_SZ, %o0
874 /* We are returning to a signal handler. */
877 /* Now that we have a real sys_clone, sys_fork() is
878 * implemented in terms of it. Our _real_ implementation
879 * of SunOS vfork() will use sys_vfork().
881 * XXX These three should be consolidated into mostly shared
882 * XXX code just like on sparc64... -DaveM
885 .globl sys_fork, flush_patch_two
889 FLUSH_ALL_KERNEL_WINDOWS;
890 ld [%curptr + TI_TASK], %o4
893 mov SIGCHLD, %o0 ! arg0: clone flags
896 mov %fp, %o1 ! arg1: usp
897 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
898 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
903 /* Whee, kernel threads! */
904 .globl sys_clone, flush_patch_three
908 FLUSH_ALL_KERNEL_WINDOWS;
909 ld [%curptr + TI_TASK], %o4
913 /* arg0,1: flags,usp -- loaded already */
914 cmp %o1, 0x0 ! Is new_usp NULL?
918 mov %fp, %o1 ! yes, use callers usp
919 andn %o1, 7, %o1 ! no, align to 8 bytes
921 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
922 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
927 /* Whee, real vfork! */
928 .globl sys_vfork, flush_patch_four
931 FLUSH_ALL_KERNEL_WINDOWS;
932 ld [%curptr + TI_TASK], %o4
937 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
938 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
940 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
941 sethi %hi(sparc_do_fork), %l1
943 jmpl %l1 + %lo(sparc_do_fork), %g0
944 add %sp, STACKFRAME_SZ, %o2
947 linux_sparc_ni_syscall:
948 sethi %hi(sys_ni_syscall), %l7
950 or %l7, %lo(sys_ni_syscall), %l7
953 add %sp, STACKFRAME_SZ, %o0
969 ld [%g3 + TI_TASK], %o0
971 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
973 .globl ret_from_kernel_thread
974 ret_from_kernel_thread:
976 ld [%g3 + TI_TASK], %o0
977 ld [%sp + STACKFRAME_SZ + PT_G1], %l0
979 ld [%sp + STACKFRAME_SZ + PT_G2], %o0
981 ld [%sp + STACKFRAME_SZ + PT_PSR], %l0
982 andn %l0, PSR_CWP, %l0
984 and %l1, PSR_CWP, %l1
986 st %l0, [%sp + STACKFRAME_SZ + PT_PSR]
990 /* Linux native system calls enter here... */
992 .globl linux_sparc_syscall
994 sethi %hi(PSR_SYSCALL), %l4
996 /* Direct access to user regs, must faster. */
998 bgeu linux_sparc_ni_syscall
1006 wr %l0, PSR_ET, %psr
1011 ld [%curptr + TI_FLAGS], %l5
1013 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1015 bne linux_syscall_trace
1022 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1025 ld [%curptr + TI_FLAGS], %l6
1026 cmp %o0, -ERESTART_RESTARTBLOCK
1027 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1030 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1032 /* System call success, clear Carry condition code. */
1035 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1036 bne linux_syscall_trace2
1037 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1038 add %l1, 0x4, %l2 /* npc = npc+4 */
1039 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1041 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1043 /* System call failure, set Carry condition code.
1044 * Also, get abs(errno) to return to the process.
1048 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1050 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1051 bne linux_syscall_trace2
1052 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1053 add %l1, 0x4, %l2 /* npc = npc+4 */
1054 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1056 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1058 linux_syscall_trace2:
1059 add %sp, STACKFRAME_SZ, %o0
1062 add %l1, 0x4, %l2 /* npc = npc+4 */
1063 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1065 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1068 /* Saving and restoring the FPU state is best done from lowlevel code.
1070 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1071 * void *fpqueue, unsigned long *fpqdepth)
1076 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1083 /* We have an fpqueue to save. */
1097 std %f0, [%o0 + 0x00]
1098 std %f2, [%o0 + 0x08]
1099 std %f4, [%o0 + 0x10]
1100 std %f6, [%o0 + 0x18]
1101 std %f8, [%o0 + 0x20]
1102 std %f10, [%o0 + 0x28]
1103 std %f12, [%o0 + 0x30]
1104 std %f14, [%o0 + 0x38]
1105 std %f16, [%o0 + 0x40]
1106 std %f18, [%o0 + 0x48]
1107 std %f20, [%o0 + 0x50]
1108 std %f22, [%o0 + 0x58]
1109 std %f24, [%o0 + 0x60]
1110 std %f26, [%o0 + 0x68]
1111 std %f28, [%o0 + 0x70]
1113 std %f30, [%o0 + 0x78]
1115 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1116 * code for pointing out this possible deadlock, while we save state
1117 * above we could trap on the fsr store so our low level fpu trap
1118 * code has to know how to deal with this.
1128 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1132 ldd [%o0 + 0x00], %f0
1133 ldd [%o0 + 0x08], %f2
1134 ldd [%o0 + 0x10], %f4
1135 ldd [%o0 + 0x18], %f6
1136 ldd [%o0 + 0x20], %f8
1137 ldd [%o0 + 0x28], %f10
1138 ldd [%o0 + 0x30], %f12
1139 ldd [%o0 + 0x38], %f14
1140 ldd [%o0 + 0x40], %f16
1141 ldd [%o0 + 0x48], %f18
1142 ldd [%o0 + 0x50], %f20
1143 ldd [%o0 + 0x58], %f22
1144 ldd [%o0 + 0x60], %f24
1145 ldd [%o0 + 0x68], %f26
1146 ldd [%o0 + 0x70], %f28
1147 ldd [%o0 + 0x78], %f30
1152 /* __ndelay and __udelay take two arguments:
1153 * 0 - nsecs or usecs to delay
1154 * 1 - per_cpu udelay_val (loops per jiffy)
1156 * Note that ndelay gives HZ times higher resolution but has a 10ms
1157 * limit. udelay can handle up to 1s.
1161 save %sp, -STACKFRAME_SZ, %sp
1162 mov %i0, %o0 ! round multiplier up so large ns ok
1163 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1166 mov %i1, %o1 ! udelay_val
1170 mov %o1, %o0 ! >>32 later for better resolution
1174 save %sp, -STACKFRAME_SZ, %sp
1176 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1177 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1180 mov %i1, %o1 ! udelay_val
1183 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1184 or %g0, %lo(0x028f4b62), %l0
1185 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1189 mov HZ, %o0 ! >>32 earlier for wider range
1202 /* Handle a software breakpoint */
1203 /* We have to inform parent that child has stopped */
1205 .globl breakpoint_trap
1209 wr %l0, PSR_ET, %psr
1212 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1213 call sparc_breakpoint
1214 add %sp, STACKFRAME_SZ, %o0
1220 .globl kgdb_trap_low
1221 .type kgdb_trap_low,#function
1225 wr %l0, PSR_ET, %psr
1229 add %sp, STACKFRAME_SZ, %o0
1232 .size kgdb_trap_low,.-kgdb_trap_low
1236 .globl flush_patch_exception
1237 flush_patch_exception:
1238 FLUSH_ALL_KERNEL_WINDOWS;
1240 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1241 mov 1, %g1 ! signal EFAULT condition
1244 .globl kill_user_windows, kuw_patch1_7win
1246 kuw_patch1_7win: sll %o3, 6, %o3
1248 /* No matter how much overhead this routine has in the worst
1249 * case scenerio, it is several times better than taking the
1250 * traps with the old method of just doing flush_user_windows().
1253 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1254 orcc %g0, %o0, %g0 ! if no bits set, we are done
1255 be 3f ! nothing to do
1256 rd %psr, %o5 ! must clear interrupts
1257 or %o5, PSR_PIL, %o4 ! or else that could change
1258 wr %o4, 0x0, %psr ! the uwinmask state
1259 WRITE_PAUSE ! burn them cycles
1261 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1262 orcc %g0, %o0, %g0 ! did an interrupt come in?
1263 be 4f ! yep, we are done
1264 rd %wim, %o3 ! get current wim
1265 srl %o3, 1, %o4 ! simulate a save
1267 sll %o3, 7, %o3 ! compute next wim
1268 or %o4, %o3, %o3 ! result
1269 andncc %o0, %o3, %o0 ! clean this bit in umask
1270 bne kuw_patch1 ! not done yet
1271 srl %o3, 1, %o4 ! begin another save simulation
1272 wr %o3, 0x0, %wim ! set the new wim
1273 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
1275 wr %o5, 0x0, %psr ! re-enable interrupts
1276 WRITE_PAUSE ! burn baby burn
1279 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1282 .globl restore_current
1284 LOAD_CURRENT(g6, o0)
1288 #ifdef CONFIG_PCIC_PCI
1289 #include <asm/pcic.h>
1292 .globl linux_trap_ipi15_pcic
1293 linux_trap_ipi15_pcic:
1298 * First deactivate NMI
1299 * or we cannot drop ET, cannot get window spill traps.
1300 * The busy loop is necessary because the PIO error
1301 * sometimes does not go away quickly and we trap again.
1303 sethi %hi(pcic_regs), %o1
1304 ld [%o1 + %lo(pcic_regs)], %o2
1306 ! Get pending status for printouts later.
1307 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1309 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1310 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
1312 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1313 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1317 or %l0, PSR_PIL, %l4
1320 wr %l4, PSR_ET, %psr
1324 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1327 .globl pcic_nmi_trap_patch
1328 pcic_nmi_trap_patch:
1329 sethi %hi(linux_trap_ipi15_pcic), %l3
1330 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1334 #endif /* CONFIG_PCIC_PCI */
1338 save %sp, -0x40, %sp
1339 save %sp, -0x40, %sp
1340 save %sp, -0x40, %sp
1341 save %sp, -0x40, %sp
1342 save %sp, -0x40, %sp
1343 save %sp, -0x40, %sp
1344 save %sp, -0x40, %sp
1355 ENTRY(hard_smp_processor_id)
1359 .section .cpuid_patch, "ax"
1360 /* Instruction location. */
1362 /* SUN4D implementation. */
1363 lda [%g0] ASI_M_VIKING_TMP1, %o0
1366 /* LEON implementation. */
1373 ENDPROC(hard_smp_processor_id)
1376 /* End of entry.S */