3 * (Compatible with Algo System ., LTD. - AP-320A)
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/mtd/sh_flctl.h>
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/smsc911x.h>
22 #include <linux/gpio.h>
23 #include <media/ov772x.h>
24 #include <media/soc_camera.h>
25 #include <media/soc_camera_platform.h>
26 #include <media/sh_mobile_ceu.h>
27 #include <video/sh_mobile_lcdc.h>
29 #include <asm/clock.h>
30 #include <cpu/sh7723.h>
32 static struct smsc911x_platform_config smsc911x_config = {
33 .phy_interface = PHY_INTERFACE_MODE_MII,
34 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
35 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
36 .flags = SMSC911X_USE_32BIT,
39 static struct resource smsc9118_resources[] = {
43 .flags = IORESOURCE_MEM,
48 .flags = IORESOURCE_IRQ,
52 static struct platform_device smsc9118_device = {
55 .num_resources = ARRAY_SIZE(smsc9118_resources),
56 .resource = smsc9118_resources,
58 .platform_data = &smsc911x_config,
63 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
64 * If this area erased, this board can not boot.
66 static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
70 .size = (1 * 1024 * 1024),
71 .mask_flags = MTD_WRITEABLE, /* Read-only */
74 .offset = MTDPART_OFS_APPEND,
75 .size = (2 * 1024 * 1024),
78 .offset = MTDPART_OFS_APPEND,
79 .size = ((7 * 1024 * 1024) + (512 * 1024)),
82 .offset = MTDPART_OFS_APPEND,
83 .mask_flags = MTD_WRITEABLE, /* Read-only */
84 .size = (1024 * 128 * 2),
87 .offset = MTDPART_OFS_APPEND,
88 .size = MTDPART_SIZ_FULL,
92 static struct physmap_flash_data ap325rxa_nor_flash_data = {
94 .parts = ap325rxa_nor_flash_partitions,
95 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
98 static struct resource ap325rxa_nor_flash_resources[] = {
103 .flags = IORESOURCE_MEM,
107 static struct platform_device ap325rxa_nor_flash_device = {
108 .name = "physmap-flash",
109 .resource = ap325rxa_nor_flash_resources,
110 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
112 .platform_data = &ap325rxa_nor_flash_data,
116 static struct mtd_partition nand_partition_info[] = {
120 .size = MTDPART_SIZ_FULL,
124 static struct resource nand_flash_resources[] = {
128 .flags = IORESOURCE_MEM,
132 static struct sh_flctl_platform_data nand_flash_data = {
133 .parts = nand_partition_info,
134 .nr_parts = ARRAY_SIZE(nand_partition_info),
135 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
139 static struct platform_device nand_flash_device = {
141 .resource = nand_flash_resources,
142 .num_resources = ARRAY_SIZE(nand_flash_resources),
144 .platform_data = &nand_flash_data,
148 #define FPGA_LCDREG 0xB4100180
149 #define FPGA_BKLREG 0xB4100212
150 #define FPGA_LCDREG_VAL 0x0018
151 #define PORT_MSELCRB 0xA4050182
152 #define PORT_HIZCRC 0xA405015C
153 #define PORT_DRVCRA 0xA405018A
154 #define PORT_DRVCRB 0xA405018C
156 static void ap320_wvga_power_on(void *board_data)
160 /* ASD AP-320/325 LCD ON */
161 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
164 gpio_set_value(GPIO_PTS3, 0);
165 ctrl_outw(0x100, FPGA_BKLREG);
168 static void ap320_wvga_power_off(void *board_data)
171 ctrl_outw(0, FPGA_BKLREG);
172 gpio_set_value(GPIO_PTS3, 1);
174 /* ASD AP-320/325 LCD OFF */
175 ctrl_outw(0, FPGA_LCDREG);
178 static struct sh_mobile_lcdc_info lcdc_info = {
179 .clock_source = LCDC_CLK_EXTERNAL,
181 .chan = LCDC_CHAN_MAINLCD,
183 .interface_type = RGB18,
195 .sync = 0, /* hsync and vsync are active low */
197 .lcd_size_cfg = { /* 7.0 inch */
202 .display_on = ap320_wvga_power_on,
203 .display_off = ap320_wvga_power_off,
208 static struct resource lcdc_resources[] = {
211 .start = 0xfe940000, /* P4-only space */
213 .flags = IORESOURCE_MEM,
217 .flags = IORESOURCE_IRQ,
221 static struct platform_device lcdc_device = {
222 .name = "sh_mobile_lcdc_fb",
223 .num_resources = ARRAY_SIZE(lcdc_resources),
224 .resource = lcdc_resources,
226 .platform_data = &lcdc_info,
229 .hwblk_id = HWBLK_LCDC,
233 static void camera_power(int val)
235 gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
240 /* support for the old ncm03j camera */
241 static unsigned char camera_ncm03j_magic[] =
243 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
244 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
245 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
246 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
247 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
248 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
249 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
250 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
251 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
252 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
253 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
254 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
255 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
256 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
257 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
258 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
261 static int camera_probe(void)
263 struct i2c_adapter *a = i2c_get_adapter(0);
272 msg.buf = camera_ncm03j_magic;
275 ret = i2c_transfer(a, &msg, 1);
281 static int camera_set_capture(struct soc_camera_platform_info *info,
284 struct i2c_adapter *a = i2c_get_adapter(0);
291 return 0; /* no disable for now */
294 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
302 buf[0] = camera_ncm03j_magic[i];
303 buf[1] = camera_ncm03j_magic[i + 1];
305 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
311 static int ap325rxa_camera_add(struct soc_camera_link *icl, struct device *dev);
312 static void ap325rxa_camera_del(struct soc_camera_link *icl);
314 static struct soc_camera_platform_info camera_info = {
315 .format_name = "UYVY",
318 .pixelformat = V4L2_PIX_FMT_UYVY,
319 .colorspace = V4L2_COLORSPACE_SMPTE170M,
323 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
324 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
325 .set_capture = camera_set_capture,
328 .add_device = ap325rxa_camera_add,
329 .del_device = ap325rxa_camera_del,
330 .module_name = "soc_camera_platform",
334 static void dummy_release(struct device *dev)
338 static struct platform_device camera_device = {
339 .name = "soc_camera_platform",
341 .platform_data = &camera_info,
342 .release = dummy_release,
346 static int ap325rxa_camera_add(struct soc_camera_link *icl,
349 if (icl != &camera_info.link || camera_probe() <= 0)
352 camera_info.dev = dev;
354 return platform_device_register(&camera_device);
357 static void ap325rxa_camera_del(struct soc_camera_link *icl)
359 if (icl != &camera_info.link)
362 platform_device_unregister(&camera_device);
363 memset(&camera_device.dev.kobj, 0,
364 sizeof(camera_device.dev.kobj));
366 #endif /* CONFIG_I2C */
368 static int ov7725_power(struct device *dev, int mode)
377 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
378 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
381 static struct resource ceu_resources[] = {
386 .flags = IORESOURCE_MEM,
390 .flags = IORESOURCE_IRQ,
393 /* place holder for contiguous memory */
397 static struct platform_device ceu_device = {
398 .name = "sh_mobile_ceu",
399 .id = 0, /* "ceu0" clock */
400 .num_resources = ARRAY_SIZE(ceu_resources),
401 .resource = ceu_resources,
403 .platform_data = &sh_mobile_ceu_info,
406 .hwblk_id = HWBLK_CEU,
410 static struct resource sdhi0_cn3_resources[] = {
415 .flags = IORESOURCE_MEM,
419 .flags = IORESOURCE_IRQ,
423 static struct platform_device sdhi0_cn3_device = {
424 .name = "sh_mobile_sdhi",
425 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
426 .resource = sdhi0_cn3_resources,
428 .hwblk_id = HWBLK_SDHI0,
432 static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
434 I2C_BOARD_INFO("pcf8563", 0x51),
438 static struct i2c_board_info ap325rxa_i2c_camera[] = {
440 I2C_BOARD_INFO("ov772x", 0x21),
444 static struct ov772x_camera_info ov7725_info = {
445 .buswidth = SOCAM_DATAWIDTH_8,
446 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
447 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
450 .power = ov7725_power,
451 .board_info = &ap325rxa_i2c_camera[0],
453 .module_name = "ov772x",
457 static struct platform_device ap325rxa_camera[] = {
459 .name = "soc-camera-pdrv",
462 .platform_data = &ov7725_info.link,
465 .name = "soc-camera-pdrv",
468 .platform_data = &camera_info.link,
473 static struct platform_device *ap325rxa_devices[] __initdata = {
475 &ap325rxa_nor_flash_device,
484 static int __init ap325rxa_devices_setup(void)
486 /* LD3 and LD4 LEDs */
487 gpio_request(GPIO_PTX5, NULL); /* RUN */
488 gpio_direction_output(GPIO_PTX5, 1);
489 gpio_export(GPIO_PTX5, 0);
491 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
492 gpio_direction_output(GPIO_PTX4, 0);
493 gpio_export(GPIO_PTX4, 0);
496 gpio_request(GPIO_PTF7, NULL); /* MODE */
497 gpio_direction_input(GPIO_PTF7);
498 gpio_export(GPIO_PTF7, 0);
501 gpio_request(GPIO_FN_LCDD15, NULL);
502 gpio_request(GPIO_FN_LCDD14, NULL);
503 gpio_request(GPIO_FN_LCDD13, NULL);
504 gpio_request(GPIO_FN_LCDD12, NULL);
505 gpio_request(GPIO_FN_LCDD11, NULL);
506 gpio_request(GPIO_FN_LCDD10, NULL);
507 gpio_request(GPIO_FN_LCDD9, NULL);
508 gpio_request(GPIO_FN_LCDD8, NULL);
509 gpio_request(GPIO_FN_LCDD7, NULL);
510 gpio_request(GPIO_FN_LCDD6, NULL);
511 gpio_request(GPIO_FN_LCDD5, NULL);
512 gpio_request(GPIO_FN_LCDD4, NULL);
513 gpio_request(GPIO_FN_LCDD3, NULL);
514 gpio_request(GPIO_FN_LCDD2, NULL);
515 gpio_request(GPIO_FN_LCDD1, NULL);
516 gpio_request(GPIO_FN_LCDD0, NULL);
517 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
518 gpio_request(GPIO_FN_LCDDCK, NULL);
519 gpio_request(GPIO_FN_LCDVEPWC, NULL);
520 gpio_request(GPIO_FN_LCDVCPWC, NULL);
521 gpio_request(GPIO_FN_LCDVSYN, NULL);
522 gpio_request(GPIO_FN_LCDHSYN, NULL);
523 gpio_request(GPIO_FN_LCDDISP, NULL);
524 gpio_request(GPIO_FN_LCDDON, NULL);
527 gpio_request(GPIO_PTS3, NULL);
528 gpio_direction_output(GPIO_PTS3, 1);
531 gpio_request(GPIO_FN_VIO_CLK2, NULL);
532 gpio_request(GPIO_FN_VIO_VD2, NULL);
533 gpio_request(GPIO_FN_VIO_HD2, NULL);
534 gpio_request(GPIO_FN_VIO_FLD, NULL);
535 gpio_request(GPIO_FN_VIO_CKO, NULL);
536 gpio_request(GPIO_FN_VIO_D15, NULL);
537 gpio_request(GPIO_FN_VIO_D14, NULL);
538 gpio_request(GPIO_FN_VIO_D13, NULL);
539 gpio_request(GPIO_FN_VIO_D12, NULL);
540 gpio_request(GPIO_FN_VIO_D11, NULL);
541 gpio_request(GPIO_FN_VIO_D10, NULL);
542 gpio_request(GPIO_FN_VIO_D9, NULL);
543 gpio_request(GPIO_FN_VIO_D8, NULL);
545 gpio_request(GPIO_PTZ7, NULL);
546 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
547 gpio_request(GPIO_PTZ6, NULL);
548 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
549 gpio_request(GPIO_PTZ5, NULL);
550 gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
551 gpio_request(GPIO_PTZ4, NULL);
552 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
554 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
557 gpio_request(GPIO_FN_FCE, NULL);
558 gpio_request(GPIO_FN_NAF7, NULL);
559 gpio_request(GPIO_FN_NAF6, NULL);
560 gpio_request(GPIO_FN_NAF5, NULL);
561 gpio_request(GPIO_FN_NAF4, NULL);
562 gpio_request(GPIO_FN_NAF3, NULL);
563 gpio_request(GPIO_FN_NAF2, NULL);
564 gpio_request(GPIO_FN_NAF1, NULL);
565 gpio_request(GPIO_FN_NAF0, NULL);
566 gpio_request(GPIO_FN_FCDE, NULL);
567 gpio_request(GPIO_FN_FOE, NULL);
568 gpio_request(GPIO_FN_FSC, NULL);
569 gpio_request(GPIO_FN_FWE, NULL);
570 gpio_request(GPIO_FN_FRB, NULL);
572 ctrl_outw(0, PORT_HIZCRC);
573 ctrl_outw(0xFFFF, PORT_DRVCRA);
574 ctrl_outw(0xFFFF, PORT_DRVCRB);
576 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
579 gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
580 gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
581 gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
582 gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
583 gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
584 gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
585 gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
586 gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
588 i2c_register_board_info(0, ap325rxa_i2c_devices,
589 ARRAY_SIZE(ap325rxa_i2c_devices));
591 return platform_add_devices(ap325rxa_devices,
592 ARRAY_SIZE(ap325rxa_devices));
594 arch_initcall(ap325rxa_devices_setup);
596 /* Return the board specific boot mode pin configuration */
597 static int ap325rxa_mode_pins(void)
599 /* MD0=0, MD1=0, MD2=0: Clock Mode 0
600 * MD3=0: 16-bit Area0 Bus Width
601 * MD5=1: Little Endian
602 * TSTMD=1, MD8=1: Test Mode Disabled
604 return MODE_PIN5 | MODE_PIN8;
607 static struct sh_machine_vector mv_ap325rxa __initmv = {
608 .mv_name = "AP-325RXA",
609 .mv_mode_pins = ap325rxa_mode_pins,