2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
15 #define KMSG_COMPONENT "time"
16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/sysdev.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
37 #include <linux/clocksource.h>
38 #include <linux/clockchips.h>
39 #include <asm/uaccess.h>
40 #include <asm/delay.h>
41 #include <asm/s390_ext.h>
42 #include <asm/div64.h>
45 #include <asm/irq_regs.h>
46 #include <asm/timer.h>
50 /* change this if you have some constant time drift */
51 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
52 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
55 * Create a small time difference between the timer interrupts
56 * on the different cpus to avoid lock contention.
58 #define CPU_DEVIATION (smp_processor_id() << 12)
60 #define TICK_SIZE tick
62 u64 sched_clock_base_cc = -1; /* Force to data section. */
64 static DEFINE_PER_CPU(struct clock_event_device, comparators);
67 * Scheduler clock - returns current time in nanosec units.
69 unsigned long long notrace sched_clock(void)
71 return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
75 * Monotonic_clock - returns # of nanoseconds passed since time_init()
77 unsigned long long monotonic_clock(void)
81 EXPORT_SYMBOL(monotonic_clock);
83 void tod_to_timeval(__u64 todval, struct timespec *xtime)
85 unsigned long long sec;
90 todval -= (sec * 1000000) << 12;
91 xtime->tv_nsec = ((todval * 1000) >> 12);
94 void clock_comparator_work(void)
96 struct clock_event_device *cd;
98 S390_lowcore.clock_comparator = -1ULL;
99 set_clock_comparator(S390_lowcore.clock_comparator);
100 cd = &__get_cpu_var(comparators);
101 cd->event_handler(cd);
105 * Fixup the clock comparator.
107 static void fixup_clock_comparator(unsigned long long delta)
109 /* If nobody is waiting there's nothing to fix. */
110 if (S390_lowcore.clock_comparator == -1ULL)
112 S390_lowcore.clock_comparator += delta;
113 set_clock_comparator(S390_lowcore.clock_comparator);
116 static int s390_next_event(unsigned long delta,
117 struct clock_event_device *evt)
119 S390_lowcore.clock_comparator = get_clock() + delta;
120 set_clock_comparator(S390_lowcore.clock_comparator);
124 static void s390_set_mode(enum clock_event_mode mode,
125 struct clock_event_device *evt)
130 * Set up lowcore and control register of the current cpu to
131 * enable TOD clock and clock comparator interrupts.
133 void init_cpu_timer(void)
135 struct clock_event_device *cd;
138 S390_lowcore.clock_comparator = -1ULL;
139 set_clock_comparator(S390_lowcore.clock_comparator);
141 cpu = smp_processor_id();
142 cd = &per_cpu(comparators, cpu);
143 cd->name = "comparator";
144 cd->features = CLOCK_EVT_FEAT_ONESHOT;
147 cd->min_delta_ns = 1;
148 cd->max_delta_ns = LONG_MAX;
150 cd->cpumask = cpumask_of(cpu);
151 cd->set_next_event = s390_next_event;
152 cd->set_mode = s390_set_mode;
154 clockevents_register_device(cd);
156 /* Enable clock comparator timer interrupt. */
159 /* Always allow the timing alert external interrupt. */
163 static void clock_comparator_interrupt(__u16 code)
165 if (S390_lowcore.clock_comparator == -1ULL)
166 set_clock_comparator(S390_lowcore.clock_comparator);
169 static void etr_timing_alert(struct etr_irq_parm *);
170 static void stp_timing_alert(struct stp_irq_parm *);
172 static void timing_alert_interrupt(__u16 code)
174 if (S390_lowcore.ext_params & 0x00c40000)
175 etr_timing_alert((struct etr_irq_parm *)
176 &S390_lowcore.ext_params);
177 if (S390_lowcore.ext_params & 0x00038000)
178 stp_timing_alert((struct stp_irq_parm *)
179 &S390_lowcore.ext_params);
182 static void etr_reset(void);
183 static void stp_reset(void);
185 unsigned long read_persistent_clock(void)
189 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
193 static cycle_t read_tod_clock(struct clocksource *cs)
198 static struct clocksource clocksource_tod = {
201 .read = read_tod_clock,
205 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
208 struct clocksource * __init clocksource_default_clock(void)
210 return &clocksource_tod;
213 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
215 if (clock != &clocksource_tod)
218 /* Make userspace gettimeofday spin until we're done. */
219 ++vdso_data->tb_update_count;
221 vdso_data->xtime_tod_stamp = clock->cycle_last;
222 vdso_data->xtime_clock_sec = xtime.tv_sec;
223 vdso_data->xtime_clock_nsec = xtime.tv_nsec;
224 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
225 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
227 ++vdso_data->tb_update_count;
230 extern struct timezone sys_tz;
232 void update_vsyscall_tz(void)
234 /* Make userspace gettimeofday spin until we're done. */
235 ++vdso_data->tb_update_count;
237 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
238 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
240 ++vdso_data->tb_update_count;
244 * Initialize the TOD clock and the CPU timer of
247 void __init time_init(void)
253 /* Reset time synchronization interfaces. */
257 /* request the clock comparator external interrupt */
258 if (register_external_interrupt(0x1004, clock_comparator_interrupt))
259 panic("Couldn't request external interrupt 0x1004");
261 /* request the timing alert external interrupt */
262 if (register_external_interrupt(0x1406, timing_alert_interrupt))
263 panic("Couldn't request external interrupt 0x1406");
265 if (clocksource_register(&clocksource_tod) != 0)
266 panic("Could not register TOD clock source");
269 * The TOD clock is an accurate clock. The xtime should be
270 * initialized in a way that the difference between TOD and
271 * xtime is reasonably small. Too bad that timekeeping_init
272 * sets xtime.tv_nsec to zero. In addition the clock source
273 * change from the jiffies clock source to the TOD clock
274 * source add another error of up to 1/HZ second. The same
275 * function sets wall_to_monotonic to a value that is too
276 * small for /proc/uptime to be accurate.
277 * Reset xtime and wall_to_monotonic to sane values.
279 write_seqlock_irqsave(&xtime_lock, flags);
281 tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
282 clocksource_tod.cycle_last = now;
283 clocksource_tod.raw_time = xtime;
284 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
285 set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
286 write_sequnlock_irqrestore(&xtime_lock, flags);
288 /* Enable TOD clock interrupts on the boot cpu. */
291 /* Enable cpu timer interrupts on the boot cpu. */
296 * The time is "clock". old is what we think the time is.
297 * Adjust the value by a multiple of jiffies and add the delta to ntp.
298 * "delay" is an approximation how long the synchronization took. If
299 * the time correction is positive, then "delay" is subtracted from
300 * the time difference and only the remaining part is passed to ntp.
302 static unsigned long long adjust_time(unsigned long long old,
303 unsigned long long clock,
304 unsigned long long delay)
306 unsigned long long delta, ticks;
310 /* It is later than we thought. */
311 delta = ticks = clock - old;
312 delta = ticks = (delta < delay) ? 0 : delta - delay;
313 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
314 adjust.offset = ticks * (1000000 / HZ);
316 /* It is earlier than we thought. */
317 delta = ticks = old - clock;
318 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
320 adjust.offset = -ticks * (1000000 / HZ);
322 sched_clock_base_cc += delta;
323 if (adjust.offset != 0) {
324 pr_notice("The ETR interface has adjusted the clock "
325 "by %li microseconds\n", adjust.offset);
326 adjust.modes = ADJ_OFFSET_SINGLESHOT;
327 do_adjtimex(&adjust);
332 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
333 static DEFINE_MUTEX(clock_sync_mutex);
334 static unsigned long clock_sync_flags;
336 #define CLOCK_SYNC_HAS_ETR 0
337 #define CLOCK_SYNC_HAS_STP 1
338 #define CLOCK_SYNC_ETR 2
339 #define CLOCK_SYNC_STP 3
342 * The synchronous get_clock function. It will write the current clock
343 * value to the clock pointer and return 0 if the clock is in sync with
344 * the external time source. If the clock mode is local it will return
345 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
348 int get_sync_clock(unsigned long long *clock)
351 unsigned int sw0, sw1;
353 sw_ptr = &get_cpu_var(clock_sync_word);
354 sw0 = atomic_read(sw_ptr);
355 *clock = get_clock();
356 sw1 = atomic_read(sw_ptr);
357 put_cpu_var(clock_sync_sync);
358 if (sw0 == sw1 && (sw0 & 0x80000000U))
359 /* Success: time is in sync. */
361 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
362 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
364 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
365 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
369 EXPORT_SYMBOL(get_sync_clock);
372 * Make get_sync_clock return -EAGAIN.
374 static void disable_sync_clock(void *dummy)
376 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
378 * Clear the in-sync bit 2^31. All get_sync_clock calls will
379 * fail until the sync bit is turned back on. In addition
380 * increase the "sequence" counter to avoid the race of an
381 * etr event and the complete recovery against get_sync_clock.
383 atomic_clear_mask(0x80000000, sw_ptr);
388 * Make get_sync_clock return 0 again.
389 * Needs to be called from a context disabled for preemption.
391 static void enable_sync_clock(void)
393 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
394 atomic_set_mask(0x80000000, sw_ptr);
398 * Function to check if the clock is in sync.
400 static inline int check_sync_clock(void)
405 sw_ptr = &get_cpu_var(clock_sync_word);
406 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
407 put_cpu_var(clock_sync_sync);
411 /* Single threaded workqueue used for etr and stp sync events */
412 static struct workqueue_struct *time_sync_wq;
414 static void __init time_init_wq(void)
418 time_sync_wq = create_singlethread_workqueue("timesync");
419 stop_machine_create();
423 * External Time Reference (ETR) code.
425 static int etr_port0_online;
426 static int etr_port1_online;
427 static int etr_steai_available;
429 static int __init early_parse_etr(char *p)
431 if (strncmp(p, "off", 3) == 0)
432 etr_port0_online = etr_port1_online = 0;
433 else if (strncmp(p, "port0", 5) == 0)
434 etr_port0_online = 1;
435 else if (strncmp(p, "port1", 5) == 0)
436 etr_port1_online = 1;
437 else if (strncmp(p, "on", 2) == 0)
438 etr_port0_online = etr_port1_online = 1;
441 early_param("etr", early_parse_etr);
444 ETR_EVENT_PORT0_CHANGE,
445 ETR_EVENT_PORT1_CHANGE,
446 ETR_EVENT_PORT_ALERT,
447 ETR_EVENT_SYNC_CHECK,
448 ETR_EVENT_SWITCH_LOCAL,
453 * Valid bit combinations of the eacr register are (x = don't care):
454 * e0 e1 dp p0 p1 ea es sl
455 * 0 0 x 0 0 0 0 0 initial, disabled state
456 * 0 0 x 0 1 1 0 0 port 1 online
457 * 0 0 x 1 0 1 0 0 port 0 online
458 * 0 0 x 1 1 1 0 0 both ports online
459 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
460 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
461 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
462 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
463 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
464 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
465 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
466 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
467 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
468 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
469 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
470 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
471 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
472 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
473 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
474 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
476 static struct etr_eacr etr_eacr;
477 static u64 etr_tolec; /* time of last eacr update */
478 static struct etr_aib etr_port0;
479 static int etr_port0_uptodate;
480 static struct etr_aib etr_port1;
481 static int etr_port1_uptodate;
482 static unsigned long etr_events;
483 static struct timer_list etr_timer;
485 static void etr_timeout(unsigned long dummy);
486 static void etr_work_fn(struct work_struct *work);
487 static DEFINE_MUTEX(etr_work_mutex);
488 static DECLARE_WORK(etr_work, etr_work_fn);
491 * Reset ETR attachment.
493 static void etr_reset(void)
495 etr_eacr = (struct etr_eacr) {
496 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
497 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
499 if (etr_setr(&etr_eacr) == 0) {
500 etr_tolec = get_clock();
501 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
502 if (etr_port0_online && etr_port1_online)
503 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
504 } else if (etr_port0_online || etr_port1_online) {
505 pr_warning("The real or virtual hardware system does "
506 "not provide an ETR interface\n");
507 etr_port0_online = etr_port1_online = 0;
511 static int __init etr_init(void)
515 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
518 /* Check if this machine has the steai instruction. */
519 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
520 etr_steai_available = 1;
521 setup_timer(&etr_timer, etr_timeout, 0UL);
522 if (etr_port0_online) {
523 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
524 queue_work(time_sync_wq, &etr_work);
526 if (etr_port1_online) {
527 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
528 queue_work(time_sync_wq, &etr_work);
533 arch_initcall(etr_init);
536 * Two sorts of ETR machine checks. The architecture reads:
537 * "When a machine-check niterruption occurs and if a switch-to-local or
538 * ETR-sync-check interrupt request is pending but disabled, this pending
539 * disabled interruption request is indicated and is cleared".
540 * Which means that we can get etr_switch_to_local events from the machine
541 * check handler although the interruption condition is disabled. Lovely..
545 * Switch to local machine check. This is called when the last usable
546 * ETR port goes inactive. After switch to local the clock is not in sync.
548 void etr_switch_to_local(void)
552 disable_sync_clock(NULL);
553 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
554 queue_work(time_sync_wq, &etr_work);
558 * ETR sync check machine check. This is called when the ETR OTE and the
559 * local clock OTE are farther apart than the ETR sync check tolerance.
560 * After a ETR sync check the clock is not in sync. The machine check
561 * is broadcasted to all cpus at the same time.
563 void etr_sync_check(void)
567 disable_sync_clock(NULL);
568 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
569 queue_work(time_sync_wq, &etr_work);
573 * ETR timing alert. There are two causes:
574 * 1) port state change, check the usability of the port
575 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
576 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
577 * or ETR-data word 4 (edf4) has changed.
579 static void etr_timing_alert(struct etr_irq_parm *intparm)
582 /* ETR port 0 state change. */
583 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
585 /* ETR port 1 state change. */
586 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
589 * ETR port alert on either port 0, 1 or both.
590 * Both ports are not up-to-date now.
592 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
593 queue_work(time_sync_wq, &etr_work);
596 static void etr_timeout(unsigned long dummy)
598 set_bit(ETR_EVENT_UPDATE, &etr_events);
599 queue_work(time_sync_wq, &etr_work);
603 * Check if the etr mode is pss.
605 static inline int etr_mode_is_pps(struct etr_eacr eacr)
607 return eacr.es && !eacr.sl;
611 * Check if the etr mode is etr.
613 static inline int etr_mode_is_etr(struct etr_eacr eacr)
615 return eacr.es && eacr.sl;
619 * Check if the port can be used for TOD synchronization.
620 * For PPS mode the port has to receive OTEs. For ETR mode
621 * the port has to receive OTEs, the ETR stepping bit has to
622 * be zero and the validity bits for data frame 1, 2, and 3
625 static int etr_port_valid(struct etr_aib *aib, int port)
629 /* Check that this port is receiving OTEs. */
633 psc = port ? aib->esw.psc1 : aib->esw.psc0;
634 if (psc == etr_lpsc_pps_mode)
636 if (psc == etr_lpsc_operational_step)
637 return !aib->esw.y && aib->slsw.v1 &&
638 aib->slsw.v2 && aib->slsw.v3;
643 * Check if two ports are on the same network.
645 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
647 // FIXME: any other fields we have to compare?
648 return aib1->edf1.net_id == aib2->edf1.net_id;
652 * Wrapper for etr_stei that converts physical port states
653 * to logical port states to be consistent with the output
654 * of stetr (see etr_psc vs. etr_lpsc).
656 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
658 BUG_ON(etr_steai(aib, func) != 0);
659 /* Convert port state to logical port state. */
660 if (aib->esw.psc0 == 1)
662 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
664 if (aib->esw.psc1 == 1)
666 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
671 * Check if the aib a2 is still connected to the same attachment as
672 * aib a1, the etv values differ by one and a2 is valid.
674 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
676 int state_a1, state_a2;
678 /* Paranoia check: e0/e1 should better be the same. */
679 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
680 a1->esw.eacr.e1 != a2->esw.eacr.e1)
683 /* Still connected to the same etr ? */
684 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
685 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
686 if (state_a1 == etr_lpsc_operational_step) {
687 if (state_a2 != etr_lpsc_operational_step ||
688 a1->edf1.net_id != a2->edf1.net_id ||
689 a1->edf1.etr_id != a2->edf1.etr_id ||
690 a1->edf1.etr_pn != a2->edf1.etr_pn)
692 } else if (state_a2 != etr_lpsc_pps_mode)
695 /* The ETV value of a2 needs to be ETV of a1 + 1. */
696 if (a1->edf2.etv + 1 != a2->edf2.etv)
699 if (!etr_port_valid(a2, p))
705 struct clock_sync_data {
708 unsigned long long fixup_cc;
710 struct etr_aib *etr_aib;
713 static void clock_sync_cpu(struct clock_sync_data *sync)
715 atomic_dec(&sync->cpus);
718 * This looks like a busy wait loop but it isn't. etr_sync_cpus
719 * is called on all other cpus while the TOD clocks is stopped.
720 * __udelay will stop the cpu on an enabled wait psw until the
721 * TOD is running again.
723 while (sync->in_sync == 0) {
726 * A different cpu changes *in_sync. Therefore use
727 * barrier() to force memory access.
731 if (sync->in_sync != 1)
732 /* Didn't work. Clear per-cpu in sync bit again. */
733 disable_sync_clock(NULL);
735 * This round of TOD syncing is done. Set the clock comparator
736 * to the next tick and let the processor continue.
738 fixup_clock_comparator(sync->fixup_cc);
742 * Sync the TOD clock using the port refered to by aibp. This port
743 * has to be enabled and the other port has to be disabled. The
744 * last eacr update has to be more than 1.6 seconds in the past.
746 static int etr_sync_clock(void *data)
749 unsigned long long clock, old_clock, delay, delta;
750 struct clock_sync_data *etr_sync;
751 struct etr_aib *sync_port, *aib;
757 if (xchg(&first, 1) == 1) {
759 clock_sync_cpu(etr_sync);
763 /* Wait until all other cpus entered the sync function. */
764 while (atomic_read(&etr_sync->cpus) != 0)
767 port = etr_sync->etr_port;
768 aib = etr_sync->etr_aib;
769 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
772 /* Set clock to next OTE. */
773 __ctl_set_bit(14, 21);
774 __ctl_set_bit(0, 29);
775 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
776 old_clock = get_clock();
777 if (set_clock(clock) == 0) {
778 __udelay(1); /* Wait for the clock to start. */
779 __ctl_clear_bit(0, 29);
780 __ctl_clear_bit(14, 21);
782 /* Adjust Linux timing variables. */
783 delay = (unsigned long long)
784 (aib->edf2.etv - sync_port->edf2.etv) << 32;
785 delta = adjust_time(old_clock, clock, delay);
786 etr_sync->fixup_cc = delta;
787 fixup_clock_comparator(delta);
788 /* Verify that the clock is properly set. */
789 if (!etr_aib_follows(sync_port, aib, port)) {
791 disable_sync_clock(NULL);
792 etr_sync->in_sync = -EAGAIN;
795 etr_sync->in_sync = 1;
799 /* Could not set the clock ?!? */
800 __ctl_clear_bit(0, 29);
801 __ctl_clear_bit(14, 21);
802 disable_sync_clock(NULL);
803 etr_sync->in_sync = -EAGAIN;
810 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
812 struct clock_sync_data etr_sync;
813 struct etr_aib *sync_port;
817 /* Check if the current aib is adjacent to the sync port aib. */
818 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
819 follows = etr_aib_follows(sync_port, aib, port);
820 memcpy(sync_port, aib, sizeof(*aib));
823 memset(&etr_sync, 0, sizeof(etr_sync));
824 etr_sync.etr_aib = aib;
825 etr_sync.etr_port = port;
827 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
828 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
834 * Handle the immediate effects of the different events.
835 * The port change event is used for online/offline changes.
837 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
839 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
841 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
842 eacr.es = eacr.sl = 0;
843 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
844 etr_port0_uptodate = etr_port1_uptodate = 0;
846 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
849 * Port change of an enabled port. We have to
850 * assume that this can have caused an stepping
853 etr_tolec = get_clock();
854 eacr.p0 = etr_port0_online;
857 etr_port0_uptodate = 0;
859 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
862 * Port change of an enabled port. We have to
863 * assume that this can have caused an stepping
866 etr_tolec = get_clock();
867 eacr.p1 = etr_port1_online;
870 etr_port1_uptodate = 0;
872 clear_bit(ETR_EVENT_UPDATE, &etr_events);
877 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
878 * one of the ports needs an update.
880 static void etr_set_tolec_timeout(unsigned long long now)
882 unsigned long micros;
884 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
885 (!etr_eacr.p1 || etr_port1_uptodate))
887 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
888 micros = (micros > 1600000) ? 0 : 1600000 - micros;
889 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
893 * Set up a time that expires after 1/2 second.
895 static void etr_set_sync_timeout(void)
897 mod_timer(&etr_timer, jiffies + HZ/2);
901 * Update the aib information for one or both ports.
903 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
904 struct etr_eacr eacr)
906 /* With both ports disabled the aib information is useless. */
907 if (!eacr.e0 && !eacr.e1)
910 /* Update port0 or port1 with aib stored in etr_work_fn. */
911 if (aib->esw.q == 0) {
912 /* Information for port 0 stored. */
913 if (eacr.p0 && !etr_port0_uptodate) {
915 if (etr_port0_online)
916 etr_port0_uptodate = 1;
919 /* Information for port 1 stored. */
920 if (eacr.p1 && !etr_port1_uptodate) {
922 if (etr_port0_online)
923 etr_port1_uptodate = 1;
928 * Do not try to get the alternate port aib if the clock
929 * is not in sync yet.
931 if (!check_sync_clock())
935 * If steai is available we can get the information about
936 * the other port immediately. If only stetr is available the
937 * data-port bit toggle has to be used.
939 if (etr_steai_available) {
940 if (eacr.p0 && !etr_port0_uptodate) {
941 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
942 etr_port0_uptodate = 1;
944 if (eacr.p1 && !etr_port1_uptodate) {
945 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
946 etr_port1_uptodate = 1;
950 * One port was updated above, if the other
951 * port is not uptodate toggle dp bit.
953 if ((eacr.p0 && !etr_port0_uptodate) ||
954 (eacr.p1 && !etr_port1_uptodate))
963 * Write new etr control register if it differs from the current one.
964 * Return 1 if etr_tolec has been updated as well.
966 static void etr_update_eacr(struct etr_eacr eacr)
970 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
971 /* No change, return. */
974 * The disable of an active port of the change of the data port
975 * bit can/will cause a change in the data port.
977 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
978 (etr_eacr.dp ^ eacr.dp) != 0;
982 etr_tolec = get_clock();
986 * ETR work. In this function you'll find the main logic. In
987 * particular this is the only function that calls etr_update_eacr(),
988 * it "controls" the etr control register.
990 static void etr_work_fn(struct work_struct *work)
992 unsigned long long now;
993 struct etr_eacr eacr;
997 /* prevent multiple execution. */
998 mutex_lock(&etr_work_mutex);
1000 /* Create working copy of etr_eacr. */
1003 /* Check for the different events and their immediate effects. */
1004 eacr = etr_handle_events(eacr);
1006 /* Check if ETR is supposed to be active. */
1007 eacr.ea = eacr.p0 || eacr.p1;
1009 /* Both ports offline. Reset everything. */
1010 eacr.dp = eacr.es = eacr.sl = 0;
1011 on_each_cpu(disable_sync_clock, NULL, 1);
1012 del_timer_sync(&etr_timer);
1013 etr_update_eacr(eacr);
1017 /* Store aib to get the current ETR status word. */
1018 BUG_ON(etr_stetr(&aib) != 0);
1019 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1023 * Update the port information if the last stepping port change
1024 * or data port change is older than 1.6 seconds.
1026 if (now >= etr_tolec + (1600000 << 12))
1027 eacr = etr_handle_update(&aib, eacr);
1030 * Select ports to enable. The prefered synchronization mode is PPS.
1031 * If a port can be enabled depends on a number of things:
1032 * 1) The port needs to be online and uptodate. A port is not
1033 * disabled just because it is not uptodate, but it is only
1034 * enabled if it is uptodate.
1035 * 2) The port needs to have the same mode (pps / etr).
1036 * 3) The port needs to be usable -> etr_port_valid() == 1
1037 * 4) To enable the second port the clock needs to be in sync.
1038 * 5) If both ports are useable and are ETR ports, the network id
1039 * has to be the same.
1040 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1042 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1045 if (!etr_mode_is_pps(etr_eacr))
1047 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1049 // FIXME: uptodate checks ?
1050 else if (etr_port0_uptodate && etr_port1_uptodate)
1052 sync_port = (etr_port0_uptodate &&
1053 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1054 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1058 if (!etr_mode_is_pps(etr_eacr))
1060 sync_port = (etr_port1_uptodate &&
1061 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1062 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1065 if (!etr_mode_is_etr(etr_eacr))
1067 if (!eacr.es || !eacr.p1 ||
1068 aib.esw.psc1 != etr_lpsc_operational_alt)
1070 else if (etr_port0_uptodate && etr_port1_uptodate &&
1071 etr_compare_network(&etr_port0, &etr_port1))
1073 sync_port = (etr_port0_uptodate &&
1074 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1075 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1079 if (!etr_mode_is_etr(etr_eacr))
1081 sync_port = (etr_port1_uptodate &&
1082 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1084 /* Both ports not usable. */
1085 eacr.es = eacr.sl = 0;
1090 * If the clock is in sync just update the eacr and return.
1091 * If there is no valid sync port wait for a port update.
1093 if (check_sync_clock() || sync_port < 0) {
1094 etr_update_eacr(eacr);
1095 etr_set_tolec_timeout(now);
1100 * Prepare control register for clock syncing
1101 * (reset data port bit, set sync check control.
1107 * Update eacr and try to synchronize the clock. If the update
1108 * of eacr caused a stepping port switch (or if we have to
1109 * assume that a stepping port switch has occured) or the
1110 * clock syncing failed, reset the sync check control bit
1111 * and set up a timer to try again after 0.5 seconds
1113 etr_update_eacr(eacr);
1114 if (now < etr_tolec + (1600000 << 12) ||
1115 etr_sync_clock_stop(&aib, sync_port) != 0) {
1116 /* Sync failed. Try again in 1/2 second. */
1118 etr_update_eacr(eacr);
1119 etr_set_sync_timeout();
1121 etr_set_tolec_timeout(now);
1123 mutex_unlock(&etr_work_mutex);
1127 * Sysfs interface functions
1129 static struct sysdev_class etr_sysclass = {
1133 static struct sys_device etr_port0_dev = {
1135 .cls = &etr_sysclass,
1138 static struct sys_device etr_port1_dev = {
1140 .cls = &etr_sysclass,
1144 * ETR class attributes
1146 static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1148 return sprintf(buf, "%i\n", etr_port0.esw.p);
1151 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1153 static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1157 if (etr_mode_is_pps(etr_eacr))
1159 else if (etr_mode_is_etr(etr_eacr))
1163 return sprintf(buf, "%s\n", mode_str);
1166 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1169 * ETR port attributes
1171 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1173 if (dev == &etr_port0_dev)
1174 return etr_port0_online ? &etr_port0 : NULL;
1176 return etr_port1_online ? &etr_port1 : NULL;
1179 static ssize_t etr_online_show(struct sys_device *dev,
1180 struct sysdev_attribute *attr,
1183 unsigned int online;
1185 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1186 return sprintf(buf, "%i\n", online);
1189 static ssize_t etr_online_store(struct sys_device *dev,
1190 struct sysdev_attribute *attr,
1191 const char *buf, size_t count)
1195 value = simple_strtoul(buf, NULL, 0);
1196 if (value != 0 && value != 1)
1198 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1200 mutex_lock(&clock_sync_mutex);
1201 if (dev == &etr_port0_dev) {
1202 if (etr_port0_online == value)
1203 goto out; /* Nothing to do. */
1204 etr_port0_online = value;
1205 if (etr_port0_online && etr_port1_online)
1206 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1208 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1209 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1210 queue_work(time_sync_wq, &etr_work);
1212 if (etr_port1_online == value)
1213 goto out; /* Nothing to do. */
1214 etr_port1_online = value;
1215 if (etr_port0_online && etr_port1_online)
1216 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1218 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1219 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1220 queue_work(time_sync_wq, &etr_work);
1223 mutex_unlock(&clock_sync_mutex);
1227 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1229 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1230 struct sysdev_attribute *attr,
1233 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1234 etr_eacr.e0 : etr_eacr.e1);
1237 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1239 static ssize_t etr_mode_code_show(struct sys_device *dev,
1240 struct sysdev_attribute *attr, char *buf)
1242 if (!etr_port0_online && !etr_port1_online)
1243 /* Status word is not uptodate if both ports are offline. */
1245 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1246 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1249 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1251 static ssize_t etr_untuned_show(struct sys_device *dev,
1252 struct sysdev_attribute *attr, char *buf)
1254 struct etr_aib *aib = etr_aib_from_dev(dev);
1256 if (!aib || !aib->slsw.v1)
1258 return sprintf(buf, "%i\n", aib->edf1.u);
1261 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1263 static ssize_t etr_network_id_show(struct sys_device *dev,
1264 struct sysdev_attribute *attr, char *buf)
1266 struct etr_aib *aib = etr_aib_from_dev(dev);
1268 if (!aib || !aib->slsw.v1)
1270 return sprintf(buf, "%i\n", aib->edf1.net_id);
1273 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1275 static ssize_t etr_id_show(struct sys_device *dev,
1276 struct sysdev_attribute *attr, char *buf)
1278 struct etr_aib *aib = etr_aib_from_dev(dev);
1280 if (!aib || !aib->slsw.v1)
1282 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1285 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1287 static ssize_t etr_port_number_show(struct sys_device *dev,
1288 struct sysdev_attribute *attr, char *buf)
1290 struct etr_aib *aib = etr_aib_from_dev(dev);
1292 if (!aib || !aib->slsw.v1)
1294 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1297 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1299 static ssize_t etr_coupled_show(struct sys_device *dev,
1300 struct sysdev_attribute *attr, char *buf)
1302 struct etr_aib *aib = etr_aib_from_dev(dev);
1304 if (!aib || !aib->slsw.v3)
1306 return sprintf(buf, "%i\n", aib->edf3.c);
1309 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1311 static ssize_t etr_local_time_show(struct sys_device *dev,
1312 struct sysdev_attribute *attr, char *buf)
1314 struct etr_aib *aib = etr_aib_from_dev(dev);
1316 if (!aib || !aib->slsw.v3)
1318 return sprintf(buf, "%i\n", aib->edf3.blto);
1321 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1323 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1324 struct sysdev_attribute *attr, char *buf)
1326 struct etr_aib *aib = etr_aib_from_dev(dev);
1328 if (!aib || !aib->slsw.v3)
1330 return sprintf(buf, "%i\n", aib->edf3.buo);
1333 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1335 static struct sysdev_attribute *etr_port_attributes[] = {
1337 &attr_stepping_control,
1349 static int __init etr_register_port(struct sys_device *dev)
1351 struct sysdev_attribute **attr;
1354 rc = sysdev_register(dev);
1357 for (attr = etr_port_attributes; *attr; attr++) {
1358 rc = sysdev_create_file(dev, *attr);
1364 for (; attr >= etr_port_attributes; attr--)
1365 sysdev_remove_file(dev, *attr);
1366 sysdev_unregister(dev);
1371 static void __init etr_unregister_port(struct sys_device *dev)
1373 struct sysdev_attribute **attr;
1375 for (attr = etr_port_attributes; *attr; attr++)
1376 sysdev_remove_file(dev, *attr);
1377 sysdev_unregister(dev);
1380 static int __init etr_init_sysfs(void)
1384 rc = sysdev_class_register(&etr_sysclass);
1387 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1389 goto out_unreg_class;
1390 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1392 goto out_remove_stepping_port;
1393 rc = etr_register_port(&etr_port0_dev);
1395 goto out_remove_stepping_mode;
1396 rc = etr_register_port(&etr_port1_dev);
1398 goto out_remove_port0;
1402 etr_unregister_port(&etr_port0_dev);
1403 out_remove_stepping_mode:
1404 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1405 out_remove_stepping_port:
1406 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1408 sysdev_class_unregister(&etr_sysclass);
1413 device_initcall(etr_init_sysfs);
1416 * Server Time Protocol (STP) code.
1418 static int stp_online;
1419 static struct stp_sstpi stp_info;
1420 static void *stp_page;
1422 static void stp_work_fn(struct work_struct *work);
1423 static DEFINE_MUTEX(stp_work_mutex);
1424 static DECLARE_WORK(stp_work, stp_work_fn);
1425 static struct timer_list stp_timer;
1427 static int __init early_parse_stp(char *p)
1429 if (strncmp(p, "off", 3) == 0)
1431 else if (strncmp(p, "on", 2) == 0)
1435 early_param("stp", early_parse_stp);
1438 * Reset STP attachment.
1440 static void __init stp_reset(void)
1444 stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1445 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1447 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1448 else if (stp_online) {
1449 pr_warning("The real or virtual hardware system does "
1450 "not provide an STP interface\n");
1451 free_page((unsigned long) stp_page);
1457 static void stp_timeout(unsigned long dummy)
1459 queue_work(time_sync_wq, &stp_work);
1462 static int __init stp_init(void)
1464 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1466 setup_timer(&stp_timer, stp_timeout, 0UL);
1470 queue_work(time_sync_wq, &stp_work);
1474 arch_initcall(stp_init);
1477 * STP timing alert. There are three causes:
1478 * 1) timing status change
1479 * 2) link availability change
1480 * 3) time control parameter change
1481 * In all three cases we are only interested in the clock source state.
1482 * If a STP clock source is now available use it.
1484 static void stp_timing_alert(struct stp_irq_parm *intparm)
1486 if (intparm->tsc || intparm->lac || intparm->tcpc)
1487 queue_work(time_sync_wq, &stp_work);
1491 * STP sync check machine check. This is called when the timing state
1492 * changes from the synchronized state to the unsynchronized state.
1493 * After a STP sync check the clock is not in sync. The machine check
1494 * is broadcasted to all cpus at the same time.
1496 void stp_sync_check(void)
1498 disable_sync_clock(NULL);
1499 queue_work(time_sync_wq, &stp_work);
1503 * STP island condition machine check. This is called when an attached
1504 * server attempts to communicate over an STP link and the servers
1505 * have matching CTN ids and have a valid stratum-1 configuration
1506 * but the configurations do not match.
1508 void stp_island_check(void)
1510 disable_sync_clock(NULL);
1511 queue_work(time_sync_wq, &stp_work);
1515 static int stp_sync_clock(void *data)
1518 unsigned long long old_clock, delta;
1519 struct clock_sync_data *stp_sync;
1524 if (xchg(&first, 1) == 1) {
1526 clock_sync_cpu(stp_sync);
1530 /* Wait until all other cpus entered the sync function. */
1531 while (atomic_read(&stp_sync->cpus) != 0)
1534 enable_sync_clock();
1537 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1538 stp_info.todoff[2] || stp_info.todoff[3] ||
1539 stp_info.tmd != 2) {
1540 old_clock = get_clock();
1541 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1543 delta = adjust_time(old_clock, get_clock(), 0);
1544 fixup_clock_comparator(delta);
1545 rc = chsc_sstpi(stp_page, &stp_info,
1546 sizeof(struct stp_sstpi));
1547 if (rc == 0 && stp_info.tmd != 2)
1552 disable_sync_clock(NULL);
1553 stp_sync->in_sync = -EAGAIN;
1555 stp_sync->in_sync = 1;
1561 * STP work. Check for the STP state and take over the clock
1562 * synchronization if the STP clock source is usable.
1564 static void stp_work_fn(struct work_struct *work)
1566 struct clock_sync_data stp_sync;
1569 /* prevent multiple execution. */
1570 mutex_lock(&stp_work_mutex);
1573 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1574 del_timer_sync(&stp_timer);
1578 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1582 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1583 if (rc || stp_info.c == 0)
1586 /* Skip synchronization if the clock is already in sync. */
1587 if (check_sync_clock())
1590 memset(&stp_sync, 0, sizeof(stp_sync));
1592 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1593 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1596 if (!check_sync_clock())
1598 * There is a usable clock but the synchonization failed.
1599 * Retry after a second.
1601 mod_timer(&stp_timer, jiffies + HZ);
1604 mutex_unlock(&stp_work_mutex);
1608 * STP class sysfs interface functions
1610 static struct sysdev_class stp_sysclass = {
1614 static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
1618 return sprintf(buf, "%016llx\n",
1619 *(unsigned long long *) stp_info.ctnid);
1622 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1624 static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
1628 return sprintf(buf, "%i\n", stp_info.ctn);
1631 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1633 static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
1635 if (!stp_online || !(stp_info.vbits & 0x2000))
1637 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1640 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1642 static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
1644 if (!stp_online || !(stp_info.vbits & 0x8000))
1646 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1649 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1651 static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
1655 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1658 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1660 static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
1662 if (!stp_online || !(stp_info.vbits & 0x0800))
1664 return sprintf(buf, "%i\n", (int) stp_info.tto);
1667 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1669 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
1671 if (!stp_online || !(stp_info.vbits & 0x4000))
1673 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1676 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1677 stp_time_zone_offset_show, NULL);
1679 static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
1683 return sprintf(buf, "%i\n", stp_info.tmd);
1686 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1688 static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
1692 return sprintf(buf, "%i\n", stp_info.tst);
1695 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1697 static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
1699 return sprintf(buf, "%i\n", stp_online);
1702 static ssize_t stp_online_store(struct sysdev_class *class,
1703 const char *buf, size_t count)
1707 value = simple_strtoul(buf, NULL, 0);
1708 if (value != 0 && value != 1)
1710 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1712 mutex_lock(&clock_sync_mutex);
1715 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1717 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1718 queue_work(time_sync_wq, &stp_work);
1719 mutex_unlock(&clock_sync_mutex);
1724 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1725 * stp/online but attr_online already exists in this file ..
1727 static struct sysdev_class_attribute attr_stp_online = {
1728 .attr = { .name = "online", .mode = 0600 },
1729 .show = stp_online_show,
1730 .store = stp_online_store,
1733 static struct sysdev_class_attribute *stp_attributes[] = {
1741 &attr_time_zone_offset,
1747 static int __init stp_init_sysfs(void)
1749 struct sysdev_class_attribute **attr;
1752 rc = sysdev_class_register(&stp_sysclass);
1755 for (attr = stp_attributes; *attr; attr++) {
1756 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1762 for (; attr >= stp_attributes; attr--)
1763 sysdev_class_remove_file(&stp_sysclass, *attr);
1764 sysdev_class_unregister(&stp_sysclass);
1769 device_initcall(stp_init_sysfs);