2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
24 * Stack layout for the system_call stack entry.
25 * The first few entries are identical to the user_regs_struct.
27 SP_PTREGS = STACK_FRAME_OVERHEAD
28 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
29 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
30 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
31 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
32 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
34 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
35 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
36 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
37 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
38 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
39 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
40 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
41 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
42 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
43 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
44 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
45 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
46 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
47 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
48 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
49 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
53 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
56 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
58 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
59 STACK_SIZE = 1 << STACK_SHIFT
61 #define BASED(name) name-system_call(%r13)
63 #ifdef CONFIG_TRACE_IRQFLAGS
66 l %r1,BASED(.Ltrace_irq_on_caller)
72 l %r1,BASED(.Ltrace_irq_off_caller)
77 #define TRACE_IRQS_OFF
81 .macro LOCKDEP_SYS_EXIT
82 tm SP_PSW+1(%r15),0x01 # returning to user ?
84 l %r1,BASED(.Llockdep_sys_exit)
89 #define LOCKDEP_SYS_EXIT
93 * Register usage in interrupt handlers:
94 * R9 - pointer to current task structure
95 * R13 - pointer to literal pool
96 * R14 - return register for function calls
97 * R15 - kernel stack pointer
100 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
101 lm %r10,%r11,\lc_from
110 1: stm %r10,%r11,\lc_sum
113 .macro SAVE_ALL_BASE savearea
114 stm %r12,%r15,\savearea
115 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
118 .macro SAVE_ALL_SVC psworg,savearea
120 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
123 .macro SAVE_ALL_SYNC psworg,savearea
125 tm \psworg+1,0x01 # test problem state bit
126 bz BASED(2f) # skip stack setup save
127 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
128 #ifdef CONFIG_CHECK_STACK
130 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
131 bz BASED(stack_overflow)
137 .macro SAVE_ALL_ASYNC psworg,savearea
139 tm \psworg+1,0x01 # test problem state bit
140 bnz BASED(1f) # from user -> load async stack
141 clc \psworg+4(4),BASED(.Lcritical_end)
143 clc \psworg+4(4),BASED(.Lcritical_start)
145 l %r14,BASED(.Lcleanup_critical)
147 tm 1(%r12),0x01 # retest problem state after cleanup
149 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
153 1: l %r15,__LC_ASYNC_STACK
154 #ifdef CONFIG_CHECK_STACK
156 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
157 bz BASED(stack_overflow)
163 .macro CREATE_STACK_FRAME psworg,savearea
164 s %r15,BASED(.Lc_spsize) # make room for registers & psw
165 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
166 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
167 icm %r12,12,__LC_SVC_ILC
168 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
170 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
172 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
175 .macro RESTORE_ALL psworg,sync
176 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
178 ni \psworg+1,0xfd # clear wait state bit
180 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
182 lpsw \psworg # back to caller
186 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15)
187 ni __SF_EMPTY(%r15),0xbf
191 .section .kprobes.text, "ax"
194 * Scheduler resume function, called by switch_to
195 * gpr2 = (task_struct *) prev
196 * gpr3 = (task_struct *) next
204 tm __THREAD_per(%r3),0xe8 # new process is using per ?
205 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
206 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
207 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
208 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
209 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
211 l %r4,__THREAD_info(%r2) # get thread_info of prev
212 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
213 bz __switch_to_no_mcck-__switch_to_base(%r1)
214 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
215 l %r4,__THREAD_info(%r3) # get thread_info of next
216 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
218 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
219 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
220 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
221 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
222 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
223 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
224 l %r3,__THREAD_info(%r3) # load thread_info from task struct
225 st %r3,__LC_THREAD_INFO
227 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
232 * SVC interrupt handler routine. System calls are synchronous events and
233 * are executed with interrupts enabled.
238 stpt __LC_SYNC_ENTER_TIMER
240 SAVE_ALL_BASE __LC_SAVE_AREA
241 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
242 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
243 lh %r7,0x8a # get svc number from lowcore
245 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
247 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
249 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
251 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
252 ltr %r7,%r7 # test for svc 0
253 bnz BASED(sysc_nr_ok) # svc number > 0
254 # svc 0: system call number in %r1
255 cl %r1,BASED(.Lnr_syscalls)
256 bnl BASED(sysc_nr_ok)
257 lr %r7,%r1 # copy svc number to %r7
259 sth %r7,SP_SVCNR(%r15)
260 sll %r7,2 # svc number *4
261 l %r8,BASED(.Lsysc_table)
262 tm __TI_flags+2(%r9),_TIF_SYSCALL
263 mvc SP_ARGS(4,%r15),SP_R7(%r15)
264 l %r8,0(%r7,%r8) # get system call addr.
265 bnz BASED(sysc_tracesys)
266 basr %r14,%r8 # call sys_xxxx
267 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
272 tm __TI_flags+3(%r9),_TIF_WORK_SVC
273 bnz BASED(sysc_work) # there is work to do (signals etc.)
275 RESTORE_ALL __LC_RETURN_PSW,1
279 # There is work to do, but first we need to check if we return to userspace.
282 tm SP_PSW+1(%r15),0x01 # returning to user ?
283 bno BASED(sysc_restore)
286 # One of the work bits is on. Find out which one.
289 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
290 bo BASED(sysc_mcck_pending)
291 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
292 bo BASED(sysc_reschedule)
293 tm __TI_flags+3(%r9),_TIF_SIGPENDING
294 bo BASED(sysc_sigpending)
295 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
296 bo BASED(sysc_notify_resume)
297 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
298 bo BASED(sysc_restart)
299 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
300 bo BASED(sysc_singlestep)
301 b BASED(sysc_return) # beware of critical section cleanup
304 # _TIF_NEED_RESCHED is set, call schedule
307 l %r1,BASED(.Lschedule)
308 la %r14,BASED(sysc_return)
309 br %r1 # call scheduler
312 # _TIF_MCCK_PENDING is set, call handler
315 l %r1,BASED(.Ls390_handle_mcck)
316 la %r14,BASED(sysc_return)
317 br %r1 # TIF bit will be cleared by handler
320 # _TIF_SIGPENDING is set, call do_signal
323 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
324 la %r2,SP_PTREGS(%r15) # load pt_regs
325 l %r1,BASED(.Ldo_signal)
326 basr %r14,%r1 # call do_signal
327 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
328 bo BASED(sysc_restart)
329 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
330 bo BASED(sysc_singlestep)
334 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
337 la %r2,SP_PTREGS(%r15) # load pt_regs
338 l %r1,BASED(.Ldo_notify_resume)
339 la %r14,BASED(sysc_return)
340 br %r1 # call do_notify_resume
344 # _TIF_RESTART_SVC is set, set up registers and restart svc
347 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
348 l %r7,SP_R2(%r15) # load new svc number
349 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
350 lm %r2,%r6,SP_R2(%r15) # load svc arguments
351 b BASED(sysc_nr_ok) # restart svc
354 # _TIF_SINGLE_STEP is set, call do_single_step
357 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
358 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
359 mvi SP_SVCNR+1(%r15),0xff
360 la %r2,SP_PTREGS(%r15) # address of register-save area
361 l %r1,BASED(.Lhandle_per) # load adr. of per handler
362 la %r14,BASED(sysc_return) # load adr. of system return
363 br %r1 # branch to do_single_step
366 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
367 # and after the system call
370 l %r1,BASED(.Ltrace_entry)
371 la %r2,SP_PTREGS(%r15) # load pt_regs
376 cl %r2,BASED(.Lnr_syscalls)
377 bnl BASED(sysc_tracenogo)
378 l %r8,BASED(.Lsysc_table)
380 sll %r7,2 # svc number *4
383 lm %r3,%r6,SP_R3(%r15)
384 mvc SP_ARGS(4,%r15),SP_R7(%r15)
385 l %r2,SP_ORIG_R2(%r15)
386 basr %r14,%r8 # call sys_xxx
387 st %r2,SP_R2(%r15) # store return value
389 tm __TI_flags+2(%r9),_TIF_SYSCALL
390 bz BASED(sysc_return)
391 l %r1,BASED(.Ltrace_exit)
392 la %r2,SP_PTREGS(%r15) # load pt_regs
393 la %r14,BASED(sysc_return)
397 # a new process exits the kernel with ret_from_fork
401 l %r13,__LC_SVC_NEW_PSW+4
402 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
403 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
405 st %r15,SP_R15(%r15) # store stack pointer for new kthread
406 0: l %r1,BASED(.Lschedtail)
409 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
410 b BASED(sysc_tracenogo)
413 # kernel_execve function needs to deal with pt_regs that is not
418 stm %r12,%r15,48(%r15)
420 l %r13,__LC_SVC_NEW_PSW+4
421 s %r15,BASED(.Lc_spsize)
422 st %r14,__SF_BACKCHAIN(%r15)
423 la %r12,SP_PTREGS(%r15)
424 xc 0(__PT_SIZE,%r12),0(%r12)
425 l %r1,BASED(.Ldo_execve)
430 a %r15,BASED(.Lc_spsize)
431 lm %r12,%r15,48(%r15)
434 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
435 l %r15,__LC_KERNEL_STACK # load ksp
436 s %r15,BASED(.Lc_spsize) # make room for registers & psw
437 l %r9,__LC_THREAD_INFO
438 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
439 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
440 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
441 l %r1,BASED(.Lexecve_tail)
446 * Program check handler routine
449 .globl pgm_check_handler
452 * First we need to check for a special case:
453 * Single stepping an instruction that disables the PER event mask will
454 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
455 * For a single stepped SVC the program check handler gets control after
456 * the SVC new PSW has been loaded. But we want to execute the SVC first and
457 * then handle the PER event. Therefore we update the SVC old PSW to point
458 * to the pgm_check_handler and branch to the SVC handler after we checked
459 * if we have to load the kernel stack register.
460 * For every other possible cause for PER event without the PER mask set
461 * we just ignore the PER event (FIXME: is there anything we have to do
464 stpt __LC_SYNC_ENTER_TIMER
465 SAVE_ALL_BASE __LC_SAVE_AREA
466 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
467 bnz BASED(pgm_per) # got per exception -> special case
468 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
469 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
470 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
471 bz BASED(pgm_no_vtime)
472 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
473 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
474 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
476 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
477 l %r3,__LC_PGM_ILC # load program interruption code
478 l %r4,__LC_TRANS_EXC_CODE
483 l %r7,BASED(.Ljump_table)
485 l %r7,0(%r8,%r7) # load address of handler routine
486 la %r2,SP_PTREGS(%r15) # address of register-save area
487 basr %r14,%r7 # branch to interrupt-handler
492 # handle per exception
495 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
496 bnz BASED(pgm_per_std) # ok, normal per event from user space
497 # ok its one of the special cases, now we need to find out which one
498 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
500 # no interesting special case, ignore PER event
501 lm %r12,%r15,__LC_SAVE_AREA
505 # Normal per exception
508 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
509 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
510 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
511 bz BASED(pgm_no_vtime2)
512 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
513 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
514 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
516 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
518 tm SP_PSW+1(%r15),0x01 # kernel per event ?
520 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
521 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
522 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
523 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
524 l %r3,__LC_PGM_ILC # load program interruption code
525 l %r4,__LC_TRANS_EXC_CODE
528 nr %r8,%r3 # clear per-event-bit and ilc
529 be BASED(pgm_exit2) # only per or per+check ?
530 l %r7,BASED(.Ljump_table)
532 l %r7,0(%r8,%r7) # load address of handler routine
533 la %r2,SP_PTREGS(%r15) # address of register-save area
534 basr %r14,%r7 # branch to interrupt-handler
539 # it was a single stepped SVC that is causing all the trouble
542 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
543 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
544 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
545 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
546 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
547 lh %r7,0x8a # get svc number from lowcore
548 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
550 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
551 mvc __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
552 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
553 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
554 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
555 lm %r2,%r6,SP_R2(%r15) # load svc arguments
559 # per was called from kernel, must be kprobes
563 mvi SP_SVCNR(%r15),0xff # set trap indication to pgm check
564 mvi SP_SVCNR+1(%r15),0xff
565 la %r2,SP_PTREGS(%r15) # address of register-save area
566 l %r1,BASED(.Lhandle_per) # load adr. of per handler
567 basr %r14,%r1 # branch to do_single_step
571 * IO interrupt handler routine
574 .globl io_int_handler
577 stpt __LC_ASYNC_ENTER_TIMER
578 SAVE_ALL_BASE __LC_SAVE_AREA+16
579 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
580 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
581 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
582 bz BASED(io_no_vtime)
583 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
584 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
585 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
588 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
589 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
590 la %r2,SP_PTREGS(%r15) # address of register-save area
591 basr %r14,%r1 # branch to standard irq handler
596 tm __TI_flags+3(%r9),_TIF_WORK_INT
597 bnz BASED(io_work) # there is work to do (signals etc.)
599 RESTORE_ALL __LC_RETURN_PSW,0
603 # There is work todo, find out in which context we have been interrupted:
604 # 1) if we return to user space we can do all _TIF_WORK_INT work
605 # 2) if we return to kernel code and preemptive scheduling is enabled check
606 # the preemption counter and if it is zero call preempt_schedule_irq
607 # Before any work can be done, a switch to the kernel stack is required.
610 tm SP_PSW+1(%r15),0x01 # returning to user ?
611 bo BASED(io_work_user) # yes -> do resched & signal
612 #ifdef CONFIG_PREEMPT
613 # check for preemptive scheduling
614 icm %r0,15,__TI_precount(%r9)
615 bnz BASED(io_restore) # preemption disabled
616 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
617 bno BASED(io_restore)
618 # switch to kernel stack
620 s %r1,BASED(.Lc_spsize)
621 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
622 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
624 # TRACE_IRQS_ON already done at io_return, call
625 # TRACE_IRQS_OFF to keep things symmetrical
627 l %r1,BASED(.Lpreempt_schedule_irq)
628 basr %r14,%r1 # call preempt_schedule_irq
635 # Need to do work before returning to userspace, switch to kernel stack
638 l %r1,__LC_KERNEL_STACK
639 s %r1,BASED(.Lc_spsize)
640 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
641 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
645 # One of the work bits is on. Find out which one.
646 # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
647 # and _TIF_MCCK_PENDING
650 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
651 bo BASED(io_mcck_pending)
652 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
653 bo BASED(io_reschedule)
654 tm __TI_flags+3(%r9),_TIF_SIGPENDING
655 bo BASED(io_sigpending)
656 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
657 bo BASED(io_notify_resume)
658 b BASED(io_return) # beware of critical section cleanup
661 # _TIF_MCCK_PENDING is set, call handler
664 # TRACE_IRQS_ON already done at io_return
665 l %r1,BASED(.Ls390_handle_mcck)
666 basr %r14,%r1 # TIF bit will be cleared by handler
671 # _TIF_NEED_RESCHED is set, call schedule
674 # TRACE_IRQS_ON already done at io_return
675 l %r1,BASED(.Lschedule)
676 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
677 basr %r14,%r1 # call scheduler
678 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
683 # _TIF_SIGPENDING is set, call do_signal
686 # TRACE_IRQS_ON already done at io_return
687 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
688 la %r2,SP_PTREGS(%r15) # load pt_regs
689 l %r1,BASED(.Ldo_signal)
690 basr %r14,%r1 # call do_signal
691 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
696 # _TIF_SIGPENDING is set, call do_signal
699 # TRACE_IRQS_ON already done at io_return
700 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
701 la %r2,SP_PTREGS(%r15) # load pt_regs
702 l %r1,BASED(.Ldo_notify_resume)
703 basr %r14,%r1 # call do_signal
704 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
709 * External interrupt handler routine
712 .globl ext_int_handler
715 stpt __LC_ASYNC_ENTER_TIMER
716 SAVE_ALL_BASE __LC_SAVE_AREA+16
717 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
718 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
719 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
720 bz BASED(ext_no_vtime)
721 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
722 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
723 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
725 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
727 la %r2,SP_PTREGS(%r15) # address of register-save area
728 l %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
729 l %r4,__LC_EXT_PARAMS # get external parameters
730 l %r1,BASED(.Ldo_extint)
737 * Machine check handler routines
740 .globl mcck_int_handler
743 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
744 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
745 SAVE_ALL_BASE __LC_SAVE_AREA+32
746 la %r12,__LC_MCK_OLD_PSW
747 tm __LC_MCCK_CODE,0x80 # system damage?
748 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
749 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
750 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
752 la %r14,__LC_SYNC_ENTER_TIMER
753 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
755 la %r14,__LC_ASYNC_ENTER_TIMER
756 0: clc 0(8,%r14),__LC_EXIT_TIMER
758 la %r14,__LC_EXIT_TIMER
759 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
761 la %r14,__LC_LAST_UPDATE_TIMER
763 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
764 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
765 bno BASED(mcck_int_main) # no -> skip cleanup critical
766 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
767 bnz BASED(mcck_int_main) # from user -> load async stack
768 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
769 bhe BASED(mcck_int_main)
770 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
771 bl BASED(mcck_int_main)
772 l %r14,BASED(.Lcleanup_critical)
775 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
779 l %r15,__LC_PANIC_STACK # load panic stack
780 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
781 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
782 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
783 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
784 bz BASED(mcck_no_vtime)
785 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
786 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
787 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
789 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
790 la %r2,SP_PTREGS(%r15) # load pt_regs
791 l %r1,BASED(.Ls390_mcck)
792 basr %r14,%r1 # call machine check handler
793 tm SP_PSW+1(%r15),0x01 # returning to user ?
794 bno BASED(mcck_return)
795 l %r1,__LC_KERNEL_STACK # switch to kernel stack
796 s %r1,BASED(.Lc_spsize)
797 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
798 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
800 stosm __SF_EMPTY(%r15),0x04 # turn dat on
801 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
802 bno BASED(mcck_return)
804 l %r1,BASED(.Ls390_handle_mcck)
805 basr %r14,%r1 # call machine check handler
808 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
809 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
810 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
812 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
814 lpsw __LC_RETURN_MCCK_PSW # back to caller
815 0: lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
816 lpsw __LC_RETURN_MCCK_PSW # back to caller
818 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
821 * Restart interruption handler, kick starter for additional CPUs
825 .globl restart_int_handler
829 spt restart_vtime-restart_base(%r1)
830 stck __LC_LAST_UPDATE_CLOCK
831 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
832 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
833 l %r15,__LC_SAVE_AREA+60 # load ksp
834 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
835 lam %a0,%a15,__LC_AREGS_SAVE_AREA
836 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
837 l %r1,__LC_THREAD_INFO
838 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
839 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
840 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
841 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
843 l %r14,restart_addr-.(%r14)
844 br %r14 # branch to start_secondary
846 .long start_secondary
849 .long 0x7fffffff,0xffffffff
853 * If we do not run with SMP enabled, let the new CPU crash ...
855 .globl restart_int_handler
859 lpsw restart_crash-restart_base(%r1)
862 .long 0x000a0000,0x00000000
866 .section .kprobes.text, "ax"
868 #ifdef CONFIG_CHECK_STACK
870 * The synchronous or the asynchronous stack overflowed. We are dead.
871 * No need to properly save the registers, we are going to panic anyway.
872 * Setup a pt_regs so that show_trace can provide a good call trace.
875 l %r15,__LC_PANIC_STACK # change to panic stack
876 sl %r15,BASED(.Lc_spsize)
877 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
878 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
879 la %r1,__LC_SAVE_AREA
880 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
882 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
884 la %r1,__LC_SAVE_AREA+16
885 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
886 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
887 l %r1,BASED(1f) # branch to kernel_stack_overflow
888 la %r2,SP_PTREGS(%r15) # load pt_regs
890 1: .long kernel_stack_overflow
893 cleanup_table_system_call:
894 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
895 cleanup_table_sysc_tif:
896 .long sysc_tif + 0x80000000, sysc_restore + 0x80000000
897 cleanup_table_sysc_restore:
898 .long sysc_restore + 0x80000000, sysc_done + 0x80000000
899 cleanup_table_io_tif:
900 .long io_tif + 0x80000000, io_restore + 0x80000000
901 cleanup_table_io_restore:
902 .long io_restore + 0x80000000, io_done + 0x80000000
905 clc 4(4,%r12),BASED(cleanup_table_system_call)
907 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
908 bl BASED(cleanup_system_call)
910 clc 4(4,%r12),BASED(cleanup_table_sysc_tif)
912 clc 4(4,%r12),BASED(cleanup_table_sysc_tif+4)
913 bl BASED(cleanup_sysc_tif)
915 clc 4(4,%r12),BASED(cleanup_table_sysc_restore)
917 clc 4(4,%r12),BASED(cleanup_table_sysc_restore+4)
918 bl BASED(cleanup_sysc_restore)
920 clc 4(4,%r12),BASED(cleanup_table_io_tif)
922 clc 4(4,%r12),BASED(cleanup_table_io_tif+4)
923 bl BASED(cleanup_io_tif)
925 clc 4(4,%r12),BASED(cleanup_table_io_restore)
927 clc 4(4,%r12),BASED(cleanup_table_io_restore+4)
928 bl BASED(cleanup_io_restore)
933 mvc __LC_RETURN_PSW(8),0(%r12)
934 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
936 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
937 c %r12,BASED(.Lmck_old_psw)
939 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
940 0: c %r12,BASED(.Lmck_old_psw)
941 la %r12,__LC_SAVE_AREA+32
943 la %r12,__LC_SAVE_AREA+16
944 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
945 bhe BASED(cleanup_vtime)
946 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
948 mvc __LC_SAVE_AREA(16),0(%r12)
950 st %r12,__LC_SAVE_AREA+48 # argh
951 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
952 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
953 l %r12,__LC_SAVE_AREA+48 # argh
957 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
958 bhe BASED(cleanup_stime)
959 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
961 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
962 bh BASED(cleanup_update)
963 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
965 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
966 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
967 la %r12,__LC_RETURN_PSW
969 cleanup_system_call_insn:
970 .long sysc_saveall + 0x80000000
971 .long system_call + 0x80000000
972 .long sysc_vtime + 0x80000000
973 .long sysc_stime + 0x80000000
974 .long sysc_update + 0x80000000
977 mvc __LC_RETURN_PSW(4),0(%r12)
978 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_tif)
979 la %r12,__LC_RETURN_PSW
982 cleanup_sysc_restore:
983 clc 4(4,%r12),BASED(cleanup_sysc_restore_insn)
985 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
986 c %r12,BASED(.Lmck_old_psw)
988 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
989 0: clc 4(4,%r12),BASED(cleanup_sysc_restore_insn+4)
991 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
992 c %r12,BASED(.Lmck_old_psw)
993 la %r12,__LC_SAVE_AREA+32
995 la %r12,__LC_SAVE_AREA+16
996 1: mvc 0(16,%r12),SP_R12(%r15)
997 lm %r0,%r11,SP_R0(%r15)
999 2: la %r12,__LC_RETURN_PSW
1001 cleanup_sysc_restore_insn:
1002 .long sysc_done - 4 + 0x80000000
1003 .long sysc_done - 8 + 0x80000000
1006 mvc __LC_RETURN_PSW(4),0(%r12)
1007 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_tif)
1008 la %r12,__LC_RETURN_PSW
1012 clc 4(4,%r12),BASED(cleanup_io_restore_insn)
1014 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1015 clc 4(4,%r12),BASED(cleanup_io_restore_insn+4)
1017 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1018 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1019 lm %r0,%r11,SP_R0(%r15)
1021 1: la %r12,__LC_RETURN_PSW
1023 cleanup_io_restore_insn:
1024 .long io_done - 4 + 0x80000000
1025 .long io_done - 8 + 0x80000000
1031 .Lc_spsize: .long SP_SIZE
1032 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1033 .Lnr_syscalls: .long NR_syscalls
1034 .L0x018: .short 0x018
1035 .L0x020: .short 0x020
1036 .L0x028: .short 0x028
1037 .L0x030: .short 0x030
1038 .L0x038: .short 0x038
1044 .Ls390_mcck: .long s390_do_machine_check
1046 .long s390_handle_mcck
1047 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1048 .Ldo_IRQ: .long do_IRQ
1049 .Ldo_extint: .long do_extint
1050 .Ldo_signal: .long do_signal
1052 .long do_notify_resume
1053 .Lhandle_per: .long do_single_step
1054 .Ldo_execve: .long do_execve
1055 .Lexecve_tail: .long execve_tail
1056 .Ljump_table: .long pgm_check_table
1057 .Lschedule: .long schedule
1058 #ifdef CONFIG_PREEMPT
1059 .Lpreempt_schedule_irq:
1060 .long preempt_schedule_irq
1062 .Ltrace_entry: .long do_syscall_trace_enter
1063 .Ltrace_exit: .long do_syscall_trace_exit
1064 .Lschedtail: .long schedule_tail
1065 .Lsysc_table: .long sys_call_table
1066 #ifdef CONFIG_TRACE_IRQFLAGS
1067 .Ltrace_irq_on_caller:
1068 .long trace_hardirqs_on_caller
1069 .Ltrace_irq_off_caller:
1070 .long trace_hardirqs_off_caller
1072 #ifdef CONFIG_LOCKDEP
1074 .long lockdep_sys_exit
1077 .long __critical_start + 0x80000000
1079 .long __critical_end + 0x80000000
1081 .long cleanup_critical
1083 .section .rodata, "a"
1084 #define SYSCALL(esa,esame,emu) .long esa
1085 .globl sys_call_table
1087 #include "syscalls.S"