2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/poll.h>
29 #include <linux/ptrace.h>
30 #include <linux/slab.h>
31 #include <linux/wait.h>
35 #include <linux/mutex.h>
37 #include <asm/spu_priv1.h>
38 #include <asm/mmu_context.h>
40 #include "interrupt.h"
42 const struct spu_priv1_ops *spu_priv1_ops;
44 EXPORT_SYMBOL_GPL(spu_priv1_ops);
46 static int __spu_trap_invalid_dma(struct spu *spu)
48 pr_debug("%s\n", __FUNCTION__);
49 force_sig(SIGBUS, /* info, */ current);
53 static int __spu_trap_dma_align(struct spu *spu)
55 pr_debug("%s\n", __FUNCTION__);
56 force_sig(SIGBUS, /* info, */ current);
60 static int __spu_trap_error(struct spu *spu)
62 pr_debug("%s\n", __FUNCTION__);
63 force_sig(SIGILL, /* info, */ current);
67 static void spu_restart_dma(struct spu *spu)
69 struct spu_priv2 __iomem *priv2 = spu->priv2;
71 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
72 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
75 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
77 struct spu_priv2 __iomem *priv2 = spu->priv2;
78 struct mm_struct *mm = spu->mm;
81 pr_debug("%s\n", __FUNCTION__);
83 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
84 /* SLBs are pre-loaded for context switch, so
85 * we should never get here!
87 printk("%s: invalid access during switch!\n", __func__);
90 if (!mm || (REGION_ID(ea) != USER_REGION_ID)) {
91 /* Future: support kernel segments so that drivers
94 pr_debug("invalid region access at %016lx\n", ea);
98 esid = (ea & ESID_MASK) | SLB_ESID_V;
99 #ifdef CONFIG_HUGETLB_PAGE
100 if (in_hugepage_area(mm->context, ea))
101 llp = mmu_psize_defs[mmu_huge_psize].sllp;
104 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
105 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
108 out_be64(&priv2->slb_index_W, spu->slb_replace);
109 out_be64(&priv2->slb_vsid_RW, vsid);
110 out_be64(&priv2->slb_esid_RW, esid);
113 if (spu->slb_replace >= 8)
114 spu->slb_replace = 0;
116 spu_restart_dma(spu);
121 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
122 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
124 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
126 /* Handle kernel space hash faults immediately.
127 User hash faults need to be deferred to process context. */
128 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
129 && REGION_ID(ea) != USER_REGION_ID
130 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
131 spu_restart_dma(spu);
135 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
136 printk("%s: invalid access during switch!\n", __func__);
143 if (spu->stop_callback)
144 spu->stop_callback(spu);
148 static int __spu_trap_mailbox(struct spu *spu)
150 if (spu->ibox_callback)
151 spu->ibox_callback(spu);
153 /* atomically disable SPU mailbox interrupts */
154 spin_lock(&spu->register_lock);
155 spu_int_mask_and(spu, 2, ~0x1);
156 spin_unlock(&spu->register_lock);
160 static int __spu_trap_stop(struct spu *spu)
162 pr_debug("%s\n", __FUNCTION__);
163 spu->stop_code = in_be32(&spu->problem->spu_status_R);
164 if (spu->stop_callback)
165 spu->stop_callback(spu);
169 static int __spu_trap_halt(struct spu *spu)
171 pr_debug("%s\n", __FUNCTION__);
172 spu->stop_code = in_be32(&spu->problem->spu_status_R);
173 if (spu->stop_callback)
174 spu->stop_callback(spu);
178 static int __spu_trap_tag_group(struct spu *spu)
180 pr_debug("%s\n", __FUNCTION__);
181 spu->mfc_callback(spu);
185 static int __spu_trap_spubox(struct spu *spu)
187 if (spu->wbox_callback)
188 spu->wbox_callback(spu);
190 /* atomically disable SPU mailbox interrupts */
191 spin_lock(&spu->register_lock);
192 spu_int_mask_and(spu, 2, ~0x10);
193 spin_unlock(&spu->register_lock);
198 spu_irq_class_0(int irq, void *data, struct pt_regs *regs)
203 spu->class_0_pending = 1;
204 if (spu->stop_callback)
205 spu->stop_callback(spu);
211 spu_irq_class_0_bottom(struct spu *spu)
213 unsigned long stat, mask;
215 spu->class_0_pending = 0;
217 mask = spu_int_mask_get(spu, 0);
218 stat = spu_int_stat_get(spu, 0);
222 if (stat & 1) /* invalid MFC DMA */
223 __spu_trap_invalid_dma(spu);
225 if (stat & 2) /* invalid DMA alignment */
226 __spu_trap_dma_align(spu);
228 if (stat & 4) /* error on SPU */
229 __spu_trap_error(spu);
231 spu_int_stat_clear(spu, 0, stat);
233 return (stat & 0x7) ? -EIO : 0;
235 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
238 spu_irq_class_1(int irq, void *data, struct pt_regs *regs)
241 unsigned long stat, mask, dar, dsisr;
245 /* atomically read & clear class1 status. */
246 spin_lock(&spu->register_lock);
247 mask = spu_int_mask_get(spu, 1);
248 stat = spu_int_stat_get(spu, 1) & mask;
249 dar = spu_mfc_dar_get(spu);
250 dsisr = spu_mfc_dsisr_get(spu);
251 if (stat & 2) /* mapping fault */
252 spu_mfc_dsisr_set(spu, 0ul);
253 spu_int_stat_clear(spu, 1, stat);
254 spin_unlock(&spu->register_lock);
255 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
258 if (stat & 1) /* segment fault */
259 __spu_trap_data_seg(spu, dar);
261 if (stat & 2) { /* mapping fault */
262 __spu_trap_data_map(spu, dar, dsisr);
265 if (stat & 4) /* ls compare & suspend on get */
268 if (stat & 8) /* ls compare & suspend on put */
271 return stat ? IRQ_HANDLED : IRQ_NONE;
273 EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom);
276 spu_irq_class_2(int irq, void *data, struct pt_regs *regs)
283 stat = spu_int_stat_get(spu, 2);
284 mask = spu_int_mask_get(spu, 2);
286 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
290 if (stat & 1) /* PPC core mailbox */
291 __spu_trap_mailbox(spu);
293 if (stat & 2) /* SPU stop-and-signal */
294 __spu_trap_stop(spu);
296 if (stat & 4) /* SPU halted */
297 __spu_trap_halt(spu);
299 if (stat & 8) /* DMA tag group complete */
300 __spu_trap_tag_group(spu);
302 if (stat & 0x10) /* SPU mailbox threshold */
303 __spu_trap_spubox(spu);
305 spu_int_stat_clear(spu, 2, stat);
306 return stat ? IRQ_HANDLED : IRQ_NONE;
310 spu_request_irqs(struct spu *spu)
315 irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET;
317 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", spu->number);
318 ret = request_irq(irq_base + spu->isrc,
319 spu_irq_class_0, SA_INTERRUPT, spu->irq_c0, spu);
323 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", spu->number);
324 ret = request_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc,
325 spu_irq_class_1, SA_INTERRUPT, spu->irq_c1, spu);
329 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", spu->number);
330 ret = request_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc,
331 spu_irq_class_2, SA_INTERRUPT, spu->irq_c2, spu);
337 free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu);
339 free_irq(irq_base + spu->isrc, spu);
345 spu_free_irqs(struct spu *spu)
349 irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET;
351 free_irq(irq_base + spu->isrc, spu);
352 free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu);
353 free_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, spu);
356 static LIST_HEAD(spu_list);
357 static DEFINE_MUTEX(spu_mutex);
359 static void spu_init_channels(struct spu *spu)
361 static const struct {
365 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
366 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
368 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
369 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
370 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
372 struct spu_priv2 __iomem *priv2;
377 /* initialize all channel data to zero */
378 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
381 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
382 for (count = 0; count < zero_list[i].count; count++)
383 out_be64(&priv2->spu_chnldata_RW, 0);
386 /* initialize channel counts to meaningful values */
387 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
388 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
389 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
393 struct spu *spu_alloc(void)
397 mutex_lock(&spu_mutex);
398 if (!list_empty(&spu_list)) {
399 spu = list_entry(spu_list.next, struct spu, list);
400 list_del_init(&spu->list);
401 pr_debug("Got SPU %x %d\n", spu->isrc, spu->number);
403 pr_debug("No SPU left\n");
406 mutex_unlock(&spu_mutex);
409 spu_init_channels(spu);
413 EXPORT_SYMBOL_GPL(spu_alloc);
415 void spu_free(struct spu *spu)
417 mutex_lock(&spu_mutex);
418 list_add_tail(&spu->list, &spu_list);
419 mutex_unlock(&spu_mutex);
421 EXPORT_SYMBOL_GPL(spu_free);
423 static int spu_handle_mm_fault(struct spu *spu)
425 struct mm_struct *mm = spu->mm;
426 struct vm_area_struct *vma;
427 u64 ea, dsisr, is_write;
433 if (!IS_VALID_EA(ea)) {
440 if (mm->pgd == NULL) {
444 down_read(&mm->mmap_sem);
445 vma = find_vma(mm, ea);
448 if (vma->vm_start <= ea)
450 if (!(vma->vm_flags & VM_GROWSDOWN))
453 if (expand_stack(vma, ea))
457 is_write = dsisr & MFC_DSISR_ACCESS_PUT;
459 if (!(vma->vm_flags & VM_WRITE))
462 if (dsisr & MFC_DSISR_ACCESS_DENIED)
464 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
468 switch (handle_mm_fault(mm, vma, ea, is_write)) {
475 case VM_FAULT_SIGBUS:
484 up_read(&mm->mmap_sem);
488 up_read(&mm->mmap_sem);
492 int spu_irq_class_1_bottom(struct spu *spu)
494 u64 ea, dsisr, access, error = 0UL;
499 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) {
502 access = (_PAGE_PRESENT | _PAGE_USER);
503 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
504 local_irq_save(flags);
505 if (hash_page(ea, access, 0x300) != 0)
506 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
507 local_irq_restore(flags);
509 if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) {
510 if ((ret = spu_handle_mm_fault(spu)) != 0)
511 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
513 error &= ~CLASS1_ENABLE_STORAGE_FAULT_INTR;
518 spu_restart_dma(spu);
520 __spu_trap_invalid_dma(spu);
525 static int __init find_spu_node_id(struct device_node *spe)
528 struct device_node *cpu;
529 cpu = spe->parent->parent;
530 id = (unsigned int *)get_property(cpu, "node-id", NULL);
534 static int __init cell_spuprop_present(struct spu *spu, struct device_node *spe,
537 static DEFINE_MUTEX(add_spumem_mutex);
539 struct address_prop {
540 unsigned long address;
542 } __attribute__((packed)) *p;
545 unsigned long start_pfn, nr_pages;
546 struct pglist_data *pgdata;
550 p = (void*)get_property(spe, prop, &proplen);
551 WARN_ON(proplen != sizeof (*p));
553 start_pfn = p->address >> PAGE_SHIFT;
554 nr_pages = ((unsigned long)p->len + PAGE_SIZE - 1) >> PAGE_SHIFT;
556 pgdata = NODE_DATA(spu->nid);
557 zone = pgdata->node_zones;
559 /* XXX rethink locking here */
560 mutex_lock(&add_spumem_mutex);
561 ret = __add_pages(zone, start_pfn, nr_pages);
562 mutex_unlock(&add_spumem_mutex);
567 static void __iomem * __init map_spe_prop(struct spu *spu,
568 struct device_node *n, const char *name)
570 struct address_prop {
571 unsigned long address;
573 } __attribute__((packed)) *prop;
580 p = get_property(n, name, &proplen);
581 if (proplen != sizeof (struct address_prop))
586 err = cell_spuprop_present(spu, n, name);
587 if (err && (err != -EEXIST))
590 ret = ioremap(prop->address, prop->len);
596 static void spu_unmap(struct spu *spu)
600 iounmap(spu->problem);
601 iounmap((u8 __iomem *)spu->local_store);
604 static int __init spu_map_device(struct spu *spu, struct device_node *node)
610 prop = get_property(node, "isrc", NULL);
613 spu->isrc = *(unsigned int *)prop;
615 spu->name = get_property(node, "name", NULL);
619 prop = get_property(node, "local-store", NULL);
622 spu->local_store_phys = *(unsigned long *)prop;
624 /* we use local store as ram, not io memory */
625 spu->local_store = (void __force *)
626 map_spe_prop(spu, node, "local-store");
627 if (!spu->local_store)
630 prop = get_property(node, "problem", NULL);
633 spu->problem_phys = *(unsigned long *)prop;
635 spu->problem= map_spe_prop(spu, node, "problem");
639 spu->priv1= map_spe_prop(spu, node, "priv1");
640 /* priv1 is not available on a hypervisor */
642 spu->priv2= map_spe_prop(spu, node, "priv2");
654 struct sysdev_class spu_sysdev_class = {
658 static ssize_t spu_show_isrc(struct sys_device *sysdev, char *buf)
660 struct spu *spu = container_of(sysdev, struct spu, sysdev);
661 return sprintf(buf, "%d\n", spu->isrc);
664 static SYSDEV_ATTR(isrc, 0400, spu_show_isrc, NULL);
666 extern int attach_sysdev_to_node(struct sys_device *dev, int nid);
668 static int spu_create_sysdev(struct spu *spu)
672 spu->sysdev.id = spu->number;
673 spu->sysdev.cls = &spu_sysdev_class;
674 ret = sysdev_register(&spu->sysdev);
676 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
681 sysdev_create_file(&spu->sysdev, &attr_isrc);
682 sysfs_add_device_to_node(&spu->sysdev, spu->nid);
687 static void spu_destroy_sysdev(struct spu *spu)
689 sysdev_remove_file(&spu->sysdev, &attr_isrc);
690 sysfs_remove_device_from_node(&spu->sysdev, spu->nid);
691 sysdev_unregister(&spu->sysdev);
694 static int __init create_spu(struct device_node *spe)
701 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
705 ret = spu_map_device(spu, spe);
709 spu->node = find_spu_node_id(spe);
710 spu->nid = of_node_to_nid(spe);
713 spin_lock_init(&spu->register_lock);
714 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
715 spu_mfc_sr1_set(spu, 0x33);
716 mutex_lock(&spu_mutex);
718 spu->number = number++;
719 ret = spu_request_irqs(spu);
723 ret = spu_create_sysdev(spu);
727 list_add(&spu->list, &spu_list);
728 mutex_unlock(&spu_mutex);
730 pr_debug(KERN_DEBUG "Using SPE %s %02x %p %p %p %p %d\n",
731 spu->name, spu->isrc, spu->local_store,
732 spu->problem, spu->priv1, spu->priv2, spu->number);
739 mutex_unlock(&spu_mutex);
747 static void destroy_spu(struct spu *spu)
749 list_del_init(&spu->list);
751 spu_destroy_sysdev(spu);
757 static void cleanup_spu_base(void)
759 struct spu *spu, *tmp;
760 mutex_lock(&spu_mutex);
761 list_for_each_entry_safe(spu, tmp, &spu_list, list)
763 mutex_unlock(&spu_mutex);
764 sysdev_class_unregister(&spu_sysdev_class);
766 module_exit(cleanup_spu_base);
768 static int __init init_spu_base(void)
770 struct device_node *node;
773 /* create sysdev class for spus */
774 ret = sysdev_class_register(&spu_sysdev_class);
779 for (node = of_find_node_by_type(NULL, "spe");
780 node; node = of_find_node_by_type(node, "spe")) {
781 ret = create_spu(node);
783 printk(KERN_WARNING "%s: Error initializing %s\n",
784 __FUNCTION__, node->name);
789 /* in some old firmware versions, the spe is called 'spc', so we
790 look for that as well */
791 for (node = of_find_node_by_type(NULL, "spc");
792 node; node = of_find_node_by_type(node, "spc")) {
793 ret = create_spu(node);
795 printk(KERN_WARNING "%s: Error initializing %s\n",
796 __FUNCTION__, node->name);
803 module_init(init_spu_base);
805 MODULE_LICENSE("GPL");
806 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");