Pileus Git - ~andy/linux/blob - arch/powerpc/kvm/book3s_64_emulate.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License, version 2, as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  14  *
  15  * Copyright SUSE Linux Products GmbH 2009
  16  *
  17  * Authors: Alexander Graf <agraf@suse.de>
  18  */
  19
  20 #include <asm/kvm_ppc.h>
  21 #include <asm/disassemble.h>
  22 #include <asm/kvm_book3s.h>
  23 #include <asm/reg.h>
  24
  25 #define OP_19_XOP_RFID          18
  26 #define OP_19_XOP_RFI           50
  27
  28 #define OP_31_XOP_MFMSR         83
  29 #define OP_31_XOP_MTMSR         146
  30 #define OP_31_XOP_MTMSRD        178
  31 #define OP_31_XOP_MTSR          210
  32 #define OP_31_XOP_MTSRIN        242
  33 #define OP_31_XOP_TLBIEL        274
  34 #define OP_31_XOP_TLBIE         306
  35 #define OP_31_XOP_SLBMTE        402
  36 #define OP_31_XOP_SLBIE         434
  37 #define OP_31_XOP_SLBIA         498
  38 #define OP_31_XOP_MFSR          595
  39 #define OP_31_XOP_MFSRIN        659
  40 #define OP_31_XOP_SLBMFEV       851
  41 #define OP_31_XOP_EIOIO         854
  42 #define OP_31_XOP_SLBMFEE       915
  43
  44 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
  45 #define OP_31_XOP_DCBZ          1010
  46
  47 #define SPRN_GQR0               912
  48 #define SPRN_GQR1               913
  49 #define SPRN_GQR2               914
  50 #define SPRN_GQR3               915
  51 #define SPRN_GQR4               916
  52 #define SPRN_GQR5               917
  53 #define SPRN_GQR6               918
  54 #define SPRN_GQR7               919
  55
  56 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
  57                            unsigned int inst, int *advance)
  58 {
  59         int emulated = EMULATE_DONE;
  60
  61         switch (get_op(inst)) {
  62         case 19:
  63                 switch (get_xop(inst)) {
  64                 case OP_19_XOP_RFID:
  65                 case OP_19_XOP_RFI:
  66                         vcpu->arch.pc = vcpu->arch.srr0;
  67                         kvmppc_set_msr(vcpu, vcpu->arch.srr1);
  68                         *advance = 0;
  69                         break;
  70
  71                 default:
  72                         emulated = EMULATE_FAIL;
  73                         break;
  74                 }
  75                 break;
  76         case 31:
  77                 switch (get_xop(inst)) {
  78                 case OP_31_XOP_MFMSR:
  79                         kvmppc_set_gpr(vcpu, get_rt(inst), vcpu->arch.msr);
  80                         break;
  81                 case OP_31_XOP_MTMSRD:
  82                 {
  83                         ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
  84                         if (inst & 0x10000) {
  85                                 vcpu->arch.msr &= ~(MSR_RI | MSR_EE);
  86                                 vcpu->arch.msr |= rs & (MSR_RI | MSR_EE);
  87                         } else
  88                                 kvmppc_set_msr(vcpu, rs);
  89                         break;
  90                 }
  91                 case OP_31_XOP_MTMSR:
  92                         kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));
  93                         break;
  94                 case OP_31_XOP_MFSR:
  95                 {
  96                         int srnum;
  97
  98                         srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
  99                         if (vcpu->arch.mmu.mfsrin) {
 100                                 u32 sr;
 101                                 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
 102                                 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
 103                         }
 104                         break;
 105                 }
 106                 case OP_31_XOP_MFSRIN:
 107                 {
 108                         int srnum;
 109
 110                         srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf;
 111                         if (vcpu->arch.mmu.mfsrin) {
 112                                 u32 sr;
 113                                 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
 114                                 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
 115                         }
 116                         break;
 117                 }
 118                 case OP_31_XOP_MTSR:
 119                         vcpu->arch.mmu.mtsrin(vcpu,
 120                                 (inst >> 16) & 0xf,
 121                                 kvmppc_get_gpr(vcpu, get_rs(inst)));
 122                         break;
 123                 case OP_31_XOP_MTSRIN:
 124                         vcpu->arch.mmu.mtsrin(vcpu,
 125                                 (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf,
 126                                 kvmppc_get_gpr(vcpu, get_rs(inst)));
 127                         break;
 128                 case OP_31_XOP_TLBIE:
 129                 case OP_31_XOP_TLBIEL:
 130                 {
 131                         bool large = (inst & 0x00200000) ? true : false;
 132                         ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));
 133                         vcpu->arch.mmu.tlbie(vcpu, addr, large);
 134                         break;
 135                 }
 136                 case OP_31_XOP_EIOIO:
 137                         break;
 138                 case OP_31_XOP_SLBMTE:
 139                         if (!vcpu->arch.mmu.slbmte)
 140                                 return EMULATE_FAIL;
 141
 142                         vcpu->arch.mmu.slbmte(vcpu,
 143                                         kvmppc_get_gpr(vcpu, get_rs(inst)),
 144                                         kvmppc_get_gpr(vcpu, get_rb(inst)));
 145                         break;
 146                 case OP_31_XOP_SLBIE:
 147                         if (!vcpu->arch.mmu.slbie)
 148                                 return EMULATE_FAIL;
 149
 150                         vcpu->arch.mmu.slbie(vcpu,
 151                                         kvmppc_get_gpr(vcpu, get_rb(inst)));
 152                         break;
 153                 case OP_31_XOP_SLBIA:
 154                         if (!vcpu->arch.mmu.slbia)
 155                                 return EMULATE_FAIL;
 156
 157                         vcpu->arch.mmu.slbia(vcpu);
 158                         break;
 159                 case OP_31_XOP_SLBMFEE:
 160                         if (!vcpu->arch.mmu.slbmfee) {
 161                                 emulated = EMULATE_FAIL;
 162                         } else {
 163                                 ulong t, rb;
 164
 165                                 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
 166                                 t = vcpu->arch.mmu.slbmfee(vcpu, rb);
 167                                 kvmppc_set_gpr(vcpu, get_rt(inst), t);
 168                         }
 169                         break;
 170                 case OP_31_XOP_SLBMFEV:
 171                         if (!vcpu->arch.mmu.slbmfev) {
 172                                 emulated = EMULATE_FAIL;
 173                         } else {
 174                                 ulong t, rb;
 175
 176                                 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
 177                                 t = vcpu->arch.mmu.slbmfev(vcpu, rb);
 178                                 kvmppc_set_gpr(vcpu, get_rt(inst), t);
 179                         }
 180                         break;
 181                 case OP_31_XOP_DCBZ:
 182                 {
 183                         ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));
 184                         ulong ra = 0;
 185                         ulong addr, vaddr;
 186                         u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
 187
 188                         if (get_ra(inst))
 189                                 ra = kvmppc_get_gpr(vcpu, get_ra(inst));
 190
 191                         addr = (ra + rb) & ~31ULL;
 192                         if (!(vcpu->arch.msr & MSR_SF))
 193                                 addr &= 0xffffffff;
 194                         vaddr = addr;
 195
 196                         if (kvmppc_st(vcpu, &addr, 32, zeros, true)) {
 197                                 vcpu->arch.dear = vaddr;
 198                                 vcpu->arch.fault_dear = vaddr;
 199                                 to_book3s(vcpu)->dsisr = DSISR_PROTFAULT |
 200                                                       DSISR_ISSTORE;
 201                                 kvmppc_book3s_queue_irqprio(vcpu,
 202                                         BOOK3S_INTERRUPT_DATA_STORAGE);
 203                                 kvmppc_mmu_pte_flush(vcpu, vaddr, ~0xFFFULL);
 204                         }
 205
 206                         break;
 207                 }
 208                 default:
 209                         emulated = EMULATE_FAIL;
 210                 }
 211                 break;
 212         default:
 213                 emulated = EMULATE_FAIL;
 214         }
 215
 216         if (emulated == EMULATE_FAIL)
 217                 emulated = kvmppc_emulate_paired_single(run, vcpu);
 218
 219         return emulated;
 220 }
 221
 222 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
 223                     u32 val)
 224 {
 225         if (upper) {
 226                 /* Upper BAT */
 227                 u32 bl = (val >> 2) & 0x7ff;
 228                 bat->bepi_mask = (~bl << 17);
 229                 bat->bepi = val & 0xfffe0000;
 230                 bat->vs = (val & 2) ? 1 : 0;
 231                 bat->vp = (val & 1) ? 1 : 0;
 232                 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
 233         } else {
 234                 /* Lower BAT */
 235                 bat->brpn = val & 0xfffe0000;
 236                 bat->wimg = (val >> 3) & 0xf;
 237                 bat->pp = val & 3;
 238                 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
 239         }
 240 }
 241
 242 static u32 kvmppc_read_bat(struct kvm_vcpu *vcpu, int sprn)
 243 {
 244         struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
 245         struct kvmppc_bat *bat;
 246
 247         switch (sprn) {
 248         case SPRN_IBAT0U ... SPRN_IBAT3L:
 249                 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
 250                 break;
 251         case SPRN_IBAT4U ... SPRN_IBAT7L:
 252                 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
 253                 break;
 254         case SPRN_DBAT0U ... SPRN_DBAT3L:
 255                 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
 256                 break;
 257         case SPRN_DBAT4U ... SPRN_DBAT7L:
 258                 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
 259                 break;
 260         default:
 261                 BUG();
 262         }
 263
 264         if (sprn % 2)
 265                 return bat->raw >> 32;
 266         else
 267                 return bat->raw;
 268 }
 269
 270 static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val)
 271 {
 272         struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
 273         struct kvmppc_bat *bat;
 274
 275         switch (sprn) {
 276         case SPRN_IBAT0U ... SPRN_IBAT3L:
 277                 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
 278                 break;
 279         case SPRN_IBAT4U ... SPRN_IBAT7L:
 280                 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
 281                 break;
 282         case SPRN_DBAT0U ... SPRN_DBAT3L:
 283                 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
 284                 break;
 285         case SPRN_DBAT4U ... SPRN_DBAT7L:
 286                 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
 287                 break;
 288         default:
 289                 BUG();
 290         }
 291
 292         kvmppc_set_bat(vcpu, bat, !(sprn % 2), val);
 293 }
 294
 295 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 296 {
 297         int emulated = EMULATE_DONE;
 298         ulong spr_val = kvmppc_get_gpr(vcpu, rs);
 299
 300         switch (sprn) {
 301         case SPRN_SDR1:
 302                 to_book3s(vcpu)->sdr1 = spr_val;
 303                 break;
 304         case SPRN_DSISR:
 305                 to_book3s(vcpu)->dsisr = spr_val;
 306                 break;
 307         case SPRN_DAR:
 308                 vcpu->arch.dear = spr_val;
 309                 break;
 310         case SPRN_HIOR:
 311                 to_book3s(vcpu)->hior = spr_val;
 312                 break;
 313         case SPRN_IBAT0U ... SPRN_IBAT3L:
 314         case SPRN_IBAT4U ... SPRN_IBAT7L:
 315         case SPRN_DBAT0U ... SPRN_DBAT3L:
 316         case SPRN_DBAT4U ... SPRN_DBAT7L:
 317                 kvmppc_write_bat(vcpu, sprn, (u32)spr_val);
 318                 /* BAT writes happen so rarely that we're ok to flush
 319                  * everything here */
 320                 kvmppc_mmu_pte_flush(vcpu, 0, 0);
 321                 kvmppc_mmu_flush_segments(vcpu);
 322                 break;
 323         case SPRN_HID0:
 324                 to_book3s(vcpu)->hid[0] = spr_val;
 325                 break;
 326         case SPRN_HID1:
 327                 to_book3s(vcpu)->hid[1] = spr_val;
 328                 break;
 329         case SPRN_HID2:
 330                 to_book3s(vcpu)->hid[2] = spr_val;
 331                 break;
 332         case SPRN_HID2_GEKKO:
 333                 to_book3s(vcpu)->hid[2] = spr_val;
 334                 /* HID2.PSE controls paired single on gekko */
 335                 switch (vcpu->arch.pvr) {
 336                 case 0x00080200:        /* lonestar 2.0 */
 337                 case 0x00088202:        /* lonestar 2.2 */
 338                 case 0x70000100:        /* gekko 1.0 */
 339                 case 0x00080100:        /* gekko 2.0 */
 340                 case 0x00083203:        /* gekko 2.3a */
 341                 case 0x00083213:        /* gekko 2.3b */
 342                 case 0x00083204:        /* gekko 2.4 */
 343                 case 0x00083214:        /* gekko 2.4e (8SE) - retail HW2 */
 344                         if (spr_val & (1 << 29)) { /* HID2.PSE */
 345                                 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
 346                                 kvmppc_giveup_ext(vcpu, MSR_FP);
 347                         } else {
 348                                 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
 349                         }
 350                         break;
 351                 }
 352                 break;
 353         case SPRN_HID4:
 354         case SPRN_HID4_GEKKO:
 355                 to_book3s(vcpu)->hid[4] = spr_val;
 356                 break;
 357         case SPRN_HID5:
 358                 to_book3s(vcpu)->hid[5] = spr_val;
 359                 /* guest HID5 set can change is_dcbz32 */
 360                 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
 361                     (mfmsr() & MSR_HV))
 362                         vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
 363                 break;
 364         case SPRN_GQR0:
 365         case SPRN_GQR1:
 366         case SPRN_GQR2:
 367         case SPRN_GQR3:
 368         case SPRN_GQR4:
 369         case SPRN_GQR5:
 370         case SPRN_GQR6:
 371         case SPRN_GQR7:
 372                 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
 373                 break;
 374         case SPRN_ICTC:
 375         case SPRN_THRM1:
 376         case SPRN_THRM2:
 377         case SPRN_THRM3:
 378         case SPRN_CTRLF:
 379         case SPRN_CTRLT:
 380         case SPRN_L2CR:
 381         case SPRN_MMCR0_GEKKO:
 382         case SPRN_MMCR1_GEKKO:
 383         case SPRN_PMC1_GEKKO:
 384         case SPRN_PMC2_GEKKO:
 385         case SPRN_PMC3_GEKKO:
 386         case SPRN_PMC4_GEKKO:
 387         case SPRN_WPAR_GEKKO:
 388                 break;
 389         default:
 390                 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
 391 #ifndef DEBUG_SPR
 392                 emulated = EMULATE_FAIL;
 393 #endif
 394                 break;
 395         }
 396
 397         return emulated;
 398 }
 399
 400 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 401 {
 402         int emulated = EMULATE_DONE;
 403
 404         switch (sprn) {
 405         case SPRN_IBAT0U ... SPRN_IBAT3L:
 406         case SPRN_IBAT4U ... SPRN_IBAT7L:
 407         case SPRN_DBAT0U ... SPRN_DBAT3L:
 408         case SPRN_DBAT4U ... SPRN_DBAT7L:
 409                 kvmppc_set_gpr(vcpu, rt, kvmppc_read_bat(vcpu, sprn));
 410                 break;
 411         case SPRN_SDR1:
 412                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
 413                 break;
 414         case SPRN_DSISR:
 415                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->dsisr);
 416                 break;
 417         case SPRN_DAR:
 418                 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear);
 419                 break;
 420         case SPRN_HIOR:
 421                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
 422                 break;
 423         case SPRN_HID0:
 424                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
 425                 break;
 426         case SPRN_HID1:
 427                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
 428                 break;
 429         case SPRN_HID2:
 430         case SPRN_HID2_GEKKO:
 431                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
 432                 break;
 433         case SPRN_HID4:
 434         case SPRN_HID4_GEKKO:
 435                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
 436                 break;
 437         case SPRN_HID5:
 438                 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
 439                 break;
 440         case SPRN_GQR0:
 441         case SPRN_GQR1:
 442         case SPRN_GQR2:
 443         case SPRN_GQR3:
 444         case SPRN_GQR4:
 445         case SPRN_GQR5:
 446         case SPRN_GQR6:
 447         case SPRN_GQR7:
 448                 kvmppc_set_gpr(vcpu, rt,
 449                                to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]);
 450                 break;
 451         case SPRN_THRM1:
 452         case SPRN_THRM2:
 453         case SPRN_THRM3:
 454         case SPRN_CTRLF:
 455         case SPRN_CTRLT:
 456         case SPRN_L2CR:
 457         case SPRN_MMCR0_GEKKO:
 458         case SPRN_MMCR1_GEKKO:
 459         case SPRN_PMC1_GEKKO:
 460         case SPRN_PMC2_GEKKO:
 461         case SPRN_PMC3_GEKKO:
 462         case SPRN_PMC4_GEKKO:
 463         case SPRN_WPAR_GEKKO:
 464                 kvmppc_set_gpr(vcpu, rt, 0);
 465                 break;
 466         default:
 467                 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
 468 #ifndef DEBUG_SPR
 469                 emulated = EMULATE_FAIL;
 470 #endif
 471                 break;
 472         }
 473
 474         return emulated;
 475 }
 476