2 * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; version 2 of the
11 #ifndef _ASM_MPIC_MSGR_H
12 #define _ASM_MPIC_MSGR_H
14 #include <linux/types.h>
15 #include <linux/spinlock.h>
27 /* Get a message register
29 * @reg_num: the MPIC message register to get
31 * A pointer to the message register is returned. If
32 * the message register asked for is already in use, then
33 * EBUSY is returned. If the number given is not associated
34 * with an actual message register, then ENODEV is returned.
35 * Successfully getting the register marks it as in use.
37 extern struct mpic_msgr *mpic_msgr_get(unsigned int reg_num);
39 /* Relinquish a message register
41 * @msgr: the message register to return
43 * Disables the given message register and marks it as free.
44 * After this call has completed successully the message
45 * register is available to be acquired by a call to
48 extern void mpic_msgr_put(struct mpic_msgr *msgr);
50 /* Enable a message register
52 * @msgr: the message register to enable
54 * The given message register is enabled for sending
57 extern void mpic_msgr_enable(struct mpic_msgr *msgr);
59 /* Disable a message register
61 * @msgr: the message register to disable
63 * The given message register is disabled for sending
66 extern void mpic_msgr_disable(struct mpic_msgr *msgr);
68 /* Write a message to a message register
70 * @msgr: the message register to write to
71 * @message: the message to write
73 * The given 32-bit message is written to the given message
74 * register. Writing to an enabled message registers fires
77 static inline void mpic_msgr_write(struct mpic_msgr *msgr, u32 message)
79 out_be32(msgr->base, message);
82 /* Read a message from a message register
84 * @msgr: the message register to read from
86 * Returns the 32-bit value currently in the given message register.
87 * Upon reading the register any interrupts for that register are
90 static inline u32 mpic_msgr_read(struct mpic_msgr *msgr)
92 return in_be32(msgr->base);
95 /* Clear a message register
97 * @msgr: the message register to clear
99 * Clears any interrupts associated with the given message register.
101 static inline void mpic_msgr_clear(struct mpic_msgr *msgr)
103 (void) mpic_msgr_read(msgr);
106 /* Set the destination CPU for the message register
108 * @msgr: the message register whose destination is to be set
109 * @cpu_num: the Linux CPU number to bind the message register to
111 * Note that the CPU number given is the CPU number used by the kernel
112 * and *not* the actual hardware CPU number.
114 static inline void mpic_msgr_set_destination(struct mpic_msgr *msgr,
117 out_be32(msgr->base, 1 << get_hard_smp_processor_id(cpu_num));
120 /* Get the IRQ number for the message register
121 * @msgr: the message register whose IRQ is to be returned
123 * Returns the IRQ number associated with the given message register.
124 * NO_IRQ is returned if this message register is not capable of
125 * receiving interrupts. What message register can and cannot receive
126 * interrupts is specified in the device tree for the system.
128 static inline int mpic_msgr_get_irq(struct mpic_msgr *msgr)