1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
50 #define EX_PPR 88 /* SMT thread status register (priority) */
53 #ifdef CONFIG_RELOCATABLE
54 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
55 ld r12,PACAKBASE(r13); /* get high part of &label */ \
56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
57 LOAD_HANDLER(r12,label); \
59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
61 mtmsrd r10,1; /* Set RI (EE=0) */ \
64 /* If not relocatable, we can jump directly -- and save messing with LR */
65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
69 mtmsrd r10,1; /* Set RI (EE=0) */ \
72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
81 EXCEPTION_PROLOG_0(area); \
82 EXCEPTION_PROLOG_1(area, extra, vec); \
83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
86 * We're short on space and time in the exception prolog, so we can't
87 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
88 * low halfword of the address, but for Kdump we need the whole low
91 #define LOAD_HANDLER(reg, label) \
92 /* Handlers must be within 64K of kbase, which must be 64k aligned */ \
93 ori reg,reg,(label)-_stext; /* virt addr of handler ... */
95 /* Exception register prefixes */
99 #if defined(CONFIG_RELOCATABLE)
101 * If we support interrupts with relocation on AND we're a relocatable kernel,
102 * we need to use CTR to get to the 2nd level handler. So, save/restore it
105 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13)
106 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13)
107 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg
109 /* ...else CTR is unused and in register. */
110 #define SAVE_CTR(reg, area)
111 #define GET_CTR(reg, area) mfctr reg
112 #define RESTORE_CTR(reg, area)
116 * PPR save/restore macros used in exceptions_64s.S
117 * Used for P7 or later processors
119 #define SAVE_PPR(area, ra, rb) \
120 BEGIN_FTR_SECTION_NESTED(940) \
121 ld ra,PACACURRENT(r13); \
122 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
123 std rb,TASKTHREADPPR(ra); \
124 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
126 #define RESTORE_PPR_PACA(area, ra) \
127 BEGIN_FTR_SECTION_NESTED(941) \
128 ld ra,area+EX_PPR(r13); \
130 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
133 * Increase the priority on systems where PPR save/restore is not
134 * implemented/ supported.
136 #define HMT_MEDIUM_PPR_DISCARD \
137 BEGIN_FTR_SECTION_NESTED(942) \
139 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/
142 * Get an SPR into a register if the CPU has the given feature
144 #define OPT_GET_SPR(ra, spr, ftr) \
145 BEGIN_FTR_SECTION_NESTED(943) \
147 END_FTR_SECTION_NESTED(ftr,ftr,943)
150 * Save a register to the PACA if the CPU has the given feature
152 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
153 BEGIN_FTR_SECTION_NESTED(943) \
154 std ra,offset(r13); \
155 END_FTR_SECTION_NESTED(ftr,ftr,943)
157 #define EXCEPTION_PROLOG_0(area) \
159 std r9,area+EX_R9(r13); /* save r9 */ \
160 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
162 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
163 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
165 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
166 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
167 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
168 SAVE_CTR(r10, area); \
171 std r11,area+EX_R11(r13); \
172 std r12,area+EX_R12(r13); \
174 std r10,area+EX_R13(r13)
175 #define EXCEPTION_PROLOG_1(area, extra, vec) \
176 __EXCEPTION_PROLOG_1(area, extra, vec)
178 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
179 ld r12,PACAKBASE(r13); /* get high part of &label */ \
180 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
181 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
182 LOAD_HANDLER(r12,label) \
183 mtspr SPRN_##h##SRR0,r12; \
184 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
185 mtspr SPRN_##h##SRR1,r10; \
187 b . /* prevent speculative execution */
188 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
189 __EXCEPTION_PROLOG_PSERIES_1(label, h)
191 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
192 EXCEPTION_PROLOG_0(area); \
193 EXCEPTION_PROLOG_1(area, extra, vec); \
194 EXCEPTION_PROLOG_PSERIES_1(label, h);
196 #define __KVMTEST(n) \
197 lbz r10,HSTATE_IN_GUEST(r13); \
201 #define __KVM_HANDLER(area, h, n) \
203 BEGIN_FTR_SECTION_NESTED(947) \
204 ld r10,area+EX_CFAR(r13); \
205 std r10,HSTATE_CFAR(r13); \
206 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
207 BEGIN_FTR_SECTION_NESTED(948) \
208 ld r10,area+EX_PPR(r13); \
209 std r10,HSTATE_PPR(r13); \
210 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
211 ld r10,area+EX_R10(r13); \
212 stw r9,HSTATE_SCRATCH1(r13); \
213 ld r9,area+EX_R9(r13); \
214 std r12,HSTATE_SCRATCH0(r13); \
218 #define __KVM_HANDLER_SKIP(area, h, n) \
220 cmpwi r10,KVM_GUEST_MODE_SKIP; \
221 ld r10,area+EX_R10(r13); \
223 stw r9,HSTATE_SCRATCH1(r13); \
224 BEGIN_FTR_SECTION_NESTED(948) \
225 ld r9,area+EX_PPR(r13); \
226 std r9,HSTATE_PPR(r13); \
227 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
228 ld r9,area+EX_R9(r13); \
229 std r12,HSTATE_SCRATCH0(r13); \
231 b kvmppc_interrupt; \
232 89: mtocrf 0x80,r9; \
233 ld r9,area+EX_R9(r13); \
234 b kvmppc_skip_##h##interrupt
236 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
237 #define KVMTEST(n) __KVMTEST(n)
238 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
239 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
243 #define KVM_HANDLER(area, h, n)
244 #define KVM_HANDLER_SKIP(area, h, n)
247 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
248 #define KVMTEST_PR(n) __KVMTEST(n)
249 #define KVM_HANDLER_PR(area, h, n) __KVM_HANDLER(area, h, n)
250 #define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
253 #define KVMTEST_PR(n)
254 #define KVM_HANDLER_PR(area, h, n)
255 #define KVM_HANDLER_PR_SKIP(area, h, n)
261 * The common exception prolog is used for all except a few exceptions
262 * such as a segment miss on a kernel address. We have to be prepared
263 * to take another exception from the point where we first touch the
264 * kernel stack onwards.
266 * On entry r13 points to the paca, r9-r13 are saved in the paca,
267 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
268 * SRR1, and relocation is on.
270 #define EXCEPTION_PROLOG_COMMON(n, area) \
271 andi. r10,r12,MSR_PR; /* See if coming from user */ \
272 mr r10,r1; /* Save r1 */ \
273 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
275 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
276 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
277 blt+ cr1,3f; /* abort if it is */ \
278 li r1,(n); /* will be reloaded later */ \
279 sth r1,PACA_TRAP_SAVE(r13); \
280 std r3,area+EX_R3(r13); \
281 addi r3,r13,area; /* r3 -> where regs are saved*/ \
282 RESTORE_CTR(r1, area); \
284 3: std r9,_CCR(r1); /* save CR in stackframe */ \
285 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
286 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
287 std r10,0(r1); /* make stack chain pointer */ \
288 std r0,GPR0(r1); /* save r0 in stackframe */ \
289 std r10,GPR1(r1); /* save r1 in stackframe */ \
290 beq 4f; /* if from kernel mode */ \
291 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
292 SAVE_PPR(area, r9, r10); \
293 4: std r2,GPR2(r1); /* save r2 in stackframe */ \
294 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
295 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
296 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
297 ld r10,area+EX_R10(r13); \
300 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
301 ld r10,area+EX_R12(r13); \
302 ld r11,area+EX_R13(r13); \
306 BEGIN_FTR_SECTION_NESTED(66); \
307 ld r10,area+EX_CFAR(r13); \
308 std r10,ORIG_GPR3(r1); \
309 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
310 mflr r9; /* Get LR, later save to stack */ \
311 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
313 GET_CTR(r10, area); \
315 lbz r10,PACASOFTIRQEN(r13); \
316 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
320 std r9,_TRAP(r1); /* set trap number */ \
322 ld r11,exception_marker@toc(r2); \
323 std r10,RESULT(r1); /* clear regs->result */ \
324 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
330 #define STD_EXCEPTION_PSERIES(loc, vec, label) \
332 .globl label##_pSeries; \
334 HMT_MEDIUM_PPR_DISCARD; \
335 SET_SCRATCH0(r13); /* save r13 */ \
336 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
337 EXC_STD, KVMTEST_PR, vec)
339 /* Version of above for when we have to branch out-of-line */
340 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \
341 .globl label##_pSeries; \
343 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
344 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_STD)
346 #define STD_EXCEPTION_HV(loc, vec, label) \
350 HMT_MEDIUM_PPR_DISCARD; \
351 SET_SCRATCH0(r13); /* save r13 */ \
352 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
353 EXC_HV, KVMTEST, vec)
355 /* Version of above for when we have to branch out-of-line */
356 #define STD_EXCEPTION_HV_OOL(vec, label) \
359 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, vec); \
360 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV)
362 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
364 .globl label##_relon_pSeries; \
365 label##_relon_pSeries: \
366 HMT_MEDIUM_PPR_DISCARD; \
367 /* No guest interrupts come through here */ \
368 SET_SCRATCH0(r13); /* save r13 */ \
369 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
370 EXC_STD, NOTEST, vec)
372 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
373 .globl label##_relon_pSeries; \
374 label##_relon_pSeries: \
375 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
376 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_STD)
378 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
380 .globl label##_relon_hv; \
382 HMT_MEDIUM_PPR_DISCARD; \
383 /* No guest interrupts come through here */ \
384 SET_SCRATCH0(r13); /* save r13 */ \
385 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
388 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
389 .globl label##_relon_hv; \
391 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
392 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, EXC_HV)
394 /* This associate vector numbers with bits in paca->irq_happened */
395 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
396 #define SOFTEN_VALUE_0x502 PACA_IRQ_EE
397 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
398 #define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
399 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
400 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
401 #define SOFTEN_VALUE_0xe82 PACA_IRQ_DBELL
403 #define __SOFTEN_TEST(h, vec) \
404 lbz r10,PACASOFTIRQEN(r13); \
406 li r10,SOFTEN_VALUE_##vec; \
407 beq masked_##h##interrupt
408 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
410 #define SOFTEN_TEST_PR(vec) \
412 _SOFTEN_TEST(EXC_STD, vec)
414 #define SOFTEN_TEST_HV(vec) \
416 _SOFTEN_TEST(EXC_HV, vec)
418 #define SOFTEN_TEST_HV_201(vec) \
420 _SOFTEN_TEST(EXC_STD, vec)
422 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
423 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
425 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
426 SET_SCRATCH0(r13); /* save r13 */ \
427 EXCEPTION_PROLOG_0(PACA_EXGEN); \
428 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
429 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
431 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
432 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
434 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
436 .globl label##_pSeries; \
438 HMT_MEDIUM_PPR_DISCARD; \
439 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
440 EXC_STD, SOFTEN_TEST_PR)
442 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
446 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
447 EXC_HV, SOFTEN_TEST_HV)
449 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
452 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
453 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
455 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
456 HMT_MEDIUM_PPR_DISCARD; \
457 SET_SCRATCH0(r13); /* save r13 */ \
458 EXCEPTION_PROLOG_0(PACA_EXGEN); \
459 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
460 EXCEPTION_RELON_PROLOG_PSERIES_1(label##_common, h);
461 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
462 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
464 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
466 .globl label##_relon_pSeries; \
467 label##_relon_pSeries: \
468 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
469 EXC_STD, SOFTEN_NOTEST_PR)
471 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
473 .globl label##_relon_hv; \
475 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
476 EXC_HV, SOFTEN_NOTEST_HV)
478 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
479 .globl label##_relon_hv; \
481 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_HV, vec); \
482 EXCEPTION_PROLOG_PSERIES_1(label##_common, EXC_HV);
485 * Our exception common code can be passed various "additions"
486 * to specify the behaviour of interrupts, whether to kick the
490 /* Exception addition: Hard disable interrupts */
491 #define DISABLE_INTS RECONCILE_IRQ_STATE(r10,r11)
496 #define RUNLATCH_ON \
498 CURRENT_THREAD_INFO(r3, r1); \
499 ld r4,TI_LOCAL_FLAGS(r3); \
500 andi. r0,r4,_TLF_RUNLATCH; \
501 beql ppc64_runlatch_on_trampoline; \
502 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
504 #define EXCEPTION_COMMON(trap, label, hdlr, ret, additions) \
506 .globl label##_common; \
508 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
510 addi r3,r1,STACK_FRAME_OVERHEAD; \
514 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
515 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except, \
516 ADD_NVGPRS;DISABLE_INTS)
519 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
520 * in the idle task and therefore need the special idle handling
521 * (finish nap and runlatch)
523 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
524 EXCEPTION_COMMON(trap, label, hdlr, ret_from_except_lite, \
525 FINISH_NAP;DISABLE_INTS;RUNLATCH_ON)
528 * When the idle code in power4_idle puts the CPU into NAP mode,
529 * it has to do so in a loop, and relies on the external interrupt
530 * and decrementer interrupt entry code to get it out of the loop.
531 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
532 * to signal that it is in the loop and needs help to get out.
534 #ifdef CONFIG_PPC_970_NAP
537 CURRENT_THREAD_INFO(r11, r1); \
538 ld r9,TI_LOCAL_FLAGS(r11); \
539 andi. r10,r9,_TLF_NAPPING; \
540 bnel power4_fixup_nap; \
541 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
546 #endif /* _ASM_POWERPC_EXCEPTION_H */