2 * Atheros AR71XX/AR724X specific PCI setup code
4 * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
5 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
8 * Parts of this file are based on Atheros' 2.6.15 BSP
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/pci.h>
17 #include <linux/resource.h>
18 #include <linux/platform_device.h>
19 #include <asm/mach-ath79/ar71xx_regs.h>
20 #include <asm/mach-ath79/ath79.h>
21 #include <asm/mach-ath79/irq.h>
24 static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
25 static const struct ath79_pci_irq *ath79_pci_irq_map __initdata;
26 static unsigned ath79_pci_nr_irqs __initdata;
28 static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = {
32 .irq = ATH79_PCI_IRQ(0),
36 .irq = ATH79_PCI_IRQ(1),
40 .irq = ATH79_PCI_IRQ(2),
44 static const struct ath79_pci_irq ar724x_pci_irq_map[] __initconst = {
48 .irq = ATH79_PCI_IRQ(0),
52 int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
57 if (ath79_pci_nr_irqs == 0 ||
58 ath79_pci_irq_map == NULL) {
59 if (soc_is_ar71xx()) {
60 ath79_pci_irq_map = ar71xx_pci_irq_map;
61 ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);
62 } else if (soc_is_ar724x() ||
65 ath79_pci_irq_map = ar724x_pci_irq_map;
66 ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
68 pr_crit("pci %s: invalid irq map\n",
69 pci_name((struct pci_dev *) dev));
74 for (i = 0; i < ath79_pci_nr_irqs; i++) {
75 const struct ath79_pci_irq *entry;
77 entry = &ath79_pci_irq_map[i];
78 if (entry->bus == dev->bus->number &&
79 entry->slot == slot &&
87 pr_crit("pci %s: no irq found for pin %u\n",
88 pci_name((struct pci_dev *) dev), pin);
90 pr_info("pci %s: using irq %d for pin %u\n",
91 pci_name((struct pci_dev *) dev), irq, pin);
96 int pcibios_plat_dev_init(struct pci_dev *dev)
98 if (ath79_pci_plat_dev_init)
99 return ath79_pci_plat_dev_init(dev);
104 void __init ath79_pci_set_irq_map(unsigned nr_irqs,
105 const struct ath79_pci_irq *map)
107 ath79_pci_nr_irqs = nr_irqs;
108 ath79_pci_irq_map = map;
111 void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev))
113 ath79_pci_plat_dev_init = func;
116 static struct platform_device *
117 ath79_register_pci_ar71xx(void)
119 struct platform_device *pdev;
120 struct resource res[2];
122 memset(res, 0, sizeof(res));
124 res[0].name = "cfg_base";
125 res[0].flags = IORESOURCE_MEM;
126 res[0].start = AR71XX_PCI_CFG_BASE;
127 res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1;
129 res[1].flags = IORESOURCE_IRQ;
130 res[1].start = ATH79_CPU_IRQ_IP2;
131 res[1].end = ATH79_CPU_IRQ_IP2;
133 pdev = platform_device_register_simple("ar71xx-pci", -1,
134 res, ARRAY_SIZE(res));
138 static struct platform_device *
139 ath79_register_pci_ar724x(int id,
140 unsigned long cfg_base,
141 unsigned long ctrl_base,
142 unsigned long mem_base,
143 unsigned long mem_size,
144 unsigned long io_base,
147 struct platform_device *pdev;
148 struct resource res[5];
150 memset(res, 0, sizeof(res));
152 res[0].name = "cfg_base";
153 res[0].flags = IORESOURCE_MEM;
154 res[0].start = cfg_base;
155 res[0].end = cfg_base + AR724X_PCI_CFG_SIZE - 1;
157 res[1].name = "ctrl_base";
158 res[1].flags = IORESOURCE_MEM;
159 res[1].start = ctrl_base;
160 res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1;
162 res[2].flags = IORESOURCE_IRQ;
166 res[3].name = "mem_base";
167 res[3].flags = IORESOURCE_MEM;
168 res[3].start = mem_base;
169 res[3].end = mem_base + mem_size - 1;
171 res[4].name = "io_base";
172 res[4].flags = IORESOURCE_IO;
173 res[4].start = io_base;
174 res[4].end = io_base;
176 pdev = platform_device_register_simple("ar724x-pci", id,
177 res, ARRAY_SIZE(res));
181 int __init ath79_register_pci(void)
183 struct platform_device *pdev = NULL;
185 if (soc_is_ar71xx()) {
186 pdev = ath79_register_pci_ar71xx();
187 } else if (soc_is_ar724x()) {
188 pdev = ath79_register_pci_ar724x(-1,
190 AR724X_PCI_CTRL_BASE,
195 } else if (soc_is_ar9342() ||
199 bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
200 if ((bootstrap & AR934X_BOOTSTRAP_PCIE_RC) == 0)
203 pdev = ath79_register_pci_ar724x(-1,
205 AR724X_PCI_CTRL_BASE,
216 pr_err("unable to register PCI controller device\n");
218 return pdev ? 0 : -ENODEV;