2 * OMAP 32ksynctimer/counter_32k-related code
4 * Copyright (C) 2009 Texas Instruments
5 * Copyright (C) 2010 Nokia Corporation
6 * Tony Lindgren <tony@atomide.com>
7 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/clk.h>
19 #include <linux/sched.h>
21 #include <asm/sched_clock.h>
23 #include <plat/common.h>
24 #include <plat/board.h>
26 #include <plat/clock.h>
30 * 32KHz clocksource ... always available, on pretty most chips except
31 * OMAP 730 and 1510. Other timers could be used as clocksources, with
32 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
33 * but systems won't necessarily want to spend resources that way.
36 #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
38 #if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
40 #include <linux/clocksource.h>
43 * offset_32k holds the init time counter value. It is then subtracted
44 * from every counter read to achieve a counter that counts time from the
45 * kernel boot (needed for sched_clock()).
47 static u32 offset_32k __read_mostly;
49 #ifdef CONFIG_ARCH_OMAP16XX
50 static cycle_t notrace omap16xx_32k_read(struct clocksource *cs)
52 return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
55 #define omap16xx_32k_read NULL
58 #ifdef CONFIG_ARCH_OMAP2420
59 static cycle_t notrace omap2420_32k_read(struct clocksource *cs)
61 return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
64 #define omap2420_32k_read NULL
67 #ifdef CONFIG_ARCH_OMAP2430
68 static cycle_t notrace omap2430_32k_read(struct clocksource *cs)
70 return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
73 #define omap2430_32k_read NULL
76 #ifdef CONFIG_ARCH_OMAP3
77 static cycle_t notrace omap34xx_32k_read(struct clocksource *cs)
79 return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
82 #define omap34xx_32k_read NULL
85 #ifdef CONFIG_ARCH_OMAP4
86 static cycle_t notrace omap44xx_32k_read(struct clocksource *cs)
88 return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
91 #define omap44xx_32k_read NULL
95 * Kernel assumes that sched_clock can be called early but may not have
98 static cycle_t notrace omap_32k_read_dummy(struct clocksource *cs)
103 static struct clocksource clocksource_32k = {
104 .name = "32k_counter",
106 .read = omap_32k_read_dummy,
107 .mask = CLOCKSOURCE_MASK(32),
108 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
112 * Returns current time from boot in nsecs. It's OK for this to wrap
113 * around for now, as it's just a relative time stamp.
115 static DEFINE_CLOCK_DATA(cd);
118 * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
119 * This gives a resolution of about 30us and a wrap period of about 36hrs.
121 #define SC_MULT 4000000000u
124 unsigned long long notrace sched_clock(void)
126 u32 cyc = clocksource_32k.read(&clocksource_32k);
127 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
130 static void notrace omap_update_sched_clock(void)
132 u32 cyc = clocksource_32k.read(&clocksource_32k);
133 update_sched_clock(&cd, cyc, (u32)~0);
137 * read_persistent_clock - Return time from a persistent clock.
139 * Reads the time from a source which isn't disabled during PM, the
140 * 32k sync timer. Convert the cycles elapsed since last read into
141 * nsecs and adds to a monotonically increasing timespec.
143 static struct timespec persistent_ts;
144 static cycles_t cycles, last_cycles;
145 void read_persistent_clock(struct timespec *ts)
147 unsigned long long nsecs;
149 struct timespec *tsp = &persistent_ts;
151 last_cycles = cycles;
152 cycles = clocksource_32k.read(&clocksource_32k);
153 delta = cycles - last_cycles;
155 nsecs = clocksource_cyc2ns(delta,
156 clocksource_32k.mult, clocksource_32k.shift);
158 timespec_add_ns(tsp, nsecs);
162 static int __init omap_init_clocksource_32k(void)
164 static char err[] __initdata = KERN_ERR
165 "%s: can't register clocksource!\n";
167 if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
168 struct clk *sync_32k_ick;
170 if (cpu_is_omap16xx())
171 clocksource_32k.read = omap16xx_32k_read;
172 else if (cpu_is_omap2420())
173 clocksource_32k.read = omap2420_32k_read;
174 else if (cpu_is_omap2430())
175 clocksource_32k.read = omap2430_32k_read;
176 else if (cpu_is_omap34xx())
177 clocksource_32k.read = omap34xx_32k_read;
178 else if (cpu_is_omap44xx())
179 clocksource_32k.read = omap44xx_32k_read;
183 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
185 clk_enable(sync_32k_ick);
187 offset_32k = clocksource_32k.read(&clocksource_32k);
189 if (clocksource_register_hz(&clocksource_32k, 32768))
190 printk(err, clocksource_32k.name);
192 init_fixed_sched_clock(&cd, omap_update_sched_clock, 32,
193 32768, SC_MULT, SC_SHIFT);
197 arch_initcall(omap_init_clocksource_32k);
199 #endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */