2 * Generic GPIO driver for logic cells found in the Nomadik SoC
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/device.h>
16 #include <linux/platform_device.h>
18 #include <linux/clk.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/spinlock.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/slab.h>
26 #include <plat/pincfg.h>
27 #include <mach/hardware.h>
28 #include <mach/gpio.h>
31 * The GPIO module in the Nomadik family of Systems-on-Chip is an
32 * AMBA device, managing 32 pins and alternate functions. The logic block
33 * is currently only used in the Nomadik.
35 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
38 #define NMK_GPIO_PER_CHIP 32
39 struct nmk_gpio_chip {
40 struct gpio_chip chip;
43 unsigned int parent_irq;
45 /* Keep track of configured edges */
50 static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
51 unsigned offset, int gpio_mode)
53 u32 bit = 1 << offset;
56 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
57 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
58 if (gpio_mode & NMK_GPIO_ALT_A)
60 if (gpio_mode & NMK_GPIO_ALT_B)
62 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
63 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
66 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
67 unsigned offset, enum nmk_gpio_slpm mode)
69 u32 bit = 1 << offset;
72 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
73 if (mode == NMK_GPIO_SLPM_NOCHANGE)
77 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
80 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
81 unsigned offset, enum nmk_gpio_pull pull)
83 u32 bit = 1 << offset;
86 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
87 if (pull == NMK_GPIO_PULL_NONE)
91 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
93 if (pull == NMK_GPIO_PULL_UP)
94 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
95 else if (pull == NMK_GPIO_PULL_DOWN)
96 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
99 static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
102 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
105 static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
108 static const char *afnames[] = {
109 [NMK_GPIO_ALT_GPIO] = "GPIO",
110 [NMK_GPIO_ALT_A] = "A",
111 [NMK_GPIO_ALT_B] = "B",
112 [NMK_GPIO_ALT_C] = "C"
114 static const char *pullnames[] = {
115 [NMK_GPIO_PULL_NONE] = "none",
116 [NMK_GPIO_PULL_UP] = "up",
117 [NMK_GPIO_PULL_DOWN] = "down",
118 [3] /* illegal */ = "??"
120 static const char *slpmnames[] = {
121 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
122 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
125 int pin = PIN_NUM(cfg);
126 int pull = PIN_PULL(cfg);
127 int af = PIN_ALT(cfg);
128 int slpm = PIN_SLPM(cfg);
130 dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s\n",
131 pin, afnames[af], pullnames[pull], slpmnames[slpm]);
133 __nmk_gpio_make_input(nmk_chip, offset);
134 __nmk_gpio_set_pull(nmk_chip, offset, pull);
135 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
136 __nmk_gpio_set_mode(nmk_chip, offset, af);
140 * nmk_config_pin - configure a pin's mux attributes
141 * @cfg: pin confguration
143 * Configures a pin's mode (alternate function or GPIO), its pull up status,
144 * and its sleep mode based on the specified configuration. The @cfg is
145 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
146 * are constructed using, and can be further enhanced with, the macros in
149 * If a pin's mode is set to GPIO, it is configured as an input to avoid
150 * side-effects. The gpio can be manipulated later using standard GPIO API
153 int nmk_config_pin(pin_cfg_t cfg)
155 struct nmk_gpio_chip *nmk_chip;
156 int gpio = PIN_NUM(cfg);
159 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
163 spin_lock_irqsave(&nmk_chip->lock, flags);
164 __nmk_config_pin(nmk_chip, gpio - nmk_chip->chip.base, cfg);
165 spin_unlock_irqrestore(&nmk_chip->lock, flags);
169 EXPORT_SYMBOL(nmk_config_pin);
172 * nmk_config_pins - configure several pins at once
173 * @cfgs: array of pin configurations
174 * @num: number of elments in the array
176 * Configures several pins using nmk_config_pin(). Refer to that function for
177 * further information.
179 int nmk_config_pins(pin_cfg_t *cfgs, int num)
184 for (i = 0; i < num; i++) {
185 int ret = nmk_config_pin(cfgs[i]);
192 EXPORT_SYMBOL(nmk_config_pins);
195 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
197 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
199 * Sets the sleep mode of a pin. If @mode is NMK_GPIO_SLPM_INPUT, the pin is
200 * changed to an input (with pullup/down enabled) in sleep and deep sleep. If
201 * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
202 * configured even when in sleep and deep sleep.
204 * On DB8500v2 onwards, this setting loses the previous meaning and instead
205 * indicates if wakeup detection is enabled on the pin. Note that
206 * enable_irq_wake() will automatically enable wakeup detection.
208 int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
210 struct nmk_gpio_chip *nmk_chip;
213 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
217 spin_lock_irqsave(&nmk_chip->lock, flags);
218 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
219 spin_unlock_irqrestore(&nmk_chip->lock, flags);
225 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
227 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
229 * Enables/disables pull up/down on a specified pin. This only takes effect if
230 * the pin is configured as an input (either explicitly or by the alternate
233 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
234 * configured as an input. Otherwise, due to the way the controller registers
235 * work, this function will change the value output on the pin.
237 int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
239 struct nmk_gpio_chip *nmk_chip;
242 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
246 spin_lock_irqsave(&nmk_chip->lock, flags);
247 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
248 spin_unlock_irqrestore(&nmk_chip->lock, flags);
254 int nmk_gpio_set_mode(int gpio, int gpio_mode)
256 struct nmk_gpio_chip *nmk_chip;
259 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
263 spin_lock_irqsave(&nmk_chip->lock, flags);
264 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
265 spin_unlock_irqrestore(&nmk_chip->lock, flags);
269 EXPORT_SYMBOL(nmk_gpio_set_mode);
271 int nmk_gpio_get_mode(int gpio)
273 struct nmk_gpio_chip *nmk_chip;
274 u32 afunc, bfunc, bit;
276 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
280 bit = 1 << (gpio - nmk_chip->chip.base);
282 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
283 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
285 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
287 EXPORT_SYMBOL(nmk_gpio_get_mode);
291 static inline int nmk_gpio_get_bitmask(int gpio)
293 return 1 << (gpio % 32);
296 static void nmk_gpio_irq_ack(unsigned int irq)
299 struct nmk_gpio_chip *nmk_chip;
301 gpio = NOMADIK_IRQ_TO_GPIO(irq);
302 nmk_chip = get_irq_chip_data(irq);
305 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
308 enum nmk_gpio_irq_type {
313 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
314 int gpio, enum nmk_gpio_irq_type which,
317 u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
318 u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
319 u32 bitmask = nmk_gpio_get_bitmask(gpio);
322 /* we must individually set/clear the two edges */
323 if (nmk_chip->edge_rising & bitmask) {
324 reg = readl(nmk_chip->addr + rimsc);
329 writel(reg, nmk_chip->addr + rimsc);
331 if (nmk_chip->edge_falling & bitmask) {
332 reg = readl(nmk_chip->addr + fimsc);
337 writel(reg, nmk_chip->addr + fimsc);
341 static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which,
345 struct nmk_gpio_chip *nmk_chip;
349 gpio = NOMADIK_IRQ_TO_GPIO(irq);
350 nmk_chip = get_irq_chip_data(irq);
351 bitmask = nmk_gpio_get_bitmask(gpio);
355 spin_lock_irqsave(&nmk_chip->lock, flags);
356 __nmk_gpio_irq_modify(nmk_chip, gpio, which, enable);
357 spin_unlock_irqrestore(&nmk_chip->lock, flags);
362 static void nmk_gpio_irq_mask(unsigned int irq)
364 nmk_gpio_irq_modify(irq, NORMAL, false);
367 static void nmk_gpio_irq_unmask(unsigned int irq)
369 nmk_gpio_irq_modify(irq, NORMAL, true);
372 static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on)
374 struct nmk_gpio_chip *nmk_chip;
378 gpio = NOMADIK_IRQ_TO_GPIO(irq);
379 nmk_chip = get_irq_chip_data(irq);
383 spin_lock_irqsave(&nmk_chip->lock, flags);
384 #ifdef CONFIG_ARCH_U8500
385 if (cpu_is_u8500v2()) {
386 __nmk_gpio_set_slpm(nmk_chip, gpio,
387 on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
388 : NMK_GPIO_SLPM_WAKEUP_DISABLE);
391 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
392 spin_unlock_irqrestore(&nmk_chip->lock, flags);
397 static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
399 struct irq_desc *desc = irq_to_desc(irq);
400 bool enabled = !(desc->status & IRQ_DISABLED);
401 bool wake = desc->wake_depth;
403 struct nmk_gpio_chip *nmk_chip;
407 gpio = NOMADIK_IRQ_TO_GPIO(irq);
408 nmk_chip = get_irq_chip_data(irq);
409 bitmask = nmk_gpio_get_bitmask(gpio);
413 if (type & IRQ_TYPE_LEVEL_HIGH)
415 if (type & IRQ_TYPE_LEVEL_LOW)
418 spin_lock_irqsave(&nmk_chip->lock, flags);
421 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
424 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
426 nmk_chip->edge_rising &= ~bitmask;
427 if (type & IRQ_TYPE_EDGE_RISING)
428 nmk_chip->edge_rising |= bitmask;
430 nmk_chip->edge_falling &= ~bitmask;
431 if (type & IRQ_TYPE_EDGE_FALLING)
432 nmk_chip->edge_falling |= bitmask;
435 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
438 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
440 spin_unlock_irqrestore(&nmk_chip->lock, flags);
445 static struct irq_chip nmk_gpio_irq_chip = {
446 .name = "Nomadik-GPIO",
447 .ack = nmk_gpio_irq_ack,
448 .mask = nmk_gpio_irq_mask,
449 .unmask = nmk_gpio_irq_unmask,
450 .set_type = nmk_gpio_irq_set_type,
451 .set_wake = nmk_gpio_irq_set_wake,
454 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
456 struct nmk_gpio_chip *nmk_chip;
457 struct irq_chip *host_chip = get_irq_chip(irq);
458 unsigned int gpio_irq;
460 unsigned int first_irq;
462 if (host_chip->mask_ack)
463 host_chip->mask_ack(irq);
465 host_chip->mask(irq);
470 nmk_chip = get_irq_data(irq);
471 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
472 while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
473 gpio_irq = first_irq + __ffs(pending);
474 generic_handle_irq(gpio_irq);
477 host_chip->unmask(irq);
480 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
482 unsigned int first_irq;
485 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
486 for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
487 set_irq_chip(i, &nmk_gpio_irq_chip);
488 set_irq_handler(i, handle_edge_irq);
489 set_irq_flags(i, IRQF_VALID);
490 set_irq_chip_data(i, nmk_chip);
491 set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
493 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
494 set_irq_data(nmk_chip->parent_irq, nmk_chip);
499 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
501 struct nmk_gpio_chip *nmk_chip =
502 container_of(chip, struct nmk_gpio_chip, chip);
504 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
508 static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
510 struct nmk_gpio_chip *nmk_chip =
511 container_of(chip, struct nmk_gpio_chip, chip);
512 u32 bit = 1 << offset;
514 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
517 static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
520 struct nmk_gpio_chip *nmk_chip =
521 container_of(chip, struct nmk_gpio_chip, chip);
522 u32 bit = 1 << offset;
525 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
527 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
530 static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
533 struct nmk_gpio_chip *nmk_chip =
534 container_of(chip, struct nmk_gpio_chip, chip);
536 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
537 nmk_gpio_set_output(chip, offset, val);
542 static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
544 struct nmk_gpio_chip *nmk_chip =
545 container_of(chip, struct nmk_gpio_chip, chip);
547 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
550 /* This structure is replicated for each GPIO block allocated at probe time */
551 static struct gpio_chip nmk_gpio_template = {
552 .direction_input = nmk_gpio_make_input,
553 .get = nmk_gpio_get_input,
554 .direction_output = nmk_gpio_make_output,
555 .set = nmk_gpio_set_output,
556 .to_irq = nmk_gpio_to_irq,
557 .ngpio = NMK_GPIO_PER_CHIP,
561 static int __init nmk_gpio_probe(struct platform_device *dev)
563 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
564 struct nmk_gpio_chip *nmk_chip;
565 struct gpio_chip *chip;
566 struct resource *res;
574 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
580 irq = platform_get_irq(dev, 0);
586 if (request_mem_region(res->start, resource_size(res),
587 dev_name(&dev->dev)) == NULL) {
592 clk = clk_get(&dev->dev, NULL);
600 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
606 * The virt address in nmk_chip->addr is in the nomadik register space,
607 * so we can simply convert the resource address, without remapping
610 nmk_chip->addr = io_p2v(res->start);
611 nmk_chip->chip = nmk_gpio_template;
612 nmk_chip->parent_irq = irq;
613 spin_lock_init(&nmk_chip->lock);
615 chip = &nmk_chip->chip;
616 chip->base = pdata->first_gpio;
617 chip->label = pdata->name;
618 chip->dev = &dev->dev;
619 chip->owner = THIS_MODULE;
621 ret = gpiochip_add(&nmk_chip->chip);
625 platform_set_drvdata(dev, nmk_chip);
627 nmk_gpio_init_irq(nmk_chip);
629 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
630 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
639 release_mem_region(res->start, resource_size(res));
641 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
642 pdata->first_gpio, pdata->first_gpio+31);
646 static struct platform_driver nmk_gpio_driver = {
648 .owner = THIS_MODULE,
651 .probe = nmk_gpio_probe,
652 .suspend = NULL, /* to be done */
656 static int __init nmk_gpio_init(void)
658 return platform_driver_register(&nmk_gpio_driver);
661 core_initcall(nmk_gpio_init);
663 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
664 MODULE_DESCRIPTION("Nomadik GPIO Driver");
665 MODULE_LICENSE("GPL");