Pileus Git - ~andy/linux/blob - arch/arm/mach-zynq/common.c

   1 /*
   2  * This file contains common code that is intended to be used across
   3  * boards so that it's not replicated.
   4  *
   5  *  Copyright (C) 2011 Xilinx
   6  *
   7  * This software is licensed under the terms of the GNU General Public
   8  * License version 2, as published by the Free Software Foundation, and
   9  * may be copied, distributed, and modified under those terms.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/init.h>
  18 #include <linux/kernel.h>
  19 #include <linux/cpumask.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/clk.h>
  22 #include <linux/of_irq.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/of.h>
  25
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/page.h>
  30 #include <asm/hardware/gic.h>
  31 #include <asm/hardware/cache-l2x0.h>
  32
  33 #include <mach/zynq_soc.h>
  34 #include "common.h"
  35
  36 static struct of_device_id zynq_of_bus_ids[] __initdata = {
  37         { .compatible = "simple-bus", },
  38         {}
  39 };
  40
  41 /**
  42  * xilinx_init_machine() - System specific initialization, intended to be
  43  *                         called from board specific initialization.
  44  */
  45 static void __init xilinx_init_machine(void)
  46 {
  47         /*
  48          * 64KB way size, 8-way associativity, parity disabled
  49          */
  50         l2x0_of_init(0x02060000, 0xF0F0FFFF);
  51
  52         of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
  53 }
  54
  55 static struct of_device_id irq_match[] __initdata = {
  56         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  57         { }
  58 };
  59
  60 /**
  61  * xilinx_irq_init() - Interrupt controller initialization for the GIC.
  62  */
  63 static void __init xilinx_irq_init(void)
  64 {
  65         of_irq_init(irq_match);
  66 }
  67
  68 /* The minimum devices needed to be mapped before the VM system is up and
  69  * running include the GIC, UART and Timer Counter.
  70  */
  71
  72 static struct map_desc io_desc[] __initdata = {
  73         {
  74                 .virtual        = TTC0_VIRT,
  75                 .pfn            = __phys_to_pfn(TTC0_PHYS),
  76                 .length         = SZ_4K,
  77                 .type           = MT_DEVICE,
  78         }, {
  79                 .virtual        = SCU_PERIPH_VIRT,
  80                 .pfn            = __phys_to_pfn(SCU_PERIPH_PHYS),
  81                 .length         = SZ_8K,
  82                 .type           = MT_DEVICE,
  83         },
  84
  85 #ifdef CONFIG_DEBUG_LL
  86         {
  87                 .virtual        = UART0_VIRT,
  88                 .pfn            = __phys_to_pfn(UART0_PHYS),
  89                 .length         = SZ_4K,
  90                 .type           = MT_DEVICE,
  91         },
  92 #endif
  93
  94 };
  95
  96 /**
  97  * xilinx_map_io() - Create memory mappings needed for early I/O.
  98  */
  99 static void __init xilinx_map_io(void)
 100 {
 101         iotable_init(io_desc, ARRAY_SIZE(io_desc));
 102 }
 103
 104 static const char *xilinx_dt_match[] = {
 105         "xlnx,zynq-ep107",
 106         NULL
 107 };
 108
 109 MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
 110         .map_io         = xilinx_map_io,
 111         .init_irq       = xilinx_irq_init,
 112         .handle_irq     = gic_handle_irq,
 113         .init_machine   = xilinx_init_machine,
 114         .timer          = &xttcpss_sys_timer,
 115         .dt_compat      = xilinx_dt_match,
 116 MACHINE_END