2 * Copyright (C) ST-Ericsson SA 2010
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
8 #include <linux/kernel.h>
9 #include <linux/platform_device.h>
10 #include <linux/interrupt.h>
12 #include <linux/gpio.h>
13 #include <linux/amba/bus.h>
14 #include <linux/amba/pl022.h>
15 #include <linux/platform_data/dma-ste-dma40.h>
16 #include <linux/mfd/dbx500-prcmu.h>
21 #include "db8500-regs.h"
22 #include "devices-db8500.h"
23 #include "ste-dma40-db8500.h"
25 static struct resource dma40_resources[] = {
27 .start = U8500_DMA_BASE,
28 .end = U8500_DMA_BASE + SZ_4K - 1,
29 .flags = IORESOURCE_MEM,
33 .start = U8500_DMA_LCPA_BASE,
34 .end = U8500_DMA_LCPA_BASE + 2 * SZ_1K - 1,
35 .flags = IORESOURCE_MEM,
39 .start = IRQ_DB8500_DMA,
40 .end = IRQ_DB8500_DMA,
41 .flags = IORESOURCE_IRQ,
46 * Mapping between destination event lines and physical device address.
47 * The event line is tied to a device and therefore the address is constant.
48 * When the address comes from a primecell it will be configured in runtime
49 * and we set the address to -1 as a placeholder.
51 static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = {
52 /* MUSB - these will be runtime-reconfigured */
53 [DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8] = -1,
54 [DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15] = -1,
55 [DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14] = -1,
56 [DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13] = -1,
57 [DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12] = -1,
58 [DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11] = -1,
59 [DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10] = -1,
60 [DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9] = -1,
61 /* PrimeCells - run-time configured */
62 [DB8500_DMA_DEV0_SPI0] = -1,
63 [DB8500_DMA_DEV1_SD_MMC0] = -1,
64 [DB8500_DMA_DEV2_SD_MMC1] = -1,
65 [DB8500_DMA_DEV3_SD_MMC2] = -1,
66 [DB8500_DMA_DEV8_SSP0] = -1,
67 [DB8500_DMA_DEV9_SSP1] = -1,
68 [DB8500_DMA_DEV11_UART2] = -1,
69 [DB8500_DMA_DEV12_UART1] = -1,
70 [DB8500_DMA_DEV13_UART0] = -1,
71 [DB8500_DMA_DEV28_SD_MM2] = -1,
72 [DB8500_DMA_DEV29_SD_MM0] = -1,
73 [DB8500_DMA_DEV32_SD_MM1] = -1,
74 [DB8500_DMA_DEV33_SPI2] = -1,
75 [DB8500_DMA_DEV35_SPI1] = -1,
76 [DB8500_DMA_DEV40_SPI3] = -1,
77 [DB8500_DMA_DEV41_SD_MM3] = -1,
78 [DB8500_DMA_DEV42_SD_MM4] = -1,
79 [DB8500_DMA_DEV43_SD_MM5] = -1,
80 [DB8500_DMA_DEV14_MSP2] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
81 [DB8500_DMA_DEV30_MSP1] = U8500_MSP1_BASE + MSP_TX_RX_REG_OFFSET,
82 [DB8500_DMA_DEV31_MSP0_SLIM0_CH0] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
83 [DB8500_DMA_DEV48_CAC1] = U8500_CRYP1_BASE + CRYP1_TX_REG_OFFSET,
84 [DB8500_DMA_DEV50_HAC1_TX] = U8500_HASH1_BASE + HASH1_TX_REG_OFFSET,
87 /* Mapping between source event lines and physical device address */
88 static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = {
89 /* MUSB - these will be runtime-reconfigured */
90 [DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8] = -1,
91 [DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15] = -1,
92 [DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14] = -1,
93 [DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13] = -1,
94 [DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12] = -1,
95 [DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11] = -1,
96 [DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10] = -1,
97 [DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9] = -1,
99 [DB8500_DMA_DEV0_SPI0] = -1,
100 [DB8500_DMA_DEV1_SD_MMC0] = -1,
101 [DB8500_DMA_DEV2_SD_MMC1] = -1,
102 [DB8500_DMA_DEV3_SD_MMC2] = -1,
103 [DB8500_DMA_DEV8_SSP0] = -1,
104 [DB8500_DMA_DEV9_SSP1] = -1,
105 [DB8500_DMA_DEV11_UART2] = -1,
106 [DB8500_DMA_DEV12_UART1] = -1,
107 [DB8500_DMA_DEV13_UART0] = -1,
108 [DB8500_DMA_DEV28_SD_MM2] = -1,
109 [DB8500_DMA_DEV29_SD_MM0] = -1,
110 [DB8500_DMA_DEV32_SD_MM1] = -1,
111 [DB8500_DMA_DEV33_SPI2] = -1,
112 [DB8500_DMA_DEV35_SPI1] = -1,
113 [DB8500_DMA_DEV40_SPI3] = -1,
114 [DB8500_DMA_DEV41_SD_MM3] = -1,
115 [DB8500_DMA_DEV42_SD_MM4] = -1,
116 [DB8500_DMA_DEV43_SD_MM5] = -1,
117 [DB8500_DMA_DEV14_MSP2] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
118 [DB8500_DMA_DEV30_MSP3] = U8500_MSP3_BASE + MSP_TX_RX_REG_OFFSET,
119 [DB8500_DMA_DEV31_MSP0_SLIM0_CH0] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
120 [DB8500_DMA_DEV48_CAC1] = U8500_CRYP1_BASE + CRYP1_RX_REG_OFFSET,
123 static struct stedma40_platform_data dma40_plat_data = {
124 .dev_len = DB8500_DMA_NR_DEV,
125 .dev_rx = dma40_rx_map,
126 .dev_tx = dma40_tx_map,
127 .disabled_channels = {-1},
130 struct platform_device u8500_dma40_device = {
132 .platform_data = &dma40_plat_data,
136 .num_resources = ARRAY_SIZE(dma40_resources),
137 .resource = dma40_resources
140 struct resource keypad_resources[] = {
142 .start = U8500_SKE_BASE,
143 .end = U8500_SKE_BASE + SZ_4K - 1,
144 .flags = IORESOURCE_MEM,
147 .start = IRQ_DB8500_KB,
148 .end = IRQ_DB8500_KB,
149 .flags = IORESOURCE_IRQ,
153 struct platform_device u8500_ske_keypad_device = {
154 .name = "nmk-ske-keypad",
156 .num_resources = ARRAY_SIZE(keypad_resources),
157 .resource = keypad_resources,
160 struct prcmu_pdata db8500_prcmu_pdata = {
161 .ab_platdata = &ab8500_platdata,
162 .ab_irq = IRQ_DB8500_AB8500,
163 .irq_base = IRQ_PRCMU_BASE,
164 .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
165 .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
168 static struct resource db8500_prcmu_res[] = {
171 .start = U8500_PRCMU_BASE,
172 .end = U8500_PRCMU_BASE + SZ_8K - 1,
173 .flags = IORESOURCE_MEM,
176 .name = "prcmu-tcdm",
177 .start = U8500_PRCMU_TCDM_BASE,
178 .end = U8500_PRCMU_TCDM_BASE + SZ_4K - 1,
179 .flags = IORESOURCE_MEM,
183 .start = IRQ_DB8500_PRCMU1,
184 .end = IRQ_DB8500_PRCMU1,
185 .flags = IORESOURCE_IRQ,
188 .name = "prcmu-tcpm",
189 .start = U8500_PRCMU_TCPM_BASE,
190 .end = U8500_PRCMU_TCPM_BASE + SZ_4K - 1,
191 .flags = IORESOURCE_MEM,
195 struct platform_device db8500_prcmu_device = {
196 .name = "db8500-prcmu",
197 .resource = db8500_prcmu_res,
198 .num_resources = ARRAY_SIZE(db8500_prcmu_res),
200 .platform_data = &db8500_prcmu_pdata,